Method for preparing high-density silicon microneedle array and device
By using positive reflow photoresist and negative photoresist layers as masks on a silicon substrate, combined with dry etching technology, the problem of insufficient aspect ratio of microneedles in the prior art has been solved, and high-density silicon microneedle arrays have been fabricated, improving the aspect ratio and ensuring process compatibility and safety.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SUZHOU RES MATERIALS MICRONANO TECH CO LTD
- Filing Date
- 2022-12-29
- Publication Date
- 2026-07-07
Smart Images
Figure CN116119604B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a fabrication method and device, and more particularly to a fabrication method and device for a high-density silicon microneedle array. Background Technology
[0002] Currently, there are many materials available for microneedle fabrication, including single-crystal silicon, various metals, and various polymers, but single-crystal silicon is the most commonly used microneedle template. As a conventional material in micro-nano fabrication, single-crystal silicon can be used to create microneedle arrays by performing micro-nano processes such as photolithography, dry or wet etching, and film deposition on silicon-based surfaces.
[0003] Most existing silicon microneedles are fabricated through a series of processes including photolithography, dry etching, and wet etching. Wet etching of silicon materials to prepare microneedle arrays utilizes different etching solutions to etch silicon materials anisotropically and isotropically, controlling etching conditions such as solution concentration, etching temperature, and etching time to obtain microneedle arrays. However, wet etching has limitations in the aspect ratio of microneedles, making it difficult to meet practical application requirements. Summary of the Invention
[0004] The purpose of this invention is to overcome the shortcomings of the existing technology and provide a method and device for fabricating high-density silicon microneedle arrays. This method can effectively fabricate high-density silicon microneedle arrays, improve the aspect ratio of silicon microneedle arrays, is compatible with existing processes, and is safe and reliable.
[0005] According to the technical solution provided by the present invention, a method for fabricating a high-density silicon microneedle array includes:
[0006] A silicon substrate is provided, and a negative photoresist layer is prepared on the silicon substrate;
[0007] Patterning of the negative photoresist layer;
[0008] A corresponding positive photoresist layer is prepared on the patterned negative photoresist layer;
[0009] The positive photoresist layer prepared above is heated and reflowed to obtain a positive reflow photoresist layer;
[0010] The silicon substrate is dry etched using the above-mentioned positive reflow photoresist layer and patterned negative photoresist layer to form the desired silicon microneedle array after etching. The silicon microneedle array includes microneedles distributed on the silicon substrate. Each microneedle includes a needle body portion distributed on the silicon substrate and a needle head located on the needle body portion.
[0011] Remove the positive reflow photoresist layer and the patterned negative photoresist layer.
[0012] The thickness of the silicon substrate is 300μm to 1000μm.
[0013] The thickness of the negative photoresist layer is 10μm to 50μm.
[0014] The positive photoresist layer is prepared on the negative photoresist layer by spraying, and the thickness of the positive photoresist layer is 5μm to 20μm.
[0015] When reflowing the positive photoresist layer, the reflow temperature is 110℃~150℃ and the reflow time is 5min~20min;
[0016] The positive reflow photoresist layer obtained after heating and reflow has a hemispherical cross-section.
[0017] For the microneedle, the height of the needle head is 1μm to 10μm, and the height of the needle body is 50μm to 400μm.
[0018] During dry etching, bulk SF6 gas is used for etching, and C4F8 gas is used for passivation.
[0019] The flow rate of the etching gas SF6 is 60 sccm to 90 sccm, and the flow rate of the passivation gas is 80 sccm to 120 sccm.
[0020] In one etching cycle, the etching and passivation times are 5s / 4s, and the etching selectivity ratio is maintained at 5:1.
[0021] The positive reflow photoresist layer and the patterned negative photoresist layer were removed using a wet process.
[0022] A high-density silicon microneedle array device, the device comprising a silicon microneedle array, wherein the silicon microneedle array is prepared using the above-described preparation method.
[0023] Advantages of this invention: By using the above-mentioned positive reflow photoresist layer and the patterned negative photoresist layer as masks, a silicon substrate is dry etched to form the required silicon microneedle array after etching. The silicon microneedle array includes several microneedles, which can effectively prepare a high-density silicon microneedle array, improve the aspect ratio of the silicon microneedle array, be compatible with existing processes, and be safe and reliable. Attached Figure Description
[0024] Figures 1 to 8 This is a cross-sectional view of the preparation process steps according to an embodiment of the present invention, wherein,
[0025] Figure 1 This is a cross-sectional view of the silicon substrate of the present invention.
[0026] Figure 2 This is a cross-sectional view of the negative photoresist layer after patterning according to the present invention.
[0027] Figure 3 This is a cross-sectional view of the positive photoresist layer prepared according to the present invention.
[0028] Figure 4 This is a cross-sectional view of the positive photoresist layer obtained by heating and reflowing the positive photoresist layer according to the present invention.
[0029] Figure 5 This is a cross-sectional view of the silicon substrate after etching according to the present invention.
[0030] Figure 6 To Figure 5 A cross-sectional view of the silicon substrate after dry etching.
[0031] Figure 7 To Figure 6 A cross-sectional view of the silicon substrate after dry etching.
[0032] Figure 8 This is a cross-sectional view of the silicon microneedle array prepared according to the present invention.
[0033] Explanation of reference numerals in the attached figures: 1-silicon substrate, 2-negative photoresist layer, 3-positive photoresist layer, 4-negative photoresist layer window, 5-positive reflow photoresist layer, 6-spacer trench, 7-silicon pillar, and 8-microneedle. Detailed Implementation
[0034] The present invention will be further described below with reference to specific accompanying drawings and embodiments.
[0035] In order to effectively prepare high-density silicon microneedle arrays and improve the aspect ratio of the silicon microneedle arrays, in one embodiment of the present invention, the method for preparing high-density silicon microneedle arrays includes:
[0036] A silicon substrate 1 is provided, and a negative photoresist layer 2 is prepared on the silicon substrate 1;
[0037] Patterning of negative photoresist layer 2;
[0038] A corresponding positive photoresist layer 3 is prepared on the patterned negative photoresist layer 2;
[0039] The positive photoresist layer 3 prepared above is heated and reflowed to obtain the positive reflow photoresist layer 5;
[0040] The silicon substrate 1 is dry etched using the positive reflow photoresist layer 5 and the patterned negative photoresist layer 2 to form the required silicon microneedle array after etching. The silicon microneedle array includes microneedle bodies 8 distributed on the silicon substrate 1. Each microneedle body includes a needle body portion distributed on the silicon substrate 1 and a needle head located on the needle body portion.
[0041] Remove the positive reflow photoresist layer 5 and the patterned negative photoresist layer 2.
[0042] Figure 1 The diagram shows a silicon substrate 1. The silicon substrate 1 can generally be a single-sided polished silicon wafer. The thickness of the silicon substrate 1 is 300μm to 1000μm. The thickness of the silicon substrate 1 can be selected as needed to meet the requirements for fabricating the silicon microneedle array.
[0043] A negative photoresist layer 2 is prepared on a silicon substrate 1 using commonly used methods. The type of photoresist used in the negative photoresist layer 2 can be selected according to needs, such as HTI910 photoresist. The specific process for preparing the negative photoresist layer 2 on the silicon substrate 1 is as follows: First, the spin coater rotates at a low speed of 600 r / s to 750 r / s for 15 to 18 seconds to spread the photoresist liquid on the silicon substrate 1; then, it accelerates to 900 r / s to 5000 r / s and rotates for 30 to 40 seconds to uniformly coat the photoresist liquid onto the silicon substrate 1; after the photoresist is uniformly coated on the silicon substrate 1, it is placed on a hot plate at 120℃ to 125℃ and baked for 5 to 15 minutes. The thickness of the negative photoresist layer 2 obtained by spin coating is 10 μm to 50 μm.
[0044] After preparing the negative photoresist layer 2, it is patterned to obtain several negative photoresist layer windows 4. These windows 4 penetrate the negative photoresist layer 2, exposing the corresponding surfaces of the silicon substrate 1. Figure 2 As shown. The patterning of the negative photoresist layer 2 can be achieved using existing and commonly used techniques. One example of patterning is as follows:
[0045] UV contact exposure was performed using a negative photoresist mask to copy the pattern from the negative photoresist mask onto negative photoresist layer 2. The exposure time was 20-30 seconds, and the exposure intensity was 9 mW / cm². 2 The photolithographic pattern on the negative photoresist mask is an array of circles with a diameter of 5μm to 50μm and a center-to-center distance of 5μm to 100μm. After exposure, the silicon substrate 1 is left to stand for a period of time before being placed in the developer and agitated for 3 to 5 minutes until it is completely developed. After development, the silicon substrate 1 is placed on a hot plate at 120℃ to 125℃ and baked for 10 to 15 minutes to harden the film and remove any residual solvent from the negative photoresist layer 2. At this point, the patterning of the negative photoresist layer 2 is complete.
[0046] A corresponding positive photoresist layer 3 is prepared on the patterned negative photoresist layer 2. The positive photoresist layer 3 is prepared on the negative photoresist layer 2 by spraying, and the thickness of the positive photoresist layer is 5 μm to 20 μm. The method and process for preparing the positive photoresist layer 3 can be as follows:
[0047] The photoresist used for the positive photoresist layer 3 is AZ4620, which is applied using a spray gun. AZ4620 is mixed with a thinner in a predetermined ratio; 99% acetone can be used as the thinner. The volume ratio of AZ4620 photoresist to acetone is 1:9. The spray gun pressure is set to 0.05 MPa, the spray temperature to 100°C, and the purge pressure to 0.2 MPa. The coating thickness is 5 μm to 20 μm, and the baking temperature is 100°C for 3 to 10 minutes.
[0048] After spraying, a forward photoresist mask is used for ultraviolet contact exposure to transfer the pattern from the forward photoresist mask onto the sprayed photoresist layer. Alignment and exposure are required. The exposure time is 20-40 seconds, and the exposure intensity is 9 mW / cm². 2 The photolithographic pattern on the forward photoresist mask is an array of circles with a diameter of 5μm to 50μm and a center-to-center distance of 5μm to 100μm. After exposure, the silicon substrate 1 is placed in the developer and agitated for 2 to 5 minutes until it is completely developed. At this point, a positive photoresist layer 3 corresponding to the patterned negative photoresist layer 2 is obtained. That is, the forward photoresist layer 3 and the patterned negative photoresist layer 2 have the same pattern. Figure 3 As shown.
[0049] When reflowing the positive photoresist layer 3, the specific reflow process can be as follows: place the silicon substrate 1 on a hot plate, set the hot plate temperature to 110℃~120℃, and bake for 5min~20min. After baking, the morphology of the positive photoresist layer 3 is hemispherical, that is, due to the reflow of the positive photoresist under high temperature conditions, a hemispherical shape is formed. At this time, the positive reflow photoresist layer 5 is obtained; while the morphology of the negative photoresist layer 2 does not change under high temperature conditions, such as... Figure 4 As shown. Figure 4 In the process, the positive reflow photoresist layer 5 obtained after heating and reflow has a hemispherical cross-section.
[0050] As explained above, the negative photoresist for negative photoresist layer 2 needs to meet the following requirements: 1) Since a positive photoresist layer 3 needs to be coated on negative photoresist layer 2, it must be ensured that the positive photoresist layer 3 and negative photoresist layer 2 are immiscible; 2) Since secondary photolithography is required subsequently, and the silicon substrate 1 has already been patterned, and the positive photoresist layer 3 is prepared by spray coating, negative photoresist layer 2 needs to be resistant to the thinner of the upper positive photoresist layer 3; 3) Since the positive photoresist layer 3 needs to be reflowed, the reflow temperature of negative photoresist layer 2 must be higher than that of positive photoresist layer 3. Specifically, HTI910 and SU8 series photoresists can be used for negative photoresist layer 2.
[0051] Dry etching was performed on silicon substrate 1 using a reactive ion deep silicon etching (RIE) system. The etching power was adjusted to 800W–1000W, the passivation power to 200W–400W, and the flow rates of etching gas SF6 and passivation gas C4F8 were adjusted. The flow rate of etching gas SF6 was 60 sccm–90 sccm, and the flow rate of passivation gas C4F8 was 80 sccm–120 sccm. The etching and passivation times in one cycle were 5 s and 4 s, respectively, and the etching selectivity ratio was maintained at approximately 5:1.
[0052] Because the hemispherical positive reflow photoresist layer 5 has a thinner edge and a relatively thicker center, after multiple etching processes on the silicon substrate 1, several microneedles 8 can be obtained. Each microneedle 8 includes a needle body and a needle head. The lower end of the needle body is integrated with the silicon substrate 1, and the needle head is integrated with the upper end of the needle body. Using the positive reflow photoresist layer 5 and the patterned negative photoresist layer as masks, the needle head is made into a needle tip shape. All microneedles 8 are parallel to each other on the silicon substrate 1. The height of the needle head is 1 μm to 10 μm, and the height of the needle body is 50 μm to 400 μm.
[0053] Specifically, for a microneedle 8, the ratio of the height of the microneedle 8 to the spacing between adjacent microneedles 8 is far more than 1:1, at least 10:1, and even 20:1, which can achieve a very large depth-to-spacing ratio.
[0054] Furthermore, the positive reflow photoresist layer 5 and the patterned negative photoresist layer 2 are removed using a wet method. In practice, acetone and isopropanol can be used for organic cleaning. When using acetone and isopropanol for cleaning, the specific ratio can be selected as needed to effectively remove the positive reflow photoresist layer 5 and the patterned negative photoresist layer 2.
[0055] In summary, a high-density silicon microneedle array device is provided, the device comprising a silicon microneedle array, wherein the silicon microneedle array is prepared using the above-described preparation method.
[0056] As can be seen from the above description, the silicon microneedle array includes several parallel distributed microneedles 8. The specific preparation process of the microneedles 8 can be referred to the above description, and will not be repeated here.
Claims
1. A method for fabricating a high-density silicon microneedle array, characterized in that, The method for fabricating the silicon microneedle array includes: A silicon substrate is provided, and a negative photoresist layer is prepared on the silicon substrate; Patterning of the negative photoresist layer; A corresponding positive photoresist layer is prepared on the patterned negative photoresist layer; The positive photoresist layer prepared above is heated and reflowed to obtain a positive reflow photoresist layer; The silicon substrate is dry etched using the above-mentioned positive reflow photoresist layer and patterned negative photoresist layer to form the desired silicon microneedle array after etching. The silicon microneedle array includes microneedles distributed on the silicon substrate. Each microneedle includes a needle body portion distributed on the silicon substrate and a needle head located on the needle body portion. Remove the positive reflow photoresist layer and the patterned negative photoresist layer.
2. The method for fabricating a high-density silicon microneedle array according to claim 1, characterized in that: The thickness of the silicon substrate is 300μm to 1000μm.
3. The method for fabricating a high-density silicon microneedle array according to claim 1, characterized in that: The thickness of the negative photoresist layer is 10μm~50μm.
4. The method for fabricating a high-density silicon microneedle array according to claim 1, characterized in that: The positive photoresist layer is prepared on the negative photoresist layer by spraying, and the thickness of the positive photoresist layer is 5μm to 20μm.
5. The method for fabricating a high-density silicon microneedle array according to claim 1, characterized in that: When reflowing the positive photoresist layer, the reflow temperature is 110℃~150℃ and the reflow time is 5min~20min; The cross-section of the positive reflow photoresist layer is hemispherical.
6. The method for fabricating a high-density silicon microneedle array according to claim 1, characterized in that: The height of the needle head is 1μm~10μm, and the height of the needle body is 50μm~400μm.
7. The method for fabricating a high-density silicon microneedle array according to any one of claims 1 to 6, characterized in that, During dry etching, SF6 gas is used for etching, and C4F8 gas is used for passivation. The flow rate of the etching gas SF6 is 60 sccm to 90 sccm, and the flow rate of the passivation gas is 80 sccm to 120 sccm. In one etching cycle, the etching and passivation times are 5s / 4s, and the etching selectivity ratio is maintained at 5:
1.
8. The method for fabricating a high-density silicon microneedle array according to claim 1, characterized in that: The positive reflow photoresist layer and the patterned negative photoresist layer were removed using a wet process.
9. A high-density silicon microneedle array device, characterized in that, The device includes a silicon microneedle array, wherein the silicon microneedle array is prepared by the preparation method of any one of claims 1 to 8.