Computer-readable storage medium, display device, driving circuit, and driving method thereof

Abstract

The present disclosure provides a computer-readable storage medium, a display device, a driving circuit thereof, and a driving method, relating to the field of display technology. The display device includes a display panel; the driving circuit includes a timing controller, a first memory, and a second memory; the timing controller is configured to: when the device is powered on, obtain display data and first compensation information, and verify the first compensation information; if the verification result is an error, obtain second compensation information stored in the second memory, and control the display panel to display an image based on the display data and the second compensation information; and write the second compensation information into the first memory as the first compensation information; and, when the device is powered on, update the first compensation information and the second compensation information based on the display data, with the first compensation information and the second compensation information being updated at different times.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular, to a computer-readable storage medium, a display device, a driving circuit for a display device, and a driving method for a display device. Background Art

[0002] Display devices using organic light-emitting diodes (OLEDs) have been widely used in mobile phones, televisions, and other terminal devices. However, organic light-emitting materials have a limited lifespan and are prone to display burn-in over time, resulting in display anomalies such as black screens.

[0003] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute prior art known to ordinary technicians in the field. Summary of the Invention

[0004] The purpose of the present disclosure is to overcome the deficiencies of the above-mentioned prior art and to provide a computer-readable storage medium, a display device, a driving circuit for a display device, and a driving method for a display device, which can reduce the risk of display anomalies such as a black screen.

[0005] According to one aspect of the present disclosure, a driving circuit for a display device is provided, wherein the display device includes a display panel connected to the driving circuit; the driving circuit includes a timing controller and a first memory and a second memory connected to the timing controller;

[0006] The timing controller is configured as follows:

[0007] Upon power-on, obtaining display data and first compensation information stored in a first memory, and verifying the first compensation information; if the verification result is an error, obtaining second compensation information stored in a second memory, and controlling the display panel to display an image according to the display data and the second compensation information; and writing the second compensation information as the first compensation information into the first memory; and

[0008] In a power-on state, the first compensation information and the second compensation information are updated according to the display data, and the first compensation information and the second compensation information are updated at different times.

[0009] In an exemplary embodiment of the present disclosure, the timing controller is further configured to:

[0010] If the verification result is correct, the display panel is controlled to display an image according to the display data and the first compensation information, and the first compensation information is written into the second memory as the second compensation information.

[0011] In an exemplary embodiment of the present disclosure, the timing controller is configured as follows:

[0012] In a power-on state, the first compensation information and the second compensation information are alternately updated according to the display data.

[0013] In an exemplary embodiment of the present disclosure, the timing controller is configured as follows:

[0014] In the power-on state, the first compensation information is updated every specified time period.

[0015] In an exemplary embodiment of the present disclosure, the timing controller is configured as follows:

[0016] In the power-on state, the first compensation information is acquired every specified time period, and new compensation information is generated according to the display data and the first compensation information acquired most recently, and is written into the first memory.

[0017] In an exemplary embodiment of the present disclosure, the specified time length is 8-20 seconds.

[0018] In an exemplary embodiment of the present disclosure, each of the first compensation information includes unique verification information; the timing controller is configured to: store the verification information of the first compensation information updated most recently;

[0019] Verifying the first compensation information; comprising:

[0020] Determine whether the obtained verification information of the first compensation information is consistent with the stored verification information of the first compensation information; if the result is yes, the verification result is correct; if the result is no, the verification result is wrong.

[0021] In an exemplary embodiment of the present disclosure, the first compensation information and the second compensation information include at least one of gamma correction information, color compensation information, attenuation compensation information, and performance information.

[0022] In an exemplary embodiment of the present disclosure, both the first memory and the second memory are FLASH memories.

[0023] According to one aspect of the present disclosure, a method for driving a display device is provided, wherein the display device includes a display panel connected to a driving circuit; the driving circuit includes a timing controller and a first memory and a second memory connected to the timing controller; the driving method includes:

[0024] Upon power-on, obtaining display data and first compensation information stored in a first memory, and verifying the first compensation information; if the verification result is an error, obtaining second compensation information stored in a second memory, and controlling the display panel to display an image according to the display data and the second compensation information; and writing the second compensation information as the first compensation information into the second memory; and

[0025] In a power-on state, the first compensation information and the second compensation information are updated according to the display data, and the first compensation information and the second compensation information are updated at different times.

[0026] In an exemplary embodiment of the present disclosure, the driving method further includes:

[0027] If the verification result is correct, the display panel is controlled to display an image according to the display data and the first compensation information, and the first compensation information is written into the second memory as the second compensation information.

[0028] In an exemplary embodiment of the present disclosure, updating the first compensation information and the second compensation information according to the display data includes:

[0029] In a power-on state, the first compensation information and the second compensation information are alternately updated according to the display data.

[0030] In an exemplary embodiment of the present disclosure, the driving method further includes:

[0031] In the power-on state, the first compensation information is updated every specified time period.

[0032] In an exemplary embodiment of the present disclosure, updating the first compensation information once every specified time period includes:

[0033] The first compensation information is acquired every specified time period, and new compensation information is generated according to the display data and the first compensation information acquired most recently, and is written into the first memory.

[0034] In an exemplary embodiment of the present disclosure, each of the first compensation information includes unique verification information;

[0035] Verifying the first compensation information; comprising:

[0036] Determine whether the obtained verification information of the first compensation information is consistent with the stored verification information of the most recent update of the first compensation information; if the result is yes, the verification result is correct; if the result is no, the verification result is wrong.

[0037] According to one aspect of the present disclosure, a display device is provided, comprising a display panel and any one of the above-mentioned driving circuits connected to the display panel.

[0038] In an exemplary embodiment of the present disclosure, the display device further includes a flexible circuit board, the driving circuit is provided on a circuit board, and the circuit board is connected to the display panel via the flexible circuit board.

[0039] According to one aspect of the present disclosure, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, any one of the driving methods described above is implemented.

[0040] The computer-readable storage medium, display device, and driver circuit and method disclosed herein can display an image based on compensation information and display data. Due to differences in attenuation conditions, etc., between display panels, the compensation information varies. As the display panel's operating time increases, to ensure a good display quality, the compensation information can be updated while the device is powered on, aligning the compensation information with the attenuation conditions, etc., of the display device. The compensation information can include first compensation information and second compensation information, and the first compensation information can be stored in a first memory, while the second compensation information is stored in a second memory. Because the first and second compensation information are updated at different times, when the display device is powered off, only one of the first and second compensation information is affected by parasitic capacitance and inductance and may become erroneous, i.e., at least one of the first and second compensation information is correct. Upon power-on, the first compensation information can be obtained. If the first compensation information is erroneous, the second compensation information is obtained, and the display panel is controlled to display an image based on the second compensation information and display data. Thus, even if a power outage occurs during the update of the first and second compensation information, only one of the two will be erroneous, ensuring that compensation information matching the display panel is obtained, reducing the risk of display anomalies such as a black screen.

[0041] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] The accompanying drawings are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification, are used to explain the principles of the present disclosure. Obviously, the drawings described below are only some embodiments of the present disclosure, and those skilled in the art can derive other drawings based on these drawings without inventive effort.

[0043] Figure 1 FIG. 1 is a schematic diagram of a display panel in one embodiment of the display device disclosed herein.

[0044] Figure 2 Schematic diagram of an embodiment of the display device disclosed herein.

[0045] Figure 3 This is a schematic diagram of an embodiment of a driving circuit of a display device disclosed herein.

[0046] Figure 4 This is a flowchart of an embodiment of the driving method disclosed herein. DETAILED DESCRIPTION

[0047] Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art. Like reference numerals in the figures represent identical or similar structures, and thus their detailed descriptions will be omitted. Furthermore, the figures are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale.

[0048] The terms "a", "an", "the", "said" and "at least one" are used to indicate the presence of one or more elements / components / etc.; the terms "including" and "having" are used to express open-ended inclusion and mean that additional elements / components / etc. may exist in addition to the listed elements / components / etc.; the terms "first" and "second" are used only as labels and do not limit the quantity of their objects.

[0049] like Figure 1-Figure 3 As shown, the embodiment of the present disclosure provides a display device, which may include a display panel 10 and a driving circuit 20. The display panel 10 may be controlled by the driving circuit 20 to display an image.

[0050] The display panel 10 may include a driving backplane BP and a plurality of light-emitting devices LD disposed on one side of the driving backplane BP. The driving backplane BP can drive each light-emitting device LD to independently emit light to display an image. Furthermore, the display panel 10 may include a display area 101 and a peripheral area 102 outside the display area 101. The light-emitting devices LD may be distributed within the display area 101.

[0051] like Figure 1As shown, the driving backplane BP may include a substrate and a circuit layer. The circuit layer may include a pixel circuit located in the display area 101 and a peripheral circuit located in the peripheral area 102. The pixel circuit may be connected to each light-emitting device LD in a one-to-one correspondence. Of course, the same pixel circuit may also be connected to multiple light-emitting devices LD. The peripheral circuit may be connected to the pixel circuit, and the peripheral circuit may include a source driver circuit and a gate driver circuit, and may also include a light-emitting control circuit. The circuit layer may include multiple transistors and capacitors. For example, the pixel circuit may be a 7T1C, 8T1C, 3T1C structure, etc., where T in nTmC refers to a transistor, C refers to a capacitor, n is the number of transistors, and m is the number of capacitors. The transistor may be a low-temperature polysilicon transistor, a metal oxide transistor, etc., and its type is not specifically limited here, and multiple types of transistors may also exist at the same time.

[0052] like Figure 1 As shown, the light-emitting device LD may be an organic light-emitting diode. Each light-emitting device LD may include a first electrode ANO, a light-emitting layer EL, and a second electrode CAT stacked in sequence in a direction away from the driving backplane BP. The first electrode ANO may be a multi-layer or single-layer structure, and its material may include at least one of metals such as titanium, aluminum, and silver, or a metal oxide such as indium tin oxide (ITO). The first electrodes ANO of each light-emitting device LD are arranged in an array.

[0053] like Figure 1 As shown, the light-emitting layer EL may include a hole injection layer, a hole transport layer, a luminescent composite layer, an electron transport layer, and an electron injection layer, arranged in a direction away from the driving backplane BP. The light-emitting layers EL of each light-emitting device LD may be arranged in an array, allowing different light-emitting devices LD to directly emit light of different colors. Alternatively, the light-emitting composite layers of the light-emitting layer EL may be arranged in an array, while the other layers may be a continuous, monolithic structure shared by each light-emitting device LD, also enabling different light-emitting devices LD to emit light of different colors. Alternatively, each light-emitting device LD may share the light-emitting layer EL, forming a continuous, monolithic structure, with each light-emitting device LD emitting the same color. In this case, a color filter layer may be provided on the side of the light-emitting device LD away from the driving backplane BP. The color filter layer may include multiple filter sections corresponding to each light-emitting device LD, and the different filter sections may have different colors, thereby achieving color display through the combination of the filter sections and the light-emitting devices LD.

[0054] like Figure 1 As shown, the material of the second electrode CAT may include at least one of titanium, aluminum, silver, and other metals, or may include metal oxides such as indium tin oxide (ITO). Furthermore, the second electrode CAT may be a continuous, integral layer structure, and each light-emitting device LD may share the second electrode CAT.

[0055] like Figure 2 and Figure 3As shown, the driving circuit 20 may include a timing controller 100 and a first memory 200. The timing controller 100 may be connected to the peripheral circuit and may control the gate driving circuit and the source driving circuit according to the received display data, thereby controlling each light-emitting device LD to emit light. The first memory 200 may be a FLASH memory, of course, other memories may also be used. The first memory 200 may store the first compensation information, and the timing controller 100 may communicate with the first memory 200 via an SPI interface (Serial Peripheral Interface). Of course, other communication methods may also be used. The timing controller 100 may generate a control signal based on the acquired display data and the first compensation information. The control signal may control each light-emitting device LD to emit light through the peripheral circuit and the pixel circuit to display an image.

[0056] In addition, if Figure 2 and Figure 3 As shown, the driving circuit 20 may also include a power management circuit 400 (PMIC) and a power interface 500 that are interconnected. The power interface 500 can be connected to an external power source, thereby powering the power management circuit 400 through the power interface 500, and the power supply voltage can be 3.3V. At the same time, the power management circuit 400 can control the voltage of the timing controller 100 and the first memory 200. For example, when the timing controller 100 and the first memory 200 transmit information, the communication voltage is lower than the voltage between the power interface 500 and the power management circuit 400. For example, when the timing controller 100 and the first memory 200 transmit information, the communication voltage is 1.8V, that is, the voltage of the SPI interface is 1.8V. Of course, the aforementioned voltage can adopt other values, but the communication voltage is lower than the voltage between the power interface 500 and the power management circuit 400, which is not specifically limited here.

[0057] like Figure 2 As shown, the driving circuit 20 can be provided on a circuit board 700, which can be a printed circuit board (PCB), and can be connected to the display panel 10 via one or more flexible circuit boards 600. Of course, the driving circuit 20 can also be integrated into the peripheral area 102 of the display panel 10. At the same time, the circuit board 700 can also be connected to the mainboard of the display device, so that images can be displayed under the control of the mainboard. The display data is transmitted by the mainboard to the timing controller 100 that drives the circuit board 700.

[0058] In some embodiments of the present disclosure, the first compensation information may include at least one of gamma correction information, color compensation information, attenuation compensation information and performance information, wherein: the gamma correction information (Gamma) is used to perform gamma correction according to the display data, and the specific principle of gamma correction is not described in detail here. The color compensation information may include Demura information, which is used to compensate for abnormal light-emitting color of the light-emitting device LD caused by process deviation and other reasons. The attenuation compensation information may include panel burn-in information (DeBurn in, DBI), which can be used to compensate for the impact on the brightness of the light-emitting device LD due to the attenuation of the material of the light-emitting layer EL. The performance information may include information such as the maximum image size and frequency range limit, which may include EDID (Extended display identification data).

[0059] The updating of the first compensation information mentioned herein may refer to updating at least one of the gamma correction information, the color compensation information, the attenuation compensation information, and the performance information, but is not limited to updating all the information.

[0060] like Figure 2 and Figure 3 As shown, when the display device leaves the factory, the initial compensation information may be burned into the first memory 200 .

[0061] During power-on, the timing controller 100 may be configured to retrieve first compensation information from the first memory 200 and generate a control signal based on the received display data to control the display panel 10 to display an image. In the power-on state, as the display time increases, the light-emitting layer EL of the light-emitting device LD decays. The timing controller 100 may determine the degree of decay of different light-emitting devices LD based on the display data and the retrieved first compensation information, and generate new first compensation information. The new first compensation information may be written into the first memory 200, overwriting the original first compensation information, thereby updating the first compensation information so that the first compensation information matches that of the display panel 10.

[0062] In some embodiments of the present disclosure, the first compensation information may be updated every specified time when the device is powered on. The specified time may be 12 seconds, that is, the first compensation information is updated every 12 seconds after the device is powered on.

[0063] The inventors discovered that during the process of the timing controller 100 communicating with the first memory 200 through the SPI interface, if a power outage occurs, the communication voltage when the timing controller 100 and the first memory 200 transmit information will not be powered off synchronously, but will slowly power off due to the resistance and capacitance load (RC Loading) of the display panel 10 and the driving circuit 20, and there will be fluctuations; at this time, if the timing controller 100 is writing the first compensation information into the first memory 200, the communication voltage will fluctuate around the threshold voltage of the normal writing information, causing errors in the written first compensation information. For example, due to the voltage fluctuation, the performance information stored at the starting position of the first memory 200 will be erroneously tampered with.

[0064] When the device is powered on next time, the first compensation information obtained by the timing control is erroneous information, and thus the correct information of the display panel 10 cannot be obtained, resulting in a black screen or other display abnormalities on the display panel 10 .

[0065] Based on the above problems, Figure 2 and Figure 3 As shown, in some embodiments of the present disclosure, the driving circuit 20 may further include a second memory 300 connected to the timing controller 100. The second memory 300 may be of the same type as the first memory, for example, both may be FLASH memories.

[0066] The second compensation information can be stored in the second memory 300. The first compensation information can be used as the main compensation information, and the second compensation information can be used as the backup compensation information. That is, the first memory 200 serves as the main memory and the second memory 300 serves as the backup memory. When the first compensation information is wrong, the timing controller 100 can obtain the second compensation information to realize image display and avoid display anomalies such as black screen. The following is a detailed description:

[0067] The timing controller 100 may also be configured as:

[0068] At startup, the display data and the first compensation information stored in the first memory 200 are obtained and verified. If the verification result is correct, it indicates that the first compensation information has not been tampered with as described in the above embodiment. At this time, the display panel 10 can be controlled to display an image based on the display data and the first compensation information. At the same time, the first compensation information can be written as the second compensation information into the second memory 300, thus achieving a correct backup of the first compensation information.

[0069] If the above verification result is an error, the timing controller 100 can obtain the second compensation information from the second memory 300, and control the display panel 10 to display the image according to the display data and the second compensation information; at the same time, the second compensation information is written into the first memory 200 as the first compensation information to correct the error information of the first memory 200.

[0070] Furthermore, in the power-on state, the timing controller 100 can also update the first compensation information and the second compensation information based on the display data, so that the first compensation information and the second compensation information match the attenuation state of the display panel 10. Furthermore, to prevent the first compensation information and the second compensation information from being simultaneously erroneous due to a power outage, the first compensation information and the second compensation information can be updated at different times. In other words, during a power outage, at most only one of the first compensation information and the second compensation information is being updated.

[0071] Furthermore, in some embodiments of the present disclosure, the timing controller 100 is configured as follows:

[0072] When the device is powered on, the first and second compensation information can be updated alternately based on the displayed data. That is, the first and second compensation information can be updated alternately. For example, after powering on, the first compensation information can be updated at specified intervals. If the specified interval is too short, the first compensation information may not change, or the change may be too small, resulting in unnecessary processing. If the specified interval is too long, the update may be delayed, resulting in reduced accuracy of the first compensation information. Therefore, the specified interval can be 8-20 seconds, such as 8 seconds, 10 seconds, 12 seconds, 15 seconds, or 20 seconds, to prevent update intervals from being too long or too short. Of course, shorter or longer intervals are also possible. Furthermore, the second compensation information can also be updated at specified intervals, or at other intervals, as long as they are not updated simultaneously with the first compensation information.

[0073] In some embodiments of the present disclosure, the timing controller 100 may obtain the second compensation information once every specified time period, generate new compensation information based on the display data and the most recently obtained second compensation information, and write the new compensation information into the second memory 300 to update the second compensation information.

[0074] In addition, the timing controller 100 may include a processing circuit and a memory. The memory may be a static random-access memory (SRAM). The information obtained by the timing controller 100 may be temporarily stored in the memory.

[0075] The following is an exemplary description of the verification of the first compensation information:

[0076] Each piece of first compensation information may include unique verification information. For example, the first compensation information may have a verification bit in the first memory 200, and the data in the verification bit is the verification information. Each piece of first compensation information may have only unique verification information. When updating the first compensation information, the timing controller 100 may generate new first compensation information based on the display data and the acquired first compensation information. When writing the new first compensation information to the first memory 200, the timing controller 100 stores the verification information of the new first compensation information. The next time the computer is turned on, after acquiring the first compensation information from the first memory 200, the timing controller 100 may compare the stored verification information with the verification information of the acquired first compensation information. If the two are consistent, it indicates that the first compensation information stored in the first memory 200 is the new first compensation information previously generated by the timing controller 100. If the two are inconsistent, it indicates that the first compensation information stored in the first memory 200 has an error due to a power outage.

[0077] It should be noted that when the timing controller 100 updates the second compensation information of the second memory 300, a power outage may occur, causing the second compensation information to be incorrect. However, since the second compensation information and the first compensation information are not updated simultaneously, the first compensation information of the first memory 200 is necessarily correct. In other words, when the computer is powered on, if the verification result of the first compensation information obtained by the timing controller 100 is correct, the second compensation information will not be called regardless of whether the second compensation information is correct. Even if the second compensation information is incorrect, it will not affect the display effect. At the same time, the timing controller 100 can use the correct first compensation information to update the second compensation information, thereby eliminating the error in the second compensation information.

[0078] In summary, the driver circuit 20 of the disclosed embodiment can display an image based on compensation information and display data. Due to the different attenuation conditions of different display panels 10, the compensation information varies. As the operating time of the display panel 10 increases, in order to ensure the display effect, the compensation information can be updated in the power-on state to match the attenuation conditions of the display device, thereby ensuring the display effect. The compensation information may include first compensation information and second compensation information, and the first compensation information may be stored in the first memory 200, and the second compensation information may be stored in the second memory 300. Since the first compensation information and the second compensation information are updated at different times, when the display device is powered off, only one of the first compensation information and the second compensation information may be affected by parasitic capacitance and inductance and become erroneous, that is, at least one of the first compensation information and the second compensation information is correct. At power-on, the first compensation information can be obtained. If the first compensation information is correct, the display panel 10 can be controlled to display an image based on the first compensation information and the display data, and the first compensation information can be written as the second compensation information to the first memory 200. If the first compensation information is incorrect, the second compensation information is obtained, and the display panel 10 can be controlled to display an image based on the second compensation information and the display data. Therefore, even if a power outage occurs during the update process of the first compensation information and the second compensation information, only one of them will fail, thereby ensuring that compensation information matching the display panel 10 is obtained and reducing the risk of display anomalies such as a black screen.

[0079] like Figure 1-Figure 3 As shown, the present disclosure further provides a display device, which may include a display panel 10 and a driving circuit 20, which may be connected to the display panel 10. The display device also includes a flexible circuit board 600. The driving circuit 20 is provided on a circuit board 700, which may be connected to the display panel 10 via one or more flexible circuit boards 600. The specific structure of the display panel 10 and the driving circuit 20, as well as the beneficial effects of the display device, can be referred to the embodiment of the display panel 10 above and will not be described in detail here.

[0080] The display device disclosed herein may be a terminal device capable of displaying an image, such as a television, a mobile phone, or a tablet computer, which will not be listed here one by one.

[0081] The present disclosure also provides a driving method for a display device. The specific structure of the display device can refer to the embodiment of the display device above and will not be described in detail here. Of course, the driving method is not only applicable to the display device of the above embodiment, but can also be applicable to any other display device that can execute the driving method.

[0082] like Figure 4 As shown, the driving method of the present disclosure may include:

[0083] When the computer is turned on, the display data and the first compensation information stored in the first memory are obtained, and the first compensation information is verified. If the verification result is correct, the display panel is controlled to display an image according to the display data and the first compensation information, and the first compensation information is written into the second memory as the second compensation information. If the verification result is incorrect, the second compensation information is obtained, and the display panel is controlled to display an image according to the display data and the second compensation information; and the second compensation information is written into the first memory as the first compensation information.

[0084] Meanwhile, in the power-on state, the first compensation information and the second compensation information are updated according to the display data, and the time of updating the first compensation information and the second compensation information are different.

[0085] Furthermore, the first compensation information and the second compensation information may be distributed alternately in the power-on state, and the first compensation information may be updated at specified intervals. For specific implementations, reference may be made to the above implementations of the driving circuit and no further details will be given here.

[0086] The verification process of the first compensation information can also refer to the implementation of the driving circuit above, and can be achieved by comparing the verification information of the first compensation information, which will not be described in detail here.

[0087] The driving method disclosed in the present invention is exemplarily described below:

[0088] like Figure 4 As shown, when the display device leaves the factory, the first memory may store original first compensation information, and the first compensation information is established based on the state of the display panel before leaving the factory.

[0089] During the first power-on, the display data and first compensation information can be obtained. In this case, the first compensation information does not need to be verified, and the first compensation information before the first power-on is assumed to be correct. The display panel is controlled to display an image based on the display data and the first compensation information, and the first compensation information is written into the second memory as the second compensation information. In the power-on state after the first power-on, the first compensation information and the second compensation information are updated alternately based on the display data. Of course, the first compensation information can also be verified, and the verification information of the original first compensation information can be stored in the timing controller so that it can be verified using the verification information.

[0090] During the nth power-up, display data and first compensation information stored in the first memory can be obtained. This first compensation information is the first compensation information last written to the first memory by the timing controller during the n-1th power-up. Simultaneously, the first compensation information can be verified by comparing the verification information of the last first compensation information generated by the timing controller during the n-1th power-up with the verification information of the first compensation information last written to the first memory. If the comparison result is the same, the verification result is correct, and the display panel can be controlled to display an image based on the display data and the first compensation information, and the first compensation information can be written as second compensation information to the second memory. If the two are different, the verification result is incorrect, and second compensation information can be obtained. The display panel can then be controlled to display an image based on the display data and the second compensation information. This second compensation information is the second compensation information last written to the second memory during the n-1th power-up. Simultaneously, the second compensation information can be written as the first compensation information to the first memory, thereby overwriting the incorrect first compensation information.

[0091] It should be noted that although the steps of the driving method of the present disclosure are described in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in this specific order, or that all steps must be performed to achieve the desired results. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.

[0092] The embodiment of the present disclosure further provides a computer-readable storage medium having a computer program stored thereon, which implements the driving method when the computer program is executed by a processor.

[0093] Through the description of the above embodiments, it is easy for those skilled in the art to understand that the example embodiments described herein can be implemented by software or by combining software with necessary hardware. Therefore, the technical solution according to the embodiments of the present disclosure can be embodied in the form of a program product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a USB flash drive, a mobile hard disk, etc.) or on a network, and includes a number of instructions to enable a computing device (which can be a personal computer, a server, a mobile terminal, or a network device, etc.) to execute the image generation method according to the embodiments of the present disclosure.

[0094] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, with the true scope and spirit of the present disclosure being indicated by the appended claims.

Claims

1. A driving circuit for a display device, characterized in that: The display device includes a display panel connected to the driving circuit; the driving circuit includes a timing controller and a first memory and a second memory connected to the timing controller; The timing controller is configured as follows: Upon power-on, obtaining display data and first compensation information stored in a first memory, and verifying the first compensation information; if the verification result is correct, controlling the display panel to display an image according to the display data and the first compensation information, and writing the first compensation information as second compensation information into the second memory; If the verification result is an error, obtaining the second compensation information stored in the second memory, and controlling the display panel to display an image according to the display data and the second compensation information; and writing the second compensation information into the first memory as the first compensation information; as well as In a power-on state, updating the first compensation information and the second compensation information according to the display data, and updating the first compensation information and the second compensation information at different times; The first compensation information and the second compensation information include at least one of gamma correction information, color compensation information, attenuation compensation information, and performance information.

2. The driving circuit according to claim 1, wherein: The timing controller is configured as follows: In a power-on state, the first compensation information and the second compensation information are alternately updated according to the display data.

3. The driving circuit according to claim 2, wherein: The timing controller is configured as follows: In the power-on state, the first compensation information is updated every specified time period.

4. The driving circuit according to claim 3, wherein: The timing controller is configured as follows: In the power-on state, the first compensation information is acquired every specified time period, and new compensation information is generated according to the display data and the first compensation information acquired most recently, and is written into the first memory.

5. The driving circuit according to claim 3, wherein: The specified duration is 8-20 seconds.

6. The driving circuit according to claim 1, wherein: Each of the first compensation information includes unique verification information; The timing controller is configured to: store verification information of the first compensation information updated most recently; Verifying the first compensation information; comprising: Determine whether the obtained verification information of the first compensation information is consistent with the stored verification information of the first compensation information; if the result is yes, the verification result is correct; if the result is no, the verification result is wrong.

7. The driving circuit according to any one of claims 1 to 6, characterized in that: The first memory and the second memory are both FLASH memories.

8. A method for driving a display device, characterized in that: The display device includes a display panel connected to a driving circuit; the driving circuit adopts the driving circuit according to any one of claims 1 to 7, and the driving circuit includes a timing controller and a first memory and a second memory connected to the timing controller; the driving method includes: Upon power-on, obtaining display data and first compensation information stored in a first memory, and verifying the first compensation information; if the verification result is an error, obtaining second compensation information stored in a second memory, and controlling the display panel to display an image according to the display data and the second compensation information; and writing the second compensation information as the first compensation information into the second memory; and In a power-on state, the first compensation information and the second compensation information are updated according to the display data, and the first compensation information and the second compensation information are updated at different times.

9. The driving method according to claim 8, wherein: The driving method further includes: If the verification result is correct, the display panel is controlled to display an image according to the display data and the first compensation information, and the first compensation information is written into the second memory as the second compensation information.

10. The driving method according to claim 8, wherein: Updating the first compensation information and the second compensation information according to the display data; comprising: In a power-on state, the first compensation information and the second compensation information are alternately updated according to the display data.

11. The driving method according to claim 10, wherein: The driving method further includes: In the power-on state, the first compensation information is updated every specified time period.

12. The driving method according to claim 11, wherein: Updating the first compensation information once every specified period; including: The first compensation information is acquired every specified time period, and new compensation information is generated according to the display data and the first compensation information acquired most recently, and is written into the first memory.

13. The driving method according to claim 8, wherein: Each of the first compensation information includes unique verification information; Verifying the first compensation information; comprising: Determine whether the obtained verification information of the first compensation information is consistent with the stored verification information of the most recent update of the first compensation information; if the result is yes, the verification result is correct; if the result is no, the verification result is wrong.

14. A display device, characterized in that: The device comprises a display panel and the driving circuit according to any one of claims 1 to 7, wherein the driving circuit is connected to the display panel.

15. The display device according to claim 14, wherein: The display device further includes a flexible circuit board. The driving circuit is provided on a circuit board, and the circuit board is connected to the display panel via the flexible circuit board.

16. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the driving method according to any one of claims 8 to 13 is implemented.

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