Photodiode and preparation method thereof

Abstract

The present invention relates to the field of semiconductor electronic device technology, and provides a photodiode and a method for preparing the same. The photodiode comprises at least: a substrate having a first surface and a second surface relative to each other; a device layer disposed between the first surface and the second surface, sequentially comprising an N-type doped region adjacent to the first surface, an undoped intrinsic layer (I layer), and a P-type doped region adjacent to the second surface; a cutoff ring disposed around the periphery of the upper end of the substrate and spaced apart from the P-type doped region, with the upper surface of the cutoff ring and the second surface located in the same plane; a photosensitive region located above the upper surface of the device layer and at least above the P-type doped region; an oxide ring disposed in the peripheral region of the photosensitive region, with an oxide layer disposed between the ring and the second surface; wherein the P-type doped region comprises a deep doped region and a shallow doped region disposed adjacent to each other, and the deep doped region and the shallow doped region are located in the photosensitive region. A photodiode with such a structure can improve the short-wave response capability of the photodiode.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor electronic devices, and in particular to a photodiode and a preparation method thereof. Background Art

[0002] In the optocoupler (also known as optocoupler, photocoupler, or optoisolator) family of products, photodiodes (also known as photodiodes) are primarily used to receive light signals and convert them into current or voltage signals depending on the intended use. Photodiodes have a specific spectral response range. In recent years, with the expansion of optocoupler applications, the demand for medium- and short-wavelength response in photodiodes has steadily increased.

[0003] Currently, the primary method for improving short-wavelength (primarily in the blue-green wavelength range) response in photodiodes is to diffuse shallow junctions. However, the shallow junctions and fused wire bonding reduce the breakdown voltage of the photodiode, limiting the efficiency of improving the short-wavelength response of the photodiode. Furthermore, the effects of surface recombination also limit the ability to improve the short-wavelength response of photodiodes. As the application areas of photodiodes expand, the requirements for the signal-to-noise ratio of photodiodes at high temperatures are also gradually increasing.

[0004] Therefore, in photodiodes, how to improve short-wave response capability, increase light response intensity, and at the same time improve the signal-to-noise ratio requirements under high temperatures, thereby improving the photoelectric performance of photodiodes, has become one of the technical problems that technicians in this field urgently need to solve. Summary of the Invention

[0005] In order to solve the above-mentioned shortcomings of the prior art of short-wave response in photodiodes, the present invention provides a photodiode and a method for preparing the same.

[0006] In order to achieve at least one of the advantages and other advantages described above, an embodiment of the present invention provides a photodiode, which at least includes: a substrate having a first surface and a second surface relative to each other; a device layer, arranged between the first surface and the second surface, and sequentially including an N-type doped region adjacent to the first surface, an undoped intrinsic layer (I layer) and a P-type doped region adjacent to the second surface; a cut-off ring, arranged around the periphery of the upper end of the substrate and spaced apart from the P-type doped region, the upper surface of the cut-off ring and the second surface being located in the same plane; a photosensitive region, located above the upper surface of the device layer and at least above the P-type doped region; an oxide ring, arranged in the peripheral area of ​​the photosensitive region, and an oxide layer is provided between the photosensitive region and the second surface; wherein the P-type doped region includes a deep doped region and a shallow doped region arranged adjacent to each other, and the deep doped region and the shallow doped region are located in the photosensitive region.

[0007] In some embodiments, the N-type doped region in the photodiode includes a high-doped region and a low-doped region sequentially disposed on the first surface of the substrate, wherein the doping concentration of the high-doped region is greater than the doping concentration of the low-doped region. The total depth of the high-doped region and the low-doped region is greater than 2 microns.

[0008] In some embodiments, the photodiode may further include: a first electrode disposed on the substrate and away from the device layer, electrically connected to the N-type doped region; and a second electrode disposed in the photosensitive region, electrically connected to the P-type doped region. The second electrode is disposed in the deeply doped region. The depth of the deeply doped region is greater than that of the shallowly doped region, thereby providing sufficient space for the second electrode to diffuse and migrate within the deeply doped region.

[0009] In some embodiments, the depth of the deep doping region is greater than 1.5 micrometers, and the depth of the shallow doping region is less than 1 micrometer.

[0010] In some embodiments, the photodiode may further include a dielectric layer. The dielectric layer is located in the photosensitive region and disposed on the second surface of the substrate. The dielectric layer includes a passivation layer and an antireflection layer disposed on the passivation layer. The dielectric layer can reduce recombination on the substrate surface in the photosensitive region, thereby improving the short-wavelength response capability of the photodiode.

[0011] In some embodiments, the optical thickness of the dielectric layer is an odd integer multiple of one quarter of the desired absorption wavelength.

[0012] In some embodiments, the thickness of the passivation layer is greater than or equal to 1 nanometer and less than or equal to 30 nanometers. The material of the passivation layer is at least one of silicon oxide, aluminum oxide, and nickel oxide, or a combination thereof. The passivation layer can be configured as a thin film structure.

[0013] In some embodiments, the anti-reflection layer is made of at least one of silicon nitride and titanium oxide, or a combination thereof. The anti-reflection layer can be provided as a thin film structure.

[0014] To achieve at least one of the aforementioned advantages or other advantages, an embodiment of the present invention provides a method for fabricating a photodiode. The method includes at least the following steps.

[0015] Step S11: device layer preparation

[0016] A substrate is provided. A photosensitive region is provided above the substrate. A cutoff ring is provided around the outer periphery of the upper end of the substrate, and a device layer is formed within the substrate. The device layer sequentially includes an N-type doped region, an undoped intrinsic layer, and a P-type doped region. An oxide layer is formed on the photosensitive region and the cutoff ring using a high-temperature oxidation process, the photosensitive region is opened on the oxide layer using photolithography and etching processes, and different regions of the P-type doped region are doped with different concentrations, thereby obtaining adjacent deep doping regions and shallow doping regions. The cutoff ring region is opened on the oxide layer using photolithography and etching processes, the cutoff ring region and the N-type doped region are doped, and a stacked high-doping region and a low-doping region are formed in the N-type doped region.

[0017] In the N-type doping region, the high doping region is arranged on the surface of the substrate, and the low doping region is arranged on the high doping region. The total depth of the high doping region and the low doping region is greater than 2 microns.

[0018] Step S12: preparing a dielectric layer

[0019] A photosensitive region is opened on the oxide layer through an etching process, and a dielectric layer is grown in the photosensitive region. The dielectric layer is located on the upper surface of the substrate, above the P-type doped region. The dielectric layer includes a passivation layer and an antireflection layer disposed on the passivation layer. The dielectric layer can be configured as a thin film.

[0020] Step S13: Making the first electrode

[0021] An ohmic contact hole is formed in the dielectric layer corresponding to the deep doped region of the P-type doped region in the device layer through photolithography. An electrode metal layer is sputtered on the upper surface of the substrate, and a first electrode is formed over the ohmic contact hole through photolithography, etching, and annealing. Specifically, the first electrode is located in the deep doped region of the P-type doped region.

[0022] Step S14: Making the second electrode

[0023] An electrode metal layer is sputtered on the surface of the substrate away from the photosensitive area, a second electrode is formed by annealing, and a single photodiode is obtained by cutting.

[0024] The present invention provides a photodiode and a method for manufacturing the same, which have at least the following advantages:

[0025] 1. The setting of deep doping region and shallow doping region in the P-type doping region corresponding to the photosensitive region in the device layer can effectively avoid the phenomenon of shallow junction leading to reduced breakdown voltage after fusion, and improve short-wave response capability.

[0026] 2. Passivation treatment of the surface of the photodiode can reduce the impact of surface recombination on the short-wave response, thereby improving the short-wave response capability.

[0027] 3. The setting of high-doping region and low-doping region in the N-type doping region of the device layer in the photodiode can reduce the signal-to-noise ratio at high temperature and improve the stability of the photodiode device at high temperature and the accuracy of detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following is a brief introduction to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0029] Figure 1 is a schematic side cross-sectional view of a photodiode according to an embodiment of the present invention; and

[0030] Figure 2 for Figure 1 Flow chart of the preparation method of the photodiode shown.

[0031] Figure numerals: 1-photodiode, 10-substrate, 10a-first surface, 10b-second surface, 20-device layer, 21-N-type doping region, 211-highly doped region, 212-lowly doped region, 22-intrinsic layer / I layer, 23-P-type doping region, 231-deeply doped region, 232-shallowly doped region, 30-cut-off ring, 40-photosensitive region, 50-oxidation ring, 51-oxidation layer, 60-first electrode, 70-second electrode, 80-dielectric layer, 81-passivation layer, 82-anti-reflection layer, H1-depth. DETAILED DESCRIPTION

[0032] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0033] In the description of the present invention, it should be understood that the terms "center", "lateral", "up", "down", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more. In addition, the term "including" and any variations thereof all mean "at least including".

[0034] In the description of the present invention, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integrally formed connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; and they can refer to internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on the specific circumstances.

[0035] The terms used herein are intended only to describe specific embodiments and are not intended to limit exemplary embodiments. Unless the context clearly indicates otherwise, the singular forms "a", "an", "an item" used herein are also intended to include the plural. It should also be understood that the terms "comprise" and / or "include" used herein specify the presence of stated features, integers, steps, operations, units and / or components, and do not preclude the presence or addition of one or more other features, integers, steps, operations, units, components and / or combinations thereof.

[0036] See also Figure 1 , Figure 1The figure is a schematic side cross-sectional view of an embodiment of a photodiode according to the present invention. To achieve at least one of the aforementioned advantages or other advantages, one embodiment of the present invention provides a photodiode 1 comprising at least: a substrate 10, a device layer 20, a cutoff ring 30, a photosensitive region 40, and an oxide ring 50. The substrate 10 has a first surface 10a and a second surface 10b opposite each other. The device layer 20 is doped between the first surface 10a and the second surface 10b. From the first surface 10a toward the second surface 10b, the device layer 20 includes an N-type doped region 21, an undoped intrinsic layer 22 (also known as an I layer), and a P-type doped region 23. The N-type doped region 21 may cover the entire interface region of the first surface 10a, while the P-type doped region 23 covers a portion of the second surface 10b and is primarily located below the photosensitive region 40. The cutoff ring 30 is disposed around the outer periphery of the upper end of the substrate 10 and is spaced apart from the P-type doped region 23. The upper surface of the cutoff ring 30 and the second surface 10b are coplanar. The photosensitive region 40 is located above the upper surface of the device layer 20 and at least above the P-type doped region 23, serving as the light-receiving region of the photodiode 1, receiving light. An oxide ring 50 is disposed around the periphery of the photosensitive region 40, with an oxide layer 51 disposed between the oxide ring 50 and the second surface 10b. The P-type doped region 23 includes adjacent deep doped regions 231 and shallow doped regions 232, with the deep doped regions 231 and shallow doped regions 232 located within the photosensitive region 40.

[0037] The photodiode 1 may further include a first electrode 60 and a second electrode 70. The first electrode 60 is disposed on the substrate 10, away from the device layer 20, and electrically connected to the N-type doped region 21. As shown, the N-type doped region 21 and the first electrode 60 are located on different side regions of the first surface 10a of the substrate 10. The second electrode 70 is disposed in the photosensitive region 40 and electrically connected to the P-type doped region 23. The second electrode 70 is disposed in the deep doped region 231 within the P-type doped region 23.

[0038] The second electrode 70 is made of metal. In a preferred embodiment, the second electrode 70 is made of aluminum. The depth of the deep doped region 231 is greater than the depth of the shallow doped region 232. The depth of the deep doped region 231 is greater than 1.5 microns, while the depth of the shallow doped region 232 is less than 1 micron. The depth of the deep doped region 231 ensures that the metal of the second electrode 70 has sufficient range of movement in the deep doped region 231, thereby enabling the deep doped region 231 to function as an ohmic contact layer.

[0039] See Figure 1, the substrate 10 can be a high-resistance substrate. In one example, the substrate 10 is preferably a high-resistance silicon substrate, which can be grown in different ways. In the substrate 10, along the direction from the first surface 10a to the second surface 10b, the N-type doped region 21 includes a high-doped region 211 and a low-doped region 212 stacked in sequence. The doping concentration of the high-doped region 211 is greater than the doping concentration of the low-doped region 212, and the total depth H1 of the high-doped region 211 and the low-doped region 212 is greater than 2 microns. The N-type doped region 21 is a stacked arrangement of the high-doped region 211 and the low-doped region 212, which can improve the stability and detection accuracy of the photodiode device at high temperatures and reduce the signal-to-noise ratio of the device. The arrangement of the high-doped region 211 and the low-doped region 212 in the N-type doped region 21 can reduce the resistivity and narrow the space charge region, thereby reducing leakage at high temperatures, thereby improving the stability of the photodiode device at high temperatures.

[0040] The cutoff ring 30 is separated from the P-type doped region 23 by the undoped intrinsic layer 22. The cutoff ring 30 may include an N-type doped region, thereby forming a PIN junction in the second surface 10b of the substrate 10 in the lateral or horizontal direction to prevent leakage in the device layer 20.

[0041] The photodiode 1 may further include a dielectric layer 80, located in the photosensitive region 40 and disposed on the second surface 10b of the substrate 10. The dielectric layer 80 includes a passivation layer 81 and an anti-reflection layer 82 disposed on the passivation layer 81. The thickness of the passivation layer 81 is greater than or equal to 1 nanometer and less than or equal to 30 nanometers. The material of the passivation layer 81 is at least one of silicon oxide, aluminum oxide, and nickel oxide, or a combination of multiple thereof. For example, the material of the passivation layer 81 may be SiO2, Al2O3, Ni2O5, or a combination of intermediates of these oxides. The material of the anti-reflection layer 82 is at least one of silicon nitride and titanium oxide, or a combination of multiple thereof. A less active passivation layer 81 is disposed above the P-type doped region 23, and an anti-reflection anti-reflection layer 82 is disposed in the photosensitive region 40 to reduce energy loss of light in the photosensitive region 40 and improve the photoelectric conversion efficiency of the photodiode 1.

[0042] Impurities and defects inside and on the surface of the silicon wafer in the silicon substrate will have a negative impact on the performance of the photodiode 1 and the photoelectric conversion effect of the surface area of ​​the photodiode 1. By passivating the silicon wafer surface corresponding to the photosensitive area 40 in the photodiode 1 or providing a passivation layer 81, the recombination of carriers on the surface of the photodiode 1 is reduced to reduce the adverse effects of defects, thereby improving the short-wave photoelectric conversion efficiency and thereby improving the short-wave response capability of the photodiode 1.

[0043] Dielectric layer 80 can have various functions, such as passivating and protecting the surface of device layer 20, and acting as an antireflection layer for blue and green light. Different functions require different thicknesses for dielectric layer 80. The optical thickness of dielectric layer 80 is an odd integer multiple of one-quarter of the desired absorption wavelength, minimizing the reflectivity of dielectric layer 80 in photosensitive region 40. Generally, the desired absorption wavelength is represented by λ, and the optical thickness of dielectric layer 80 can be 1 / 4λ, 3 / 4λ, 5 / 4λ, 7 / 4λ, etc.

[0044] See also Figure 2 , Figure 2 To achieve at least one of the aforementioned advantages or other advantages, an embodiment of the present invention provides a method for fabricating a photodiode, which can be used to fabricate a photodiode having the aforementioned structure. Figure 2 The photodiode manufacturing method or manufacturing process of the present invention is shown as follows. However, the photodiode manufacturing method and process of the present invention are not limited to Figure 2 shown.

[0045] See also Figure 1 and Figure 2 ,use Figure 2 The preparation method of the photodiode shown is as follows Figure 1 The process method of the photodiode shown is described below.

[0046] The method for preparing the photodiode 1 may include at least the following steps: preparing the device layer, preparing the dielectric layer, making the first electrode, making the second electrode, and cutting and scribing. The specific implementation process of each step is described below.

[0047] Step S11: device layer preparation

[0048] A substrate is provided. A photosensitive region is formed above the substrate. A cutoff ring is disposed around the periphery of the upper end of the substrate. A device layer is formed within the substrate. The device layer sequentially includes an N-type doped region, an undoped intrinsic layer, and a P-type doped region.

[0049] An oxide layer is formed on the photosensitive area and the cut-off ring using a high-temperature oxidation process, and the photosensitive area is opened on the oxide layer through photolithography and etching processes. Different areas of the P-type doping region in the device layer are doped with different concentrations, thereby obtaining adjacent deep doping regions and shallow doping regions.

[0050] The cutoff ring region is opened in the oxide layer through photolithography and etching processes. The cutoff ring region and the N-type doped region are doped. In the device layer, a stacked arrangement of high-doped and low-doped regions is formed in the N-type doped region. The combined depth of the high-doped and low-doped regions in the N-type doped region is greater than 2 microns.

[0051] Step S12: preparing a dielectric layer

[0052] A photosensitive area is opened on the oxide layer through an etching process, and a dielectric layer is grown in the photosensitive area. The dielectric layer includes a passivation layer and an anti-reflection layer arranged on the passivation layer.

[0053] Step S13: Making the first electrode

[0054] An ohmic contact hole is made on the dielectric layer corresponding to the deep doped area of ​​the P-type doped area in the device layer by photolithography, an electrode metal layer is sputtered on the upper surface of the substrate, and a first electrode is formed on the ohmic contact hole by photolithography, etching and annealing.

[0055] Step S14: Making the second electrode and cutting and dicing

[0056] An electrode metal layer is sputtered on the surface of the substrate away from the photosensitive area, and a second electrode is formed by annealing, and then a single photodiode is obtained by cutting. Specific embodiment 1

[0058] See also Figure 1 and Figure 2 , providing a high-resistance substrate 10 having a first surface 10a and a second surface 10b opposite to each other. A device layer 20 is formed in the high-resistance substrate 10 by means of an implantation or diffusion method. The device layer 20 includes an N-type doping region 21, an undoped intrinsic layer 22, and a P-type doping region 23 in sequence from the first surface 10a to the second surface 10b of the high-resistance substrate 10. The N-type doping region 21 can be diffusely doped with phosphorus, arsenic, antimony, etc., and the P-type doping region 23 can be diffusely doped with boron. A photosensitive region 40 is provided above the high-resistance substrate 10, serving as the light-receiving region of the photodiode 1.

[0059] A cutoff ring 30 surrounds the upper periphery of the high-resistance substrate 10 to prevent leakage from the device layer 20 within the high-resistance substrate 10. The upper surface of the cutoff ring 30 is coplanar with the second surface 10b of the high-resistance substrate 10. An oxide ring 50 is provided around the periphery of the photosensitive region 40. The oxide ring 50 is positioned above the cutoff ring 30, with an oxide layer 51 disposed between the oxide ring 50 and the second surface 10b of the high-resistance substrate 10.

[0060] An oxide layer is formed on the high-resistance substrate 10 using a high-temperature oxidation process to serve as a mask. The P-type doping region 23 in the device layer 20 has a shallow junction and a deep junction arranged adjacent to each other during doping formation. The photosensitive region 40 is opened on the oxide layer through photolithography and etching processes, and deep doping diffusion is performed in the deep junction region of the P-type doping region 23 in the device layer 23 to form a deep doping region 231. The photosensitive region 40 is opened on the oxide layer through photolithography and etching processes, and shallow doping diffusion is performed in the shallow junction region of the P-type doping region 23 in the device layer 23 to form a shallow doping region 232. The doping concentration of the deep doping region 231 is greater than the doping concentration of the shallow doping region 232, and the depth of the deep doping region 231 is greater than the depth of the shallow doping region 232.

[0061] The cutoff ring 30 region is opened on the oxide layer through photolithography and etching processes. The cutoff ring 30 region and the N-type doped region 21 in the device layer 20 are doped, forming a stacked high-doped region 211 and a low-doped region 212 in the N-type doped region 21. In the N-type doped region 21, the total depth of the high-doped region 211 and the low-doped region 212 is greater than 2 microns. It can be understood that after doping, the cutoff ring 30 is N-type doped. The cutoff ring 30 and the P-type doped region 23 in the device layer 20 are separated by an undoped intrinsic layer 22, thereby forming a PIN junction on the second surface 10b of the high-resistance substrate 10.

[0062] A photosensitive region 40 is opened on the oxide layer through photolithography and etching processes, and a dielectric layer 80 is grown on the photosensitive region 40 and on the second surface 10b of the high-resistance substrate 10. The dielectric layer 80 includes a passivation layer 81 located on the second surface 10b of the high-resistance substrate 10 and an anti-reflection layer 82 located on the passivation layer 81. The passivation layer 81 and the anti-reflection layer 82 can be arranged in a film-like structure.

[0063] An ohmic contact hole is formed in the dielectric layer 80 of the deep doped region 231 of the P-type doped region 23 in the device layer 20 by photolithography. An electrode metal layer is sputtered above the ohmic contact hole, and a first electrode 60 is formed on the ohmic contact hole by photolithography, etching, annealing, and other processes.

[0064] An electrode metal layer is sputtered on the first surface 10 a of the high-resistance substrate 10 away from the device layer 20 , and a second electrode 70 is formed by annealing. The single photodiode 1 is then obtained by cutting.

[0065] The present invention provides a photodiode and a method for preparing the same. By reducing the depth of the deep junction and shallow junction in the P-type doping region and optimizing the passivation process, the depth of the shallow junction in the P-type doping region can be reduced to improve the short-wave response effect of the photodiode. The short-wave response of the photodiode exemplified in the present invention can reach more than 90%. The arrangement of the deep doping region and the shallow doping region of the P-type doping region in the device layer corresponding to the photosensitive region of the photodiode can effectively avoid the problem of reduced breakdown voltage after the shallow junction in the device layer is fused; the arrangement of a passivation layer above the substrate and in the photosensitive region can reduce the influence of substrate surface recombination, and can improve the short-wave response of the photodiode in multi-band photodiodes; in the back electrode (second electrode) region of the substrate, the N-type doping region in the device layer adopts a stacked arrangement of high-doping region and low-doping region, which can improve the stability of the photodiode device at high temperature and the accuracy of detection, and reduce the signal-to-noise ratio of the photodiode device.

[0066] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A photodiode, comprising: a substrate having opposing first and second surfaces; a device layer, provided between the first surface and the second surface, comprising, in sequence, an N-type doped region adjacent to the first surface, an undoped intrinsic layer, and a P-type doped region adjacent to the second surface; a cut-off ring, arranged around the outer periphery of the upper end of the substrate and spaced apart from the P-type doping region, wherein the upper surface of the cut-off ring and the second surface are located in the same plane; a photosensitive region located above the upper surface of the device layer and at least above the P-type doped region; an oxide ring disposed in a peripheral area of ​​the photosensitive region, wherein an oxide layer is disposed between the oxide ring and the second surface; The P-type doping region includes a deep doping region and a shallow doping region that are adjacent to each other, and the deep doping region and the shallow doping region are located in the photosensitive region.

2. The photodiode according to claim 1, wherein: The N-type doping region includes a high-doping region and a low-doping region sequentially arranged on the first surface, the doping concentration of the high-doping region is greater than the doping concentration of the low-doping region, and the total depth of the high-doping region and the low-doping region is greater than 2 microns.

3. The photodiode according to claim 1, wherein: The photodiode further comprises: a first electrode, disposed on the substrate and away from the device layer, and electrically connected to the N-type doped region; The second electrode is provided in the photosensitive region and electrically connected to the P-type doping region; the second electrode is provided in the deep doping region; the depth of the deep doping region is greater than the depth of the shallow doping region.

4. The photodiode according to claim 3, wherein: The depth of the deep doping region is greater than 1.5 micrometers, and the depth of the shallow doping region is less than 1 micrometer.

5. The photodiode according to claim 1, wherein: The photodiode further includes a dielectric layer located in the photosensitive region and disposed on the second surface. The dielectric layer includes a passivation layer and an anti-reflection layer disposed on the passivation layer.

6. The photodiode according to claim 5, wherein: The thickness of the passivation layer is greater than or equal to 1 nanometer and less than or equal to 30 nanometers; the material of the passivation layer is at least one of silicon oxide, aluminum oxide, and nickel oxide, or a combination of more than one of them.

7. The photodiode according to claim 5, wherein: The anti-reflection layer is made of at least one of silicon nitride and titanium oxide, or a combination of multiple thereof.

8. The photodiode according to claim 5, wherein: The optical thickness of the dielectric layer is an odd multiple of one quarter of the desired absorption wavelength.

9. A method for preparing a photodiode, characterized in that: The preparation method comprises the following steps: A substrate is provided, wherein a photosensitive region is formed above the substrate, a cutoff ring is provided around the periphery of the upper end of the substrate, and a device layer is formed within the substrate, the device layer sequentially including an N-type doped region, an undoped intrinsic layer, and a P-type doped region. An oxide layer is formed on the photosensitive region and the cutoff ring by a high-temperature oxidation process, the photosensitive region is opened on the oxide layer by photolithography and etching processes, and different regions of the P-type doped region are doped at different concentrations to obtain adjacent deeply doped regions and lightly doped regions. The cutoff ring region is opened on the oxide layer by photolithography and etching processes, and the cutoff ring region and the N-type doped region are doped, and a stacked high-doped region and a low-doped region are formed in the N-type doped region. Opening the photosensitive area on the oxide layer through an etching process, and growing a dielectric layer in the photosensitive area; An ohmic contact hole is formed on the dielectric layer corresponding to the deep doped region of the P-type doped region by a photolithography process, an electrode metal layer is sputtered on the upper surface of the substrate, and a first electrode is formed on the ohmic contact hole by photolithography, etching, and annealing; An electrode metal layer is sputtered on the surface of the substrate away from the photosensitive area, a second electrode is formed by annealing, and a single photodiode is obtained by cutting.

10. The preparation method according to claim 9, characterized in that: The dielectric layer includes a passivation layer and an anti-reflection layer arranged on the passivation layer.

11. The preparation method according to claim 9, characterized in that: In the N-type doping region, a total depth of the high-doping region and the low-doping region is greater than 2 micrometers.

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