Projected memory device with carbon-based projection components

Abstract

A projected memory device (1) includes a carbon-based projection element (20). The device (1) includes two electrodes (32, 34), a memory segment (10), and the projection element (20). The projection element (20) forms a dual-component connection between the two electrodes (32, 34) and the memory segment (10). The projection element (20) extends parallel to and contacts the memory segment (10). The memory segment (10) comprises a resistive memory material, while the projection element (20) comprises a thin film of a non-insulating material, which substantially comprises carbon. In a particular embodiment, the non-insulating material and the projection element (20) substantially comprise amorphous carbon. The use of carbon, particularly amorphous carbon, as the main component of the projection element (20) allows for unprecedented flexibility in adjusting the resistance of the projection element (20).

Description

Background Technology

[0001] This invention generally relates to the field of projected memory devices. In particular, the invention relates to a projected memory device in which the projecting element substantially comprises amorphous carbon. The invention also relates to related operation and manufacturing methods of such a device.

[0002] Machine learning typically relies on artificial neural networks (ANNs), computational models inspired by biological neural networks in the human or animal brain. An ANN consists of a set of connected units or nodes, which are called artificial neurons in comparison to biological neurons in the animal brain. Signals are transmitted along the connections (also called edges) between artificial neurons, similar to synapses. That is, the artificial neuron receiving the signal processes it and then uses the signal to notify the connected neurons. Connection weights (also called synaptic weights) are associated with connections and nodes; such weights are adjusted as learning progresses. Each neuron can have several inputs, and connection weights are assigned to each input (the weight of that particular connection). These connection weights are learned and updated during the training phase. The learning process is iterative: data instances are presented to the network, typically one at a time, and the weights associated with the input values ​​are adjusted at each time step.

[0003] Several types of neural networks are known, starting with feedforward neural networks, such as multilayer perceptrons, deep neural networks, and convolutional neural networks. Furthermore, newer types of neural networks have emerged, such as spike neural networks. Neural networks are typically implemented in software. However, neural networks can also be implemented in hardware, for example, as resistive processing units (e.g., involving cross-array structures) or opto-neuromorphic systems. That is, a hardware-implemented ANN is a physical machine that is significantly different from a classical computer (e.g., a general-purpose or special-purpose computer) because it is primarily and specifically designed to implement ANNs (e.g., for training and / or inference purposes). Hardware-implemented ANNs (or physical ANNs) can often be simulated using classical computers, but this is inefficient, and they may not be configured to perform multiple data processing tasks like a classical computer.

[0004] Nanoscale memory devices are known, such as memristors, whose resistance depends on the history of electrical signals applied through the device. Recent advances in such memory devices have made this technology more relevant to industrial applications. For example, such memory devices can be used as building blocks for new computing paradigms, such as brain-inspired computing and memory-based computing (MemComputing). In particular, such devices can be used in physical ANNs, such as cross-array structures of resistive processing units.

[0005] However, key challenges remain to be overcome, such as the required high programming power, noise, and resistance drift. To address these issues, the concept of projected memory devices has recently been introduced (see, for example, Koelmans, W.W. et al. Projected phase-change memory devices. Nat. Commun. 6:8181 doi:10.1038 / ncomms9181(2015)), and the references cited therein), where the physical mechanism of resistive storage can be decoupled from the information retrieval process. Projected memory devices can specifically utilize phase-change memory mechanisms, allowing programming of multiple resistive states. Such devices can exhibit very low drift and excellent noise performance.

[0006] Projected phase-change memory (PCM) devices are typically based on metal nitride projection materials, which allows for reduced drift and conductance fluctuations. Projected PCM devices adhere to certain design rules to enable the projection mechanism to function. These rules utilize the highly nonlinear, field-dependent electrical transport characteristics of resistive memory materials (e.g., phase-change materials). At a minimum, the resistance of the projection component must satisfy the following condition:

[0007] - The resistance R of the amorphous portion of the resistive memory material AMOR It must be (e.g., much higher) than the resistance R of the projection component. PROJ That is, R AMOR >>R PROJ ;

[0008] - The resistance R of the crystalline portion of the resistive memory material CRYST It must be (e.g., much) lower than R PROJ That is, R CRYST <<R PROJ ;as well as

[0009] - The resistance R of the amorphous portion (e.g., in the ON state) AMOR,ON It must be (e.g., much) lower than R PROJ That is, R AMOR,ON <<R PROJ .

[0010] However, the resistance of resistive memory materials depends on both the material itself and its thickness. To maintain comparable properties when scaling memory segments, the projection element must be changed consistently.

[0011] Using metal nitrides (such as TiN, TaN, etc.) as materials for projection components presents several challenges. The first difficulty is the tunability of resistance. In metal nitrides, resistivity can be scaled proportionally by adjusting the nitrogen content. This scaling behavior is typically non-linear, and the electrical properties become noisier at higher nitrogen contents. Furthermore, the fabrication of metal nitrides is challenging. Metal nitride films are typically obtained via reactive deposition, requiring control over the quality and quantity of nitrogen, as well as the deposition temperature, while ensuring the resistive memory material remains unaffected. Additionally, metal nitrides exhibit poor thermal stability. Most metal nitrides undergo phase separation at high temperatures and oxidation when exposed to environmental conditions, which can alter the electrical properties of the projection component, thus affecting the functionality of the projected memory device. For integrity, these materials exhibit poor adhesion to phase change materials and oxides, an adhesion necessary for the fabrication of memory cells. The presence of an interface layer between the projection component and the phase change component, or delamination of the projection component, can impair the functionality of the memory device.

[0012] Various methods exist in the development of projected memory devices or components thereof. For example, U.S. Patent No. 10,290,080 (“080 Patent”) allegedly discloses a nanoparticle-based resistive memory device. However, the 080 Patent does not disclose that the projected component includes a non-insulating material substantially comprising carbon. Furthermore, the 080 Patent does not provide any details on how to achieve tunability in the resistivity of the projected layer, but only discloses methods related to the nanoparticle core memory element, without addressing the selection or tunability of the projected material. In another example, U.S. Patent No. 10,319,440 (“440 Patent”) allegedly discloses void control for confined phase-change memory. However, the 440 Patent does not disclose that the projected component includes a non-insulating material substantially comprising carbon. The 440 Patent also does not disclose that the projected component has adjustable resistance to significantly influence read operations more than write operations. The 440 Patent also does not disclose adjusting the resistance of the projected layer through deposition methods, heat treatment, thickness control, and / or doping. In another example, U.S. Patent 7,932,101 (“101 Patent”) allegedly discloses a thermally contained / insulated phase-change memory device. However, 101 Patent does not disclose a projected memory device, nor does it disclose the steps of using or manufacturing a projecting element (e.g., referred to as a pad) that is also in electrical contact with the memory segment. In yet another example, U.S. Patent 8,309,407 (“407 Patent”) allegedly discloses a carbon-based film having sidewall pads that serve as a protective layer and / or series resistors. However, the carbon layer in 407 Patent cannot be used as a projecting layer (e.g., for a projected memory device, it must be parallel to the memory stack). Furthermore, as described in 407 Patent, the sidewall pads are placed parallel to the memory stack. This arrangement is an oxygen-deficient dielectric material and therefore not suitable for projecting. Therefore, 407 Patent does not cover parallel projecting elements using carbon-based materials as memory switching materials. Therefore, in view of all the above problems and as shown in the above solutions, a novel solution for a projected memory device is needed. Summary of the Invention

[0013] According to a first aspect, the present invention is implemented as a projected memory device. The device includes two electrodes, a memory segment, and a projection member. The projection member forms a dual-part connection between the two electrodes and the memory segment. The projection member extends parallel to and contacts the memory segment. The memory segment comprises a resistive memory material, while the projection member comprises a non-insulating material substantially comprising carbon (e.g., a thin film of a non-insulating material). Preferably, the non-insulating material substantially comprises amorphous carbon. For example, in an embodiment, the projection member substantially comprises amorphous carbon.

[0014] The use of carbon, particularly amorphous carbon, as the primary component of the projection element allows for unprecedented flexibility in adjusting its resistance. This significantly allows for better decoupling of the physical mechanism of resistive memory from the information retrieval process. More precisely, the use of carbon makes it easier to adjust memory device performance, such as the resistance window and the portion of the current flowing through the memory segment. Therefore, as discussed below with reference to specific embodiments of the invention, the resistance of the projection element can be adjusted during manufacturing to affect read operations substantially more than write operations.

[0015] First, the projected storage device is preferably configured to allow information to be written to and read from the resistive memory material when a write signal and a read signal are respectively applied. In operation, this means that such signals are applied through the storage segment via two electrodes. The resistive memory material is typically designed to partially undergo a phase transition when the write signal is applied. Interestingly, the non-insulating material may have resistance that is adjusted to allow the current generated by the applied signal to flow through the non-insulating material in a proportion that, in operation, is significantly larger than, if not much larger, than the current generated by the write signal, for the current generated by the read signal applied after the phase transition (as obtained when the write signal is applied).

[0016] For example, a resistive memory material can be designed such that, upon application of the write signal, the phase transition causes an increase in the crystalline portion of the resistive memory material relative to its amorphous portion. Furthermore, in operation, the remaining portion of the resistive memory material typically remains amorphous after the write signal has been applied. The resistance of a non-insulating material can now be adjusted so that the non-insulating material provides a current path with a lower resistance than the remaining portion of the resistive memory material for the current generated by the applied read signal. This current path has a length that depends on the size of the remaining, amorphous portion of the resistive memory material during operation.

[0017] In a preferred embodiment, the resistive memory material is further designed so that the projected memory device allows for multiple programmable resistive states by applying individual write signals. Furthermore, the resistance of the non-insulating material can be advantageously adjusted so that the current path provided by the non-insulating material has a lower resistance in operation for the current generated by the read signal than any remaining amorphous portion of the resistive memory material obtained in any of the multiple programmable states.

[0018] As described, non-insulating materials can substantially comprise amorphous carbon. Moreover, non-insulating materials are preferably doped with one or more of the following elements: oxygen (O), hydrogen (H), and nitrogen (N).

[0019] In an embodiment, the projection element is configured to coat a layer of the resistive memory material. The electrical sheet resistance of the non-insulating material layer is preferably between 0.01 and 40 megohms per square. The non-insulating material layer may, for example, have an average thickness between 1 and 20 nm, wherein the thickness is measured perpendicular to the average plane of the layer. Note that, more generally, the device may include one or more projection elements, each configured, for example, to coat a layer of the resistive memory material. In variations of the layer, the projection element may be specifically configured to at least partially surround a sheath of the resistive memory material.

[0020] In embodiments, the resistive memory material is a phase change material, including one of GeSbTe, VOx, NbOx, GeTe, GeSb, GaSb, AgInSbTe, InSb, InSbTe, InSe, SbTe, TeGeSbS, AgSbSe, SbSe, GeSbMnSn, AgSbTe, AuSbTe, or AlSb. The phase change material is preferably doped with elements such as C, Ni, Ce, and Si. The resistive memory material may also be configured as a single layer (e.g., in a lateral device configuration) with an average thickness, for example, between 1 and 50 nm. Similarly, the thickness is measured perpendicular to the average plane of the layer.

[0021] For example, a non-insulating material can be configured as a layer that mainly comprises amorphous carbon and has an average thickness between 1 nm and 20 nm, while a resistive memory material can be configured as a layer with an average thickness between 1 nm and 50 nm and coated with a non-insulating material layer.

[0022] In a preferred embodiment, the projected memory device further includes a substrate (e.g., silicon) and a first SiO2 layer extending over the substrate. In this case, a non-insulating material layer extends over the SiO2 layer, and a resistive memory material layer extends over the non-insulating material layer. A second SiO2 layer may extend over the resistive memory material layer. Additional material layers may be present.

[0023] According to another aspect, the present invention is implemented as a method using a projected memory device as described above. That is, the method relies on a projected memory device having storage segments and projection members, each storage segment and projection member connected to two electrodes. The method involves writing information to and reading information from a resistive memory material by applying write and read signals, respectively. Such signals are applied via the storage segments through the two electrodes. The resistive memory material undergoes a phase transition locally upon application of the write signal. For example, the write signal may be applied to increase the long-range order of the resistive memory material. In practice, an amorphization signal is typically applied before applying the write signal to at least partially amorphize the resistive memory material.

[0024] As previously described, the non-insulating material of the projected memory device preferably has resistance, which is adjusted to allow the current generated by the applied signal to flow through the non-insulating material in a significantly larger proportion for the applied read signal than for the applied write signal.

[0025] In this embodiment, each of the applied write signal and read signal is a constant voltage signal. The amplitude of the applied write signal is significantly greater than the amplitude of the applied read signal.

[0026] According to the last aspect, the present invention is embodied as a method for manufacturing a projected memory device. The method aims to manufacture a projected memory device having a storage segment and a projection component as described above. Specifically, the projected memory device can be manufactured such that the non-insulating material substantially comprises amorphous carbon. The manufacturing process includes adjusting the resistivity of the non-insulating material according to the resistivity of the resistive memory material.

[0027] Preferably, the fabrication includes depositing the resistive memory material and depositing the non-insulating material to give the non-insulating material a given resistivity. The non-insulating material can be deposited, for example, using physical vapor deposition, chemical vapor deposition, or chemical growth techniques.

[0028] In embodiments, the resistivity of the non-insulating material is adjusted by doping amorphous carbon with one or more of oxygen, hydrogen, and nitrogen. Preferably, the non-insulating material is doped with amorphous carbon simultaneously with deposition of the non-insulating material in an atmosphere containing dopants (i.e., oxygen, hydrogen, and / or nitrogen).

[0029] In a preferred embodiment, after depositing the non-insulating material, the resistivity of the non-insulating material is further adjusted by annealing amorphous carbon in an inert atmosphere. In a variant, after depositing the non-insulating material, the resistivity of the non-insulating material is adjusted via a reverse-sputtering technique performed in an inert atmosphere.

[0030] The apparatus and methods embodying the invention will now be described by way of non-limiting examples and with reference to the accompanying drawings. Attached Figure Description

[0031] The accompanying drawings are provided to further illustrate various embodiments and explain the various principles and advantages according to this disclosure. In the drawings, similar reference numerals refer to the same or functionally similar elements throughout the various views. The drawings, together with the following detailed description, are incorporated into and form a part of this specification. In the drawings:

[0032] Figures 1-3 and 5 depict projected memory devices according to various embodiments. Figure 1A-1C , Figures 2A-2D and Figures 3A-3D It is a two-dimensional cross-sectional view. Figure 3EIt is a three-dimensional view of the device, in which the projection component is formed as a sheath. Figure 5A It is a three-dimensional view of another device. Figure 5B This is the corresponding cross-sectional view.

[0033] Figure 4 A memristor cross array comprising a plurality of projected memory devices is schematically illustrated according to an embodiment.

[0034] Figure 6 A graph illustrating the desired current-voltage (IV) characteristics of the resistive memory material and the non-insulating material of the projection component;

[0035] Figure 7 It is a graph representing the current pulses applied to operate the projected memory device in a typical embodiment;

[0036] Figure 8 This is a flowchart illustrating the higher-order steps of a method for operating a projected memory device according to an embodiment;

[0037] Figure 9 It shows operations such as Figure 4 The flowchart of the higher-order steps of the memristor cross-array method shown; and

[0038] Figure 10 This is a flowchart illustrating the advanced steps of a preferred method for manufacturing a projected memory device according to an embodiment.

[0039] The accompanying drawings illustrate a simplified representation of the apparatus or components thereof as described in the embodiments. Technical features depicted in the drawings are not necessarily drawn to scale. Unless otherwise indicated, similar or functionally similar elements in the drawings are assigned the same reference numerals. Detailed Implementation

[0040] The method of this invention and its variations are collectively referred to as "the method of this invention". All references Sij refer to... Figures 8 to 10 The flowchart describes the method steps, while the digital labels refer to the physical parts or components of the projected memory device and memristor cross array depicted in Figures 1-5.

[0041] A first aspect of an exemplary embodiment will now be described, relating to a projected memory device. Examples of such projected memory devices 1, 1a-1i are shown in Figures 1-3 and 5, for example, Figure 1A The apparatus 1 shown includes two electrodes 32, 34, a storage section 10, and a projection component 20. In the literature, the projection component is also referred to as a "pad".

[0042] The storage segment 10 and the projection component 20 form a dual element that is integral and connects two electrodes. In the examples of Figures 1, 2A, and 2B, each of the storage segment 10 and the projection component 20 connects two electrodes 32, 34; however, this configuration is merely exemplary and other configurations can be used, see, for example... Figure 2C Alternatively, in 2D, as will be described in detail below. Dual elements 10, 20 connect electrodes in each case. The projection member 20 extends parallel to the memory segment 10, i.e., at least one surface of the projection member 20 extends parallel to at least one surface of the memory segment 10. Additionally, the projection member 20 contacts the memory segment 10. Note that the projection member 20 preferably makes direct mechanical contact with the memory segment 10. In variations, a thin interface layer may be required, which is inserted between the surface of the projection member 20 and the surface of the memory segment 10 for adhesion purposes. In all cases, the projection member 20 is arranged to ensure good electrical contact with the memory segment 10.

[0043] Projected memory devices typically include one or more projection elements 20. Alternatively, a projection element may be considered to include one or more portions.

[0044] For example, in the example of Figure 1, two projection layers extend and adhere to each side of the storage segment 10. In a variation, the devices 1a, 1b may include a single projection layer 20a, 20b, for example, as... Figure 2A and 2B As in the previous example, it extends below or above storage segment 10. In other variations, devices 1c and 1d may have a "mushroom" configuration, wherein projection layer 20c extends flatly below storage segment 10. Figure 2C ) or projection layer 20d partially surrounds storage segment 10 ( Figure 2D ), so as to connect two electrodes 32C, 34C that can have various possible shapes. Figures 3A-3D Another structure is shown, in which devices 1e-1h each include one or more projection members 20e-20h with various structures. Together with storage segments 10e-10f of corresponding shapes, the projection members 20e-20h are connected to a pair of electrodes 32, 34. For example, the projection member can be a conical 20e( Figure 3A ), with a hollow shape 20f ( Figure 3B ), so as to partially surround segment 10, or include several interdigitated segments 20g ( Figure 3C Some of these can be replaced by dielectric material 40h. Figure 3D ).

[0045] Further configurations are conceivable. Typically, the projection member 20 can be fabricated as a layer extending below or above the storage segment 10. It can also be fabricated on either or both lateral sides of the phase change layer; note that the projected memory device can have different lateral geometries (e.g., when viewed from above). In more complex embodiments, the projection member can also partially or completely surround the storage segment. Note that the projection member can also serve as an electrode connected to electrical contacts. In this case, a portion of the projection member functions as one of the two electrodes 32, 34.

[0046] Typically, storage segment 10 includes resistive memory materials 11, 12, which may include or consist of phase-change memory (PCM) materials such as Sb, AgInSbTe (AIST), or GeTe. More generally, the PCM material may include Sb, Ge, and / or Te elements. For example, it may include one of the following materials: GeSbTe, VOx, NbOx, GeTe, GeSb, GaSb, AgInSbTe, InSb, InSbTe, InSe, SbTe, TeGeSbS, AgSbSe, SbSe, GeSbMnSn, AgSbTe, AuSbTe, and AlSb. Other PCM materials are also contemplated. In variations, the resistive memory material may be a conductive bridge memristor (e.g., a filamentary switching material, such as a metal oxide or chalcogenide glass).

[0047] Projection element 20 may comprise a non-insulating material substantially comprising carbon. That is, the non-insulating material of projection element 20 is typically made of 90 or even 95% by weight or more carbon. Depending on the specific embodiment, the non-insulating material may comprise amorphous carbon. Projection element 20 may be substantially made of amorphous carbon (hereinafter abbreviated as aC). "Amorphous" means that aC material is essentially amorphous and lacks long-range order. Short-range order may exist, but the interatomic distances and / or bonding angles deviate significantly (e.g., 5% or greater) relative to the crystalline form of carbon (e.g., graphite or diamond lattice). aC material may substantially comprise tetrahedral amorphous carbon. aC compounds may also contain small non-amorphous regions, such as microcrystalline or nanocrystalline regions. It is assumed that the aC projection element remains substantially amorphous, and in some implementations, is entirely amorphous.

[0048] aC materials preferably contain impurities and / or dopants. For example, aC materials may be doped with one or more of elements such as Si, H, N, and O, which have proven useful for improving chemical stability and the retention and durability of memory elements.

[0049] Taking into account the design rules presented in the background section, using carbon, particularly amorphous carbon, as the primary component of the projection element allows for unprecedented flexibility in adjusting the resistance of the projection element. More precisely, using carbon as the material for the projection element allows for better decoupling of the physical mechanism of resistive storage from the information retrieval process. In particular, this makes it easier to adjust memory device performance, such as the resistance window and the portion of the current flowing through storage segment 10. As a result, the resistance of the projection element 20 can be adjusted during manufacturing so that it significantly affects read operations more than it affects write operations, as explained below with reference to a specific embodiment.

[0050] Therefore, the carbon-based, resistance-adjustable projection element 20 can be advantageously used for drift and noise correction in the resistive memory device 1. For example, experiments conducted on 3 nm thick Sb line cells, some of which included an 8 nm aC projection layer while others did not, have shown that comparable programming currents and power can be used in both cases. However, due to the aC projection layer, a fourfold reduction in resistance drift can be achieved. Furthermore, further experiments have provided evidence that the device 1 can reliably switch between two resistive states at least 1,000 times.

[0051] All of these will now be described in detail with reference to specific exemplary embodiments. First, more specifically referring to Figure 1B and 1C Describe in detail the functional attributes of the projection components and storage segments.

[0052] Generally, the projection storage device 1 is configured to allow information to be written to and read from the resistive memory materials 11, 12. These operations are typically performed alternately, as will be discussed later. Figure 8 These operations require the application of write and read signals, respectively. These signals are applied via two electrodes 32 and 34 through memory segment 10. Therefore, device 1 typically means connected to circuit 50, see [link to circuit 50]. Figure 1A For example, resistive memory materials 11 and 12 can be selected such that they partially undergo a phase transition when a write signal is applied. For example, when the write signal is applied, the phase transition occurs locally only in one or more regions of memory segment 10.

[0053] Meanwhile, the non-insulating material can have a resistance that can be adjusted to better allow the read current. That is, in operation, this resistance allows the current generated by the applied signal to flow through the non-insulating material in a significantly larger proportion than the current generated by the write signal itself, relative to the current generated by the read signal (after the partial phase transition obtained using the write signal).

[0054] Note that in this respect, the projection member 20 must contact the segment 10 at least at the level of the amorphous region. Therefore, it is not necessary for the projection member to contact the memory segment everywhere. In practice, according to an exemplary embodiment, the projection member 20 is easier to manufacture so that the resistive memory material of the segment 10 is completely coated along its entire length, as assumed in Figures 1 to 3. That is, in the embodiment, at least one side of the segment 10 is directly adhered to the projection material 20. Note that whether this is the case still depends on the desired configuration. For example, in Figure 3D In the middle section 10h, the lower side is coated with a dielectric material instead of the projection material 20h.

[0055] Specifically, the resistive memory materials 11, 12 can be designed and intended to operate in such a way that a partial phase transition (e.g., as obtained when a write signal is applied) causes an increase in the crystalline portion of the resistive memory material relative to its amorphous portion, as assumed in Figures 1-3. In operation, it is still assumed that the remaining portion of the resistive memory material 12 remains amorphous after the write signal is applied. The resistance of the non-insulating material can now be adjusted so that the non-insulating material provides a current path with a lower resistance than the remaining amorphous portion of the resistive memory materials 11, 12 for the current generated by the applied read signal, such as... Figure 1C As shown. Note that during operation, this current path has a length that depends on the size of the remaining portion.

[0056] During reading, the current flows around the remaining amorphous region. Figure 1C ), while when the write signal is applied, the current mainly flows through materials 11 and 12 ( Figure 1B ).

[0057] A more precise explanation is as follows. Above the threshold field, the amorphous material undergoes a so-called electronic threshold switching, resulting in a low-resistance ON state. During writing, the resistance of the projection member 20 is significantly higher than the on-state resistance of the amorphous region, and most of the current flows through the resistive memory materials 11, 12. However, during low-field reading, most of the current bypasses the high-resistance amorphous region and flows through the portion of the projection member 20 that extends parallel to and contacts that region. Therefore, in this case, the resistance of the device 1 is dominated by the resistance of this portion of the projection member 20.

[0058] More specifically, the resistance of the projection material 20 can be wisely chosen such that it has only a marginal effect on write operations (e.g., during which a phase transition occurs) but a significant effect on read operations. Figure 6 The desired IV characteristics corresponding to the phase transition portion and the projection portion are schematically illustrated. The resistance of the phase transition portion in the amorphous phase is given by R. AMOR Representation. Resistance R CRYSTIt is the resistance in the crystalline phase. The projected portion has resistance R. PROJ Assume a voltage signal is used. In write mode, when the write voltage exceeds the threshold voltage and the amorphous portion enters the ON state, its resistance R... AMOR,ON Below R PROJ This ensures that most of the current flows through the phase transition section, leading to Joule heating and the subsequent phase transition. In read mode, because R... PROJ It can be selected as R AMOR The current is much lower, so it preferentially flows through the portion of the projection component parallel to the amorphous portion. Elsewhere, the current will preferentially flow through the crystalline portion.

[0059] In each case, the current portions typically differ by an order of magnitude. For example, the portion of the current passing through the projection member 20 during a read operation can typically be 10 times larger than the portion of the current passing through the amorphous portions of the resistive memory materials 11, 12, while during a write operation it can typically be 10 times smaller than the portion of the current passing through the crystallization and melting portions.

[0060] Figure 7 The typical sequence of applied signals is shown. First, an amorphizing pulse is applied. For example, a short high-current pulse (RESET) is applied to bring the PCM to a high-resistance state. As a result, most of the PCM becomes amorphous. In a variation, a constant voltage pulse can be used to achieve the same purpose. Next, a write pulse is applied, such as a long low-current pulse (SET), which reduces the amorphous portion of the PCM and brings the PCM to a lower-resistance state. The PCM is still partially amorphous, but now the crystalline portion is relatively more important. Therefore, the write signal reduces the amorphous portion of memory segment 10. Note that pulse trains can be used where single pulses are used, whether for SET or RESET operations. The pulse amplitude or number of pulses can be modulated to achieve the desired resistance state. Similarly, a constant voltage pulse can be used for the write signal instead of a current pulse. Finally, a read (constant) voltage pulse can be applied to read the current state of the memory segment.

[0061] As described above, voltage signals can be applied for both amorphization and write operations. In this case, the write voltage signal typically has a significantly larger amplitude than the read voltage signal. In both cases, due to the well-adjusted resistance of the projection section, the projection section is more permissive for the current flowing during read operations than for the current generated during write operations.

[0062] Note that the projected memory device of the present invention can be advantageously designed to enable programming of multiple resistive states and correspondingly realize multiple cell states. Furthermore, such a device can reversibly switch between such conductance states. That is, the resistive memory materials 11, 12 can be further designed to allow multiple programmable resistive states (see [reference needed]) by applying, for example, corresponding write signals of different intensities. Figure 7 In this case, the projection component 20 needs to take this change into account. According to an exemplary embodiment, this is achieved by utilizing the corresponding IV curve ( Figure 6 The properties of (as shown in one example) allow the resistivity of amorphous carbon to be adjusted to allow these intermediate states. That is, the resistance of the non-insulating material can be adjusted so that, for the current path it provides, in operation, for the current generated by a subsequent read signal, it has a lower resistance than any remaining amorphous portion of the resistive memory materials 11, 12 obtained in any of the multiple programmable states.

[0063] Note that when a write voltage signal is applied to switch between different states, each applied write voltage signal has a significantly larger amplitude than the read voltage signal. As a further explanation, states can typically be switched incrementally without necessarily resetting (de-shaping) the memory segment each time.

[0064] Now, for reference Figure 5A and 5B A particularly effective embodiment of the projected memory device 1j is discussed. Here, the device 1j includes a projection element configured to coat only a layer of the resistive memory material; see [link to relevant documentation]. Figure 5B RHS. In this example, it is assumed that the resistive memory material is substantially composed of antimony (Sb). In variations, it could be, for example, a 15 nm thick AIST layer or a 30 nm thick GeTe layer.

[0065] More generally, the resistive memory materials 11 and 12 typically have an average thickness between 1 and 50 nm. For example... Figure 5B As further shown, the non-insulating material layer (projection layer) has an average thickness between 3 and 12 nm. In other embodiments, this average thickness of the non-insulating material layer can be in the range of 1 to 20 nm. Note that the thickness is measured perpendicular to the average plane of the layer, for example, perpendicular to the plane (x, z) in Figures 1, 2A-2B, and 5A.

[0066] The resistance of this layer is preferably between 0.1 and 1 megohm per square. However, more generally, in practice, the adjustment resistance of the projection element is typically between 0.01 and 40 megohms per square.

[0067] Figure 5A and 5BThe device 1i shown further includes: a substrate 40 (typically silicon, or Si); a first SiO2 layer extending over the substrate 40, below a non-insulating material layer and a resistive memory material layer; and a second SiO2 layer extending over the resistive memory material layer. Figure 5B As further shown, device 1i may additionally include a hydrogen silsesquioxane (HSQ) layer, which extends above the second SiO2 layer for manufacturing purposes. Additional layers may be present, such as a third SiO2 layer extending above the HSQ layer. Preferred dimensions of the device are shown in... Figure 5B middle.

[0068] The projective memory device of the present invention can be advantageously used in memristor cross-arrays of neuromorphic memory systems. Figure 4 An example of such a cross-array structure is shown, comprising N input lines (horizontal lines) and W output lines (vertical lines), where N is typically equal to W, although not mandatory. The cross-array structure may include one or more projected memory devices 1 per junction. Furthermore, the memristor cross-array 100 includes input circuitry 135, such as pulse-width modulation (PWM) circuitry, for controllably generating the signals required to write to the array 100 (and also reading from the array 100 if the latter is used as a neuromorphic memory device). Write heads (and possibly read heads, not shown) are connected to the input lines via corresponding PWM circuitry 135. Figure 4 (Horizontal line in the diagram). The read head is additionally connected to the output of the cross array to read the result from the multiplication-accumulation operation and return this result to an external controller (not shown). The standard readout circuit 136 can be used to read the output current from the output line (shown as a vertical line). As mentioned above, in addition to neuromorphic applications, Figure 4 The cross array shown can also be used as a neuromorphic memory device.

[0069] refer to Figure 8 Now, another aspect of an exemplary embodiment will be described, which relates to a method of using or operating a projected memory device. The main aspects of the method have been implicitly presented in the description of a preferred projected memory device. Therefore, these aspects will only be briefly described below.

[0070] This method relies on, for example, the previously described projected memory device 1, having two electrodes 32, 34 and a dual element connecting the two electrodes 32, 34, wherein the dual element comprises a memory segment 10 and a projection member 20. The projection member extends parallel to and contacts the memory segment 10. The memory segment 10 comprises resistive memory materials 11, 12, while the projection member comprises a non-insulating material substantially containing carbon, such as amorphous carbon.

[0071] This method involves writing (S81 to S83) information to resistive memory materials 11 and 12 and reading (S84 to S85) information from resistive memory materials 11 and 12. These steps are typically performed alternately, but are not mandatory. This is essentially achieved by applying a write signal (S83) and a read signal (S84), respectively. (See previous reference...) Figure 7 As discussed, these signals are applied through the storage segment 10 via two electrodes 32, 34. In particular, the resistive memory materials 11, 12 may undergo a phase transition locally when a write signal is applied (S83). Applying a write signal typically increases the long-range order of the resistive memory materials 11, 12 by increasing the crystallinity of the resistive memory materials 11, 12.

[0072] As previously mentioned, the non-insulating material of the projected memory device 1 preferably has a resistance that is adjusted to better allow read current. That is, the current generated by the applied signal flows through the non-insulating material in a proportion that is significantly greater for the current generated from the read signal (S84) than for the current generated from the write signal (S83).

[0073] like Figure 8 As shown, an amorphization (RESET) signal (S81) is typically applied before the write signal (S83), which at least partially amorphizes the resistive memory materials 11, 12. After the reset, the write signal (S83) is applied, for example, to achieve one of several possible resistive states. As previously mentioned, one or more additional write signals may be applied after the initial write signal to incrementally switch states without necessarily undergoing the intermediate amorphization step S81, which is permissible for materials 11, 12.

[0074] As mentioned earlier, the applied signal can be a current signal or a voltage signal. When the applied write signal and read signal are (constant) voltage signals, the amplitude of the applied write signal is usually significantly greater than the amplitude of the read signal.

[0075] Figure 9 It shows how to operate such as Figure 4The illustrated cross-array structure 100 is a typical sequence of steps performed for inference purposes, where the array serves as a neuromorphic computing device, i.e., as an analog core computing device. One core is equivalent to a single layer of an ANN. That is, the core computing device is used to perform operations related to a single ANN layer. Essentially, these steps are equivalent to programming a projected memory device to store synaptic weights before coupling the input signal to the input line and reading the output signal obtained from the output line according to the multiplication-accumulation operation. In detail, the memristor device 1 of the neuromorphic device is first programmed (S91). The programming is completed during initialization based on the weight values ​​trained offline. Then, the input signal received from the lower ANN layer (except the input layer) (S92) is coupled (S93) to the input line of the core device via the input circuit 135. Next, the multiplication-accumulation operation is performed in step S94 to obtain the output value, and then the output value is forwarded to, for example, a core-to-core communication infrastructure in step S95. Nuclear communication infrastructure can further process such signals and pass them to the next core (as shown by the dashed arrow), and so on, until the final output is obtained.

[0076] Next, according to the last aspect, an exemplary embodiment can be implemented as a method for manufacturing a projected memory device. This method, as... Figure 10 As shown, the objective is to manufacture (S101-S103) a projected memory device 1, as described herein, comprising a storage segment 10 having resistive memory materials 11, 12, and a projection portion 20 extending parallel to and in contact with the storage segment 10, wherein the projection portion comprises a non-insulating material substantially comprising carbon, such as amorphous carbon. This manufacturing specifically includes adjusting the resistivity of the non-insulating material, which is performed based on the resistivity of the resistive memory materials 11, 12.

[0077] like Figure 10 As shown, manufacturing the projected memory device 1 may first include depositing (S101) the resistive memory materials 11, 12 to form the memory segment. The resistive memory material is deposited on a suitable substrate, for example, see [reference needed]. Figure 5B Then, in step S102, a non-insulating material is deposited. Note that steps S101 and S102 can be reversed. That is, the aC layer can be deposited before the resistive memory material is deposited, as in the embodiment discussed below.

[0078] In both cases, the deposition step S102 can be performed to achieve a given resistivity. Various thin film deposition schemes can be considered. For example, step S102 can be performed specifically using physical vapor deposition techniques (e.g., pulsed laser deposition, or magnetron sputtering, especially for the preparation of metal oxides, or DC / RF sputtering), chemical vapor deposition techniques, or chemical growth techniques. As described, the material can be deposited before or after the resistive memory material. For example, before or after the deposition of the resistive memory material, the non-insulating material can be chemically or electrochemically grown on the substrate, either in situ or ex-situ.

[0079] The resistivity of non-insulating materials can be specifically adjusted by modulating the deposition of the non-insulating material or by adapting it in some way to the thickness of the non-insulating material. For example, the modulation axis can be specifically related to deposition time, working distance, working pressure, and power modulation.

[0080] In embodiments, the resistivity of the non-insulating material is further adjusted by doping amorphous carbon with, for example, oxygen, hydrogen, silicon, and / or nitrogen (S102). Note that it is preferable to dope the amorphous carbon by depositing the latter in an oxygen, hydrogen, or nitrogen atmosphere while depositing the S102 non-insulating material. Preferably, such a step is performed in situ by a reactive deposition process in an oxygen, hydrogen, or nitrogen atmosphere.

[0081] In one embodiment, for example, after the non-insulating material has been deposited (S102), the resistivity of the non-insulating material is further adjusted by annealing the amorphous carbon in an inert atmosphere (S103). In a variation, heat treatment is performed during the deposition of the amorphous carbon. In other variations, after the non-insulating material is deposited, the resistivity of the non-insulating material is further adjusted by backsputtering in an inert atmosphere. In a further variation, step S101 is performed after step S102. Depositing the amorphous carbon layer first allows for greater flexibility in the subsequent annealing step S103, which can be optimized only for the amorphous carbon. Other variations may be considered.

[0082] Although the invention has been described with reference to a limited number of embodiments, variations, and drawings, those skilled in the art will understand that various changes can be made and equivalents can be substituted without departing from the scope of the invention. In particular, features (of similar means or methods) described in a given embodiment or variation or shown in the drawings may be combined with or substituted for another feature in another embodiment, variation, or drawing without departing from the scope of the invention. Therefore, various combinations of features described with respect to any of the foregoing embodiments or variations are contemplated, which remain within the scope of the appended claims. Furthermore, many minor modifications can be made to adapt particular situations or materials to the teachings of the invention without departing from the scope of the invention. Therefore, the invention is not limited to the specific embodiments disclosed, but rather will include all embodiments falling within the scope of the appended claims. In addition, many other variations besides those expressly mentioned above are contemplated. For example, those skilled in the art will conceive of materials other than those expressly mentioned.

Claims

1. A projected memory device, comprising: Two electrodes; This includes storage segments made of resistive memory material; as well as A projection element extending parallel to and in contact with the storage segment, the projection element comprising a non-insulating material substantially consisting of amorphous carbon. The storage segment and the projection component are connected to the two electrodes, and The projected memory device is manufactured by adjusting the resistivity of the non-insulating material according to the resistivity of the resistive memory material.

2. The projected memory device according to claim 1, wherein: The projected memory device is configured such that, for information to be written to and read from the resistive memory material, when a write signal and a read signal are respectively applied through the memory segment via the two electrodes, the resistive memory material partially undergoes a phase transition when the write signal is applied, and... The non-insulating material has resistance, which is adjusted during operation such that the current generated by the applied signal flows through the non-insulating material in a significantly larger proportion than the current generated by the write signal compared to the current generated by the read signal applied after the phase transition.

3. The projected memory device according to claim 2, wherein: The resistive memory material is configured for the phase transition such that, during operation, when the write signal is applied, the crystalline portion of the resistive memory material increases relative to its amorphous portion, thereby keeping the remaining portion of the resistive memory material amorphous. The resistance of the non-insulating material is configured to provide, in operation, a current path with a lower resistance than the remainder of the resistive memory material for the current generated by the applied read signal, the current path having a length that depends on the size of the remainder.

4. The projected memory device according to claim 3, wherein: The resistive memory material is further configured for the projected memory device to have multiple programmable resistive states by applying respective write signals, and In operation, the resistance of the non-insulating material is adjusted for the current path provided by the non-insulating material to have a lower resistance for the current generated by the read signal than any remaining, amorphous portion of the resistive memory material obtained in any of the plurality of programmable resistor states.

5. The projected memory device according to claim 1, wherein: The non-insulating material is doped with one or more of the following elements: oxygen, hydrogen, and nitrogen.

6. The projected memory device according to claim 1, wherein: The projection element is configured as a layer coated with the resistive memory material.

7. The projected memory device according to claim 6, wherein: The sheet resistance of the non-insulating material layer is between 0.01 and 40 megohms per square.

8. The projected memory device according to claim 6, wherein: The non-insulating material layer has an average thickness between 1 and 20 nm.

9. The projected memory device according to claim 1, wherein: The resistive memory material is a phase change memory material, which includes one of GeSbTe, VOx, NbOx, GeTe, GeSb, GaSb, AgInSbTe, InSb, InSbTe, InSe, SbTe, TeGeSbS, AgSbSe, SbSe, GeSbMnSn, AgSbTe, AuSbTe, and AlSb.

10. The projected memory device according to claim 9, wherein: The non-insulating material has a layer with an average thickness between 1 and 20 nm; and The resistive memory material is configured as a layer having an average thickness between 1 nm and 50 nm, and is coated with a layer of the non-insulating material.

11. The projected memory device of claim 10, wherein the projected memory device further comprises: Substrate; A first SiO2 layer extending above the substrate; The non-insulating material layer extends on the SiO2 layer; The resistive memory material layer extends over the non-insulating material layer; as well as A second SiO2 layer extends over the layer of resistive memory material.

12. A method of using a projected memory device, the method comprising: Two electrodes of a projected memory device are connected using a storage segment and a projection member. The storage segment comprises a resistive memory material, and the projection member extends parallel to and contacts the storage segment. The projection member comprises a non-insulating material substantially consisting of amorphous carbon. Information is written to and read from the resistive memory material by applying write and read signals through the storage segment via the two electrodes, respectively, wherein the resistive memory material undergoes a phase transition locally when the write signal is applied.

13. The method according to claim 12, wherein: The non-insulating material of the projected memory device has resistance, which is adjusted such that the current generated by the applied signal flows through the non-insulating material in a significantly larger proportion for the applied read signal than for the applied write signal.

14. The method according to claim 12, wherein: Each of the applied write signal and read signal is a constant voltage signal, wherein the amplitude of the applied write signal is significantly greater than the amplitude of the applied read signal.

15. The method according to claim 12, wherein: A write signal is applied to increase the long-range order of the resistive memory material.

16. The method according to claim 15, further comprising: An amorphization signal is applied before the write signal is applied to at least partially amorphize the resistive memory material.

17. A method of manufacturing a projected memory device, the method comprising: A projected memory device is manufactured having a storage segment comprising a resistive memory material and a projection member extending parallel to and in contact with the storage segment, the projection member comprising a non-insulating material substantially comprising amorphous carbon. Manufacturing the projected memory device includes adjusting the resistivity of the non-insulating material based on the resistivity of the resistive memory material.

18. The method of claim 17, wherein manufacturing the projected memory device comprises: The resistive memory material and the non-insulating material are deposited using one of physical vapor deposition, chemical vapor deposition, and chemical growth techniques to give the projected memory device a given resistivity.

19. The method of claim 17, wherein: Adjusting the resistivity of the non-insulating material includes doping amorphous carbon with one or more of oxygen, hydrogen, and nitrogen.

20. The method of claim 19, wherein: The non-insulating material is deposited in an atmosphere comprising one or more of oxygen, hydrogen, and nitrogen, while simultaneously doping the non-insulating material with amorphous carbon.

21. The method of claim 17, wherein: Adjusting the resistivity of the non-insulating material also includes annealing the amorphous carbon in an inert atmosphere after depositing the non-insulating material.

22. The method of claim 17, wherein: After depositing the non-insulating material, the resistivity of the non-insulating material is further tuned using a through-back sputtering technique performed in an inert atmosphere.

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