Correction circuit and correction method of wireless transceiver

Abstract

The present invention discloses a correction circuit and correction method of a wireless transceiver, wherein the wireless transceiver includes a transmission path and a reception path, wherein the transmission path includes a radio frequency circuit and a baseband amplifier. The correction method includes: setting a target gain of the radio frequency circuit according to a first gain setting value; receiving a first input signal through a coupling path and the reception path; measuring a first power of the first input signal; setting the target gain of the radio frequency circuit according to a second gain setting value; receiving a second input signal through the coupling path and the reception path; measuring a second power of the second input signal; calculating a power difference between the first power and the second power; and adjusting at least one of the baseband amplifier and the digital circuit according to the power difference.

Description

Technical Field

[0001] The invention relates to a wireless transceiver, and in particular to a correction circuit and a correction method for the wireless transceiver. Background Art

[0002] The transmitter of a wireless transceiver has a requirement for linear power adjustment, and the power setting value of the transmitter corresponds to the combination of the gains of multiple circuits (such as power amplifiers and mixers). However, RF analog circuits are not as accurate as digital circuits. In addition, manufacturing offsets and circuit board layout differences (impedance changes) can also cause the transmitter of the wireless transceiver to be unable to adjust to the desired power within the existing power setting value during actual operation. Therefore, a correction circuit and correction method are needed to calibrate the wireless transceiver. Summary of the invention

[0003] In view of the deficiencies in the prior art, an object of the present invention is to provide a calibration circuit and a calibration method for a wireless transceiver to improve the deficiencies in the prior art.

[0004] One embodiment of the present invention provides a calibration method for a wireless transceiver, wherein the wireless transceiver includes a transmission path and a reception path, wherein the transmission path includes a radio frequency circuit and a baseband amplifier, and the calibration method includes: (A) setting a target gain of the radio frequency circuit according to a first gain setting value; (B) receiving a first input signal through a coupling path and the reception path; (C) measuring a first power of the first input signal; (D) setting the target gain of the radio frequency circuit according to a second gain setting value; (E) receiving a second input signal through the coupling path and the reception path; (F) measuring a second power of the second input signal; (G) calculating a power difference between the first power and the second power; and (H) adjusting at least one of the baseband amplifier and the digital circuit according to the power difference.

[0005] Another embodiment of the present invention provides a correction circuit for a wireless transceiver, the wireless transceiver including a transmission path and a reception path, the transmission path including a radio frequency circuit and a baseband amplifier, the correction circuit being used to perform the following steps: (A) setting a target gain of the radio frequency circuit according to a first gain setting value; (B) receiving a first input signal through a coupling path and the reception path; (C) measuring a first power of the first input signal; (D) setting the target gain of the radio frequency circuit according to a second gain setting value; (E) receiving a second input signal through the coupling path and the reception path; (F) measuring a second power of the second input signal; (G) calculating a power difference between the first power and the second power; and (H) adjusting at least one of the baseband amplifier and the digital circuit according to the power difference.

[0006] The correction circuit and correction method of the wireless transceiver of the present invention can correct the transmission power of the wireless transceiver to overcome the power error caused by manufacturing offset and circuit board layout difference.

[0007] The features, practices and effects of the present invention are described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is a functional block diagram of an embodiment of a wireless transceiver and a correction circuit thereof according to the present invention;

[0009] Figure 2 A flowchart of an embodiment of a calibration method for a wireless transceiver of the present invention; and

[0010] Figure 3 1 is an example of a first gain setting value and a second gain setting value in multiple iterations of the correction method of the present invention. DETAILED DESCRIPTION

[0011] The technical terms used in the following description refer to the customary terms in the technical field. If this specification explains or defines some terms, the interpretation of these terms shall be based on the explanation or definition in this specification.

[0012] The disclosure of the present invention includes a correction circuit and a correction method for a wireless transceiver. Since some of the components included in the wireless transceiver of the present invention may be known components individually, the details of the known components will be omitted in the following description without affecting the full disclosure and feasibility of the device invention. In addition, part or all of the process of the correction method of the wireless transceiver of the present invention may be in the form of software and / or firmware, and may be executed by the correction circuit of the wireless transceiver of the present invention or its equivalent device. Without affecting the full disclosure and feasibility of the method invention, the following description of the method invention will focus on the step content rather than the hardware.

[0013] Figure 11 is a functional block diagram of a wireless transceiver and a correction circuit thereof of the present invention. The digital circuit 100 includes a correction circuit 110 and a storage circuit 120. The wireless transceiver 105 includes a transmission path 130 and a reception path 140. The transmission path 130 is coupled to an antenna 171, and the reception path 140 is coupled to an antenna 172. The wireless transceiver 105 transmits an output signal (e.g., a first output signal TS1 or a second output signal TS2, transmitted via the antenna 171) through the transmission path 130, and receives an input signal (e.g., a first input signal RS1 or a second input signal RS2, received via the antenna 172 or the attenuator 152) through the reception path 140. The transmission path 130 includes a digital-to-analog converter (DAC) 132, a baseband amplifier 134, and a radio frequency circuit 135, and the radio frequency circuit 135 includes a mixer 136 and a power amplifier (PA) 138. In some embodiments, the receiving path 140 includes an analog-to-digital converter (ADC) 142, a programmable gain amplifier (PGA) 144, and a mixer 146. In other embodiments, the receiving path 140 further includes a low-noise amplifier (LNA) 148. The operating principle of the wireless transceiver 105 and the functions of each component are well known to those skilled in the art, so they are not described in detail.

[0014] The gain g1 of the baseband amplifier 134, the gain g2 of the mixer 136, and the gain g3 of the power amplifier 138 are adjustable. The digital circuit 100 can adjust or set the gain g1, the gain g2, and the gain g3 respectively by the control signal Ctrl1, the control signal Ctrl2, and the control signal Ctrl3. Adjusting the gain g1 of the baseband amplifier 134, adjusting the gain g2 of the mixer 136, and adjusting the gain g3 of the power amplifier 138 are well known to those of ordinary skill in the art, so they are not described in detail. The target gain of the RF circuit 135 is the product of the gain g2 and the gain g3.

[0015] The factors of the overall gain of the transmission path 130 include gain g1, gain g2, and gain g3. In other words, the overall gain of the transmission path 130 can be adjusted by adjusting any one of gain g1, gain g2, and gain g3. The digital circuit 100 sets the overall gain of the transmission path 130 according to the gain setting value (which can be stored in the storage circuit 120), and each gain setting value corresponds to the target gain of the RF circuit 135 (i.e., corresponds to the combination of gain g2 and gain g3). The following description assumes that the storage circuit 120 stores 4 gain setting values: GA1, GA2, GA3, GA4.

[0016] Figure 2 The following is a flow chart of an embodiment of the calibration method of the wireless transceiver of the present invention. Figure 1 and Figure 2 .

[0017] Step S210: The calibration circuit 110 sets the target gain of the RF circuit 135 according to the first gain setting value. Figure 2 In the process of FIG. 1 , the first gain setting value is one of GA1, GA2, GA3, and GA4. The frequency response of the first output signal TS1 is related to the first gain setting value. In this step, the correction circuit 110 sets the parameters of the mixer 136 through the control signal Ctrl2 and sets the parameters of the power amplifier 138 through the control signal Ctrl3.

[0018] Step S215: The correction circuit 110 receives the first input signal RS1 through the coupling path 150 (or 160) and the receiving path 140. The first output signal TS1 becomes the first input signal RS1 through the coupling path 150 (or 160) and the receiving path 140. The coupling path 150 is a wired path located in the wireless transceiver 105 and coupled between the output end of the power amplifier 138 and the input end of the mixer 146. In other words, the first output signal TS1 is coupled or input to the mixer 146 through the coupling path 150. The coupling path 150 includes an attenuator 152, which is used to attenuate the first output signal TS1 to prevent the power of the signal input to the mixer 146 from being too large. When the correction circuit 110 receives the first input signal RS1 through the coupling path 150, the correction circuit 110 controls the input end of the low noise amplifier 148 to be grounded and / or disables the low noise amplifier 148. The coupling path 160 is a wireless path, that is, wireless transmission between the antenna 171 and the antenna 172 .

[0019] Step S220: The calibration circuit 110 measures the first power P1 of the first input signal RS1. The method of measuring the power of a signal in the digital domain is well known to those skilled in the art, so it will not be described in detail. The calibration circuit 110 records the measured first power P1.

[0020] Step S225: The calibration circuit 110 sets the target gain of the RF circuit 135 according to the second gain setting value. Step S225 is similar to step S210, and the second gain setting value is not equal to the first gain setting value. For example, when the first gain setting value is GA1, the second gain setting value is GA2. The frequency response of the second output signal TS2 is related to the second gain setting value.

[0021] Step S230: The calibration circuit 110 receives the second input signal RS2 through the coupling path 150 (or the coupling path 160) and the receiving path 140. Step S230 is similar to step S215. The second output signal TS2 becomes the second input signal RS2 after passing through the coupling path 150 (or 160) and the receiving path 140.

[0022] Step S235: The calibration circuit 110 measures the second power P2 of the second input signal RS2. Step S235 is similar to step S220.

[0023] Step S240: The calibration circuit 110 calculates the power difference between the first power P1 and the second power P2.

[0024] Step S245: The calibration circuit 110 determines whether the power difference falls within the target range. More specifically, assuming that the ideal power corresponding to the first gain setting value is Pi1, and the ideal power corresponding to the second gain setting value is Pi2, the lower and upper limits of the target range can be R1*|Pi1 - Pi2| and R2*|Pi1 - Pi2| respectively (R1 < R2, for example, R1 = 0.8, R2 = 1.2). Ideally, the power difference obtained in step S240 should be equal to |Pi1 - Pi2|. Therefore, when the power difference |P1 - P2| does not fall within the target range (i.e., the judgment result of step S245 is no), it means that the power difference |P1 - P2| is too different from the ideal difference |Pi1 - Pi2| (i.e., the power error is too large).

[0025] Step S250: The calibration circuit 110 adjusts the baseband amplifier 134 and / or the digital circuit 100 according to the power difference. The calibration circuit 110 can correct or compensate for the gain of the RF circuit (e.g., correct or compensate for the gain gap between the first gain setting value and the second gain setting value) in the analog domain (i.e., by controlling the signal Ctrl1 to adjust the gain of the baseband amplifier 134) and / or the digital domain (i.e., adjusting the gain of the digital circuit 100). In some embodiments, adjusting either the baseband amplifier 134 or the digital circuit 100 can achieve the purpose of correction or compensation. Adjusting the gain in the digital domain is well known to those of ordinary skill in the art, so it will not be elaborated here.

[0026] Step S255: The calibration circuit 110 determines whether there are still unprocessed gain setting values. When the result of step S255 is yes, the calibration circuit 110 executes step S210 to continue the iteration; when the result of step S255 is no, the calibration circuit 110 ends the calibration program (step S260).

[0027] When the correction circuit 110 performs iteration (i.e., performs steps S210 to S255 again), the correction circuit 110 uses the second gain setting value of the previous iteration as the first gain setting value of the current iteration (e.g., as described above, GA2 is used as the first gain setting value), and uses the next gain setting value of the second gain setting value of the previous iteration as the second gain setting value of the current iteration (e.g., as described above, GA3 is used as the second gain setting value). For example, when the storage circuit 120 stores four gain setting values ​​(GA1, GA2, GA3, GA4), the first gain setting value and the second gain setting value of each iteration are as follows: Figure 3 When the correction circuit 110 executes step S255 for the second time, because there is still gain setting value GA4 that has not been processed, the result of step S255 is yes (i.e., a third iteration is required). When the correction circuit 110 executes step S255 for the third time, because there is no unprocessed gain setting value, the result of step S255 is no.

[0028] like Figure 3 As shown, three iterations process four gain settings (GA1, GA2, GA3, GA4) in sequence. Therefore, N iterations process N+1 gain settings in sequence, where N is an integer greater than 1. In some embodiments, the multiple gain settings (GA1, GA2, GA3, ...) processed in sequence are arranged in ascending or descending order (i.e., the gains corresponding to these gain settings are arranged in sequence). In this way, when Figure 2 After the calibration process is completed, the gain of the RF circuit 135 becomes more linear.

[0029] In some embodiments, the multiple gain setting values ​​are arranged in descending order (i.e., GA1>GA2>GA3...). In step S250, when the power difference |P1-P2| is less than R1*|Pi1-Pi2| (indicating that P2 is too large), the correction circuit 110 compensates for the gain gap by reducing the gain of the baseband amplifier 134 and / or the digital circuit 100; conversely, when the power difference |P1-P2| is greater than R2*|Pi1-Pi2| (indicating that P2 is too small), the correction circuit 110 compensates for the gain gap by increasing the gain of the baseband amplifier 134 and / or the digital circuit 100.

[0030] In some other embodiments, multiple gain setting values are arranged in ascending order of power (i.e., GA1 < GA2 < GA3...). In step S250, when the power difference |P1 - P2| is less than R1 * |Pi1 - Pi2| (indicating that P2 is too small), the correction circuit 110 compensates for the gain gap by increasing the gain of the baseband amplifier 134 and / or the digital circuit 100; conversely, when the power difference |P1 - P2| is greater than R2 * |Pi1 - Pi2| (indicating that P2 is too large), the correction circuit 110 compensates for the gain gap by decreasing the gain of the baseband amplifier 134 and / or the digital circuit 100.

[0031] In some embodiments, the correction circuit 110 may be a circuit or electronic component with programming execution capabilities, such as a central processing unit, a microprocessor, a microcontroller, a microprocessing unit, a digital signal processing circuit (digital signal processor, DSP), or its equivalent circuit. The correction circuit 110 executes Figure 2 the steps by executing the source code or programming instructions stored in the storage circuit 120. In some other embodiments, those of ordinary skill in the art of the present technology can design the correction circuit 110 based on the above disclosure. That is to say, the correction circuit 110 can be a finite state machine (finite - state machine, FSM), an application - specific integrated circuit (Application Specific Integrated Circuit, ASIC), or implemented by circuits or hardware such as a programmable logic device (Programmable Logic Device, PLD).

[0032] Please note that in the disclosed drawings, the shapes, sizes, and proportions of the elements are only schematic for those of ordinary skill in the art of the present technology to understand the present invention, and are not used to limit the present invention. In addition, in some embodiments, the steps mentioned in the disclosed flowcharts can be adjusted in their sequence before and after according to actual operations, and even can be executed simultaneously or partially simultaneously.

[0033] Although the embodiments of the present invention are as described above, these embodiments are not used to limit the present invention. Those of ordinary skill in the art of the present technology can change the technical features of the present invention based on the explicit or implicit content of the present invention. All such changes may fall within the scope of patent protection sought by the present invention. In other words, the scope of patent protection of the present invention shall be determined by the scope of the patent application defined in this specification.

[0034] Reference Numerals

[0035] 105: Wireless transceiver

[0036] 100: Digital circuit

[0037] 110: Correction circuit

[0038] 120: Storage circuit

[0039] 130: Transmission path

[0040] 132: Digital to Analog Converter

[0041] 134: Baseband Amplifier

[0042] 135:RF Circuit

[0043] 136,146: Mixer

[0044] 138: Power Amplifier

[0045] 140: Receiving path

[0046] 142:Analog-to-digital converter

[0047] 144: Programmable Gain Amplifier

[0048] 148:Low Noise Amplifier

[0049] 150,160: coupling path

[0050] 152: Attenuator

[0051] 171,172: Antenna

[0052] Ctrl1, Ctrl2, Ctrl3: control signal

[0053] TS1: First output signal

[0054] TS2: Second output signal

[0055] RS1: First input signal

[0056] RS2: Second input signal

[0057] S210, S215, S220, S225, S230, S235, S240, S245, S250, S255, S260: Steps

Claims

1. A calibration method for a wireless transceiver, wherein the wireless transceiver comprises a transmission path and a reception path, wherein the transmission path comprises a radio frequency circuit and a baseband amplifier, and wherein the calibration method comprises: (A) setting a target gain of the radio frequency circuit according to a first gain setting value; (B) receiving a first input signal through a coupling path and the receiving path; (C) measuring a first power of the first input signal; (D) setting the target gain of the radio frequency circuit according to a second gain setting value, the second gain setting value not being equal to the first gain setting value; (E) receiving a second input signal through the coupling path and the receiving path; (F) measuring a second power of the second input signal; (G) calculating a power difference between the first power and the second power to determine whether the power difference falls within a target range; as well as (H) adjusting at least one of the baseband amplifier and the digital circuit according to the power difference.

2. The calibration method according to claim 1, further comprising: Perform steps (A) to (H) for the second time; The first gain setting value of step (A) in the second execution is the second gain setting value of step (D) in the previous execution.

3. The calibration method as claimed in claim 2, wherein steps (A) to (H) are executed N times, and a total of N+1 gain setting values ​​are processed in sequence, N is an integer greater than 1, and the gains corresponding to the N+1 gain setting values ​​are arranged in ascending or descending order.

4. The calibration method according to claim 1, wherein: The coupling path is coupled between the transmission path and the reception path and includes an attenuator.

5. The calibration method according to claim 1, wherein: The transmission path is coupled to a first antenna, the reception path is coupled to a second antenna, and the coupling path is a wireless transmission between the first antenna and the second antenna.

6. A calibration circuit for a wireless transceiver, the wireless transceiver comprising a transmission path and a reception path, the transmission path comprising a radio frequency circuit and a baseband amplifier, the calibration circuit being configured to perform the following steps: (A) setting a target gain of the radio frequency circuit according to a first gain setting value; (B) receiving a first input signal through a coupling path and the receiving path; (C) measuring a first power of the first input signal; (D) setting the target gain of the radio frequency circuit according to a second gain setting value, the second gain setting value not being equal to the first gain setting value; (E) receiving a second input signal through the coupling path and the receiving path; (F) measuring a second power of the second input signal; (G) calculating a power difference between the first power and the second power to determine whether the power difference falls within a target range; as well as (H) adjusting at least one of the baseband amplifier and the digital circuit according to the power difference.

7. The correction circuit as claimed in claim 6 further performs the following steps: Perform steps (A) to (H) for the second time; in, The first gain setting value of step (A) in the second execution is the second gain setting value of step (D) in the previous execution.

8. The correction circuit as claimed in claim 7, wherein steps (A) to (H) are executed N times, and a total of N+1 gain setting values ​​are processed in sequence, N is an integer greater than 1, and the gains corresponding to the N+1 gain setting values ​​are arranged in ascending or descending order.

9. The correction circuit according to claim 6, wherein: The coupling path is coupled between the transmission path and the reception path and includes an attenuator.

10. The correction circuit according to claim 6, wherein: The transmission path is coupled to a first antenna, the reception path is coupled to a second antenna, and the coupling path is a wireless transmission between the first antenna and the second antenna.

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