Perovskite-silicon tandem cell with nano-resistive-structured carrier transport layer

Abstract

The application provides a perovskite-crystalline silicon stacked cell, which comprises a crystalline silicon cell, a series structure layer, a first carrier transport layer, a perovskite light absorption layer, a second carrier transport layer and an upper transparent electrode layer which are sequentially stacked, wherein the first carrier transport layer comprises a carrier transport layer base layer and nano resistance increasing structures which are integrally formed with the carrier transport layer base layer and are discretely distributed on the carrier transport layer base layer, and the nano resistance increasing structures extend from the carrier transport layer base layer to the perovskite light absorption layer. The perovskite-crystalline silicon stacked cell can enhance the carrier collection and conduction capacity of the carrier transport material, and greatly improve the energy conversion efficiency of the perovskite-crystalline silicon stacked cell. In addition, the light trapping effect of the perovskite-crystalline silicon stacked solar cell can be enhanced, and the cell conversion efficiency is further improved; the perovskite composition can be flexibly adjusted, and the energy conversion efficiency can be greatly improved.

Description

Technical Field

[0001] This invention belongs to the field of solar cell technology, specifically, it relates to a perovskite-crystalline silicon tandem solar cell with a nanoscale resistivity-enhancing carrier transport layer. Background Technology

[0002] Single-junction crystalline silicon solar cells currently boast a peak energy conversion efficiency of 26.7%, nearing their theoretical upper limit of 29.4%, leaving very limited room for further efficiency improvements. Perovskite solar cells, as one of the most promising new types of solar cells in the past decade, have seen their efficiency rise from an initial 3.8% to the current 25.5%, demonstrating significant application potential. However, the theoretical upper limit for perovskite solar cells is also around 30%, limiting further potential for efficiency enhancement.

[0003] However, by utilizing the bandgap difference between perovskite (~1.4-1.8 eV) and crystalline silicon (1.14 eV), perovskite-crystalline silicon tandem solar cells can be constructed, resulting in more efficient solar cells. Theoretical calculations suggest that the efficiency of perovskite-crystalline silicon tandem cells can reach over 40%, but currently only 29.5% conversion efficiency has been achieved in the laboratory, indicating significant room for further efficiency improvement.

[0004] Currently, perovskite solar cells are mainly fabricated using solution methods. Solution methods have become the preferred method for fabricating many high-efficiency perovskite solar cells due to their advantages such as low cost, simple fabrication, and ease of control over perovskite composition and band gap. However, in the fabrication of perovskite-crystalline silicon tandem solar cells, high-efficiency crystalline silicon cells exhibit a textured light-trapping structure on their surface. On the textured surface of crystalline silicon, it is difficult to obtain a uniform, high-quality perovskite absorber layer using solution methods.

[0005] like Figure 1 As shown in the figure, 1 represents a crystalline silicon solar cell, and 4 represents a perovskite thin film prepared by solution processing. When preparing perovskite thin films on textured crystalline silicon using solution processing, if the amount of solution added is insufficient, the film will be too thin, and the tops of some textured pyramids may not be covered by the perovskite film, resulting in film discontinuity. This can easily lead to short circuits in the upper layer of the cell. Figure 1 As shown in a); if the amount of solution applied is increased to ensure that the top of the pyramid is covered by the film, the perovskite film in the base area of ​​the pyramid will be too thick, as... Figure 1 As shown in b), an excessively thick absorption layer can cause photogenerated carriers to migrate over long distances, affecting cell efficiency.

[0006] Furthermore, the textured pyramid shape of commercially available crystalline silicon solar cells is typically 1-5 micrometers in size, while the absorber layer thickness of high-efficiency perovskite solar cells is usually no more than 1 micrometer. An excessively thick absorber layer leads to severe photogenerated carrier recombination, resulting in decreased cell efficiency. Therefore, even with such a... Figure 1In case a), where the top of some pyramids is not covered by the absorption layer, the thickness of the absorption layer in most of the bottom areas of the pyramids also exceeds 1 micrometer, which leads to increased recombination of charge carriers. This is one of the important reasons that limits the efficiency improvement of perovskite-crystalline silicon tandem solar cells.

[0007] Therefore, the ability to prepare a complete, uniform, and controllable perovskite film on textured silicon solar cells through solution coating, thereby significantly improving the energy conversion efficiency of perovskite-crystalline silicon tandem solar cells, is a key technical problem that urgently needs to be solved. Summary of the Invention

[0008] To address the problems existing in the prior art, the present invention provides a perovskite-crystalline silicon tandem solar cell with a nanoscale resistivity-enhancing carrier transport layer.

[0009] Specifically, the present invention relates to the following aspects:

[0010] A perovskite-crystalline silicon tandem solar cell includes a crystalline silicon cell, a series structure layer, a first carrier transport layer, a perovskite light absorption layer, a second carrier transport layer, and an upper transparent electrode layer, which are stacked sequentially. The first carrier transport layer includes a carrier transport layer base layer and nano-resistance-enhancing structures integrally formed with the carrier transport layer base layer and discretely distributed on the carrier transport layer base layer. The nano-resistance-enhancing structures extend from the carrier transport layer base layer into the perovskite light absorption layer.

[0011] Optionally, the surface of the first carrier transport layer facing the perovskite light-absorbing layer has a textured surface.

[0012] Optionally, each of the nano-resistance-enhancing structures is a fibrous structure, a rod-like structure, or a nanotube structure.

[0013] Optionally, the length of the nano-resistance-enhancing structure is 50-1500 nm.

[0014] Optionally, the diameter of the nano-resistance-enhancing structure is 100-1000 nm.

[0015] Optionally, the nano-resistance-enhancing structure has a coverage of 5-70% on the surface of the carrier transport layer base layer, preferably 10-60%.

[0016] Optionally, the thickness of the carrier transport layer substrate is 10-200 nm.

[0017] Optionally, the first carrier transport layer is selected from one of TiO2, SnO2, ZnO, or from one of PEDOT, PEDOT:PSS, P3HT, P3OHT, P3ODDT, PTAA, NiO.

[0018] Optionally, the perovskite light-absorbing layer covers the first carrier transport layer and fills the gaps in the nano-resistance-enhancing structure of the first carrier transport layer.

[0019] Optionally, the series structure layer is a conductive material layer or a tunnel junction layer.

[0020] The present invention also provides a method for preparing the above-mentioned perovskite-crystalline silicon tandem solar cell, the method comprising the following steps:

[0021] A series structure layer is formed on one surface of a crystalline silicon solar cell;

[0022] A first carrier transport layer is prepared on the surface of the series structure layer away from the crystalline silicon cell;

[0023] A perovskite light-absorbing layer is coated on the surface of the first carrier transport layer away from the tandem structure layer;

[0024] A second charge carrier transport layer is prepared on the side of the perovskite light-absorbing layer away from the first charge carrier transport layer;

[0025] A top transparent electrode layer is formed on the side of the second carrier transport layer away from the perovskite light absorption layer;

[0026] The preparation of the first carrier transport layer includes preparing a carrier transport layer base layer and preparing discretely distributed nanoscale resistance-enhancing structures integrally formed with the carrier transport layer base layer on the carrier transport layer base layer.

[0027] Optionally, the first carrier transport layer is fabricated using a one-step conformal fabrication method or a two-step conformal fabrication method.

[0028] Optionally, the first carrier transport layer is prepared by a vapor phase method or an electroplating method.

[0029] This invention provides a perovskite-crystalline silicon tandem solar cell with a carrier transport layer featuring a nanostructured resistance-enhancing structure. This carrier transport layer is used in the upper layer of the perovskite-crystalline silicon tandem solar cell. As a carrier transport layer, it enhances the carrier collection and conduction capabilities of the carrier transport material. Simultaneously, it allows the perovskite precursor solution to form a uniformly thick and completely covered thin film on the textured pyramid structure of the crystalline silicon cell (based on the capillary effect of the nanostructure). This ensures that the perovskite thickness at the top and bottom of the pyramid is essentially consistent, avoiding the problem of an excessively thick absorption layer at the bottom of the pyramid and insufficient coverage at the top, thereby significantly improving the energy conversion efficiency of the perovskite-crystalline silicon tandem solar cell. Furthermore, it enhances the light-trapping effect of the perovskite-crystalline silicon tandem solar cell, further improving the cell's conversion efficiency; the perovskite composition can be flexibly adjusted, which can significantly improve the energy conversion efficiency. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of a perovskite-crystalline silicon tandem solar cell structure in the prior art.

[0031] Figure 2 This is a schematic diagram of the perovskite-crystalline silicon tandem solar cell structure of the present invention.

[0032] Figure 3 For have ( Figure 3 a) / None Figure 3 b) Schematic diagram of perovskite thin film coated on the surface of the carrier transport layer of the nano-resistivity-enhancing structure using the solution method.

[0033] Figure 4 This is a schematic diagram of the nano-resistance-enhancing structure of the present invention.

[0034] Figure label:

[0035] 1 Crystalline silicon solar cell, 2 Series structure layer, 31 First carrier transport layer, 311 Carrier transport layer base layer, 312 Nanoscale resistance-enhancing structure, 32 Perovskite light absorption layer, 33 Second carrier transport layer, 34 Upper transparent electrode layer, 4 Perovskite thin film. Detailed Implementation

[0036] The present invention will be further described below with reference to embodiments. It should be understood that the embodiments are only used to further illustrate and explain the present invention, and are not intended to limit the present invention.

[0037] Unless otherwise defined, technical and scientific terms used in this specification have the same meaning as commonly understood by one of ordinary skill in the art. While similar or identical methods and materials may be applied in experimental or practical applications, materials and methods are described herein. In case of conflict, the definitions included herein shall prevail. Furthermore, materials, methods, and examples are for illustrative purposes only and are not intended to be limiting. The invention is further described below with reference to specific embodiments, but is not intended to limit the scope of the invention.

[0038] To address the problems existing in the prior art, this invention provides a perovskite-crystalline silicon tandem solar cell, which has a carrier transport layer with a nanostructured resistance-enhancing structure. Specifically, the structure of the perovskite-crystalline silicon tandem solar cell is as follows: Figure 2 As shown, it includes a crystalline silicon cell 1, a series structure layer 2, a first carrier transport layer 31, a perovskite light absorption layer 32, a second carrier transport layer 33, and an upper transparent electrode layer 34, which are stacked sequentially. The crystalline silicon cell 1 is the lower cell, and the first carrier transport layer 31, the perovskite light absorption layer 32, the second carrier transport layer 33, and the upper transparent electrode layer 34 together form the upper cell.

[0039] The crystalline silicon cell 1 can be a monocrystalline silicon or polycrystalline silicon solar cell, and the doping type of its substrate silicon material is not limited. It can be a front PN junction or a back PN junction structure, or a single-sided or double-sided structure. The crystalline silicon cell 1 can be prepared using methods known in the prior art, or it can be a commercially available crystalline silicon cell, such as a P-PERC monocrystalline silicon cell, a HIT cell, or a Topcon cell.

[0040] In one specific embodiment, the side of the crystalline silicon cell 1 facing the series structure layer 2 has a pyramidal textured surface. That is, the crystalline silicon cell 1 has a textured surface like... Figure 1 The structure shown has a continuous arrangement of pyramidal structures on the side facing the serial structure layer 2.

[0041] The series structure layer 2 is located between the crystalline silicon cell 1 and the first carrier transport layer 31, and is used to connect the upper cell and the lower cell in series. The series structure layer 2 can be a conductive material layer, a tunnel junction layer, or other series structure layers. The conductive material can be a transparent conductive semiconductor material, such as indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), etc., or it can be a metallic material, a mixture of multiple metals, etc. The conductive material can be a single, continuous layer, or a structure with openings or slots filled with conductive material.

[0042] The structure of the first carrier transport layer 31 is as follows: Figure 2 and Figure 4 As shown, the structure includes a carrier transport layer 311 and nanoscale resistance-enhancing structures 312 integrally formed with the carrier transport layer 311 and discretely distributed on the carrier transport layer 311. The nanoscale resistance-enhancing structures 312 extend from the carrier transport layer 311 into the perovskite light-absorbing layer 32. "Integrated" means that the carrier transport layer 311 and the nanoscale resistance-enhancing structures 312 are integrally formed and seamlessly connected; the nanoscale resistance-enhancing structures 312 are terminal structures of the carrier transport layer 311.

[0043] The integrated structure of the nano-resistance-enhancing structure and the carrier transport layer can reduce unnecessary interfacial resistance. Furthermore, the resistance-enhancing structure, while fixing the perovskite light-absorbing layer, also extends deep into the perovskite light-absorbing layer as a terminal structure for carrier transport, further enhancing carrier transport. Additionally, the nano-resistance-enhancing structure can also generate light-trapping properties. Moreover, when the surface of the first carrier transport layer facing the perovskite light-absorbing layer has a textured structure, the light-trapping effect can be further enhanced.

[0044] The first carrier transport layer 31 can be an organic polymer material or a metal oxide material. For organic polymers, a one-step conformal preparation method can be used; for metal oxide materials, a two-step conformal preparation method can be used.

[0045] The first carrier transport layer 31 can be made of either an electron transport material or a hole transport material. The battery transport material can be TiO2, SnO2, ZnO, BBL:PEI (poly(benzimidazole-benzophenanthreneroline)-polyethyleneimine), etc. The hole transport material can be PEDOT, PEDOT:PSS, P3HT, P3OHT, P3ODDT, PTAA, and NiO, etc. The first carrier transport layer 31 with the nano-resistance-enhancing structure 312 is used as the upper layer in a perovskite-crystalline silicon tandem solar cell. While serving as a carrier transport layer, it also allows the perovskite precursor solution to form a uniformly thick and completely covered thin film on the textured pyramid structure of the crystalline silicon solar cell. The specific working principle of the nano-resistance-enhancing structure 312 is as follows... Figure 3 As shown, where Figure 3 a is a schematic diagram of a perovskite thin film coated on the surface of a carrier transport layer with a nano-resistivity-enhancing structure using a solution method. Figure 3 b is a schematic diagram of perovskite thin film coating on the surface of the carrier transport layer without nanostructure resistance enhancement.

[0046] exist Figure 3 In step a, after setting a nano-resistance-enhancing structure 312 on the carrier transport layer base layer 311, and then coating a perovskite solution onto the pyramid-textured surface (i.e., crystalline silicon solar cell 1), the perovskite precursor solution can be adsorbed and fixed in the gaps between the nanostructures due to the capillary action of the nanostructures, forming a relatively uniform covering layer on the surface of the nanostructures (due to surface tension). After coating the solution, before heat treatment to obtain the perovskite light-absorbing layer film, certain measures are taken to remove excess solution from the valley area of ​​the pyramid-textured surface, and then the wet film is heat-treated to obtain the desired result. Figure 3 As shown in figure a, a perovskite light absorption layer 32 is uniformly covered on the carrier transport layer with nano-resistance-enhancing structure 312. The perovskite light absorption layer 32 can fully fill the gaps between the discretely distributed multiple nano-resistance-enhancing structures 312, thereby further enhancing the carrier collection and conduction capabilities of the carrier transport material.

[0047] And such Figure 3 As shown in b, when there is no nano-resistance-enhancing structure 312, the perovskite light absorption layer is prepared by solution method, which easily leads to the situation shown in the figure. That is, in the area at the bottom of the pyramid texture, a large amount of solution accumulates, resulting in an excessively thick perovskite absorption layer; while in the top area of ​​the pyramid, the solution is difficult to adhere, resulting in an excessively thin absorption layer, or even the tip is exposed.

[0048] Therefore, by using the nano-resistance-enhancing structure 312 of the present invention, the thickness of the perovskite at the top and bottom of the pyramid is basically the same, avoiding the problem that the absorption layer at the bottom of the pyramid is too thick and the top of the pyramid is difficult to be completely covered, thereby greatly improving the energy conversion efficiency of the perovskite-crystalline silicon tandem solar cell.

[0049] The carrier transport layer substrate 311 is disposed on the surface of the crystalline silicon solar cell 1, and its thickness can be 10-200 nm, for example, 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, 160 nm, 170 nm, 180 nm, 190 nm, and 200 nm. The carrier transport layer substrate 311 mainly functions to collect and transport carriers laterally, that is, to transport and collect carriers generated by the absorption layer laterally to the series structure. Therefore, this thickness should not be too thick or too thin. If the substrate is too thick, the distance of longitudinal transport to the series structure is too long, resulting in excessively high transport resistance; if the substrate is too thin, the cross-sectional area of ​​the film is too small, resulting in excessively high lateral transport resistance, which is not conducive to the lateral collection and transport of carriers in the absorption layer.

[0050] like Figure 2-4 As shown, the nano-resistance-enhancing structure 312 can be a fibrous structure, a rod-like structure, or a nanotube structure, forming a sawtooth or comb-like structure on the carrier transport layer base layer 311.

[0051] The nano-resistance-enhancing structure 312 should not be too short or too long. If it is too short, the capillary effect is too weak, and the resistance-enhancing effect is not obvious; if it is too long, the absorber layer becomes too thick, which is not conducive to improving the efficiency of the upper battery. At the same time, it is more difficult for the perovskite precursor solution to fill at the root of the nanostructure, which will create some voids at the root and affect the battery efficiency. Typically, in perovskite-crystalline silicon tandem solar cells, the thickness of the absorber layer of the upper perovskite cell is less than 1600 nm. The specific thickness of the absorber layer of the upper perovskite cell needs to be determined according to the principle of current matching, depending on the current of the lower crystalline silicon cell. Therefore, the upper limit of the nano-resistance-enhancing structure should not exceed the thickness of the absorber layer, because when the resistance-enhancing structure exceeds the thickness of the absorber layer of the upper perovskite cell, it will come into contact with the opposing carrier transport layer, which will cause a short circuit and reduce the battery efficiency. Therefore, considering the thickness fluctuation of the absorber layer beyond the resistance-enhancing structure, the length of the resistance-enhancing structure of this invention is ≤1500 nm.

[0052] Meanwhile, when the upper perovskite solar cell absorber layer is composed of quantum dots, the resistance-enhancing structure needs to be larger than the size of the quantum dots; otherwise, the resistance-enhancing structure will be negligible. Generally, the size of a quantum dot is <50 nm; therefore, the length of the resistance-enhancing structure in this invention is ≥50 nm.

[0053] In one specific embodiment, the length of the nano-resistance-enhancing structure 312 is 50-1500 nm, for example, it can be 50 nm, 100 nm, 200 nm, 300 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, 1000 nm, 1100 nm, 1200 nm, 1300 nm, 1400 nm, or 1500 nm. The length of the nano-resistance-enhancing structure refers to the distance from the end of the nano-resistance-enhancing structure to the surface of the charge carrier transport layer base layer facing the perovskite light-absorbing layer.

[0054] The diameter of the nano-resistance-enhancing structure 312 needs to balance the resistance-enhancing effect, the filling effect within the nanostructure, and the inherent strength of the nanostructure itself. Simultaneously, the diameter of the resistance-enhancing structure must also take into account the special dimensions of the textured silicon pyramid structure. Generally, the pyramid structures of commercially available textured silicon surfaces are above 1000 nm. Therefore, the diameter of the nano-resistance-enhancing structure is generally no greater than 1000 nm. If the diameter is too large, the resistance-enhancing structure itself will fill the textured surface, failing to achieve "shape preservation," and the light-trapping effect of the textured surface cannot be maintained. Furthermore, if the diameter of the nanostructure is too small, the nanostructure itself will lack strength, easily tipping over or being damaged, thus failing to achieve the resistance-enhancing effect. In the field of nanomaterials, nanostructures above 100 nm are generally considered to have better performance in terms of strength and long-term stability.

[0055] In one specific embodiment, the diameter of the nano-resistance-enhancing structure 312 is 100-1000 nm, for example, it can be 100 nm, 200 nm, 300 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, or 1000 nm. The diameter of the nano-resistance-enhancing structure refers to the average diameter of its cross-section.

[0056] Based on considerations of the same influencing factors as the length and diameter of the nano-resistance-enhancing structure 312, the coverage of the nano-resistance-enhancing structure 312 on the surface of the carrier transport layer base layer 311 is 5-70%, preferably 10-60%, for example, it can be 5%, 10%, 20%, 30%, 40%, 50%, 60%, or 70%. Here, the coverage of the nano-resistance-enhancing structure 312 on the surface of the carrier transport layer base layer 311 refers to the ratio of the area of ​​the nano-resistance-enhancing structure 312 on the surface of the carrier transport layer base layer 311 to the area of ​​the carrier transport layer base layer 311.

[0057] In addition to the advantages mentioned above, which significantly improve the energy conversion efficiency of perovskite-crystalline silicon tandem solar cells, the perovskite-crystalline silicon tandem solar cell with a nano-resistivity-enhancing carrier transport layer of the present invention also has the following technical effects:

[0058] (1) Since the perovskite film is grown in a near-conformal manner on the textured surface of crystalline silicon, the textured light-trapping structure of crystalline silicon is maintained in the upper cell, which can enhance the light-trapping effect of the perovskite-crystalline silicon tandem solar cell and further improve the cell conversion efficiency.

[0059] (2) Although the vapor deposition method can obtain perovskite films with uniform thickness and shape preservation, it is difficult to control the composition of perovskite films during the vapor deposition process. The difficulty in controlling the composition makes it difficult to control the band gap of the perovskite layer, which is detrimental to the absorber layer of the upper cell in the tandem solar cell. By adopting the technical solution described in this invention, the absorber layer of the upper cell in the perovskite-crystalline silicon tandem solar cell can be grown in a shape-preserving manner and the band gap can be flexibly adjusted, which can significantly improve the energy conversion efficiency.

[0060] The present invention also provides a method for preparing the above-mentioned perovskite-crystalline silicon tandem solar cell, the method comprising the following steps:

[0061] A series structure layer is formed on one surface of a crystalline silicon solar cell;

[0062] A first carrier transport layer is prepared on the surface of the series structure layer away from the crystalline silicon cell;

[0063] A perovskite light-absorbing layer is coated on the surface of the first carrier transport layer away from the tandem structure layer;

[0064] A second charge carrier transport layer is formed on the side of the perovskite light-absorbing layer away from the first charge carrier transport layer;

[0065] A top transparent electrode layer is formed on the side of the second carrier transport layer away from the perovskite light absorption layer;

[0066] The preparation of the first carrier transport layer includes preparing a carrier transport layer base layer and preparing discretely distributed nanoscale resistance-enhancing structures integrally formed with the carrier transport layer base layer on the carrier transport layer base layer. The preparation method of the first carrier transport layer 31 cannot use a liquid phase coating method because the liquid phase coating method still has the problem of uneven coating on the textured pyramid, which cannot completely solve the technical problem of this invention.

[0067] Therefore, the fabrication method of the first carrier transport layer 31 must have the characteristics of conformal growth.

[0068] "Conformal growth" refers to the process where, after a coating or thin film is prepared on a substrate with specific surface morphology characteristics, the thin film grows along the original morphology of the substrate. The "substrate + thin film composite" with the coating or thin film has the same "surface morphology characteristics" as the original surface of the substrate.

[0069] Specifically, 31 can be prepared using the following two methods:

[0070] (1) One-step conformal preparation method

[0071] The one-step conformal preparation method can use organic polymer materials and can employ gas-phase methods known in the art.

[0072] The gas-phase method can synthesize the organic polymer first carrier transport layer with a nano-resistivity structure as described in this patent in one step.

[0073] Specifically, the first step is to prepare the substrate: using physical vapor deposition (PVD), a catalyst layer required for the polymerization reaction of the polymer monomers is deposited on the substrate. Then, the substrate with the deposited catalyst is placed in the vapor of the polymer monomers. The monomer vapor encounters the catalyst on the substrate, and a polymerization reaction occurs at the interface between the two phases.

[0074] Morphology control principle: a) When the vapor pressure of the monomer in the reaction vessel is high, the monomer vapor condenses into droplets. When the droplets come into contact with the catalyst layer, the contact area reacts. In areas where there are no droplets, there are no monomers and no polymerization reaction occurs. Under these conditions, a nanostructure is formed. b) When the vapor pressure of the monomer in the reaction vessel is low, the monomer vapor is evenly distributed in the reaction vessel cavity. The monomers are evenly contacted with the catalyst, thus forming a uniform polymer film on the substrate.

[0075] In the above polymerization process, the initial control of monomer vapor pressure to saturate and form droplets results in the formation of a nano-resistance-enhancing structure 312. Later, with lower vapor pressure, the reaction proceeds evenly, forming a uniform base layer 311. Since 311 and 312 are formed continuously in one step, and are connected as a whole, it is more conducive to the transport of charge carriers.

[0076] (2) Two-step conformal preparation method

[0077] The two-step conformal preparation method can use metal oxide materials.

[0078] The first step requires conformal characteristics (a necessary condition), which can be achieved using methods such as physical vapor deposition (PVD) or electroplating. A thin film of elemental metal corresponding to a "metal oxide" is deposited or electroplated onto the substrate.

[0079] The second step involves oxidizing the metal monolayer into metal oxides using an anodic electrochemical oxidation method.

[0080] Morphology control principle: During anodizing, parameters such as current, electrolyte solvent type, and solute concentration are controlled. When the oxidation reaction occurs locally, a nano-resistance-enhancing structure 312 is formed. When the oxidation reaction occurs on the front side, a base layer 311 is formed.

[0081] If the above-mentioned metal oxidation process is uninterrupted, then 312 and 311 become one.

[0082] The perovskite light-absorbing layer 32 can be an organic-hybrid halide perovskite, an all-inorganic halide perovskite, or a lead-free perovskite, a double perovskite, or other perovskite structure light-absorbing materials.

[0083] The second carrier transport layer 33 can be made of either an electron transport material or a hole transport material, but with the opposite conductivity type to the first carrier transport layer 31. That is, when the first carrier transport layer 31 is made of an electron transport material, the second carrier transport layer 33 is made of a hole transport material; and when the first carrier transport layer 31 is made of a hole transport material, the second carrier transport layer 33 is made of an electron transport material.

[0084] The upper transparent electrode layer 34 can be a transparent electrode commonly used in the prior art, such as FTO, ITO, AZO, etc.

[0085] Example

[0086] Example 1

[0087] HJT (heterojunction) solar cells with N-type silicon wafers are provided as the lower-layer cells.

[0088] A tandem structure layer with a thickness of 200 nm was prepared on the surface of an HJT (heterojunction) solar cell on an N-type silicon wafer using magnetron sputtering.

[0089] A first carrier transport layer was prepared on the surface of the tandem structure layer. This first carrier transport layer is a hole transport layer with a nano-resistance-enhancing structure, synthesized from PEDOT using a vapor-phase method. The thickness of the carrier transport layer substrate is 50 nm. The nano-resistance-enhancing structure is fibrous, 500 nm in length and 150 nm in diameter, with a surface coverage of 40% on the carrier transport layer substrate. The morphology, length, and diameter of the nano-resistance-enhancing structure can be observed using an electron microscope, and the surface coverage can be obtained using a specific surface area analyzer.

[0090] A perovskite light-absorbing layer, 800 nm thick, is coated on the surface of the first carrier transport layer away from the tandem structure layer. The perovskite light-absorbing layer is made of MAPbI3 perovskite. The perovskite coating method employs an dip-coating technique, immersing the crystalline silicon cell covered with the first carrier transport layer in a 1.5 M concentration DMF solution of MAPbI3 perovskite, and then pulling it up at a speed of 20 mm / min. After pulling, it is dried at 100 °C for 10 minutes to obtain the MAPbI3 perovskite light-absorbing layer.

[0091] A second carrier transport layer, which is an electron transport layer, is prepared on the side of the perovskite light absorption layer away from the first carrier transport layer by vapor deposition. C60 is used as the electron transport layer material, and the thickness is 50 nm.

[0092] A top transparent electrode layer is formed on the side of the second carrier transport layer away from the perovskite light absorption layer using a magnetron sputtering method, wherein ITO is used as the top transparent electrode and the thickness is 300 nm.

[0093] The first carrier transport layer was synthesized using a vapor phase method, with the following specific steps: a 20 nm iron oxide layer was deposited on a substrate using physical deposition; 12 μL of concentrated hydrochloric acid and 60 μL of a 1.56 M pyrrole chlorobenzene solution were placed in a glass reactor and reacted at 130 °C for 1.5 h to obtain a PEDOT film containing FeCl2 impurities and a comb-like structure; then it was washed with 6 M HCl to obtain a PEDOT hole transport layer with a nano-resistance-enhancing structure.

[0094] The perovskite-PERC crystalline silicon tandem solar cell of this embodiment has an efficiency of 28.1%.

[0095] Example 2

[0096] HJT (heterojunction) solar cells with N-type silicon wafers are provided as the lower-layer cells.

[0097] A tandem structure layer, made of ITO, with a thickness of 200 nm, was fabricated on the surface of an N-type silicon HJT (heterojunction) solar cell using magnetron sputtering. A first carrier transport layer, a nano-resistance-enhancing electron transport layer, was then fabricated on the surface of this tandem structure layer. This first carrier transport layer was an electron transport layer with a nano-resistance-enhancing structure, fabricated as a TiO2 array using anodic oxidation. The thickness of the carrier transport layer base layer was 20 nm, and the nano-resistance-enhancing structure was a rod-shaped structure with a length of 400 nm and a diameter of 150 nm. The nano-resistance-enhancing structure covered 60% of the carrier transport layer base layer.

[0098] A perovskite light-absorbing layer is coated on the surface of the first carrier transport layer away from the tandem structure layer. The perovskite light-absorbing layer is made of FAPbI3 perovskite material with a thickness of 700 nm. The perovskite coating method employs an dip-coating technique, in which the crystalline silicon cell covered with the first carrier transport layer is immersed in a 1.3 M concentration FAPbI3 perovskite solution (using a mixed solvent of DMF:DMSO = 4:1) and pulled at a speed of 25 mm / min. After pulling, it is dried at 120°C for 15 minutes to obtain the FAPbI3 perovskite light-absorbing layer.

[0099] A second carrier transport layer, which is a hole transport layer, is prepared on the side of the perovskite light-absorbing layer away from the first carrier transport layer. It is Spiro-TTB with a thickness of 100 nm and is prepared by vapor deposition.

[0100] An upper transparent electrode is formed on the side of the second carrier transport layer away from the perovskite light absorption layer. The upper transparent electrode is made of ITO with a thickness of 350 nm and is prepared by magnetron sputtering (existing technology).

[0101] The first carrier transport layer was prepared by anodic oxidation, and the specific steps are as follows: a 100 nm metal Ti thin film was deposited on the substrate by vapor deposition, and then the substrate with the Ti film was used as the anode and the Pt sheet was used as the cathode. The substrate was oxidized in an electrolyte of 0.5 wt% NH4F aqueous solution (pH=4~5) at a voltage of 18V for 4 hours to obtain a TiO2 electron transport layer with a nano-resistance-enhancing structure.

[0102] The perovskite-HJT crystalline silicon tandem solar cell of this embodiment has an efficiency of 27.6%.

[0103] Example 3

[0104] The difference between this embodiment and Embodiment 1 is that the length of the nano-resistance-enhancing structure in this embodiment is 300 nm.

[0105] The efficiency of the resulting tandem solar cell is 26.8%.

[0106] Example 4

[0107] The difference between this embodiment and Embodiment 1 is that the coverage of the nano-resistance-enhancing structure in this embodiment is 5%.

[0108] The efficiency of the resulting tandem solar cell is 25.1%.

[0109] Example 5

[0110] The difference between this embodiment and Embodiment 1 is that the coverage of the nano-resistance-enhancing structure in this embodiment is 70%.

[0111] The efficiency of the resulting tandem solar cell is 24.9%.

[0112] Example 6

[0113] The difference between this embodiment and Embodiment 1 is that the length of the nano-resistance-enhancing structure in this embodiment is 50 nm.

[0114] The efficiency of the resulting tandem solar cell is 27.5%.

[0115] Example 7

[0116] The difference between this embodiment and Embodiment 1 is that the length of the nano-resistance-enhancing structure in this embodiment is 1100 nm.

[0117] The efficiency of the resulting tandem solar cell is 26.9%.

[0118] Comparative Example 1

[0119] The difference between this embodiment and Embodiment 1 is that the first carrier transport layer only includes the base layer and does not include the nano-resistivity-enhancing structure.

[0120] The efficiency of the resulting tandem solar cell is 24.1%.

[0121] Comparative Example 2

[0122] HJT (heterojunction) solar cells with N-type silicon wafers are provided as the lower-layer cells.

[0123] A tandem structure layer of ITO with a thickness of 200 nm was fabricated on the surface of an N-type silicon HJT (heterojunction) solar cell using magnetron sputtering. A 50 nm thick dense SnO2 film was then fabricated on the tandem structure layer as the first carrier transport layer using magnetron sputtering. The top surface of the lower cell, the tandem structure layer, and the first carrier transport layer all exhibit a pyramid-textured surface. TiO2 nanomaterials were then fabricated on the surface of the pyramid-textured first carrier transport layer.

[0124] Specifically, the preparation is carried out according to the following method: 1) Prepare a suspension containing nano-TiO2 suspended particles, wherein the size of the TiO2 nanoparticles is 10-150 nm. The volume ratio of TiO2 suspended particles to the total volume of the suspension is 1:1000. 2) Use a pointed wedge-shaped brush to uniformly coat a TiO2 suspension with a thickness of 2000 nm on the surface of the first carrier transport layer with a pyramid-like textured surface. 3) Place it at 200℃ for rapid drying to remove moisture, and obtain TiO2 nano-resistance-enhancing material with an average spacing of 100 nm on the first carrier transport layer; wherein the coverage of the TiO2 nano-resistance-enhancing material on the first carrier transport layer is 40%. 4) Place the pyramid-like textured surface with dispersed nanoparticles at a high temperature of 500℃ for 10 min to improve the bonding strength between the TiO2 nanoparticles and the first carrier transport layer, and obtain the first carrier transport layer with nanoscale protrusions on the surface of the TiO2 nano-resistance-enhancing material.

[0125] A perovskite light-absorbing layer, 700 nm thick, is coated on the surface of the first carrier transport layer covered with TiO2 nanomaterials to enhance resistance. The perovskite light-absorbing layer is made of FAPbI3 perovskite material. The perovskite coating method involves dip-coating, immersing the crystalline silicon cell covered with the first carrier transport layer in a 1.3 M concentration FAPbI3 perovskite solution (using a mixed solvent of DMF:DMSO = 4:1) and pulling it up at a speed of 25 mm / min. After pulling, it is dried at 120 °C for 15 minutes to obtain the FAPbI3 perovskite light-absorbing layer.

[0126] A second carrier transport layer, which is a hole transport layer, is prepared on the side of the perovskite light-absorbing layer away from the first carrier transport layer. It is Spiro-TTB with a thickness of 100 nm and is prepared by vapor deposition.

[0127] An upper transparent electrode layer is formed on the side of the second carrier transport layer away from the perovskite light absorption layer. The upper transparent electrode layer is made of ITO with a thickness of 350 nm and is prepared by magnetron sputtering (existing technology).

[0128] Among them, 31 is prepared by anodic oxidation, and the specific steps are as follows: a 100nm metal Ti thin film is deposited on the substrate by vapor deposition, and then the substrate with Ti film is used as the anode and the Pt sheet is used as the cathode. The substrate is oxidized in an electrolyte of 0.5wt% NH4F aqueous solution (pH=4~5) at a voltage of 18V for 4 hours to obtain a TiO2 electron transport layer with nano-resistance-enhancing structure.

[0129] The perovskite-HJT crystalline silicon tandem solar cell of this embodiment has an efficiency of 24.8%.

[0130] The specific conditions for each of the above embodiments and comparative examples are shown in Table 1.

[0131] Table 1

[0132]

[0133] By comparing embodiments 1, 4, and 5 of this application, it can be seen that for the nano-resistance-enhancing structure of this application, when the coverage rate relative to the first carrier transport layer is 5%, the efficiency gain is lower compared to a coverage rate of 40%. This is because the resistance-enhancing structure is very sparse, resulting in limited resistance enhancement. Simultaneously, the improvement in carrier absorption and conduction performance is also small, leading to limited efficiency improvement. Therefore, the coverage rate of the nano-resistance-enhancing structure should not be lower than 5%. When the coverage rate of the nano-resistance-enhancing structure relative to the first carrier transport layer is 70%, the efficiency gain is lower compared to a coverage rate of 40%. This is because excessive coverage leads to excessive roughness in the first carrier transport layer, which is detrimental to the formation of a high-quality perovskite absorber layer film. The quality of the absorber layer film plays a crucial role in battery efficiency. Therefore, as the coverage rate continues to increase, the battery efficiency will decrease sharply. Thus, the coverage rate of the nano-resistance-enhancing structure should not exceed 70%.

[0134] By comparing the efficiency of the stacked batteries of Examples 1 to 7 of this application with those of Comparative Examples 1 and 2, it can be seen that the technical solution of this application significantly improves battery efficiency compared to stacked batteries without nano-resistance-enhancing materials or those formed using conventional methods. In Comparative Example 2, although TiO2 nano-resistance-enhancing materials were used, the first carrier transport layer and the TiO2 nano-resistance-enhancing material are different conductive materials and are only in contact through a physical interface, resulting in a large contact resistance at their interface. When the surface coverage of the TiO2 nano-resistance-enhancing material in the first carrier transport layer reaches 40%, not only does the aforementioned contact resistance cause a carrier transport barrier between the first carrier transport layer and the perovskite light absorption layer, but the TiO2 nano-resistance-enhancing material itself, distributed between the first carrier transport layer and the perovskite light absorption layer, may form minority carrier recombination centers, thus leading to a significant reduction in battery conversion efficiency.

Claims

1. A perovskite-crystalline silicon tandem solar cell, characterized in that, The perovskite-crystalline silicon tandem solar cell includes a crystalline silicon cell, a series structure layer, a first carrier transport layer, a perovskite light absorption layer, a second carrier transport layer, and an upper transparent electrode layer, which are stacked sequentially. The first carrier transport layer includes a carrier transport layer base layer and nano-resistance-enhancing structures integrally formed with the carrier transport layer base layer and discretely distributed on the carrier transport layer base layer. The nano-resistance-enhancing structures extend from the carrier transport layer base layer into the perovskite light absorption layer. The surface of the first carrier transport layer facing the perovskite light absorption layer has a textured surface. Each nano-resistance-enhancing structure is a fibrous structure, a rod-shaped structure, or a nanotube structure. The coverage of the nano-resistance-enhancing structures on the surface of the carrier transport layer base layer is 5-70%.

2. The perovskite-crystalline silicon tandem solar cell according to claim 1, characterized in that, The length of the nano-resistance-enhancing structure is 50-1500 nm.

3. The perovskite-crystalline silicon tandem solar cell according to claim 2, characterized in that, The diameter of the nano-resistance-enhancing structure is 100-1000 nm.

4. The perovskite-crystalline silicon tandem solar cell according to claim 1, characterized in that, The nano-resistance-enhancing structure has a coverage of 10-60% on the surface of the carrier transport layer base layer.

5. The perovskite-crystalline silicon tandem solar cell according to claim 1, characterized in that, The thickness of the carrier transport layer base layer is 10-200 nm.

6. The perovskite-crystalline silicon tandem solar cell according to claim 1, characterized in that, The first carrier transport layer is selected from one of TiO2, SnO2, ZnO, or one of PEDOT, PEDOT:PSS, P3HT, P3OHT, P3ODDT, PTAA, NiO.

7. The perovskite-crystalline silicon tandem solar cell according to claim 1, characterized in that, The perovskite light-absorbing layer covers the first carrier transport layer and fills the gaps in the nano-resistance-enhancing structure of the first carrier transport layer.

8. The perovskite-crystalline silicon tandem solar cell according to claim 1, characterized in that, The series structure layer is a conductive material layer or a tunnel junction layer.

9. The method for preparing a perovskite-crystalline silicon tandem solar cell according to any one of claims 1-8, characterized in that, The preparation method includes the following steps: A series structure layer is formed on one surface of a crystalline silicon solar cell; A first carrier transport layer is prepared on the surface of the series structure layer away from the crystalline silicon cell; A perovskite light-absorbing layer is coated on the surface of the first carrier transport layer away from the tandem structure layer; A second charge carrier transport layer is prepared on the side of the perovskite light-absorbing layer away from the first charge carrier transport layer; A top transparent electrode layer is formed on the side of the second carrier transport layer away from the perovskite light absorption layer; The preparation of the first carrier transport layer includes preparing a carrier transport layer base layer and preparing discretely distributed nanoscale resistance-enhancing structures integrally formed with the carrier transport layer base layer on the carrier transport layer base layer.

10. The preparation method according to claim 9, characterized in that, The first carrier transport layer is achieved by a one-step conformal fabrication method or a two-step conformal fabrication method.

11. The preparation method according to claim 9, characterized in that, The first carrier transport layer is prepared by vapor phase method or electroplating method.

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