Display panel and terminal device
By optimizing the arrangement of leads and anodes within the transparent display area of the display panel, the problem of uneven brightness in the under-display camera area was solved, thus improving the display effect.
Patent Information
- Application Number
- CN202180002241.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-08-23
- Publication Date
- 2026-01-13
- Estimated Expiration
- 2041-08-23
AI Technical Summary
In existing technologies, the display panel in the area of the under-display camera is prone to uneven brightness (mura), which affects the display effect.
Within the transparent display area of the display panel, the lead wires and anodes are designed with a specific arrangement, including multiple rows of sub-divisions and the configuration of adapter holes, to optimize the connection between the electrode section and the wiring section and reduce uneven brightness.
By optimizing the arrangement of leads and anodes, uneven brightness was reduced, improving the display effect of the under-display camera area.
Smart Images

Figure CN116158210B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of display technology, and more specifically, to a display panel and terminal device. Background Technology
[0002] For screens of electronic devices with cameras, such as mobile phones and tablets, the area of the screen corresponding to the camera usually needs to be punched in, thus preventing light from emanating from the screen and hindering the improvement of screen-to-body ratio. Currently, although under-display camera technology exists, which allows images to be displayed in the area where the camera is located, avoiding the need for punching and enabling normal shooting, the area of the screen corresponding to the camera is prone to severe mura (uniform brightness), affecting the display effect.
[0003] Public content
[0004] The purpose of this disclosure is to provide a display panel and terminal device that overcomes, at least to some extent, one or more problems caused by limitations and defects in related technologies.
[0005] This disclosure provides a display panel, including a substrate, a transition layer formed on the substrate, and an anode layer located on the side of the transition layer away from the substrate; wherein,
[0006] The substrate has a light-transmitting area, which includes at least one transparent display area. The transparent display area has a first boundary and a second boundary opposite each other in the row direction, and a third boundary and a fourth boundary opposite each other in the column direction. The transparent display area includes at least one partition, which includes multiple rows of sub-partitions arranged in the column direction. Each sub-partition includes a row of pixel areas and a row of transition areas arranged sequentially in the column direction. The transition area is provided with a transition hole. The at least one partition includes a first partition.
[0007] The transition layer includes multiple leads, some of which are located on the first partition; on the sub-partitions of the first partition: the number of leads gradually decreases along the direction from the first boundary to the second boundary, and the size of the leads in the row direction gradually shortens along the direction from the third boundary to the fourth boundary;
[0008] The anode layer includes a plurality of anodes, each anode having an electrode portion and a wiring portion connected together. At least a portion of the electrode portion is located in the pixel area, and at least a portion of the wiring portion is located in the transition area and connected to the portion of the lead located in the transition area through a transition hole. The plurality of anodes includes at least a plurality of first anodes, each of the plurality of first anodes including at least a first reference anode and a first offset anode located on a sub-partition of the first partition and spaced apart in the row direction. In the column direction, the center of the electrode portion of the first offset anode is located on the side of the center of the electrode portion of the first reference anode near the third boundary.
[0009] In one exemplary embodiment of this disclosure, the first partition has N rows of the sub-partitions, where N is a positive integer greater than 1;
[0010] In the pixel area of the sub-partition in the nth row of the first partition, the first offset anode is located on the side of the first reference anode closer to the second boundary;
[0011] In the pixel area of the sub-partition in the (n+1)th row of the first partition, the first offset anode is located on the side of the first reference anode closer to the first boundary;
[0012] In the row direction, the first reference anode on the pixel area of the sub-partition in the nth row of the first partition is located on the side of the first offset anode on the pixel area of the sub-partition in the (n+1)th row of the first partition closer to the first boundary;
[0013] In the row direction, the first offset anode in the pixel area of the sub-partition in the nth row of the first partition is located between the first offset anode and the first reference anode in the pixel area of the sub-partition in the (n+1)th row of the first partition;
[0014] Where 1 ≤ n < N, and n is a positive integer.
[0015] In one exemplary embodiment of this disclosure, the plurality of anodes includes a plurality of anode groups, the anode groups including a first anode, a second anode, a third anode, and a fourth anode; the second anode and the fourth anode have the same emission color, while the first anode, the second anode, and the third anode have different emission colors;
[0016] The sub-partition's transition area is provided with a plurality of transition hole groups arranged at intervals in the row direction; the transition hole group includes four transition holes arranged at intervals in the row direction, and are respectively defined as a first transition hole connected to the first anode, a second transition hole connected to the second anode, a third transition hole connected to the third anode, and a fourth transition hole connected to the fourth anode.
[0017] In one exemplary embodiment of this disclosure, in the anode group:
[0018] The wiring portions of the first anode, the second anode, the third anode, and the fourth anode correspond one-to-one with the transition holes on the same transition area; and
[0019] At least 30% of the electrode portions of the first anode, the second anode, and the third anode are located on the pixel area of the same row of the sub-partition, and at least 30% of the electrode portions of the fourth anode are located on the pixel area of the adjacent row of the sub-partition.
[0020] In one exemplary embodiment of this disclosure,
[0021] In the adapter hole group: the first adapter hole, the second adapter hole, the third adapter hole and the fourth adapter hole are arranged sequentially in the row direction, or the third adapter hole, the fourth adapter hole, the first adapter hole and the second adapter hole are arranged sequentially in the row direction;
[0022] In two adjacent sets of adapter holes in the column direction: the first adapter hole of one is located in the same column as the third adapter hole of the other, and the second adapter hole of one is located in the same column as the fourth adapter hole of the other.
[0023] In one exemplary embodiment of this disclosure, the transition layer includes a first transition portion located on the first partition, the first transition portion including a plurality of first wiring groups arranged in the column direction, each of the first wiring groups corresponding to a sub-partition of the first partition;
[0024] The first wiring group includes a first lead, a second lead, and a third lead that are sequentially distributed and mutually insulated along the direction from the substrate to the anode layer; wherein:
[0025] The first lead includes a first extension segment extending in the row direction and a first lead-out segment extending in the column direction. The first extension segment is located on the pixel area of the sub-partition. One end of the first lead-out segment is located on the pixel area of the sub-partition and connected to the end of the first extension segment away from the first boundary. The other end is located on the transition area of the sub-partition and connected to the wiring portion of the anode through a transition hole; and / or,
[0026] The second lead includes a second extension segment extending in the row direction, the second extension segment being located on the pixel area of the sub-partition; and / or,
[0027] The third lead includes a third extension segment extending in the row direction, the third extension segment being located on the pixel area of the sub-partition.
[0028] In one exemplary embodiment of this disclosure, on the sub-partition of the first partition:
[0029] Along the direction from the first boundary to the second boundary, the number of the first extension segments gradually decreases, and the length of the first lead-out segment gradually increases; and along the direction from the third boundary to the fourth boundary, the length of the first extension segment gradually decreases; and / or,
[0030] The number of the second extension segment and the third extension segment remains unchanged along the direction from the first boundary to the second boundary.
[0031] In one exemplary embodiment of this disclosure, on the sub-partition of the first partition:
[0032] At least one of the overlapping areas of the first extension segment and the third extension segment on the substrate is greater than the overlapping area of the first extension segment and the second extension segment on the substrate.
[0033] In one exemplary embodiment of this disclosure,
[0034] The pixel area of the sub-partition has a center line extending in the row direction. The center line has a first distance from the extension segment closest to the third boundary among the first extension segment, the second extension segment, and the third extension segment of the first wiring group. The center line has a second distance from the extension segment furthest from the third boundary among the first extension segment, the second extension segment, and the third extension segment of the first wiring group. The first distance and the second distance are dimensions in the column direction, and the first distance and the second distance are equal.
[0035] In the sub-partition of the first partition, the center of the electrode portion of the first offset anode is located on the side of the center line of the pixel area where it is located, close to the third boundary.
[0036] In one exemplary embodiment of this disclosure, on the sub-partition of the first partition, the center of the electrode portion of at least one of the first reference anodes is located on the center line of the pixel region in which it is located.
[0037] In one exemplary embodiment of this disclosure,
[0038] On the sub-partition of the first partition, at least a portion of the top of the electrode portion of the first offset anode overlaps with the orthographic projection of the extension closest to the third boundary of the first extension segment, the second extension segment, and the third extension segment of the first trace group on the substrate.
[0039] In one exemplary embodiment of this disclosure, on the first partition:
[0040] At least one electrode portion of the second anode does not overlap with the orthographic projection of the first lead-out segment onto the substrate; and / or,
[0041] At least one of the electrode portions of the second anode overlaps with the orthographic projection of the first lead-out segment onto the substrate.
[0042] In one exemplary embodiment of this disclosure, on the first partition:
[0043] At least one of the bottom ends of the electrode portion of the third anode overlaps with the orthographic projection of the extension segment furthest from the third boundary among the first, second, and third extension segments of the first wiring group on the substrate; and / or,
[0044] At least one of the electrode portions of the third anode does not have an orthographic projection on the substrate that overlaps with the orthographic projection of the first lead-out segment on the substrate.
[0045] In one exemplary embodiment of this disclosure, on the first partition:
[0046] At least one of the electrode portions of the third anode does not overlap with the orthographic projection of the extension segment furthest from the third boundary among the first extension segment, the second extension segment and the third extension segment of the first wiring group on the substrate.
[0047] At least one of the electrode portions of the third anode overlaps with the orthographic projection of the first lead-out segment onto the substrate; and / or,
[0048] The electrode portion of each of the fourth anodes does not overlap with the orthographic projection of the first lead-out segment on the substrate.
[0049] In one exemplary embodiment of this disclosure,
[0050] The at least one partition of the transparent display area further includes a second partition, the second partition being located on the side of the first partition closer to the second boundary;
[0051] The transition layer further includes a second transition section located on the second partition, the second transition section including multiple fourth leads disposed on the same layer as the first lead, multiple fifth leads disposed on the same layer as the second lead, and multiple sixth leads disposed on the same layer as the third lead; wherein:
[0052] The fourth lead includes a fourth extension segment extending in the column direction, the orthographic projection of the fourth extension segment on the substrate being located on the pixel area and the transition area of the sub-partition, and not overlapping with the orthographic projection of the transition hole on the substrate; and / or,
[0053] The fifth lead includes a fifth extension segment extending in the row direction, the fifth extension segment being located on the pixel area of the sub-partition; and / or,
[0054] The sixth lead includes a sixth extension segment extending in the row direction, the sixth extension segment being located on the pixel area of the sub-partition, and at least a portion of the sixth lead also includes a sixth lead segment extending in the column direction, one end of the sixth lead segment being located on the pixel area of the sub-partition and connected to the end of the sixth extension segment away from the first boundary, and the other end of the sixth lead segment being located on the transition area of the sub-partition and connected to the wiring portion of the anode through a transition hole.
[0055] In one exemplary embodiment of this disclosure, on the sub-partition of the second partition:
[0056] Along the direction from the first boundary to the second boundary, the length of the sixth lead-out segment gradually increases; and / or,
[0057] The center of the electrode portion of at least one of the anodes does not overlap with the orthographic projection of the fourth extension on the substrate.
[0058] In one exemplary embodiment of this disclosure, on the sub-partition of the second partition:
[0059] At least one electrode portion of the first anode does not overlap with the orthographic projection of the fourth extension on the substrate; and / or,
[0060] At least one bottom end of the electrode portion of the first anode overlaps with the orthographic projection of the fifth extension closest to the fourth boundary onto the substrate; and / or,
[0061] The top of the electrode portion of at least one of the third anodes overlaps with the orthographic projection of the fifth extension closest to the third boundary onto the substrate.
[0062] In one exemplary embodiment of this disclosure,
[0063] The at least one partition of the transparent display area further includes a third partition, the third partition being located on the side of the second partition away from the first partition;
[0064] The transition layer further includes a third transition section located on the third partition, the third transition section including multiple seventh leads disposed on the same layer as the first lead, multiple eighth leads disposed on the same layer as the second lead, and multiple ninth leads disposed on the same layer as the third lead; wherein:
[0065] The seventh lead includes a seventh extension segment extending in the column direction, the orthographic projection of the seventh extension segment on the substrate being located on the pixel area and the transition area of the sub-partition, and not overlapping with the orthographic projection of the transition hole on the substrate; and / or,
[0066] The eighth lead includes an eighth extension segment extending in the row direction, the eighth extension segment being located on the pixel area of the sub-partition, and at least a portion of the eighth lead also includes an eighth lead-out segment extending in the column direction, one end of the eighth lead-out segment being located on the pixel area of the sub-partition and connected to the end of the seventh extension segment away from the first boundary, the other end of the eighth lead-out segment being located on the transition area of the sub-partition and connected to the wiring portion of the anode through a transition hole; and / or,
[0067] The ninth lead includes a ninth extension segment extending in the column direction, the orthographic projection of the ninth extension segment on the substrate being located on the pixel area and the transition area of the sub-partition, and not overlapping with the orthographic projection of the transition hole on the substrate.
[0068] In one exemplary embodiment of this disclosure, a portion of the ninth extension and the seventh extension have overlapping orthographic projections on the substrate.
[0069] In one exemplary embodiment of this disclosure, on the sub-partition of the third partition:
[0070] Along the direction from the first boundary to the second boundary, the length of the eighth lead-out segment gradually increases; and / or,
[0071] The center of the electrode portion of at least one of the anodes does not overlap with the orthographic projection of the seventh extension on the substrate.
[0072] In one exemplary embodiment of this disclosure, on the sub-partition of the third partition:
[0073] The electrode portions of at least one first anode, at least one second anode, and at least one fourth anode do not overlap with the orthographic projection of the seventh extension on the substrate.
[0074] In one exemplary embodiment of this disclosure,
[0075] The at least one partition of the transparent display area further includes a fourth partition, the fourth partition being located on the side of the third partition away from the second partition;
[0076] The transition layer also includes a fourth transition section located on the fourth partition, the fourth transition section including multiple tenth leads disposed on the same layer as the first lead;
[0077] The tenth lead includes a tenth extension segment extending in the row direction and a tenth lead-out segment extending in the column direction. The tenth extension segment is located on the pixel area of the sub-partition. One end of the tenth lead-out segment is located on the pixel area of the sub-partition and connected to the end of the seventh extension segment away from the first boundary. The other end of the tenth lead-out segment is located on the transition area of the sub-partition and connected to the wiring portion of the anode through a transition hole.
[0078] In one exemplary embodiment of this disclosure, on the sub-partition of the fourth partition:
[0079] Along the direction from the first boundary to the second boundary, the number of the tenth extension segments gradually decreases, and the length of the tenth lead-out segment gradually increases;
[0080] Along the direction from the third boundary to the fourth boundary, the length of the tenth extension gradually decreases;
[0081] At least one of the top ends of the electrode portion of the first anode overlaps with the orthographic projection of the tenth extension closest to the third boundary onto the substrate.
[0082] At least one of the electrode portions of the second anode does not overlap with the orthographic projection of the tenth lead-out segment onto the substrate.
[0083] In one exemplary embodiment of this disclosure, the first partition, the second partition, the third partition, and the fourth partition are rectangular areas.
[0084] In one exemplary embodiment of this disclosure,
[0085] The at least one partition of the transparent display area further includes a fifth partition, which is located on the side of the first partition, the second partition, the third partition, and the fourth partition near the third boundary;
[0086] The transition layer further includes a fifth transition section located in the fifth partition. The fifth transition section includes a plurality of second wiring groups arranged in the column direction, each second wiring group corresponding to a sub-partition of the fifth partition. The second wiring group includes an eleventh lead disposed on the same layer as the first lead, a twelfth lead disposed on the same layer as the second lead, and a thirteenth lead disposed on the same layer as the third lead. Wherein:
[0087] The eleventh lead includes an eleventh extension segment extending in the row direction and an eleventh lead-out segment extending in the column direction. The eleventh extension segment is located on the pixel area of the sub-partition. One end of the eleventh lead-out segment is located on the pixel area of the sub-partition and connected to the end of the eleventh extension segment away from the first boundary. The other end is located on the transition area of the sub-partition and connected to the wiring portion of the anode through a transition hole; and / or,
[0088] The twelfth lead includes a twelfth extension segment extending in the row direction, the twelfth extension segment being located on the pixel area of the sub-partition; and / or,
[0089] The thirteenth lead includes a thirteenth extension segment extending in the row direction, the thirteenth extension segment being located on the pixel area of the sub-partition, and the thirteenth lead, partially away from the third boundary, also includes a thirteenth lead-out segment extending in the column direction, one end of the thirteenth lead-out segment being located on the pixel area of the sub-partition and connected to the end of the thirteenth extension segment away from the first boundary, and the other end being located on the transition area of the sub-partition and connected to the wiring portion of the anode through a transition hole;
[0090] In each of the sub-partitions of the fifth partition: the twelfth extensions are of equal length and aligned at both ends; in the direction from the third boundary to the fourth boundary of the fifth partition: the length of the twelfth extension on the sub-partition gradually increases, the section of the twelfth extension on the sub-partition near the second boundary is aligned, and the number of the adapter holes and the anodes on each sub-partition gradually increases.
[0091] In one exemplary embodiment of this disclosure, on the sub-partition of the fifth partition:
[0092] Along the direction from the first boundary to the second boundary, the number of the eleventh extension segments gradually decreases, and the length of the eleventh lead-out segment gradually increases; and along the direction from the third boundary to the fourth boundary, the length of the eleventh extension segment gradually decreases.
[0093] In one exemplary embodiment of this disclosure, on the sub-partition of the fifth partition:
[0094] The center of the electrode portion of at least one of the first anodes is located on the side of the center line of the pixel region near the fourth boundary; and / or,
[0095] The center of the electrode portion of at least one of the third anodes is located on the side of the center line of the pixel area near the third boundary.
[0096] In one exemplary embodiment of this disclosure, on the sub-partition of the fifth partition:
[0097] At least one electrode portion of the second anode does not overlap with the orthographic projection of the eleventh lead-out segment onto the substrate; and / or,
[0098] At least one of the electrode portions of the third anode does not overlap with the orthographic projection of the eleventh lead-out segment onto the substrate.
[0099] In one exemplary embodiment of this disclosure,
[0100] The transparent display area is provided in four places: a first transparent display area, a second transparent display area, a third transparent display area, and a fourth transparent display area. The first and second transparent display areas are arranged sequentially in the row direction, the third and fourth transparent display areas are arranged sequentially in the row direction, the first and third transparent display areas are arranged sequentially in the column direction, and the second and fourth transparent display areas are arranged sequentially in the column direction.
[0101] The leads on the first transparent display area and the leads on the second transparent display area are symmetrically arranged about the column direction; and / or,
[0102] The leads on the third transparent display area and the leads on the fourth transparent display area are symmetrically arranged about the column direction; and / or,
[0103] The leads on the first transparent display area and the leads on the third transparent display area are symmetrically arranged about the row direction; and / or,
[0104] The leads on the second transparent display area and the leads on the fourth transparent display area are symmetrically arranged about the row direction.
[0105] A second aspect of this disclosure provides a terminal device, characterized in that it includes a display panel as described in any of the preceding claims.
[0106] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description
[0107] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.
[0108] Figure 1 A schematic diagram of the structure of the substrate in a display panel according to an embodiment of the present disclosure is shown;
[0109] Figure 2 A schematic diagram of the structure of the substrate in a display panel according to another embodiment of the present disclosure is shown;
[0110] Figure 3 An equivalent schematic diagram of a pixel circuit in a display panel according to an embodiment of the present disclosure is shown;
[0111] Figure 4 A schematic diagram of the pixel circuit in a display panel according to an embodiment of the present disclosure is shown;
[0112] Figure 5 A cross-sectional schematic diagram of a display panel according to an embodiment of the present disclosure is shown;
[0113] Figure 6 A top view schematic diagram of the anode according to an embodiment of the present disclosure is shown;
[0114] Figure 7 A schematic diagram showing the distribution of the light-transmitting area according to an embodiment of this disclosure is shown;
[0115] Figure 8 A schematic diagram showing the distribution of the light-transmitting area according to another embodiment of this disclosure is shown;
[0116] Figure 9 It shows Figure 7 A schematic diagram showing the distribution of the first transparent display area within the light-transmitting area;
[0117] Figure 10 It shows Figure 8 A schematic diagram showing the distribution of the first transparent display area within the light-transmitting area;
[0118] Figure 11 It shows Figure 9 or Figure 10 A schematic diagram of at least a portion of the structure of the first partition of the first transparent display area is shown in the figure;
[0119] Figure 12 It shows Figure 11 A schematic diagram showing the positional relationship between the anode and the first trace in the structure shown;
[0120] Figure 13 It shows Figure 11 A schematic diagram showing the positional relationship between the anode and the second trace in the structure shown;
[0121] Figure 14 It shows Figure 11 A schematic diagram showing the positional relationship between the anode and the third trace in the structure shown;
[0122] Figure 15 A cross-sectional schematic diagram of the first extension segment, the second extension segment, and the third extension segment according to an embodiment of the present disclosure is shown;
[0123] Figure 16 It shows Figure 9 or Figure 10 A schematic diagram of at least a portion of the structure of the second partition of the first transparent display area is shown in the figure;
[0124] Figure 17 It shows Figure 16 A schematic diagram showing the positional relationship between the anode and the fourth trace in the structure shown;
[0125] Figure 18 It shows Figure 16 A schematic diagram showing the positional relationship between the anode and the fifth trace in the structure shown;
[0126] Figure 19 It shows Figure 16 A schematic diagram showing the positional relationship between the anode and the sixth trace in the structure shown;
[0127] Figure 20 It shows Figure 9 or Figure 10 A schematic diagram of at least a portion of the structure of the third partition of the first transparent display area is shown in the figure;
[0128] Figure 21 It shows Figure 20 A schematic diagram showing the positional relationship between the anode and the seventh trace in the structure shown;
[0129] Figure 22 It shows Figure 20 A schematic diagram showing the positional relationship between the anode and the eighth trace in the structure shown;
[0130] Figure 23 It shows Figure 20 A schematic diagram showing the positional relationship between the anode and the ninth trace in the structure shown;
[0131] Figure 24 It shows Figure 9 or Figure 10 A schematic diagram of at least a portion of the structure of the fourth partition of the first transparent display area is shown in the figure;
[0132] Figure 25 It shows Figure 9 or Figure 10 A schematic diagram of at least a portion of the structure of the third partition of the first transparent display area according to an embodiment is shown in the figure;
[0133] Figure 26 It shows Figure 25 A schematic diagram showing the positional relationship between the anode and the eleventh trace in the structure shown;
[0134] Figure 27 It shows Figure 25 A schematic diagram showing the positional relationship between the anode and the twelfth trace in the structure shown;
[0135] Figure 28 It shows Figure 25 A schematic diagram showing the positional relationship between the anode and the thirteenth trace in the structure shown;
[0136] Figure 29 It shows Figure 9 or Figure 10 A schematic diagram of at least a portion of the structure of the third partition of the first transparent display area according to another embodiment is shown in the figure;
[0137] Figure 30 It shows Figure 29 A schematic diagram showing the positional relationship between the anode and the eleventh trace in the structure shown;
[0138] Figure 31 It shows Figure 29 A schematic diagram showing the positional relationship between the anode and the twelfth trace in the structure shown;
[0139] Figure 32 It shows Figure 29 A schematic diagram showing the positional relationship between the anode and the thirteenth trace in the structure shown;
[0140] Figure 33 A schematic diagram of a terminal device according to an embodiment of the present disclosure is shown.
[0141] Explanation of reference numerals in the attached figures:
[0142] 1. Substrate; 101. Transparent area; 1011. Transparent display area; 1011a. First transparent display area; 1011b. Second transparent display area; 1011c. Third transparent display area; 1011d. Fourth transparent display area; 10111. First boundary; 10112. Second boundary; 10113. Third boundary; 10114. Fourth boundary; 102. Non-transparent area; 1021. Display area; 1022. Non-display area;
[0143] 2. Adapter layer; 211. Lead; 211a. First lead; 211aa. First extension; 211ab. First lead-out; 211b. Second lead; 211c. Third lead; 211d. Fourth lead; 211e. Fifth lead; 211f. Sixth lead; 211fa. Sixth extension; 211fb. Sixth lead-out; 211g. Seventh lead; 211h. Eighth lead; 211ha. Eighth extension; 211hb. Eighth lead-out; 211 j. Ninth lead; 211k. Tenth lead; 211ka. Tenth extension; 211r. Eleventh lead; 211ra. Eleventh extension; 211rb. Eleventh lead-out; 211t. Twelfth lead; 211p. Thirteenth lead; 211pa. Thirteenth extension; 211pb. Thirteenth lead-out; 22. Insulating layer; 23. Adapter hole; 23a. First adapter hole; 23b. Second adapter hole; 23c. Third adapter hole; 24d. Fourth adapter hole;
[0144] 3. Light-emitting layer; 30. Light-emitting device; 301. Anode; 301a. First anode; 301b. Second anode; 301c. Third anode; 301d. Fourth anode; 3011. Electrode section; 3012. Wiring section; 302. Organic light-emitting material layer; 303. Cathode; 31. Pixel definition layer;
[0145] 100. Display panel; 200. Camera device. Detailed Implementation
[0146] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, they are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and therefore detailed descriptions of them will be omitted. Furthermore, the drawings are merely illustrative of this disclosure and are not necessarily drawn to scale.
[0147] The terms “a,” “one,” “the,” “the,” and “at least one” are used to indicate the presence of one or more elements / components / etc.; the terms “including” and “having” are used to indicate an open-ended inclusion and to mean that there may be other elements / components / etc. in addition to the listed elements / components / etc.; the terms “first,” “second,” and “third,” etc., are used only as markers and are not a limitation on the number of objects.
[0148] The row and column directions are only two perpendicular directions, and their specific orientations are not limited. For example, the row direction can be the horizontal X direction as shown in the figure, and the column direction can be the vertical Y direction as shown in the figure. Those skilled in the art will know that if the display panel is rotated, the actual orientation of the row and column directions may change.
[0149] This disclosure provides a display panel, which may be an OLED (Organic Light-Emitting Diode) display panel. Combined with... Figure 1 , Figure 2 and Figure 5 As shown, the display panel in the embodiments of this disclosure may include a substrate 1, a transition layer 2, and a light-emitting layer 3; wherein:
[0150] The substrate 1 may have a light-transmitting region 101 and a non-light-transmitting region 102 that at least partially surrounds the light-transmitting region 101. For example, the substrate 1 may be a driving substrate, and the non-light-transmitting region 102 may be provided with a plurality of pixel circuits.
[0151] For example, combined Figure 3 and Figure 4 As shown, the pixel circuit can be a 7T1C circuit structure, comprising 7 transistors and 1 capacitor. This 7T1C pixel circuit includes a driving transistor T1, a data writing transistor T2, a threshold compensation transistor T3, a first light-emitting control transistor T4, a second light-emitting control transistor T5, a first reset transistor T6, a second reset transistor T7, and a storage capacitor C1. This pixel circuit can be connected to the gate signal terminal (Gate), the data signal terminal (Data), the reset signal terminals (RST1 and RST2), the light-emitting control signal terminal (EM), the power supply terminal (VDD), the initial power supply terminals (Vinit1 and Vinit2), and the light-emitting device. The light-emitting device can also be connected to the power supply terminal (VSS). This pixel circuit can be used to drive the connected light-emitting device 30 to emit light in response to signals provided by the connected signal terminals.
[0152] Furthermore, transistors can be classified into N-type and P-type transistors based on their characteristics. This disclosure uses an example where all transistors are P-type. Based on the description and teachings of this disclosure, those skilled in the art can readily conceive of using at least some N-type transistors in the pixel circuit structure of this disclosure, i.e., using N-type transistors or a combination of N-type and P-type transistors, without any inventive effort. Therefore, these implementations are also within the protection scope of this disclosure.
[0153] Of course, in other embodiments of this disclosure, the pixel circuit 10 may also adopt other structures, as long as it can drive the light-emitting device 30 to emit light, and its structure is not specifically limited here.
[0154] In this embodiment, all pixel circuits may be located in the display area 1021 of the non-transparent area 102; however, it is not limited to this. Some pixel circuits may be located in the non-display area 1022 of the non-transparent area 102 and used to connect with the light-emitting device 30 of the transparent area 101, while others may be located in the display area 1021 of the non-transparent area 102 and used to connect with the light-emitting device 30 of the display area 1021 of the non-transparent area 102.
[0155] The transition layer 2 can be formed on the substrate 1. This transition layer 2 may include multiple mutually insulated lead layers. Adjacent lead layers can be separated by an insulating layer 22. This insulating layer 22 can be an organic layer or an inorganic layer, but is not limited to this, and may also include only one lead layer. Each lead layer may include multiple mutually insulated leads 211. These leads 211 are mainly used to realize the connection between the pixel circuit of the non-transparent area 102 and the anode of the light-emitting device 30 located in the transparent area 101 mentioned later.
[0156] It should be noted that some of the leads 211 mentioned in the embodiments of this disclosure can be a complete lead 211 used to connect the pixel circuit and the anode. Part of this complete lead 211 can be located in the light-transmitting area 101, and another part can be located in the non-light-transmitting area 102. Other leads 211 mentioned in the embodiments of this disclosure can be partial segments of a complete lead 211 used to connect the pixel circuit and the anode. Part of the partial segment can be located in the light-transmitting area 101, and another part of the partial segment can be located in the non-light-transmitting area 102.
[0157] A light-emitting layer 3 is formed on the side of the transition layer 2 away from the substrate 1. This light-emitting layer 3 may include a plurality of light-emitting devices 30, some of which may be located in the light-transmitting region 101 and others in the non-light-transmitting region 102. In this embodiment, the light-emitting device 30 may be an OLED, which may include an anode 301, an organic light-emitting material layer 302, and a cathode 303. The anode 301 is located on the side of the organic light-emitting material layer 302 close to the transition layer 2, and the cathode 303 is located on the side of the organic light-emitting material layer 302 away from the transition layer 2.
[0158] Among them, the anode 301 of the light-emitting device 30 located in the light-transmitting area 101 can be connected to a part of the pixel circuit located in the non-light-transmitting area 102 through the lead 211 of the lead layer, and the anode 301 of the light-emitting device 30 located in the non-light-transmitting area 102 can be connected to another part of the pixel circuit located in the non-light-transmitting area 102.
[0159] Specifically, in combination Figure 5 and Figure 6 As shown, the anode 301 may have an electrode portion 3011 and a wiring portion 3012 connected to each other. The electrode portion 3011 is the part of the anode 301 that is in contact with the organic light-emitting material layer 302, while the wiring portion 3012 is the part of the anode 301 that is connected to the lead wire 211 through the transition hole 23 in the transition layer 2.
[0160] In addition, to facilitate defining the light emission range of each light-emitting device 30, such as Figure 5 As shown, the light-emitting layer 3 may also include a pixel definition layer 31, which may be disposed on the surface of the transition layer 2 away from the substrate 1 and has an opening that exposes each anode 301. The organic light-emitting material layer 302 may cover the anode 301 in each opening and expose the electrode portion 3011, while the wiring portion 3012 is located outside the opening.
[0161] The structure of the display panel according to the embodiments of this disclosure will be described in detail below.
[0162] In embodiments of this disclosure, such as Figure 7 and Figure 8 As shown, the light-transmitting area 101 of the substrate 1 can be divided into four transparent display areas 1011. The four transparent display areas 1011 are arranged in an array in the row direction X and the column direction Y. Two adjacent transparent display areas 1011 in the row direction X can be symmetrically arranged about the column direction Y, but are not limited to this and can also be arranged asymmetrically. Two adjacent transparent display areas 1011 in the column direction Y can be symmetrically arranged about the row direction X, but are not limited to this and can also be arranged asymmetrically.
[0163] For example, the four transparent display areas 1011 can be defined as a first transparent display area 1011a, a second transparent display area 1011b, a third transparent display area 1011c, and a fourth transparent display area 1011d, respectively. The first transparent display area 1011a and the second transparent display area 1011b are arranged sequentially in the row direction X and symmetrically about the column direction Y. The third transparent display area 1011c and the fourth transparent display area 1011d are arranged sequentially in the row direction X and symmetrically about the column direction Y.
[0164] In this embodiment of the present disclosure, the overall shape of the light-transmitting area 101 can be rectangular, such as... Figure 7 As shown, when the overall shape of the light-transmitting area 101 is rectangular, each transparent display area 1011 can also be rectangular, but is not limited to this; its overall shape can also be circular or approximately circular, such as... Figure 8 As shown, when the overall shape of the light-transmitting area 101 is circular or approximately circular, each transparent display area 1011 can be a quarter circle or approximately a quarter circle.
[0165] It should be understood that the shape of the light-transmitting area 101 is not limited to the aforementioned rectangular, circular, or approximately circular shapes, but may also be other shapes, depending on the specific circumstances.
[0166] Among them, such as Figure 9 and Figure 10 As shown, the transparent display area 1011 of the array substrate in this embodiment of the present disclosure may have a first boundary 10111 and a second boundary 10112 opposite to each other in the row direction X, and a third boundary 10113 and a fourth boundary 10114 opposite to each other in the column direction Y. It should be noted that the transparent display area 1011 having a first boundary 10111, a second boundary 10112, a third boundary 10113 and a fourth boundary 10114 does not mean that the transparent display area 1011 must be rectangular. It can be rectangular or other shapes, such as approximately a quarter circle. The limitation that the transparent display area 1011 has a first boundary 10111, a second boundary 10112, a third boundary 10113 and a fourth boundary 10114 is for the convenience of describing the positional relationship between the lead 211 and the anode 301 and other structures later.
[0167] For example, the transparent display area 1011 may include at least one partition, and each partition may include multiple rows of sub-partitions arranged in the column direction Y. When dividing each partition, it can be divided by the area occupied by each row of pixel units, that is: the area occupied by each row of pixel units can be a sub-partition. This pixel unit includes a light-emitting device 30 and a corresponding connecting hole 23 connected to this light-emitting device 30. Specifically, the sub-partition may include a row of pixel areas and a row of connecting areas arranged sequentially in the column direction Y. When dividing each sub-partition, it can be divided by the organic light-emitting material layer 302 of each row of light-emitting devices 30 and the connecting hole 23. That is: the area occupied by the organic light-emitting material layer 302 of each row of light-emitting devices 30 is the pixel area (that is: can be understood as the light-emitting area). The area where the electrode portion 3011 in the anode 301 connects with the organic light-emitting material layer 302 can be the specific light-emitting area of each light-emitting device 30; and the area occupied by the connecting hole 23 corresponding to each row of light-emitting devices 30 is the connecting area. That is, the connecting area is provided with the connecting hole 23.
[0168] Among the multiple leads 211 located in the light-transmitting area 101: some leads 211 may be located only in the pixel area; others include portions located in the pixel area and portions located in the transition area. In the anode 301: at least a portion of the electrode portion 3011 is located in the pixel area, and at least a portion of the wiring portion 3012 is located in the transition area and is connected to the portion of the leads 211 located in the transition area through a transition hole 23.
[0169] For example, in this embodiment of the present disclosure, the plurality of light-emitting devices 30 located in the light-transmitting area 101 may include a plurality of light-emitting device groups, each light-emitting device group including four light-emitting devices 30, namely a first light-emitting device, a second light-emitting device, a third light-emitting device, and a fourth light-emitting device. The first light-emitting device, the second light-emitting device, and the third light-emitting device have different light-emitting colors, and the light-emitting color of the fourth light-emitting device is the same as the light-emitting color of the second light-emitting device. For example, the light-emitting color of the first light-emitting device may be red, the light-emitting colors of the second and fourth light-emitting devices may be green, and the light-emitting color of the third light-emitting device may be blue, but it is not limited to these and may also include other colors.
[0170] It should be understood that each light-emitting device 30 corresponds to an anode 301. Therefore, in other words, the embodiments of this disclosure may have an anode layer, which may include a group of anodes 301. Each group of anodes 301 may include a first anode 301a, a second anode 301b, a third anode 301c, and a fourth anode 301d. The second anode 301b and the fourth anode 301d have the same light emission color, while the first anode 301a, the second anode 301b, and the third anode 301c have different light emission colors.
[0171] For example, when the emission color corresponding to the first anode 301a is red, the emission colors corresponding to the second anode 301b and the fourth anode 301d are green, and the emission color corresponding to the third anode 301c is blue, the electrode portion 3011 of the first anode 301a can be elliptical, and its major axis can extend in the column direction Y. The electrode portions 3011 of the second anode 301b, the third anode 301c, and the fourth anode 301d can all be circular. The areas of the electrode portions 3011 of the second anode 301b and the fourth anode 301d are equal and smaller than the areas of the electrode portions 3011 of the third anode 301c and the first anode 301a. The area of the electrode portion 3011 of the first anode 301a is smaller than the area of the electrode portion 3011 of the third anode 301c.
[0172] For example, in this embodiment of the present disclosure, a plurality of transition hole groups arranged at intervals in the row direction X may be provided on the transition area of the sub-partition; each transition hole group may include four transition holes 23 arranged at intervals in the row direction X, and are respectively defined as a first transition hole 23a connected to the first anode 301a, a second transition hole 23b connected to the second anode 301b, a third transition hole 23c connected to the third anode 301c, and a fourth transition hole 23d connected to the fourth anode 301d.
[0173] In the anode group 301, the wiring portion 3012 of the first anode 301a, the second anode 301b, the third anode 301c, and the fourth anode 301d corresponds one-to-one with the adapter hole 23 on the same adapter area; and at least 30% of the electrode portion 3011 of the first anode 301a, the second anode 301b, and the third anode 301c is located on the pixel area of the same row sub-partition, for example, on the pixel area of the m-th row sub-partition, and at least 30% of the electrode portion 3011 of the fourth anode 301d is located on the pixel area of the adjacent row sub-partition, for example, on the pixel area of the (m+1)-th row sub-partition; it should be noted that m mentioned here is a positive integer greater than or equal to 1.
[0174] In the adapter hole group: the first adapter hole 23a, the second adapter hole 23b, the third adapter hole 23c, and the fourth adapter hole 23d are arranged sequentially in the row direction X, or the third adapter hole 23c, the fourth adapter hole 23d, the first adapter hole 23a, and the second adapter hole 23b are arranged sequentially in the row direction X; while in two adjacent adapter hole groups in the column direction Y: the first adapter hole 23a of one and the third adapter hole 23c of the other are located in the same column in the column direction Y, that is: roughly located in the same row, or slightly offset; the second adapter hole 23b of one and the fourth adapter hole 23d of the other are located in the same column, that is: roughly located in the same row, or slightly offset; it should be noted that the arrangement of the anode 301 of each light-emitting device 30 in the light-emitting device group can match the arrangement of each adapter hole 23 in its corresponding adapter hole group.
[0175] In some embodiments of this disclosure, such as Figure 9 As shown, at least one partition of the transparent display area 1011 in the array substrate may include a first partition A, a second partition B, a third partition C, and a fourth partition D. The second partition B is located on the side of the first partition A closer to the second boundary 10112, the third partition C is located on the side of the second partition B away from the first partition A, and the fourth partition D is located on the side of the third partition C away from the second partition B. The first partition A, the second partition B, the third partition C, and the fourth partition D may be rectangular areas or similar rectangular areas, and their sizes may be equal or unequal, depending on the specific situation.
[0176] It should be noted that the first partition A, the second partition B, the third partition C, and the fourth partition D can be divided at equal intervals or not at equal intervals. The first partition A, the second partition B, the third partition C, and the fourth partition D can be connected sequentially, but not limited to this. Any two adjacent partitions in the first partition A, the second partition B, the third partition C, and the fourth partition D can also have additional partitions. The structure of these additional partitions will not be specifically described here.
[0177] Furthermore, it should be understood that when the transparent display area 1011 is a quarter-semicircle or a similar quarter-semicircle, such as Figure 10 As shown, the transparent display area 1011 of this disclosure is not limited to the four partitions mentioned above, but may also include a fifth partition E. This fifth partition E may be located on the side of the first partition A, the second partition B, the third partition C and the fourth partition D near the third boundary 10113. The boundary of this fifth partition E that connects with the non-transparent area 102 may be similar to an arc.
[0178] The following mainly describes the positional relationship between the light-emitting device 30 and the lead 211 on each partition of the transparent display area 1021, with the anode 301 as the reference point.
[0179] Combination Figures 9 to 14As shown, in the pixel area of the sub-partition of the first partition A, the fourth anode 301d is mainly provided in the area near the third boundary 10113 on its center line, and the first anode 301a, the second anode 301b and the third anode 301c are mainly provided in the area away from the third boundary 10113 on its center line. Therefore, it can be seen that in the pixel area of the sub-partition of the first partition A, the area of the anode 301 in the area near the third boundary 10113 on its center line is smaller than the area of the anode 301 in the area away from the third boundary 10113.
[0180] It should be noted that the center line of the pixel area mentioned above refers to the center line extending in the row direction X, and the distance between this center line and the transition hole 23 of the adjacent two row transition areas is equal.
[0181] In the sub-partitions of the first partition A: the center line of the pixel area has a first spacing with the extension segment of the trace group of the pixel area located in the sub-partition that is closest to the third boundary 10113, and a second spacing with the extension segment furthest from the third boundary 10113. The first spacing and the second spacing are dimensions in the column direction Y, and the first spacing and the second spacing are equal.
[0182] In the sub-partitions of the first partition A: the number of leads 211 gradually decreases along the direction from the first boundary 10111 to the second boundary 10112 of the transparent display area 1011, and the size of the leads 211 in the row direction X gradually shortens along the direction from the third boundary 10113 to the fourth boundary 10114. That is, the corner areas near the first boundary 10111 and the third boundary 10113 are areas with denser leads 211, while the corner areas near the second boundary 10112 and the fourth boundary 10114 are areas with sparser leads 211.
[0183] Specifically, the transition layer 2 may include a first transition section located on the first partition A. The first transition section includes a plurality of first wiring groups arranged in the column direction Y, and each first wiring group corresponds to a sub-partition of the first partition A. The first wiring group includes a first lead 211a, a second lead 211b, and a third lead 211c, which are sequentially distributed and insulated from each other along the direction from the substrate 1 to the anode layer. The first lead 211a includes a first extension segment 211aa extending in the row direction X, and part of the first lead 211a also includes a first lead-out segment 211ab extending in the column direction Y. The first extension segment 211aa is located on the pixel area of the sub-partition. One end of the first lead-out segment 211ab is located on the pixel area of the sub-partition and is connected to one end of the first extension segment 211aa away from the first boundary 10111. The other end is located on the transition area of the sub-partition and is connected to the wiring portion 3012 of an anode 301 through a transition hole 23. The second lead 211b may include a second extension segment extending in the row direction X, which is located on the pixel area of the sub-partition. The third lead 211c may include a third extension segment extending in the row direction X, which is located on the pixel area of the sub-partition.
[0184] It should be noted that the first lead 211a in this embodiment can be a complete lead 211 as mentioned above, which can include not only the first extension segment 211aa and the first lead-out segment 211ab located on the transparent display area 1011, but also a part of the structure located in the non-transparent area 102; while the second lead 211b and the third lead 211c can be local straight line segments located in the first partition A of a complete lead 211, which extend in the row direction X as a whole. That is to say, the second lead 211 only includes the second extension segment, and the third lead 211 only includes the third extension segment.
[0185] Among them, such as Figure 12 As shown, in the first lead 211a near the fourth boundary 10114 on the sub-partition of the first partition A: along the direction from the first boundary 10111 to the second boundary 10112, the number of first extension segments 211aa gradually decreases, and the length of the first lead segments 211ab gradually increases; and along the direction from the third boundary 10113 to the fourth boundary 10114, the length of the first extension segment 211aa gradually decreases; as shown... Figure 13 and Figure 14 As shown, the number of the second extension segment and the third extension segment remain unchanged along the direction from the first boundary 10111 to the second boundary 10112.
[0186] In a sub-partition of the first partition A: the overlap area of at least one first extension segment 211aa and a third extension segment (i.e., third lead 211c) on the substrate 1 is greater than the overlap area of the first extension segment (i.e., second lead 211b) on the substrate 1. For example, as... Figure 15 As shown, in the sub-partition of the first partition A: the orthographic projections of the first extension segment 211aa and the third extension segment on the substrate 1 overlap; the orthographic projections of the first extension segment 211aa and the second extension segment on the substrate 1 do not overlap. This design ensures convenient routing while also appropriately reducing the space occupied by the first routing group.
[0187] On a sub-partition of the first partition A: multiple first anodes 301a may include first reference anodes 301ab arranged at intervals in the row direction X (e.g. Figure 11 The first anode 301a) and the first offset anode 301aa (as shown in the frame) at positions ① and ⑧ (as shown in the frame) Figure 11 The first anode 301a at positions ③ and ⑤ (highlighted in the center frame) has its electrode portion 3011 center closer to the third boundary 10113 than the center of the electrode portion 3011 of the first reference anode 301ab. In other words, the centers of the electrode portions 3011 of at least two first anodes 301a on the sub-partition of the first partition A are not on the same straight line extending in the row direction X. Specifically, the first anodes 301a on the sub-partitions of the first partition A can be irregularly arranged, and their positions can be adjusted according to the wiring density of each area within the sub-partition of the first partition A.
[0188] As mentioned above, in the pixel area of the sub-partition of the first partition A, the density of the lead wire 211 in the region near the third boundary 10113 on its center line is greater than that in the region far from the third boundary 10113. The area of the first anode 301a in the region near the third boundary 10113 on its center line is smaller than that in the region far from the third boundary 10113. In order to ensure that the overlapping area of the first anode 301a and the lead wire 211 in these two regions is more balanced, some of the first anode 301a can be moved towards the direction of the third boundary 10113 to ensure that the overlap of each first anode 301a and the trace in the first partition A is more balanced. This ensures that the parasitic capacitance generated by each first anode 301a and the trace in the first partition A is closer, so as to avoid the situation where the difference in parasitic capacitance at each first anode 301a is too large and affects the pixel current, thereby improving the mura phenomenon at the light-transmitting area 101.
[0189] It should be noted that when designing the structure on the first partition A, the positions of some first anodes 301a can be designed first. These first anodes 301a designed first can be defined as the aforementioned first reference anodes 301ab. Then, according to the wiring density of each region, the positions of other first anodes 301a are adjusted relative to the positions of the first reference anodes 301ab designed first. These adjusted first anodes 301a can be defined as first offset anodes 301aa.
[0190] For example, the first partition A can have N rows of subpartitions, where N is a positive integer greater than 1; combined with Figures 9 to 14 As shown, in the pixel area of the nth row sub-partition of the first partition A, the first offset anode 301aa can be located on the side of the first reference anode 301ab near the second boundary 10112; in the pixel area of the (n+1)th row sub-partition of the first partition A, the first offset anode 301aa is located on the side of the first reference anode 301ab near the first boundary 10111; the first reference anode 301ab in the pixel area of the nth row sub-partition of the first partition A is located on the side of the first offset anode 301aa near the first boundary 10111 in the pixel area of the (n+1)th row sub-partition of the first partition A; the first offset anode 301aa in the pixel area of the nth row sub-partition of the first partition A is located between the first offset anode 301aa and the first reference anode 301ab in the pixel area of the (n+1)th row sub-partition of the first partition A; it should be noted that 1≤n<N, and n is a positive integer. Optionally, in a sub-partition of the first partition A, the center of the electrode portion 3011 of the first offset anode 301aa is located on the side of the center line of the pixel area where it is located, close to the third boundary 10113, so as to further ensure that the overlap of each first anode 301a and the trace at the first partition A is more balanced, which can improve the mura phenomenon at the light-transmitting area 101.
[0191] Furthermore, in the sub-partition of the first partition A, at least the top of the electrode portion 3011 of a portion of the first offset anode 301aa overlaps with the orthographic projection of the extension segment closest to the third boundary 10113 of the first extension segment 211aa, the second extension segment, and the third extension segment of the first trace group on the substrate 1. This design ensures a more balanced overlap between each first anode 301a and the trace, while also reducing the design difficulty.
[0192] It should be noted that, in the embodiments of this disclosure, the top end of the electrode portion 3011 of the anode 301 is the end of the electrode portion 3011 that is close to the third boundary 10113, and the bottom end of the electrode portion 3011 of the anode 301 is the end of the electrode portion 3011 that is away from the third boundary 10113.
[0193] For example, in a sub-partition of the first partition A, the center of the electrode portion 3011 of at least one first reference anode 301ab is located on the center line of the pixel area where it is located. This design facilitates the adjustment of the position of the first offset anode 301aa so that the overlap between each first anode 301a and the trace at the first partition A is more balanced. However, it is not limited to this. The center of the electrode portion 3011 of the first reference anode 301ab may not be located on the center line of the pixel area.
[0194] For example, on the first partition A: Combining Figure 11and Figure 12 As shown, at least one second anode 301b (e.g.) Figure 12 The electrode portion 3011 of the second anode 301b (located at position ⑥ in the center frame) and the first lead-out segment 211ab do not overlap in their orthogonal projections on the substrate 1; at least one second anode 301b (such as...) Figure 12 The electrode portion 3011 of the second anode 301b (other than position ⑥) overlaps with the orthographic projection of the first lead-out segment 211ab on the substrate 1.
[0195] It should be noted that, in designing the structure on the first partition A, the positions of some second anodes 301b can be designed first. These pre-designed second anodes 301b can be defined as second reference anodes 301b. The electrode portion 3011 of this second reference anode 301b overlaps with the orthographic projection of the first lead-out segment 211ab on the substrate 1. Then, according to the wiring density of each region, the positions of other second anodes 301b are adjusted relative to the positions of the pre-designed second reference anodes 301. These adjusted second anodes 301b can be defined as second offset anodes 301b. The electrode portion 3011 of this second offset anode 301b does not overlap with the orthographic projection of the first lead-out segment 211ab on the substrate 1.
[0196] For example, on the first partition A: at least one third anode 301c (e.g. Figure 12 The bottom end of the electrode portion 3011 of the third anode 301c at positions ②, ④, and ⑦ (highlighted in the center frame) overlaps with the orthographic projection of the extension segment furthest from the third boundary 10113 among the first extension segments 211aa, second extension segments, and third extension segments of the first wiring group on the substrate 1; at least one third anode 301c (such as...) Figure 12 The orthographic projection of the electrode portion 3011 of the third anode 301c) at position ⑦ (highlighted in the center frame) on the substrate 1 does not overlap with the orthographic projection of the first lead-out segment 211ab on the substrate 1.
[0197] For example, on the first partition A: at least one third anode 301c (e.g. Figure 12 The bottom end of the electrode portion 3011 of the third anode 301c (excluding positions ②, ④, and ⑦) does not overlap with the orthographic projection of the extension segment furthest from the third boundary 10113 among the first extension segments 211aa, second extension segments, and third extension segments of the first wiring group on the substrate 1, and the electrode portion 3011 of at least one third anode 301c overlaps with the orthographic projection of the first lead segment 211ab on the substrate 1.
[0198] It should be noted that, in designing the structure on the first partition A, the positions of some third anodes 301c can be designed first. These pre-designed third anodes 301c can be defined as third reference anodes 301c. The electrode portion 3011 of this third reference anode 301c overlaps with the orthographic projection of the first lead-out segment 211ab on the substrate 1, while it does not overlap with the orthographic projection of the extension segment farthest from the third boundary 10113 among the first extension segments 211aa, second extension segments, and third extension segments of the first wiring group. Then, according to the wiring density of each region, the positions of other third anodes 301c are adjusted relative to the positions of the pre-designed third reference anodes 301c. These adjusted third anodes 301c... 1c can be defined as the third offset anode 301c. The electrode portion 3011 of a part of the third offset anode 301c does not overlap with the orthographic projection of the first lead-out segment 211ab on the substrate 1, but overlaps with the orthographic projection of the extension segment furthest from the third boundary 10113 among the first extension segments 211aa, second extension segments, and third extension segments of the first wiring group. The electrode portion 3011 of another part of the third offset anode 301c overlaps with the orthographic projection of the first lead-out segment 211ab on the substrate 1, but does not overlap with the orthographic projection of the extension segment furthest from the third boundary 10113 among the first extension segments 211aa, second extension segments, and third extension segments of the first wiring group.
[0199] For example, on the first partition A, such as Figure 12 As shown, the orthographic projections of the electrode portion 3011 of each fourth anode 301d and the first lead-out section 211ab on the substrate 1 do not overlap. At the same time, the top of the electrode portion 3011 of each fourth anode 301d overlaps with the orthographic projection of the extension section closest to the third boundary 10113 among the first extension section 211aa, the second extension section and the third extension section of the first wiring group on the substrate 1.
[0200] It should be noted that when designing the structure on the first partition A, the fourth anode 301d can adopt the same design rules. That is to say, each fourth anode 301d can be understood as a reference anode, and no offset design has occurred.
[0201] Among them, the offset of the electrode portion 3011 of the aforementioned offset anode 301 relative to the electrode portion 3011 of its corresponding reference anode 301 in the column direction Y can be 2μm to 10μm, such as 2μm, 4μm, 6μm, 8μm, 10μm, etc., and the offset in the row direction X can be 1μm to 5μm, such as 1μm, 2μm, 3μm, 4μm, 5μm, etc., the specific value depends on the design.
[0202] Furthermore, in the first partition A: the width of the first extension segment 211aa, the width of the first lead-out segment 211ab, the width of the second extension segment, the width of the third extension segment, the spacing between adjacent first extension segments 211aa, the spacing between adjacent second extension segments, and the spacing between adjacent third extension segments are all taken in the range of 1μm to 3μm, for example: 1μm, 1.5μm, 2μm, 2.5μm, 3μm, etc.
[0203] And on the first partition A: combined Figures 11 to 14 As shown, the number of first extension segments 211aa, second extension segments, and third extension segments covered by the electrode portion 3011 of the first anode 301a can be 6 to 10; the number of first extension segments 211aa covered by the electrode portion 3011 of the second anode 301b can be 0 to 5, and the number of second extension segments and third extension segments covered can be 4 to 6; the number of first extension segments 211aa covered by the electrode portion 3011 of the third anode 301c can be 1 to 7, and the number of second extension segments and third extension segments covered can be 6 to 8; the number of first extension segments 211aa, second extension segments, and third extension segments covered by the electrode portion 3011 of the fourth anode 301d can be 5 to 7.
[0204] It should be noted that, in the first partition A, the number of extensions of the lead 211 covered by the electrode portion 3011 of each anode 301 is not limited to those mentioned above, and its specific number is related to the width of the extension and the spacing between adjacent extensions.
[0205] In some embodiments of this disclosure, combined with Figures 16 to 19 As shown, the transition layer 2 may further include a second transition section located on the second partition B. This second transition section may include multiple fourth leads 211d arranged on the same layer as the first lead 211a, multiple fifth leads 211e arranged on the same layer as the second lead 211b, and multiple sixth leads 211f arranged on the same layer as the third lead 211c.
[0206] On the second partition B, as Figure 17 As shown, each fourth lead 211d includes a fourth extension segment extending in the column direction Y. The orthographic projection of the fourth extension segment on the substrate 1 is located on the pixel area and transition area of each sub-partition, and does not overlap with the orthographic projection of the transition hole 23 on the substrate 1; Figure 18 As shown, each fifth lead 211e includes a fifth extension segment extending in the row direction X, and the fifth extension segment is located on the pixel area of the sub-partition; as Figure 19As shown, each sixth lead 211f includes a sixth extension segment 211fa extending in the row direction X, the sixth extension segment 211fa being located on the pixel area of the sub-partition, and at least a portion of the sixth lead 211f also includes a sixth lead segment 211fb extending in the column direction Y, one end of the sixth lead segment 211fb being located on the pixel area of the sub-partition and connected to the end of the sixth extension segment 211fa away from the first boundary 10111, the other end of the sixth lead segment 211fb being located on the transition area of the sub-partition and connected to the wiring portion 3012 of an anode 301 through a transition hole 23.
[0207] It should be noted that the fourth lead 211d, the fifth lead 211e, and the sixth lead 211f in this embodiment of the present disclosure may be local segments located in the second partition B of a whole lead 211. The fourth lead 211d, the fifth lead 211e, and the sixth lead 211f may be connected to the lead 211 disposed on the same layer as other partitions. For example, the fifth extension segment of the fifth lead 211e may be integrally connected to the second extension segment of the second lead 211b and colinear, and the sixth extension segment 211fa of the sixth lead 211f may be integrally connected to the third extension segment of the third lead 211c and colinear.
[0208] In the sub-partition of the second partition B, such as Figure 19 As shown, the length of the sixth lead-out segment 211fb can gradually increase along the direction from the first boundary 10111 to the second boundary 10112.
[0209] For example, in a sub-region of the second region B, the center of the electrode portion 3011 of at least one anode 301 and the orthographic projection of the fourth extension segment (i.e., the fourth lead 211d) on the substrate 1 do not overlap. For example, such as Figure 16 and Figure 17 As shown, in the second partition B, the center of the electrode portion 3011 of each anode 301 and the orthographic projection of the fourth extension on the substrate 1 do not overlap, specifically as follows: Figure 16 The anode 301 is located at positions ①②③④⑤⑥⑦⑧ outlined in the middle frame.
[0210] For example, on a subpartition of partition B in the second partition: such as Figure 16 and Figure 17 As shown, at least one first anode 301a (e.g.) Figure 16 The electrode portion 3011 of the first anode 301a) at position ① outlined in the middle frame does not overlap with the orthographic projection of the fourth extension on the substrate 1; as Figure 16 and Figure 18 As shown, at least one first anode 301a (e.g.) Figure 16The bottom end of the electrode portion 3011 of the first anode 301a) at position ⑦ (highlighted in the center frame) overlaps with the orthographic projection of the fifth extension segment (i.e., the fifth lead 211e) closest to the fourth boundary 10114 on the substrate 1; as shown in the image. Figure 16 and Figure 18 As shown, at least one third anode 301c (e.g.) Figure 16 The top of the electrode portion 3011 of the third anode 301c) at position ⑤ (highlighted in the middle frame) overlaps with the orthographic projection of the fifth extension segment closest to the third boundary 10113 on the substrate 1.
[0211] Furthermore, in the second partition B: the width of the fourth extension segment, the width of the fifth extension segment, the width of the sixth extension segment 211fa, the width of the sixth lead-out segment 211fb, the spacing between adjacent fourth extension segments, the spacing between adjacent fifth extension segments, and the spacing between adjacent sixth extension segments 211fa are all taken in the range of 1μm to 3μm, for example: 1μm, 1.5μm, 2μm, 2.5μm, 3μm, etc.
[0212] It should be noted that the adjacent extension segment mentioned in this embodiment refers to the adjacent extension segment located between adjacent transition holes 23.
[0213] And in the second partition B: combined Figures 16 to 19 As shown, the number of fourth extension segments covered by the electrode portion 3011 of the first anode 301a is 0 or 1, while the number of fifth and sixth extension segments 211fa covered is 5 to 10; the number of fourth extension segments covered by the electrode portion 3011 of the second anode 301b can be 1 to 3, while the number of fifth extension segments covered is 4 to 6 and the number of sixth extension segments 211fa covered is 0 to 3; the number of fourth extension segments covered by the electrode portion 3011 of the third anode 301c can be 2 to 4, while the number of fifth and sixth extension segments 211fa covered is 6 to 8; the number of fourth extension segments covered by the electrode portion 3011 of the fourth anode 301d can be 1 to 3, while the number of fifth and sixth extension segments 211fa covered is 5 to 7.
[0214] It should be noted that, in the second partition B, the number of extension segments of the lead 211 covered by the electrode portion 3011 of each anode 301 is not limited to those mentioned above, and its specific number is related to the width of the extension segment and the spacing between adjacent extension segments.
[0215] In some embodiments of this disclosure, combined with Figures 20 to 23As shown, the transition layer 2 may also include a third transition section located on the third partition C. The third transition section may include multiple seventh leads 211g arranged on the same layer as the first lead 211a, multiple eighth leads 211h arranged on the same layer as the second lead 211b, and multiple ninth leads 211j arranged on the same layer as the third lead 211c.
[0216] On the third partition C, such as Figure 21 As shown, each seventh lead 211g may include a seventh extension segment extending in the column direction Y. The orthographic projection of the seventh extension segment on the substrate 1 is located on the pixel area and the transition area of the sub-division, and does not overlap with the orthographic projection of the transition hole 23 on the substrate 1; Figure 22 As shown, each eighth lead 211h may include an eighth extension segment 211ha extending in the row direction X, the eighth extension segment 211ha being located on the pixel area of the sub-partition, and at least a portion of the eighth lead 211h may also include an eighth lead-out segment 211hb extending in the column direction Y, one end of the eighth lead-out segment 211hb being located on the pixel area of the sub-partition and connected to the end of the seventh extension segment away from the first boundary 10111, the other end of the eighth lead-out segment 211hb being located on the transition area of the sub-partition and connected to the wiring portion 3012 of an anode 301 through a transition hole 23; as Figure 23 As shown, each ninth lead 211j may include a ninth extension segment extending in the column direction Y. The orthographic projection of the ninth extension segment on the substrate 1 is located on the pixel area and the transition area of the sub-division, and does not overlap with the orthographic projection of the transition hole 23 on the substrate 1.
[0217] It should be noted that the seventh lead 211g, the eighth lead 211h, and the ninth lead 211j in this embodiment of the present disclosure can be local segments located in the third partition C of a whole lead 211. The seventh lead 211g, the eighth lead 211h, and the ninth lead 211j can be connected to the leads 211 arranged in the same layer as other partitions. For example, the eighth extension segment 211ha of the eighth lead 211h can be integrally connected to the second extension segment of the fifth lead 211e and colinear, etc.
[0218] In addition, it should be noted that the density of the lead wires 211 in the third partition C is less than the density of the lead wires 211 in the first partition A and the second partition B.
[0219] For example, on the third partition C, the orthographic projections of a portion of the ninth extension and the seventh extension on the substrate 1 overlap.
[0220] For example, on a subpartition of the third partition C: such as Figure 22As shown, the length of the eighth lead-out segment 211hb gradually increases along the direction from the first boundary 10111 to the second boundary 10112; the center of the electrode portion 3011 of at least one anode 301 does not overlap with the orthographic projection of the seventh extension segment on the substrate 1.
[0221] For example, on a subpartition of the third partition C: such as Figures 20 to 21 As shown, at least one first anode 301a (e.g.) Figure 20 The electrode portion 3011 of the first anode 301a at position ① outlined in the middle, and at least one second anode 301b (e.g., Figure 20 The electrode portion 3011 of the second anode 301b (excluding the position highlighted in the box ②) and at least one fourth anode 301d (such as Figure 20 The electrode portion 3011 of the fourth anode 301d (located at position ④ in the frame) and the seventh extension (i.e., the seventh lead 211g) do not overlap on the substrate 1 in their orthogonal projections, and at least one third anode 301c (such as...) Figure 20 The electrode portion 3011 of the third anode 301c) at position ③ (highlighted in the middle frame) overlaps with the orthographic projection of the seventh extension on the substrate 1.
[0222] Furthermore, in the third partition C: the width of the seventh extension segment, the width of the eighth extension segment 211ha, the width of the eighth lead-out segment 211hb, the width of the ninth extension segment, the spacing between adjacent seventh extension segments, the spacing between adjacent eighth extension segments 211ha, and the spacing between adjacent ninth extension segments are all taken in the range of 1μm to 3μm, for example: 1μm, 1.5μm, 2μm, 2.5μm, 3μm, etc.
[0223] And on the third partition C: combined Figures 20 to 23 As shown, the number of seventh and ninth extension segments covered by the electrode portion 3011 of the first anode 301a can be 0 or 1, and the number of eighth extension segments 211ha covered can be 1 to 3; the number of seventh extension segments covered by the electrode portion 3011 of the second anode 301b can be 0 to 3, while the eighth extension segment 211ha and the ninth extension segment are not covered; the number of seventh extension segments covered by the electrode portion 3011 of the third anode 301c can be 2 to 4, while the number of eighth extension segments 211ha and the number of sixth extension segments 211fa covered can be 0 to 3; the number of seventh extension segments covered by the electrode portion 3011 of the fourth anode 301d can be 0 to 3, while the number of eighth extension segments 211ha covered can be 4 to 6, and the ninth extension segment is not covered.
[0224] It should be noted that, in the third partition C, the number of extension segments of the lead wire 211 covered by the electrode portion 3011 of each anode 301 is not limited to those mentioned above, and its specific number is related to the width of the extension segment and the spacing between adjacent extension segments.
[0225] In some embodiments of this disclosure, the transition layer 2 may further include a fourth transition section located on the fourth partition D, such as... Figure 24 As shown, this fourth adapter includes multiple tenth leads 211k disposed on the same layer as the first lead 211a; each tenth lead 211k includes a tenth extension segment 211ka extending in the row direction X and a tenth lead-out segment 211kb extending in the column direction Y. The tenth extension segment 211ka is located on the pixel area of the sub-partition, one end of the tenth lead-out segment 211kb is located on the pixel area of the sub-partition and connected to the end of the seventh extension segment away from the first boundary 10111, and the other end of the tenth lead-out segment 211kb is located on the adapter area of the sub-partition and connected to the wiring portion 3012 of an anode 301 through an adapter hole 23.
[0226] For example, in the sub-partition of the fourth partition D: along the direction from the first boundary 10111 to the second boundary 10112, the number of tenth extension segments 211ka gradually decreases, and the length of the tenth lead-out segment 211kb gradually increases; along the direction from the third boundary 10113 to the fourth boundary 10114, the length of the tenth extension segment 211ka gradually decreases.
[0227] It should be noted that the tenth lead 211k in this embodiment of the present disclosure may be a partial line segment located in the fourth partition D of a whole lead 211, wherein the tenth lead 211k may be connected to the lead 211 arranged in the same layer as other partitions.
[0228] In addition, it should be noted that the arrangement density of the upper lead 211 in the fourth partition D is less than that of the upper lead 211 in the third partition C.
[0229] For example, on a sub-partition of the fourth partition D: at least one first anode 301a ( Figure 24 The top of the electrode portion 3011 of the first anode 301a) at position ③ (highlighted in the center frame) overlaps with the orth projection of the tenth extension 211ka closest to the third boundary 10113 onto the substrate 1; at least one second anode 301b ( Figure 24 The electrode portion 3011 of the second anode 301b at positions ① and ④ outlined in the middle frame does not overlap with the orth projection of the tenth lead 211kb onto the substrate 1; at least one third anode 301c ( Figure 24 The electrode portion 3011 of the third anode 301c) at position ② (highlighted in the middle frame) overlaps with the orth projection of the tenth extension segment 211ka and the tenth lead-out segment 211kb on the substrate 1.
[0230] In addition, on the fourth partition D: the width of the tenth extension segment 211ka, the width of the tenth lead-out segment 211kb, and the spacing between adjacent tenth extension segments 211ka are all taken in the range of 1μm to 3μm, for example: 1μm, 1.5μm, 2μm, 2.5μm, 3μm, etc.
[0231] Furthermore, in the fourth section D: the number of tenth extension segments 211ka covered by the electrode portion 3011 of the first anode 301a can be 0 or 1, while the number of eighth extension segments 211ha covered can be 1 to 5; the number of tenth extension segments 211ka covered by the electrode portion 3011 of the second anode 301b can be 0 to 3; the number of tenth extension segments 211ka covered by the electrode portion 3011 of the third anode 301c can be 1 to 5; and the tenth extension segments 211ka not covered by the electrode portion 3011 of the fourth anode 301d.
[0232] It should be noted that, in the fourth section D, the number of extension segments of the lead wire 211 covered by the electrode portion 3011 of each anode 301 is not limited to those mentioned above, and its specific number is related to the width of the extension segment and the spacing between adjacent extension segments.
[0233] In some embodiments, the transition layer 2 may further include a fifth transition section located in the fifth partition E, such as... Figures 25 to 32 As shown, the fifth transition section includes multiple second wiring groups arranged in the column direction Y, each second wiring group corresponding to a sub-partition of the fifth partition E; the second wiring group includes an eleventh lead 211r arranged on the same layer as the first lead 211a, a twelfth lead 211t arranged on the same layer as the second lead 211b, and a thirteenth lead 211p arranged on the same layer as the third lead 211c.
[0234] The eleventh lead 211r may include an eleventh extension segment 211ra extending in the row direction X and an eleventh lead-out segment 211rb extending in the column direction Y. The eleventh extension segment 211ra is located on the pixel area of the sub-partition. One end of the eleventh lead-out segment 211rb is located on the pixel area of the sub-partition and connected to the end of the eleventh extension segment 211ra away from the first boundary 10111. The other end is located on the transition area of the sub-partition and connected to the wiring portion 3012 of an anode 301 through a transition hole 23. The twelfth lead 211t includes a twelfth extension segment extending in the row direction X. Located on the pixel area of the sub-partition; the thirteenth lead 211p includes a thirteenth extension segment 211pa extending in the row direction X, the thirteenth extension segment 211pa being located on the pixel area of the sub-partition and partially away from the third boundary 10113. The thirteenth lead 211 also includes a thirteenth lead segment 211pb extending in the column direction Y. One end of the thirteenth lead segment 211pb is located on the pixel area of the sub-partition and connected to the end of the thirteenth extension segment 211pa away from the first boundary 10111. Its other end is located on the transition area of the sub-partition and connected to the wiring portion 3012 of an anode 301 through a transition hole 23.
[0235] Specifically, on each subpartition of the fifth partition E: such as Figure 27 and Figure 31 As shown, the lengths of each twelfth extension segment (i.e., the twelfth lead 211t) are equal and their ends are aligned; in the direction of the fifth partition E along the third boundary 10113 to the fourth boundary 10114: the length of the twelfth extension segment on each sub-partition gradually increases, the section of the twelfth extension segment on each sub-partition near the second boundary 10112 is aligned, and the number of adapter holes 23 and anodes 301 on each sub-partition gradually increases.
[0236] For example, on a subpartition of partition E in the fifth partition: as Figure 26 and Figure 30 As shown, along the direction from the first boundary 10111 to the second boundary 10112, the number of eleventh extension segments 211ra gradually decreases, and the length of the eleventh lead-out segment 211rb gradually increases; and along the direction from the third boundary 10113 to the fourth boundary 10114, the length of the eleventh extension segment 211ra gradually decreases.
[0237] In addition, such as Figure 28 and Figure 32As shown, in each of the thirteenth leads 211p with a thirteenth lead segment 211pb on the sub-partition of the fifth partition E: along the direction from the first boundary 10111 to the second boundary 10112, the number of thirteenth extension segments 211pa gradually decreases, and the length of the thirteenth lead segment 211pb gradually increases; and along the direction from the third boundary 10113 to the fourth boundary 10114, the length of the thirteenth extension segment 211pa gradually decreases.
[0238] It should be noted that the eleventh lead 211r, the twelfth lead 211t, and the thirteenth lead 211p in this embodiment of the present disclosure can be local segments located in the fourth partition D of a whole lead 211. The eleventh lead 211r, the twelfth lead 211t, and the thirteenth lead 211p can be connected to the leads 211 arranged in the same layer as other partitions.
[0239] In addition, it should be noted that the density of the upper lead 211 in the fifth partition E is less than the density of the upper lead 211 in the first partition A.
[0240] For example, on a sub-partition of the fifth partition E: at least one first anode 301a ( Figure 25 The first anode 301a at positions ①, ②, and ③ outlined in the middle frame and Figure 29 The center of the electrode portion 3011 of the first anode 301a) at positions ① and ③ outlined in the middle frame is located on the side of the center line of the pixel area near the fourth boundary 10114.
[0241] For example, on a sub-partition of the fifth partition E: at least one third anode 301c ( Figure 25 The third anode 301c at positions ④, ⑤, and ⑥ outlined in the middle frame and Figure 29 The center of the electrode portion 3011 of the third anode 301c) at position ④ (highlighted in the middle frame) is located on the side of the center line of the pixel area near the third boundary 10113.
[0242] For example, on a subpartition of partition E in the fifth partition: (Combined) Figure 25 , Figure 26 and Figure 29 and Figure 30 As shown, the electrode portion 3011 of at least one second anode 301b and the eleventh lead-out segment 211rb do not overlap in their orthogonal projections on the substrate 1.
[0243] For example, on a sub-partition of the fifth partition E: at least one third anode 301c ( Figure 29 The electrode portion 3011 of the third anode 301c) at positions ⑤ and ⑥ outlined in the middle frame and the orthogonal projection of the eleventh lead-out segment 211rb on the substrate 1 do not overlap.
[0244] In the fifth partition E: the widths of the eleventh extension 211ra, the eleventh lead-out 211rb, the twelfth extension, the thirteenth extension 211pa, the thirteenth lead-out 211pb, the spacing between adjacent eleventh extensions 211ra, the spacing between adjacent twelfth extensions, and the spacing between adjacent thirteenth extensions 211pa are all taken in the range of 1μm to 3μm, for example: 1μm, 1.5μm, 2μm, 2.5μm, 3μm, etc.
[0245] Furthermore, in the fifth section E: the number of eleventh extension segments 211ra covered by the electrode portion 3011 of the first anode 301a is 0 to 5, and the number of twelfth extension segments and thirteenth extension segments 211pa covered can be 6 to 10; the number of eleventh extension segments 211ra covered by the electrode portion 3011 of the second anode 301b is 0, and the number of twelfth extension segments and thirteenth extension segments 211pa covered can be 2 to 6; the number of eleventh extension segments 211ra covered by the electrode portion 3011 of the third anode 301c can be 0 to 3, and the number of twelfth extension segments and thirteenth extension segments 211pa covered can be 6 to 8; the number of first extension segments 211aa covered by the electrode portion 3011 of the fourth anode 301d is 0 to 5, and the number of second extension segments and third extension segments covered can be 4 to 6.
[0246] It should be noted that, in the fifth section E, the number of extension segments of the lead wire 211 covered by the electrode portion 3011 of each anode 301 is not limited to those mentioned above, and its specific number is related to the width of the extension segment and the spacing between adjacent extension segments.
[0247] Based on the aforementioned layout relationship between the upper leads 211 and the anode 301 of the five partitions, it can be seen that the number and arrangement of the upper leads 211 in different partitions may be different. Therefore, this disclosure adopts fine-tuning of the position of the anode 301 to balance the parasitic capacitance of the lead 211, thereby alleviating the Mura phenomenon. Specifically, the methods used to adjust the position of the anode 301 in each partition are mainly as follows:
[0248] The first method is to move the anode 301 to the area where the lead wire 211 is sparser when there are different densities of lead wire 211 in the sub-partitions of the partition.
[0249] The second method: For the anode 301 with a lead 211 extending in the column direction Y below, the position of the anode 301 can be adjusted in the row direction X to avoid the lead 211 extending in the column direction Y.
[0250] The third approach is to ensure that the anode 301 and the lead 211 are in a state of minimal or no overlap, or to ensure that the overlapping area of the lead 211 with the anode 301 is consistent.
[0251] Specifically, the actual movement process can be carried out by calculating the overlapping area or using simulation software to extract the capacitance and balance the parasitic capacitance of each region.
[0252] In some embodiments of this disclosure, the leads 211 on the first transparent display area 1011a and the leads 211 on the second transparent display area 1011b can be symmetrically arranged about the column direction Y; the leads 211 on the third transparent display area 1011c and the leads 211 on the fourth transparent display area 1011d are symmetrically arranged about the column direction Y; the leads 211 on the first transparent display area 1011a and the leads 211 on the third transparent display area 1011c are symmetrically arranged about the row direction X; and the leads 211 on the second transparent display area 1011b and the leads 211 on the fourth transparent display area 1011d are symmetrically arranged about the row direction X. This can reduce the design difficulty. However, it is worth noting that the leads 211 on each transparent display area 1011 can also be symmetrically arranged in some sections, and the leads 211 in other sections can be arranged in a translated manner, or the arrangement of the leads 211 in each transparent display area 1011 can also be different, depending on the specific situation.
[0253] This disclosure also provides a terminal device, such as... Figure 33 As shown, the terminal device may include a display panel 100 and a camera device 200, wherein:
[0254] The display panel 100 can be any of the display panels described in the above embodiments. Its structure and beneficial effects can be referred to the embodiments of the display panel described above, and will not be repeated here.
[0255] The camera device 200 can be located on the backlight side of the display panel 100, i.e., the side facing away from the light emission direction. For example, if the OLED light-emitting device 30 of the display panel 100 is a top-emitting structure, i.e., it emits light in a direction away from the substrate 1, then the camera device 200 can be located on the side of the substrate 1 away from the light-emitting layer 3, and the camera device 200 can be directly opposite the light-transmitting area 101 for capturing images through the light-transmitting area 101. If the OLED light-emitting device 30 of the display panel 100 is a bottom-emitting structure, then the camera device 200 can be located on the side of the light-emitting layer 3 away from the substrate 1. The camera device 200 may include a lens and a photoelectric sensor, etc. The specific structure of the camera device 200 is not specifically limited here, as long as it can capture images.
[0256] The terminal devices disclosed herein can be mobile phones, tablets, televisions, or other terminal devices with display and shooting functions, and will not be listed here one by one.
[0257] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the appended claims.
Claims
1. A display panel, comprising a substrate substrate, a transfer layer formed on the substrate substrate, and an anode layer located on a side of the transfer layer away from the substrate substrate; wherein, the substrate substrate has a light-transmitting region, the light-transmitting region comprises at least one transparent display region, the transparent display region has a first boundary and a second boundary opposite in a row direction, and a third boundary and a fourth boundary opposite in a column direction; wherein the transparent display region comprises at least one sub-region, the sub-region comprises a plurality of sub-sub-regions arranged in the column direction, the sub-sub-region comprises a row of pixel regions and a row of transfer regions arranged in sequence in the column direction, the transfer region is provided with a transfer hole, and the at least one sub-region comprises a first sub-region; the transfer layer comprises a plurality of lead lines, and part of the lead lines are located on the first sub-region; on the sub-sub-region of the first sub-region: the number of the lead lines gradually decreases along a direction from the first boundary to the second boundary, and the size of the lead lines in the row direction gradually shortens along a direction from the third boundary to the fourth boundary; the anode layer comprises a plurality of anodes, the anode has an electrode part and a wiring part connected to each other, at least part of the electrode part is located in the pixel region, at least part of the wiring part is located in the transfer region and connected to part of the lead lines located in the transfer region through the transfer hole; the plurality of anodes comprises at least a plurality of first anodes, the plurality of first anodes comprises at least a first reference anode and a first offset anode located on the sub-sub-region of the first sub-region and arranged at intervals in the row direction, and in the column direction, the center of the electrode part of the first offset anode is located on a side of the center of the electrode part of the first reference anode close to the third boundary.
2. The display panel of claim 1, wherein, the first sub-region has N rows of the sub-sub-regions, N is a positive integer greater than 1; on the pixel region of the nth row of the sub-sub-regions of the first sub-region, the first offset anode is located on a side of the first reference anode close to the second boundary; on the pixel region of the (n+1)th row of the sub-sub-regions of the first sub-region, the first offset anode is located on a side of the first reference anode close to the first boundary; in the row direction, the first reference anode on the pixel region of the nth row of the sub-sub-regions of the first sub-region is located on a side of the first offset anode on the pixel region of the (n+1)th row of the sub-sub-regions of the first sub-region close to the first boundary; in the row direction, the first offset anode on the pixel region of the nth row of the sub-sub-regions of the first sub-region is located between the first offset anode and the first reference anode on the pixel region of the (n+1)th row of the sub-sub-regions of the first sub-region; wherein, 1≤n 3.The display panel of claim 1, wherein, the plurality of anodes comprises a plurality of anode groups, the anode group comprises the first anode, a second anode, a third anode and a fourth anode; the second anode and the fourth anode correspond to the same light-emitting color, and the first anode, the second anode and the third anode correspond to different light-emitting colors. A plurality of adapter hole groups are arranged on the adapter area of the sub-region in the row direction; The adapter hole groups include four adapter holes arranged in the row direction, and are defined as a first adapter hole corresponding to the first anode, a second adapter hole corresponding to the second anode, a third adapter hole corresponding to the third anode, and a fourth adapter hole corresponding to the fourth anode.
4. The display panel of claim 3, wherein, In the anode group: The wiring parts in the first anode, the second anode, the third anode and the fourth anode correspond to the adapter holes on the same adapter area one by one; and At least 30% of the electrode parts in the first anode, the second anode, the third anode are located on the pixel area of the same row of the sub-region, and at least 30% of the electrode part of the fourth anode is located on the pixel area of the adjacent row of the sub-region.
5. The display panel of claim 3, wherein, In the adapter hole groups: the first adapter hole, the second adapter hole, the third adapter hole and the fourth adapter hole are arranged in the row direction in sequence, or the third adapter hole, the fourth adapter hole, the first adapter hole and the second adapter hole are arranged in the row direction in sequence; In the two adjacent adapter hole groups in the column direction: the first adapter hole of one and the third adapter hole of the other are located in the same column, and the second adapter hole of one and the fourth adapter hole of the other are located in the same column.
6. The display panel of claim 3, wherein, The adapter layer includes a first adapter part located on the first region, and the first adapter part includes a plurality of first wiring groups arranged in the column direction, each of which corresponds to the sub-region of the first region; Wherein, the first wiring group includes a first lead line, a second lead line and a third lead line which are sequentially distributed and insulated from each other in the direction from the substrate to the anode layer; wherein: The first lead line includes a first extension segment extending in the row direction and a first lead-out segment extending in the column direction, the first extension segment is located on the pixel area of the sub-region, one end of the first lead-out segment is located on the pixel area of the sub-region and connected with the other end of the first extension segment away from the first boundary, and the other end of the first lead-out segment is located on the adapter area of the sub-region and connected with the wiring part of the anode through the adapter hole; and / or, The second lead line includes a second extension segment extending in the row direction, and the second extension segment is located on the pixel area of the sub-region; and / or, The third lead line includes a third extension segment extending in the row direction, and the third extension segment is located on the pixel area of the sub-region.
7. The display panel of claim 6, wherein, On the sub-region of the first region: In the direction from the first boundary to the second boundary, the number of first extension segments gradually decreases, and the length of the first lead-out segment gradually increases; and in the direction from the third boundary to the fourth boundary, the length of the first extension segment gradually shortens; and / or, The number of the second extension segments and the third extension segments is constant in the direction from the first border to the second border.
8. The display panel of claim 6, wherein, On the sub-region of the first region: The overlapping area of at least one of the first extension segments and the third extension segments on the substrate is larger than the overlapping area of the first extension segment and the second extension segment on the substrate.
9. The display panel of claim 6, wherein, The pixel region of the sub-region has a center line extending in the row direction, the center line has a first distance to the extension segment of the first extension segment, the second extension segment and the third extension segment of the first wire group closest to the third border, the center line has a second distance to the extension segment of the first extension segment, the second extension segment and the third extension segment of the first wire group farthest from the third border, the first distance and the second distance are in the size in the column direction, and the first distance and the second distance are equal; On the sub-region of the first region, the center of the electrode part of the first offset anode is located on the side of the center line of the pixel region where the third border is close.
10. The display panel of claim 9, wherein, On the sub-region of the first region, the center of the electrode part of at least one of the first reference anodes is located on the center line of the pixel region.
11. The display panel of claim 6, wherein, On the sub-region of the first region, the top end of at least part of the electrode part of the first offset anode overlaps with the orthogonal projection of the extension segment of the first extension segment, the second extension segment and the third extension segment of the first wire group closest to the third border on the substrate.
12. The display panel of claim 6, wherein, On the first region: The orthogonal projection of the electrode part of at least one of the second anodes on the substrate does not overlap with the orthogonal projection of the first lead-out segment on the substrate; and / or, The orthogonal projection of the electrode part of at least one of the second anodes on the substrate overlaps with the orthogonal projection of the first lead-out segment on the substrate.
13. The display panel of claim 6, wherein, On the first region: The bottom end of the electrode part of at least one of the third anodes overlaps with the orthogonal projection of the extension segment of the first extension segment, the second extension segment and the third extension segment of the first wire group farthest from the third border on the substrate; and / or, The orthogonal projection of the electrode part of at least one of the third anodes on the substrate does not overlap with the orthogonal projection of the first lead-out segment on the substrate.
14. The display panel of claim 6, wherein, On the first region: The bottom end of the electrode part of at least one of the third anodes does not overlap with the orthogonal projection of the extension segment of the first extension segment, the second extension segment and the third extension segment of the first wire group farthest from the third border on the substrate; The orthogonal projection of the electrode part of at least one of the third anodes on the substrate overlaps with the orthogonal projection of the first lead-out segment on the substrate; and / or, The orthogonal projection of the electrode part of each of the fourth anodes on the substrate does not overlap with the orthogonal projection of the first lead-out segment on the substrate.
15. The display panel of claim 6, wherein, The at least one sub-region of the transparent display region further comprises a second sub-region located on a side of the first sub-region close to the second boundary; The adapter layer further comprises a second adapter portion located on the second sub-region, the second adapter portion comprising a plurality of fourth lead lines arranged in the same layer as the first lead lines, a plurality of fifth lead lines arranged in the same layer as the second lead lines, and a plurality of sixth lead lines arranged in the same layer as the third lead lines; wherein: The fourth lead lines comprise fourth extension segments extending in the column direction, a projection of the fourth extension segments on the substrate substrate is located on the pixel region and the adapter region of the sub-region, and there is no overlap between the projection of the adapter hole on the substrate substrate and the fourth extension segments; and / or, The fifth lead lines comprise fifth extension segments extending in the row direction, the fifth extension segments being located on the pixel region of the sub-region; and / or, The sixth lead lines comprise sixth extension segments extending in the row direction, the sixth extension segments being located on the pixel region of the sub-region, and at least part of the sixth lead lines further comprise sixth lead-out segments extending in the column direction, one end of the sixth lead-out segments being located on the pixel region of the sub-region and connected to an end of the sixth extension segments away from the first boundary, and the other end of the sixth lead-out segments being located on the adapter region of the sub-region and connected to a wiring portion of the anode through an adapter hole.
16. The display panel of claim 15, wherein, On the sub-region of the second sub-region: In a direction from the first boundary to the second boundary, the length of the sixth lead-out segments gradually increases; and / or, The center of the electrode portion of at least one of the anodes does not overlap with the projection of the fourth extension segments on the substrate substrate.
17. The display panel of claim 15, wherein, On the sub-region of the second sub-region: The electrode portion of at least one of the first anodes does not overlap with the projection of the fourth extension segments on the substrate substrate; and / or, The bottom end of the electrode portion of at least one of the first anodes overlaps with the projection of the fifth extension segment closest to the fourth boundary on the substrate substrate; and / or, The top end of the electrode portion of at least one of the third anodes overlaps with the projection of the fifth extension segment closest to the third boundary on the substrate substrate.
18. The display panel of claim 15, wherein: The at least one sub-region of the transparent display region further comprises a third sub-region located on a side of the second sub-region away from the first sub-region; The adapter layer further comprises a third adapter portion located on the third sub-region, the third adapter portion comprising a plurality of seventh lead lines arranged in the same layer as the first lead lines, a plurality of eighth lead lines arranged in the same layer as the second lead lines, and a plurality of ninth lead lines arranged in the same layer as the third lead lines; wherein: The seventh lead lines comprise seventh extension segments extending in the column direction, a projection of the seventh extension segments on the substrate substrate is located on the pixel region and the adapter region of the sub-region, and there is no overlap between the projection of the adapter hole on the substrate substrate and the seventh extension segments; and / or, The eighth lead line comprises an eighth extending segment extending in the row direction, the eighth extending segment being located on the pixel region of the sub-region, and at least part of the eighth lead line further comprises an eighth leading-out segment extending in the column direction, one end of the eighth leading-out segment being located on the pixel region of the sub-region and connected with one end of the seventh extending segment away from the first boundary, the other end of the eighth leading-out segment being located on the transition region of the sub-region and connected with the wiring part of one anode through one transition hole; and / or, The ninth lead line comprises a ninth extending segment extending in the column direction, the orthogonal projection of the ninth extending segment on the substrate substrate being located on the pixel region and the transition region of the sub-region, and there is no intersection between the orthogonal projection of the transition hole on the substrate substrate and the ninth extending segment.
19. The display panel of claim 18, wherein, Part of the ninth extending segment intersects with the orthogonal projection of the seventh extending segment on the substrate substrate.
20. The display panel of claim 18, wherein, On the sub-region of the third region: In the direction from the first boundary to the second boundary, the length of the eighth leading-out segment gradually increases; and / or, The center of the electrode part of at least one anode does not intersect with the orthogonal projection of the seventh extending segment on the substrate substrate.
21. The display panel of claim 18, wherein, On the sub-region of the third region: The electrode part of at least one first anode, the electrode part of at least one second anode and the electrode part of at least one fourth anode do not intersect with the orthogonal projection of the seventh extending segment on the substrate substrate.
22. The display panel of claim 18, wherein, The at least one region of the transparent display region further comprises a fourth region, the fourth region being located on the side of the third region away from the second region; The transition layer further comprises a fourth transition part located on the fourth region, the fourth transition part comprising a plurality of tenth lead lines arranged in the same layer as the first lead line; The tenth lead line comprises a tenth extending segment extending in the row direction and a tenth leading-out segment extending in the column direction, the tenth extending segment being located on the pixel region of the sub-region, one end of the tenth leading-out segment being located on the pixel region of the sub-region and connected with one end of the seventh extending segment away from the first boundary, the other end of the tenth leading-out segment being located on the transition region of the sub-region and connected with the wiring part of one anode through one transition hole.
23. The display panel of claim 22, wherein, On the sub-region of the fourth region: In the direction from the first boundary to the second boundary, the number of the tenth extending segments gradually decreases, and the length of the tenth leading-out segment gradually increases; In the direction from the third boundary to the fourth boundary, the length of the tenth extending segment gradually decreases; The top end of the electrode part of at least one first anode intersects with the orthogonal projection of the tenth extending segment closest to the third boundary on the substrate substrate; The electrode part of at least one second anode does not intersect with the orthogonal projection of the tenth leading-out segment on the substrate substrate.
24. The display panel of claim 22, wherein, The first region, the second region, the third region and the fourth region are rectangular regions. 25.The display panel of claim 24, wherein, the at least one sub-region of the transparent display region further comprises a fifth sub-region, the fifth sub-region is located at a side of the first sub-region, the second sub-region, the third sub-region and the fourth sub-region close to the third boundary; the transfer layer further comprises a fifth transfer part located at the fifth sub-region, the fifth transfer part comprises a plurality of second wire groups arranged in the column direction, each of the second wire groups corresponds to one of the sub-regions of the fifth sub-region; the second wire group comprises an eleventh lead wire arranged in the same layer as the first lead wire, a twelfth lead wire arranged in the same layer as the second lead wire and a thirteenth lead wire arranged in the same layer as the third lead wire; wherein: the eleventh lead wire comprises an eleventh extension segment extending in the row direction and an eleventh lead-out segment extending in the column direction, the eleventh extension segment is located on the pixel region of the sub-region, one end of the eleventh lead-out segment is located on the pixel region of the sub-region and connected with one end of the eleventh extension segment away from the first boundary, the other end of the eleventh lead-out segment is located on the transfer region of the sub-region and connected with the wiring part of one of the anodes through one of the transfer holes; and / or, the twelfth lead wire comprises a twelfth extension segment extending in the row direction, the twelfth extension segment is located on the pixel region of the sub-region; and / or, the thirteenth lead wire comprises a thirteenth extension segment extending in the row direction, the thirteenth extension segment is located on the pixel region of the sub-region, and part of the thirteenth lead wire away from the third boundary further comprises a thirteenth lead-out segment extending in the column direction, one end of the thirteenth lead-out segment is located on the pixel region of the sub-region and connected with one end of the thirteenth extension segment away from the first boundary, the other end of the thirteenth lead-out segment is located on the transfer region of the sub-region and connected with the wiring part of one of the anodes through one of the transfer holes; wherein, on each of the sub-regions of the fifth sub-region: the lengths of the twelfth extension segments are equal and the two ends are aligned; in the direction from the third boundary to the fourth boundary of the fifth sub-region: the lengths of the twelfth extension segments on the sub-regions gradually increase, the twelfth extension segments on the sub-regions close to the second boundary are arranged in alignment, and the number of the transfer holes and the anodes on each of the sub-regions gradually increases.
26. The display panel of claim 25, wherein, on the sub-regions of the fifth sub-region: in the direction from the first boundary to the second boundary, the number of the eleventh extension segments gradually decreases and the lengths of the eleventh lead-out segments gradually increase; and in the direction from the third boundary to the fourth boundary, the lengths of the eleventh extension segments gradually decrease.
27. The display panel of claim 25, wherein, on the sub-regions of the fifth sub-region: the center of the electrode part of at least one of the first anodes is located at a side of the center line of the pixel region close to the fourth boundary; and / or, the center of the electrode part of at least one of the third anodes is located at a side of the center line of the pixel region close to the third boundary.
28. The display panel of claim 25, wherein, on the sub-regions of the fifth sub-region: A normal projection of the electrode portion of at least one of the second anodes on the substrate substrate does not overlap with the eleventh lead-out section; and / or, A normal projection of the electrode portion of at least one of the third anodes on the substrate substrate does not overlap with the eleventh lead-out section.
29. The display panel of any one of claims 1-28, wherein, The transparent display regions are provided four, which are a first transparent display region, a second transparent display region, a third transparent display, and a fourth transparent display region, the first transparent display region and the second transparent display region are sequentially arranged in the row direction, the third transparent display region and the fourth transparent display region are sequentially arranged in the row direction, the first transparent display region and the third transparent display region are sequentially arranged in the column direction, and the second transparent display region and the fourth transparent display region are sequentially arranged in the column direction, wherein: The lead lines on the first transparent display region and the lead lines on the second transparent display region are symmetrically arranged with respect to the column direction; and / or, The lead lines on the third transparent display region and the lead lines on the fourth transparent display region are symmetrically arranged with respect to the column direction; and / or, The lead lines on the first transparent display region and the lead lines on the third transparent display region are symmetrically arranged with respect to the row direction; and / or, The lead lines on the second transparent display region and the lead lines on the fourth transparent display region are symmetrically arranged with respect to the row direction.
30. A terminal device, comprising: A display panel according to any one of claims 1-29. A display panel according to any one of claims 1-29.
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