Pixel circuit, pixel driving method, light-emitting substrate, and light-emitting device

Abstract

A pixel circuit, a pixel driving method, a light-emitting substrate and a light-emitting device, the pixel circuit comprising a first driving circuit (21), a first light-emitting device (22), a second light-emitting device (23) and a second driving circuit (24) connected in series; the first driving circuit (21) comprises a first driving transistor (DT1), the source of the first driving transistor (DT1) is connected to a first power supply end, and the drain of the first driving transistor (DT1) is connected to the first electrode of the first light-emitting device (22); the second driving circuit (24) comprises a second driving transistor (DT2), the source of the second driving transistor (DT2) is connected to a second power supply end (26), and the drain of the second driving transistor (DT2) is connected to the first electrode of the second light-emitting device (23); the second electrode of the first light-emitting device (22) is connected to the second electrode of the second light-emitting device (23); wherein the channel type of the first driving transistor (DT1) is different from that of the second driving transistor (DT2).

Description

Technical Field

[0001] This disclosure relates to the field of optoelectronic technology, and in particular to a pixel circuit, a pixel driving method, a light-emitting substrate, and a light-emitting device. Background Technology

[0002] For light-emitting substrates with active-matrix organic light-emitting diode (AMOLED) or active-matrix quantum dot light-emitting diode (AMQLED) structures, in order to ensure the brightness uniformity among each light-emitting pixel, it is necessary to determine the driving voltage of each pixel according to the maximum brightness of each pixel, and at the same time, it is also necessary to ensure that the driving transistor of each light-emitting pixel is kept in the saturation region for output. Summary of the Invention

[0003] This disclosure provides a pixel circuit, including a first driving circuit, a first light-emitting device, a second light-emitting device, and a second driving circuit connected in series.

[0004] The first driving circuit includes a first driving transistor, the source of the first driving transistor is connected to a first power supply terminal, and the drain of the first driving transistor is connected to a first electrode of the first light-emitting device.

[0005] The second driving circuit includes a second driving transistor, the source of which is connected to a second power supply terminal, and the drain of which is connected to a first terminal of the second light-emitting device.

[0006] The second electrode of the first light-emitting device is connected to the second electrode of the second light-emitting device;

[0007] The first driving transistor and the second driving transistor have different channel types.

[0008] In one optional implementation, the first driving transistor has a P-type channel, the second driving transistor has an N-type channel, the first electrode of the first light-emitting device is the anode, the first electrode of the second light-emitting device is the cathode, and the voltage input to the first power supply terminal is greater than the voltage input to the second power supply terminal; or,

[0009] The first driving transistor has an N-type channel, the second driving transistor has a P-type channel, the first electrode of the first light-emitting device is the cathode, the first electrode of the second light-emitting device is the anode, and the voltage input to the first power supply terminal is less than the voltage input to the second power supply terminal.

[0010] In one alternative implementation, the pixel circuit further includes:

[0011] A current-draining structure is connected to a first node, which is connected to the second electrode of the first light-emitting device and the second light-emitting device, respectively, to make the difference between the current on the first light-emitting device and the current on the second light-emitting device equal to the current on the current-draining structure.

[0012] In one alternative implementation, the bleed structure includes a first transistor and a second transistor of the same channel type;

[0013] The first terminal of the first transistor is connected to the first voltage input terminal, and the second terminal of the first transistor and the gate of the first transistor are respectively connected to the first node;

[0014] The first terminal of the second transistor is connected to the first node, and the second terminal and the gate of the second transistor are respectively connected to the second voltage input terminal.

[0015] In one optional implementation, the first driving circuit includes:

[0016] A first capacitor, wherein the first terminal of the first capacitor is connected to the first power supply terminal, and the second terminal of the first capacitor is connected to the gate of the first driving transistor;

[0017] The first reset module is used to transmit the signal from the first initialization voltage terminal to the gate of the first driving transistor and the second terminal of the first capacitor during the first reset phase.

[0018] The first write module is used to write the data signal of the first data write terminal to the source of the first driving transistor during the first write stage;

[0019] The first compensation module is used to connect the drain of the first driving transistor to the gate of the first driving transistor during the first writing phase.

[0020] The first light-emitting control module is used to disconnect the source of the first driving transistor from the first power supply terminal and disconnect the drain of the first driving transistor from the first terminal of the first light-emitting device during the first reset phase and the first write phase, and to connect the source of the first driving transistor to the first power supply terminal and connect the drain of the first driving transistor to the first terminal of the first light-emitting device during the light-emitting phase.

[0021] The second driving circuit includes:

[0022] The second capacitor has its first terminal connected to the second power supply terminal and its second terminal connected to the gate of the second driving transistor.

[0023] The second reset module is used to transmit the signal from the second initialization voltage terminal to the gate of the second driving transistor and the second terminal of the second capacitor during the second reset phase.

[0024] The second write module is used to write the data signal of the second data write terminal to the source of the second drive transistor during the second write stage;

[0025] The second compensation module is used to connect the drain of the second driving transistor to the gate of the second driving transistor during the second writing phase.

[0026] The second light-emitting control module is used to disconnect the source of the second driving transistor from the second power supply terminal and disconnect the drain of the second driving transistor from the first terminal of the second light-emitting device during the second reset phase and the second write phase, and to connect the source of the second driving transistor to the second power supply terminal and connect the drain of the second driving transistor to the first terminal of the second light-emitting device during the light-emitting phase.

[0027] This disclosure provides a light-emitting substrate, including the pixel circuit described in any embodiment.

[0028] In one alternative implementation, the light-emitting substrate includes a plurality of pixel units, wherein the first light-emitting device and the second light-emitting device are located within the same pixel unit.

[0029] In one alternative implementation, within the same pixel unit, the pixel circuit further includes a third light-emitting device and a third driving circuit;

[0030] The third driving circuit includes a third driving transistor, the source of which is connected to the second power supply terminal, and the drain of which is connected to the first terminal of the third light-emitting device.

[0031] The second electrode of the third light-emitting device is connected to the second electrode of the first light-emitting device and the second electrode of the second light-emitting device, respectively.

[0032] The third driving transistor has the same channel type as the second driving transistor.

[0033] In one alternative implementation, the first light-emitting device is a light-emitting device capable of emitting blue light, the second light-emitting device is a light-emitting device capable of emitting green light, and the third light-emitting device is a light-emitting device capable of emitting red light.

[0034] In one optional implementation, the plurality of pixel units include a first pixel unit and / or a second pixel unit, wherein both the first pixel unit and the second pixel unit include the pixel circuit.

[0035] Within the first pixel unit, the channel type of the first driving transistor is P-type, the channel type of the second driving transistor and the third driving transistor is N-type, the first electrode of the first light-emitting device is the anode, the first electrodes of the second light-emitting device and the third light-emitting device are the cathodes, and the voltage input to the first power supply terminal is greater than the voltage input to the second power supply terminal.

[0036] Within the second pixel unit, the channel type of the first driving transistor is N-type, the channel type of the second driving transistor and the third driving transistor is P-type, the first electrode of the first light-emitting device is the cathode, the first electrodes of the second light-emitting device and the third light-emitting device are the anode, and the voltage input to the first power supply terminal is less than the voltage input to the second power supply terminal.

[0037] In an optional implementation, when the plurality of pixel units include the first pixel unit and the second pixel unit, the first pixel unit and the second pixel unit satisfy any one of the following conditions:

[0038] The first pixel unit and the second pixel unit are located in different scan lines in two adjacent scan lines;

[0039] The first pixel unit and the second pixel unit are located in different data columns in two adjacent data columns;

[0040] At least one of the pixel units adjacent to the first pixel unit is the second pixel unit, and at least one of the pixel units adjacent to the second pixel unit is the first pixel unit.

[0041] In one optional implementation, the light-emitting substrate includes a plurality of pixel units, the plurality of pixel units including a third pixel unit and a fourth pixel unit, wherein the first light-emitting device is located in the third pixel unit and the second light-emitting device is located in the fourth pixel unit.

[0042] In one optional implementation, the third pixel unit includes at least one first sub-pixel unit, and each first sub-pixel unit is provided with a first light-emitting device and a first driving circuit, and the first light-emitting device in different first sub-pixel units is different.

[0043] The fourth pixel unit includes at least one second sub-pixel unit, and each second sub-pixel unit is provided with a second light-emitting device and a second driving circuit. The second light-emitting devices in different second sub-pixel units are different.

[0044] In this configuration, the second electrode of any one of the first light-emitting devices in the third pixel unit is connected to the second electrode of each of the second light-emitting devices in the fourth pixel unit.

[0045] In one optional implementation, the third pixel unit and the fourth pixel unit are two adjacent pixel units, and the third pixel unit and the fourth pixel unit satisfy any one of the following conditions:

[0046] The third pixel unit and the fourth pixel unit are located in different scan lines in two adjacent scan lines;

[0047] The third pixel unit and the fourth pixel unit are located in different data columns in two adjacent data columns;

[0048] The pixel unit adjacent to the third pixel unit is the fourth pixel unit, and the pixel unit adjacent to the fourth pixel unit is the third pixel unit.

[0049] In one optional implementation, the channel type of each of the first driving transistors in the third pixel unit is P-type, and the first electrode of each of the first light-emitting devices is an anode; the channel type of each of the second driving transistors in the fourth pixel unit is N-type, and the first electrode of each of the second light-emitting devices is a cathode; the voltage input to the first power supply terminal is greater than the voltage input to the second power supply terminal; or,

[0050] The channel type of each of the first driving transistors in the third pixel unit is N-type, and the first electrode of each of the first light-emitting devices is a cathode. The channel type of each of the second driving transistors in the fourth pixel unit is P-type, and the first electrode of each of the second light-emitting devices is an anode. The voltage input to the first power supply terminal is less than the voltage input to the second power supply terminal.

[0051] This disclosure provides a light-emitting device, including the light-emitting substrate described in any embodiment.

[0052] This disclosure provides a driving method for a pixel circuit, used to drive the pixel circuit described in any embodiment, the driving method comprising:

[0053] During the light-emitting phase, the first light-emitting device and the second light-emitting device are controlled to emit light synchronously.

[0054] In an optional implementation, when the first driving circuit includes the first capacitor, the first reset module, the first write module, the first compensation module, and the first light-emitting control module, and the second driving circuit includes the second capacitor, the second reset module, the second write module, the second compensation module, and the second light-emitting control module, the following is further included before the light-emitting stage:

[0055] In the first reset phase, the signal controlling the first initialization voltage terminal is transmitted to the gate of the first driving transistor and the second terminal of the first capacitor, the source of the first driving transistor is disconnected from the first power supply terminal, and the drain of the first driving transistor is disconnected from the first terminal of the first light-emitting device.

[0056] In the first writing stage, the data signal of the first data writing terminal is controlled to be written to the source of the first driving transistor, the drain of the first driving transistor is controlled to be connected to the gate of the first driving transistor, the source of the first driving transistor is controlled to be disconnected from the first power supply terminal, and the drain of the first driving transistor is controlled to be disconnected from the first terminal of the first light-emitting device.

[0057] In the second reset phase, the signal controlling the second initialization voltage terminal is transmitted to the gate of the second driving transistor and the second terminal of the second capacitor, the source of the second driving transistor is disconnected from the second power supply terminal, and the drain of the second driving transistor is disconnected from the first terminal of the second light-emitting device.

[0058] In the second writing stage, the data signal of the second data writing terminal is controlled to be written to the source of the second driving transistor, the drain of the second driving transistor is controlled to be turned on with the gate of the second driving transistor, the source of the second driving transistor is controlled to be turned off with the second power supply terminal, and the drain of the second driving transistor is controlled to be turned off with the first terminal of the second light-emitting device.

[0059] In the light-emitting stage, the method further includes: controlling the source of the first driving transistor to be connected to the first power supply terminal, controlling the drain of the first driving transistor to be connected to the first terminal of the first light-emitting device, controlling the source of the second driving transistor to be connected to the second power supply terminal, and controlling the drain of the second driving transistor to be connected to the first terminal of the second light-emitting device.

[0060] The second reset phase is performed synchronously with the first write phase.

[0061] The above description is merely an overview of the technical solution disclosed herein. In order to better understand the technical means of this disclosure and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this disclosure more apparent and understandable, specific embodiments of this disclosure are described below. Attached Figure Description

[0062] To more clearly illustrate the technical solutions in the embodiments or related technologies of this disclosure, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. It should be noted that the scale in the drawings is for illustration only and does not represent the actual scale.

[0063] Figure 1 A schematic diagram of the structure of a pixel circuit in the related technology is shown.

[0064] Figure 2 A schematic diagram of the structure of the first pixel circuit is shown.

[0065] Figure 3 A schematic diagram of the second type of pixel circuit is shown.

[0066] Figure 4 A schematic cross-sectional view of the first type of pixel circuit is shown.

[0067] Figure 5a A schematic diagram illustrating the current flow of a pixel circuit is shown.

[0068] Figure 5b A schematic diagram illustrating the current flow of another pixel circuit is shown.

[0069] Figure 6 A schematic diagram of the current simulation of a pixel circuit is shown.

[0070] Figure 7 A schematic cross-sectional view of a pixel circuit is shown.

[0071] Figure 8 A schematic diagram of a pixel circuit structure is shown.

[0072] Figure 9 A timing diagram of the input signals at each input terminal of a pixel circuit is schematically shown.

[0073] Figure 10a A schematic diagram of the circuit state of a pixel circuit during the first reset phase is shown.

[0074] Figure 10b A schematic diagram of the circuit state of a pixel circuit during the first write phase and the second reset phase is shown.

[0075] Figure 10c A schematic diagram of the circuit state of a pixel circuit during the second writing stage is shown.

[0076] Figure 10d A schematic diagram of the circuit state of a pixel circuit during the light-emitting stage is shown.

[0077] Figure 11 A schematic diagram of the structure of the first type of light-emitting substrate is shown.

[0078] Figure 12 A schematic diagram of the structure of the second type of light-emitting substrate is shown.

[0079] Figure 13 A schematic diagram of the structure of the third type of light-emitting substrate is shown.

[0080] Figure 14 A schematic diagram of the structure of the fourth type of light-emitting substrate is shown.

[0081] Figure 15 A schematic diagram of the structure of the fifth type of light-emitting substrate is shown.

[0082] Figure 16 A schematic diagram of the sixth type of light-emitting substrate is shown. Detailed Implementation

[0083] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0084] For an AMQLED or AMOLED light-emitting substrate, multiple light-emitting sub-pixels can be included. In related technologies, each light-emitting sub-pixel is generally connected sequentially in the order of the first power supply terminal VDD, the pixel driving circuit 11, the light-emitting device 12, and the second power supply terminal VSS, such as... Figure 1As shown, when the transistor characteristics in each pixel driving circuit 11 are relatively similar, the voltage between the first power supply terminal VDD and the second power supply terminal VSS is mainly determined by the driving voltage of the light-emitting device 12. Since the driving voltage of the blue light device BD is much higher than that of the red light device RD and the green light device GD, in order to ensure that the blue light device BD emits light normally, the voltage between the first power supply terminal VDD and the second power supply terminal VSS is determined by the driving voltage of the blue light device BD. This results in the actual driving voltage required by the red light device RD and the green light device GD being much lower than the voltage actually applied to the red light device RD and the green light device GD, resulting in a large amount of excess voltage being applied to the red light device RD and the green light device GD, leading to increased heat generation and wasted power consumption.

[0085] One embodiment of this disclosure provides a pixel circuit, with reference to... Figure 2 and Figure 3 The structural schematic diagrams of the pixel circuits provided in this disclosure are shown respectively. For example... Figure 2 and Figure 3 As shown, the pixel circuit includes a first driving circuit 21, a first light-emitting device 22, a second light-emitting device 23, and a second driving circuit 24 connected in series.

[0086] The first driving circuit 21 includes a first driving transistor DT1, the source of which is connected to the first power supply terminal 25, and the drain of which is connected to the first terminal of the first light-emitting device 22.

[0087] The second driving circuit 24 includes a second driving transistor DT2, the source of which is connected to the second power supply terminal 26, and the drain of which is connected to the first terminal of the second light-emitting device 23.

[0088] The second electrode of the first light-emitting device 22 is connected to the second electrode of the second light-emitting device 23.

[0089] The first driving transistor DT1 and the second driving transistor DT2 have different channel types.

[0090] The channel type of the transistor may include, for example, P-type and N-type. When one of the first driving transistor DT1 and the second driving transistor DT2 is P-type, the other is N-type. This embodiment does not limit the specific channel type of the first driving transistor DT1 and the second driving transistor DT2.

[0091] One of the first power supply terminal 25 and the second power supply terminal 26 can be a high-level signal input terminal and the other a low-level signal input terminal; this embodiment does not limit this. The high-level signal input terminal receives a high-level signal VDD, and the low-level signal input terminal receives a low-level signal VSS.

[0092] In this embodiment, when one of the first driving transistor DT1 and the second driving transistor DT2 has a P-type channel and the other has an N-type channel, the source of the P-type driving transistor can be connected to a high-level signal input terminal, and the source of the N-type driving transistor can be connected to a low-level signal input terminal.

[0093] In one alternative implementation, such as Figure 2 As shown, the first driving transistor DT1 has a P-type channel, and the second driving transistor DT2 has an N-type channel. In this case, the voltage signal input to the first power supply terminal 25 can be a high-level signal VDD, and the voltage signal input to the second power supply terminal 26 can be a low-level signal VSS. In this implementation, the first electrode of the first light-emitting device 22 is the anode, and the second electrode of the first light-emitting device 22 is the cathode. The first electrode of the second light-emitting device 23 is the cathode, and the second electrode of the second light-emitting device 23 is the anode.

[0094] Reference Figure 4 A cross-sectional structural diagram of the pixel circuit provided in this implementation is shown. For example... Figure 4 As shown, Figure 2 The pixel circuit shown can be disposed on the substrate 41. A dielectric layer 42 can be disposed between the first light-emitting device 22 and the first driving circuit 21, and between the second light-emitting device 23 and the second driving circuit 24. A pixel defining layer 43 can be disposed between the first light-emitting device 22 and the second light-emitting device 23. Figure 4 The electrode layer 44 in the middle serves as both the cathode of the first light-emitting device 22 and the anode of the second light-emitting device 23. The first light-emitting device 22 and the second light-emitting device 23 are connected by the electrode layer 44 deposited on the surface. Figure 4 The first light-emitting device 22 is in an upright position, and the second light-emitting device 23 is in an inverted position.

[0095] In another alternative implementation, such as Figure 3 As shown, the first driving transistor DT1 has an N-type channel, and the second driving transistor DT2 has a P-type channel. In this case, the voltage signal input to the first power supply terminal 25 can be a low-level signal VSS, and the voltage signal input to the second power supply terminal 26 can be a high-level signal VDD. In this implementation, the first electrode of the first light-emitting device 22 is the cathode, and the second electrode of the first light-emitting device 22 is the anode. The first electrode of the second light-emitting device 23 is the anode, and the second electrode of the second light-emitting device 23 is the cathode.

[0096] In this embodiment, the circuit structures of the first driving circuit 21 and the second driving circuit 24 may be the same or different, and this embodiment does not limit this. The first driving circuit 21 may be any pixel driving circuit capable of driving the first light-emitting device 22 to emit light, and the second driving circuit 24 may be any pixel driving circuit capable of driving the second light-emitting device 23 to emit light. This embodiment does not limit the circuit structures of the first driving circuit 21 and the second driving circuit 24.

[0097] The first light-emitting device 22 can be an organic light-emitting diode or a quantum dot light-emitting diode, etc., and this embodiment does not limit it.

[0098] The second light-emitting device 23 can be an organic light-emitting diode or a quantum dot light-emitting diode, etc., and this embodiment does not limit it.

[0099] The light-emitting colors of the first light-emitting device 22 and the second light-emitting device 23 may be the same or different, and this embodiment does not limit this.

[0100] Under the condition that the first light-emitting device 22 and the second light-emitting device 23 achieve the same brightness, compared with related technologies, the series structure provided in this embodiment can divide the voltage between the first power supply terminal 25 and the second power supply terminal 26, reduce the voltage across the first driving circuit 21 and the first light-emitting device 22, or reduce the voltage across the second light-emitting device 23 and the second driving circuit 24, thereby reducing power consumption.

[0101] For the first driving transistor DT1, its current is determined by the source voltage and gate voltage of the first driving transistor DT1. Since the source of the first driving transistor DT1 is connected to the first power supply terminal 25, the source voltage of the first driving transistor DT1 is the voltage input to the first power supply terminal 25. The current on the first driving transistor DT1 is independent of the voltage of the first light-emitting device 22 or the second light-emitting device 23. That is, the current on the first light-emitting device 22 is independent of the brightness of the first light-emitting device 22 or the second light-emitting device 23.

[0102] For the second driving transistor DT2, its current is determined by the source voltage and gate voltage of the second driving transistor DT2. Since the source of the second driving transistor DT2 is connected to the second power supply terminal 26, the source voltage of the second driving transistor DT2 is the voltage input to the second power supply terminal 26. The current on the second driving transistor DT2 is independent of the voltage of the first light-emitting device 22 or the second light-emitting device 23. That is, the current on the second light-emitting device 23 is independent of the brightness of the first light-emitting device 22 or the second light-emitting device 23.

[0103] In this embodiment, since the first driving transistor DT1 and the second driving transistor DT2 have different channel types, the source of the first driving transistor DT1 can be connected to the first power supply terminal 25, and the source of the second driving transistor DT2 can be connected to the second power supply terminal 26. If the first driving transistor DT1 and the second driving transistor DT2 have the same channel type, the current of one of the driving transistors will inevitably be affected by the voltage of the first light-emitting device 22 or the voltage of the second light-emitting device 23, resulting in unstable driving current.

[0104] The pixel circuit provided in this embodiment, by connecting a first driving circuit, a first light-emitting device, a second light-emitting device, and a second driving circuit in series between a first power supply terminal and a second power supply terminal, can divide the voltage between the first and second power supply terminals. This prevents excessive voltage from increasing heat generation and reduces power consumption while ensuring that the first and second light-emitting devices achieve equal brightness. Furthermore, because the first and second driving transistors have different channel types—the source of the first driving transistor is connected to the first power supply terminal, and the source of the second driving transistor is connected to the second power supply terminal—the current in the first light-emitting device is independent of its brightness, and vice versa. This improves the stability of the driving current.

[0105] In a specific implementation, one of the first light-emitting device 22 and the second light-emitting device 23 can be a light-emitting device that emits blue light, and the other can be a light-emitting device that emits green or red light. This allows the first light-emitting device 22 and the second light-emitting device 23 to complement each other in terms of driving voltage, preventing excessive voltage on the red or green light device from causing increased heat generation. This solves the problem in the traditional connection method where the high turn-on voltage of the blue light device and the need to ensure the normal driving of the blue light device lead to excessive voltage on the green and red light devices connected in parallel with the blue light device.

[0106] In actual driving process, in order to ensure the stability of the pixel circuit, the first light-emitting device 22 and the second light-emitting device 23 connected in series can be controlled to emit light synchronously.

[0107] In order to independently control the brightness of the first light-emitting device 22 and the second light-emitting device 23 and avoid mutual interference between them, in one optional implementation, refer to Figure 2 and Figure 3 The pixel circuit described above may further include:

[0108] The bleeder structure 27 is connected to the first node A. The first node A is connected to the second electrode of the first light-emitting device 22 and the second light-emitting device 23, respectively, so that the difference between the current on the first light-emitting device 22 and the current on the second light-emitting device 23 is equal to the current on the bleeder structure 27.

[0109] When the current on the first light-emitting device 22 is not equal to the current on the second light-emitting device 23, the current can be diverted through the current-shunting structure 27. (Refer to...) Figure 5a This diagram illustrates the current flow direction when the current on the first light-emitting device 22 is equal to the current on the second light-emitting device 23, as shown below. Figure 5a As shown, the current on the first light-emitting device 22 and the current on the second light-emitting device 23 are both I1. (Refer to...) Figure 5b This diagram illustrates the current flow direction when the current on the first light-emitting device 22 is not equal to the current on the second light-emitting device 23. Figure 5b As shown, the current on the first light-emitting device 22 is I1, the current on the second light-emitting device 23 is zero, and the current I1 on the second light-emitting device 23 flows out through the leakage structure 27.

[0110] Reference Figure 6 The diagram shows simulated current data for the first light-emitting device 22, the second light-emitting device 23, and the current-discharging structure 27. (See diagram for example.) Figure 6 As shown, the difference between the current on the first light-emitting device 22 and the current on the second light-emitting device 23 is equal to the current on the bleeder structure 27.

[0111] In this implementation, the bleed structure 27 serves as a diversion mechanism, and its specific structure can vary. In one optional implementation, refer to... Figure 2 or Figure 3 The bleeder structure 27 may include a first transistor LT1 and a second transistor LT2 of the same channel type. The first terminal of the first transistor LT1 is connected to the first voltage input terminal 28, and the second terminal and the gate of the first transistor LT1 are respectively connected to the first node A. The first terminal of the second transistor LT2 is connected to the first node A, and the second terminal and the gate of the second transistor LT2 are respectively connected to the second voltage input terminal 29.

[0112] The voltages input to the first voltage input terminal 28 and the second voltage input terminal 29 can be equal, for example, both can be a fixed voltage VLE.

[0113] In this configuration, both the first transistor LT1 and the second transistor LT2 are diodes.

[0114] The channel type of both the first transistor LT1 and the second transistor LT2 can be P-type, such as... Figure 2 and Figure 3 The ones shown can all be of type N, but this embodiment does not limit this.

[0115] Reference Figure 7 A schematic cross-sectional view of a pixel circuit with a bleed-out structure is shown. (Example) Figure 7 As shown, the bleed structure 27 can be disposed between the substrate 41 and the electrode layer 44, and the bleed structure 27 can be connected to the electrode layer 44 through a via.

[0116] like Figure 2 and Figure 3 As shown, when the difference between the current on the first light-emitting device 22 and the current on the second light-emitting device 23 is large, the voltage of the first node A will increase or decrease, and the voltage difference across the first transistor LT1 or the second transistor LT2 will increase, thereby turning on the first transistor LT1 or the second transistor LT2. Together with the first driving transistor DT1 and the second driving transistor DT2, they will complete the current balance, and finally make the current difference flowing through the first driving transistor DT1 and the second driving transistor DT2 equal to the current on the first transistor LT1 or the second transistor LT2, so that the entire pixel circuit reaches the current balance state.

[0117] Reference Figure 8 A schematic diagram illustrating the specific structure of a pixel circuit is shown. For example... Figure 8 As shown, the first driving circuit 21 may further include: a first capacitor C1, the first terminal of the first capacitor C1 being connected to the first power supply terminal 25, and the second terminal of the first capacitor C1 being connected to the gate of the first driving transistor DT1.

[0118] like Figure 8 As shown, the first driving circuit 21 may further include: a first reset module 81, which is used to transmit the signal of the first initialization voltage terminal VINN to the gate of the first driving transistor DT1 and the second terminal of the first capacitor C1 in the first reset stage according to the signal input by the first reset control terminal ReNn.

[0119] like Figure 8 As shown, the first driving circuit 21 may further include: a first writing module 82, used to write the data signal of the first data writing terminal Data1 to the source of the first driving transistor DT1 in the first writing stage according to the signal input at the first scanning signal terminal GNn.

[0120] like Figure 8 As shown, the first driving circuit 21 may further include: a first compensation module 83, used to connect the drain of the first driving transistor DT1 to the gate of the first driving transistor DT1 in the first writing stage according to the signal input at the first scan signal terminal GNn.

[0121] like Figure 8As shown, the first driving circuit 21 may further include: a first light-emitting control module 84, which is used to disconnect the source of the first driving transistor DT1 from the first power supply terminal 25 and disconnect the drain of the first driving transistor DT1 from the first terminal of the first light-emitting device 22 according to the signal input at the first light-emitting control terminal EmNn, and in the first reset phase and the first write phase, connect the source of the first driving transistor DT1 to the first power supply terminal 25 and connect the drain of the first driving transistor DT1 to the first terminal of the first light-emitting device 22.

[0122] like Figure 8 As shown, the second driving circuit 24 may further include: a second capacitor C2, the first terminal of the second capacitor C2 being connected to the second power supply terminal 26, and the second terminal of the second capacitor C2 being connected to the gate of the second driving transistor DT2.

[0123] like Figure 8 As shown, the second driving circuit 24 may further include: a second reset module 85, used to transmit the signal of the second initialization voltage terminal VINP to the gate of the second driving transistor DT2 and the second terminal of the second capacitor C2 during the second reset phase according to the signal input at the second reset control terminal ReN+1p.

[0124] like Figure 8 As shown, the second driving circuit 24 may further include: a second writing module 86, used to write the data signal of the second data writing terminal Data2 to the source of the second driving transistor DT2 in the second writing stage according to the signal input at the second scan signal terminal GN+1p.

[0125] like Figure 8 As shown, the second driving circuit 24 may further include: a second compensation module 87, used to connect the drain of the second driving transistor DT2 and the gate of the second driving transistor DT2 in the second writing stage according to the signal input at the second scan signal terminal GN+1p.

[0126] like Figure 8 As shown, the second driving circuit 24 may further include: a second light-emitting control module 88, which is used to disconnect the source of the second driving transistor DT2 from the second power supply terminal 26 and disconnect the drain of the second driving transistor DT2 from the first terminal of the second light-emitting device 23 in the second reset phase and the second write phase according to the signal input at the second light-emitting control terminal EmN+1p, and in the light-emitting phase, connect the source of the second driving transistor DT2 to the second power supply terminal 26 and connect the drain of the second driving transistor DT2 to the first terminal of the second light-emitting device 23.

[0127] In this implementation, the first driving circuit 21 and the second driving circuit 24 have the same circuit structure.

[0128] like Figure 8 As shown, the voltage signal input to the first power supply terminal 25 is a low-level signal VSS, and the voltage signal input to the second power supply terminal 26 is a high-level signal VDD. The channel type of the first driving transistor DT1 is N-type, and the channel type of the second driving transistor DT2 is P-type. The first electrode of the first light-emitting device 22 is the cathode, and the second electrode of the first light-emitting device 22 is the anode. The first electrode of the second light-emitting device 23 is the anode, and the second electrode of the second light-emitting device 23 is the cathode.

[0129] like Figure 8 As shown, the first reset module 81 may include a third transistor T3. The gate of the third transistor T3 is connected to the first reset control terminal ReNn. The first terminal of the third transistor T3 is connected to the first initialization voltage terminal VINN. The second terminal of the third transistor T3 is connected to the gate of the first driving transistor DT1 and the second terminal of the first capacitor C1, respectively.

[0130] The first write module 82 may include a fourth transistor T4, the gate of the fourth transistor T4 is connected to the first scan signal terminal GNn, the first terminal of the fourth transistor T4 is connected to the first data write terminal Data1, and the second terminal of the fourth transistor T4 is connected to the source of the first drive transistor DT1.

[0131] The first compensation module 83 may include a fifth transistor T5, the gate of the fifth transistor T5 is connected to the first scan signal terminal GNn, the first terminal of the fifth transistor T5 is connected to the gate of the first driving transistor DT1, and the second terminal of the fifth transistor T5 is connected to the drain of the first driving transistor DT1.

[0132] The first light-emitting control module 84 may include a sixth transistor T6 and a seventh transistor T7. The gate of the sixth transistor T6 is connected to the first light-emitting control terminal EmNn, the first terminal of the sixth transistor T6 is connected to the drain of the first driving transistor DT1, and the second terminal of the sixth transistor T6 is connected to the first terminal of the first light-emitting device 22. The gate of the seventh transistor T7 is connected to the first light-emitting control terminal EmNn, the first terminal of the seventh transistor T7 is connected to the source of the first driving transistor DT1, and the second terminal of the seventh transistor T7 is connected to the first power supply terminal 25.

[0133] The second reset module 85 may include an eighth transistor T8. The gate of the eighth transistor T8 is connected to the second reset control terminal ReN+1p. The first terminal of the eighth transistor T8 is connected to the second initialization voltage terminal VINP. The second terminal of the eighth transistor T8 is connected to the gate of the second driving transistor DT2 and the second terminal of the second capacitor C2, respectively.

[0134] The second writing module 86 may include a ninth transistor T9, the gate of which is connected to the second scan signal terminal GN+1p, the first terminal of which is connected to the second data writing terminal Data2, and the second terminal of which is connected to the source of the second driving transistor DT2.

[0135] The second compensation module 87 may include a tenth transistor T10, the gate of the tenth transistor T10 is connected to the second scan signal terminal GN+1p, the first terminal of the tenth transistor T10 is connected to the gate of the second driving transistor DT2, and the second terminal of the tenth transistor T10 is connected to the drain of the second driving transistor DT2.

[0136] The second light-emitting control module 88 may include an eleventh transistor T11 and a twelfth transistor T12. The gate of the eleventh transistor T11 is connected to the second light-emitting control terminal EmN+1p, the first terminal of the eleventh transistor T11 is connected to the drain of the second driving transistor DT2, and the second terminal of the eleventh transistor T11 is connected to the first terminal of the second light-emitting device 23. The gate of the seventh transistor T7 is connected to the second light-emitting control terminal EmN+1p, the first terminal of the seventh transistor T7 is connected to the source of the second driving transistor DT2, and the second terminal of the seventh transistor T7 is connected to the second power supply terminal 26.

[0137] In this implementation, the channel types of transistors T3, T4, T5, T6, T7, T8, T9, T10, T11, and T12 can be either N-type or P-type. This implementation is illustrated using an example where transistors T3, T4, T5, T6, and T7 are N-type, and transistors T8, T9, T10, T11, and T12 are P-type. Figure 8 As shown.

[0138] Assumption Figure 8 The first light-emitting device 22 is located in the Nth row of the light-emitting substrate, and the second light-emitting device 23 is located in the (N+1)th row of the light-emitting substrate, as shown in the reference. Figure 9 It shows Figure 8 The timing diagram of the input signals at each input terminal of the pixel circuit shown is illustrated. Refer to Figure 10 for the diagram. Figure 9 The diagram shows the circuit conduction state at each stage. The bold lines and components in Figure 10 indicate current flow. The specific driving process may include:

[0139] First reset phase, such as Figure 10aAs shown, the signal controlling the first initialization voltage terminal VINN is transmitted to the gate of the first driving transistor DT1 and the second terminal of the first capacitor C1, controlling the source of the first driving transistor DT1 to disconnect from the first power supply terminal 25, and controlling the drain of the first driving transistor DT1 to disconnect from the first terminal of the first light-emitting device 22.

[0140] The first write phase, such as Figure 10b As shown, the data signal of the first data writing terminal Data1 is written to the source of the first driving transistor DT1, the drain of the first driving transistor DT1 is turned on and the gate of the first driving transistor DT1 is turned off, the source of the first driving transistor DT1 is turned off from the first power supply terminal 25, and the drain of the first driving transistor DT1 is turned off from the first terminal of the first light-emitting device 22.

[0141] The second reset phase, such as Figure 10b As shown, the signal controlling the second initialization voltage terminal VINP is transmitted to the gate of the second driving transistor DT2 and the second terminal of the second capacitor C2, controlling the source of the second driving transistor DT2 to disconnect from the second power supply terminal 26, and controlling the drain of the second driving transistor DT2 to disconnect from the first terminal of the second light-emitting device 23.

[0142] The second writing stage, such as Figure 10c As shown, the data signal of the second data writing terminal Data2 is written to the source of the second driving transistor DT2, the drain of the second driving transistor DT2 is turned on and the gate of the second driving transistor DT2 is turned off, the source of the second driving transistor DT2 is turned off from the second power supply terminal 26, and the drain of the second driving transistor DT2 is turned off from the first terminal of the second light-emitting device 23.

[0143] The luminescence stage, such as Figure 10d As shown, the source of the first driving transistor DT1 is connected to the first power supply terminal 25, the drain of the first driving transistor DT1 is connected to the first terminal of the first light-emitting device 22, the source of the second driving transistor DT2 is connected to the second power supply terminal 26, and the drain of the second driving transistor DT2 is connected to the first terminal of the second light-emitting device 23. The first light-emitting device 22 and the second light-emitting device 23 emit light synchronously during the light-emitting phase.

[0144] The second reset phase and the first write phase can be performed simultaneously.

[0145] In order to make the first light-emitting device 22 and the second light-emitting device 23 emit light synchronously during the light-emitting stage, the signal width and switching time of the first light-emitting control terminal EmNn and the second light-emitting control terminal EmN+1p can be controlled to be the same.

[0146] During the light-emitting phase, the driving current I1 on the first light-emitting device 22 is:

[0147] I1=β×(Vdata1+Vth1-VSS-Vth1) 2 Wherein, Vdata1 is the data signal input to the first data writing terminal Data1, Vth1 is the threshold voltage of the first driving transistor DT1, and VSS is the voltage input to the first power supply terminal 25.

[0148] The driving current I2 on the second light-emitting device 23 is:

[0149] I2=β×(Vdata2+Vth2-VDD-Vth2) 2 Where Vdata2 is the data signal input to the second data writing terminal Data2, Vth2 is the threshold voltage of the second driving transistor DT2, and VDD is the voltage input to the second power supply terminal 26.

[0150] During the driving process, the first light-emitting control terminal EmNn and the second light-emitting control terminal EmN+1p need to be turned off before a valid reset signal is input to the first reset control terminal ReNn and the second reset control terminal ReN+1p, and the first light-emitting control module 84 and the second light-emitting control module 88 need to be turned on after the scan signal input to the first scan signal terminal GNn and the second scan signal terminal GN+1p becomes invalid. Figure 9 As shown.

[0151] Specifically, turning off the first light-emitting control module 84 means disconnecting the source of the first driving transistor DT1 from the first power supply terminal 25 and disconnecting the drain of the first driving transistor DT1 from the first terminal of the first light-emitting device 22. Turning on the first light-emitting control module 84 means connecting the source of the first driving transistor DT1 to the first power supply terminal 25 and connecting the drain of the first driving transistor DT1 to the first terminal of the first light-emitting device 22.

[0152] Turning off the second light-emitting control module 88 means disconnecting the source of the second driving transistor DT2 from the second power supply terminal 26 and disconnecting the drain of the second driving transistor DT2 from the first terminal of the second light-emitting device 23. Turning on the second light-emitting control module 88 means connecting the source of the second driving transistor DT2 to the second power supply terminal 26 and connecting the drain of the second driving transistor DT2 to the first terminal of the second light-emitting device 23.

[0153] One embodiment of this disclosure provides a light-emitting substrate, including the pixel circuit provided in any embodiment.

[0154] In this example, the light-emitting substrate can be used for lighting, i.e., applied in a lighting device; it can also be used for display, i.e., applied in a light-emitting device.

[0155] Reference Figures 11 to 16 Several schematic diagrams of planar structures of light-emitting substrates are shown, such as... Figures 11 to 16 As shown, the light-emitting substrate may include multiple pixel units 110. The multiple pixel units 110 may be arranged in an array.

[0156] In one alternative implementation, such as Figures 11 to 13 As shown, the first light-emitting device 22 and the second light-emitting device 23 can be located within the same pixel unit 110. Specifically, a pixel unit 110 can include multiple sub-pixel units of different colors, such as a red sub-pixel unit R, a blue sub-pixel unit B, and a green sub-pixel unit G. The first light-emitting device 22 and the second light-emitting device 23 can each be located within a different colored sub-pixel unit of the same pixel unit 110. In this implementation, the first light-emitting device 22 and the second light-emitting device 23 can emit light of different colors.

[0157] like Figures 11 to 13 As shown, within the same pixel unit 110, the pixel circuit may further include a third light-emitting device 111 and a third driving circuit 112.

[0158] In a specific implementation, the first light-emitting device 22, the second light-emitting device 23, and the third light-emitting device 111 can be located in sub-pixel units of different colors within the same pixel unit 110.

[0159] The third driving circuit 112 may include a third driving transistor DT3, the source of which is connected to the second power supply terminal 26, and the drain of which is connected to the first terminal of the third light-emitting device 111.

[0160] The second electrode of the third light-emitting device 111 is connected to the second electrode of the first light-emitting device 22 and the second electrode of the second light-emitting device 23, respectively.

[0161] The third driving transistor DT3 has the same channel type as the second driving transistor DT2.

[0162] The third driving circuit 112 may have the same or different circuit structure as the first driving circuit 21 and the second driving circuit 24. This embodiment does not limit this.

[0163] It should be noted that, in Figures 11 to 16 In the diagram, DT1-P indicates that the channel type of the first driving transistor DT1 is P-type, DT1-N indicates that the channel type of the first driving transistor DT1 is N-type, DT2-P indicates that the channel type of the second driving transistor DT2 is P-type, DT2-N indicates that the channel type of the second driving transistor DT2 is N-type, DT3-P indicates that the channel type of the third driving transistor DT3 is P-type, and DT3-N indicates that the channel type of the third driving transistor DT3 is N-type.

[0164] like Figures 11 to 13 Within a certain pixel unit 110, when the first driving transistor DT1 is P-type, the third driving transistor DT3 and the second driving transistor DT2 are N-type; when the first driving transistor DT1 is N-type, the third driving transistor DT3 and the second driving transistor DT2 are P-type.

[0165] like Figures 11 to 13 As shown, the first driving circuit 21 and the first light-emitting device 22 constitute the first branch, the second driving circuit 24 and the second light-emitting device 23 constitute the second branch, and the third driving circuit 112 and the third light-emitting device 111 constitute the third branch. The second branch is connected in series with the first branch, and the second branch is connected in parallel with the third branch.

[0166] During normal operation, the driving current of the blue light device is approximately equal to the sum of the driving currents of the green and red light devices. Therefore, the first light-emitting device 22 can be a blue light-emitting device, the second light-emitting device 23 can be a green light-emitting device, and the third light-emitting device 111 can be a red light-emitting device. This allows the total current on the P-type driving transistors in the pixel circuit to be close to the total current on the N-type driving transistors, which is beneficial for white balance control and ensures current balance when displaying images in colors such as yellow, cyan, magenta, green, red, or blue.

[0167] like Figures 11 to 13 As shown, taking the first driving transistor DT1 as having a P-type channel and the third driving transistor DT3 and the second driving transistor DT2 as having an N-type channel, the driving voltage corresponding to one pixel unit 110 is:

[0168] VDD-VSS = VTFT p +VTFT n +VQLED R +VQLED B ,

[0169] Among them, VTFT p VTFT is the voltage of the first driving transistor DT1 of the P-type transistor. n VQLED is the voltage of the second driving transistor DT2 of the N-type transistor. R The voltage of the second light-emitting device 23 (red light device), VQLED B This refers to the voltage of the first light-emitting device 22 (blue light device). It should be noted that the above driving voltage ignores the voltages of the switching transistors in the driving circuit, excluding the driving transistor.

[0170] The power consumption corresponding to pixel unit 110 is:

[0171] P1 = I BQLED ×(VDD-VSS)=I BQLED ×(VTFT p +VTFT n +VQLED R +VQLED B );

[0172] Among them, I BQLED The current is for the first light-emitting device 22 (blue light device).

[0173] Compared with related technologies, such as Figure 1 The power consumption of one pixel unit shown is:

[0174] P2=(I BQLED +I GQLED +I RQLED )×(VTFT p +VQLED B ), where I BQLED I is the current of the blue light device. GQLED I is the current of the green light device. RQLED For the current of the red light device, VTFT p for Figure 1 The voltage of the mid-pixel driving circuit 11, VQLED B for Figure 1 The voltage of the light-emitting device 12.

[0175] Under normal circumstances, VTFT p Approximately equal to VTFT n I BQLED Approximately equal to I GQLED +I RQLED Calculate P2-P1 = 2 * VQLED B -(VQLED R +VQLED B Because the voltage of the blue light device is greater than that of the red light device, i.e., VQLED B VQLED R ,therefore, Figure 1 The power consumption P2 of one pixel unit is greater than Figures 11 to 13 The power consumption P1 of a single pixel unit is shown. Therefore, the pixel circuit provided in this disclosure can reduce power consumption.

[0176] In addition, since both the first power supply terminal 25 and the second power supply terminal 26 are metal traces, and the pixel circuit provided in this disclosure can reduce power consumption, the current on these metal traces is reduced, thereby reducing the voltage drop on the metal traces, which is beneficial to improving the brightness uniformity of the light-emitting substrate.

[0177] In a light-emitting substrate, a plurality of pixel units 110 may include a first pixel unit 1101. The first pixel unit 1101 is as follows: Figures 11 to 13 As shown, the light-emitting substrate includes a first light-emitting device 22, a second light-emitting device 23, and a third light-emitting device 111. Within the first pixel unit 1101, the channel type of the first driving transistor DT1 is P-type, and the channel types of the second driving transistor DT2 and the third driving transistor DT3 are N-type. The first electrode of the first light-emitting device 22 is the anode, and the first electrodes of the second light-emitting devices 23 and 111 are the cathodes. The voltage input to the first power supply terminal 25 is greater than the voltage input to the second power supply terminal 26. The second electrode of the first light-emitting device 22 is the cathode, and the second electrodes of the second light-emitting devices 23 and 111 are the anodes. The voltage signal input to the first power supply terminal 25 can be a high-level signal VDD, and the voltage signal input to the second power supply terminal 26 can be a low-level signal VSS. Optionally, each pixel unit 110 in this light-emitting substrate is a first pixel unit 1101.

[0178] In another type of light-emitting substrate, the plurality of pixel units 110 may include a second pixel unit 1102, the second pixel unit 1102 being as follows: Figures 11 to 13 As shown, the light-emitting substrate includes a first light-emitting device 22, a second light-emitting device 23, and a third light-emitting device 111. Within the second pixel unit 1102, the channel type of the first driving transistor DT1 is N-type, and the channel types of the second driving transistor DT2 and the third driving transistor DT3 are P-type. The first electrode of the first light-emitting device 22 is the cathode, and the first electrodes of the second light-emitting devices 23 and 111 are the anodes. The voltage input to the first power supply terminal 25 is less than the voltage input to the second power supply terminal 26. The second electrode of the first light-emitting device 22 is the anode, and the second electrodes of the second light-emitting devices 23 and 111 are the cathodes. The voltage signal input to the first power supply terminal 25 can be a low-level signal VSS, and the voltage signal input to the second power supply terminal 26 can be a high-level signal VDD. Optionally, each pixel unit 110 in this light-emitting substrate is a second pixel unit 1102.

[0179] In yet another type of light-emitting substrate, reference is made to... Figures 11 to 13 The plurality of pixel units 110 may include the first pixel unit 1101 and the second pixel unit 1102 described above, such as Figures 11 to 13 As shown.

[0180] When multiple pixel units 110 include a first pixel unit 1101 and a second pixel unit 1102, the first pixel unit 1101 and the second pixel unit 1102 can be located in different scan lines in two adjacent scan lines, such as... Figure 11 As shown.

[0181] For example, when the first pixel unit 1101 is located in the first scan line, the second pixel unit 1102 is located in the second scan line adjacent to the first scan line. At least one pixel unit in the first scan line is the first pixel unit 1101, and at least one pixel unit in the second scan line is the second pixel unit 1102. Optionally, all pixel units in the first scan line are first pixel units 1101, and all pixel units in the second scan line are second pixel units 1102, such as... Figure 11 shown.

[0182] When multiple pixel units 110 include a first pixel unit 1101 and a second pixel unit 1102, the first pixel unit 1101 and the second pixel unit 1102 are located in different data columns in two adjacent data columns, such as... Figure 12 As shown.

[0183] For example, when the first pixel unit 1101 is located in the first data column, the second pixel unit 1102 is located in the second data column adjacent to the first data column. At least one pixel unit in the first data column is the first pixel unit 1101, and at least one pixel unit in the second data column is the second pixel unit 1102. Optionally, each pixel unit in the first data column is the first pixel unit 1101, and each pixel unit in the second data column is the second pixel unit 1102, such as... Figure 12 shown.

[0184] When multiple pixel units 110 include a first pixel unit 1101 and a second pixel unit 1102, at least one of the pixel units 110 adjacent to the first pixel unit 1101 is the second pixel unit 1102, and at least one of the pixel units 110 adjacent to the second pixel unit 1102 is the first pixel unit 1101. Figure 13 As shown.

[0185] Optionally, each pixel unit 110 adjacent to the first pixel unit 1101 can be a second pixel unit 1102, and each pixel unit 110 adjacent to the second pixel unit 1102 can be a first pixel unit 1101, such as... Figure 13 As shown.

[0186] In another alternative implementation, such as Figures 14 to 16 As shown, the first light-emitting device 22 and the second light-emitting device 23 can be located in different pixel units 110. If the multiple pixel units 110 include a third pixel unit 1103 and a fourth pixel unit 1104, then the first light-emitting device 22 is located in the third pixel unit 1103, and the second light-emitting device 23 is located in the fourth pixel unit 1104. The third pixel unit 1103 and the fourth pixel unit 1104 are different pixel units.

[0187] Optionally, the third pixel unit 1103 includes at least one first sub-pixel unit 141, and each first sub-pixel unit 141 is provided with a first light-emitting device 22 and a first driving circuit 21. The first light-emitting device 22 in different first sub-pixel units 141 is different.

[0188] The fourth pixel unit 1104 includes at least one second sub-pixel unit 142. Each second sub-pixel unit 142 is provided with a second light-emitting device 23 and a second driving circuit 24. The second light-emitting device 23 in different second sub-pixel units 142 is different.

[0189] In this configuration, the second pole of any one of the first light-emitting devices 22 in the third pixel unit 1103 is connected to the second pole of each of the second light-emitting devices 23 in the fourth pixel unit 1104.

[0190] Specifically, a pixel unit 110 may include multiple sub-pixel units of different colors, such as a red sub-pixel unit R, a blue sub-pixel unit B, and a green sub-pixel unit G. Figures 14 to 16 As shown, the first sub-pixel unit 141 is a sub-pixel unit in the third pixel unit 1103, and the second sub-pixel unit 142 is a sub-pixel unit in the fourth pixel unit 1104.

[0191] like Figures 14 to 16 As shown, the third pixel unit 1103 includes three first sub-pixel units 141, wherein the first light-emitting device 22 in one of the first sub-pixel units 141 can emit red light, the first light-emitting device 22 in one of the first sub-pixel units 141 can emit green light, and the first light-emitting device 22 in one of the first sub-pixel units 141 can emit blue light.

[0192] like Figures 14 to 16 As shown, the fourth pixel unit 1104 includes three second sub-pixel units 142, wherein the second light-emitting device 23 in one second sub-pixel unit 142 can emit red light, the second light-emitting device 23 in one second sub-pixel unit 142 can emit green light, and the second light-emitting device 23 in one second sub-pixel unit 142 can emit blue light.

[0193] like Figures 14 to 16 As shown, a first light-emitting device 22 and a first driving circuit 21 in the first sub-pixel unit 141 constitute a first branch, a second light-emitting device 23 and a second driving circuit 24 in the second sub-pixel unit 142 constitute a second branch, the three first branches in the third pixel unit 1103 are connected in parallel, the three second branches in the fourth pixel unit 1104 are connected in parallel, and the three parallel first branches are connected in series with the three parallel second branches.

[0194] The third pixel unit 1103 and the fourth pixel unit 1104 can be two adjacent pixel units 110. Optionally, the third pixel unit 1103 and the fourth pixel unit 1104 can be located in different scan lines in two adjacent scan lines, such as... Figure 14 As shown.

[0195] For example, when the third pixel unit 1103 is located in the third scan line, the fourth pixel unit 1104 is located in the fourth scan line adjacent to the third scan line. At least one pixel unit in the third scan line is the third pixel unit 1103, and at least one pixel unit in the fourth scan line is the fourth pixel unit 1104. Optionally, all pixel units in the third scan line are third pixel units 1103, and all pixel units in the fourth scan line are fourth pixel units 1104, such as... Figure 14 As shown.

[0196] The third pixel unit 1103 and the fourth pixel unit 1104 can be two adjacent pixel units 110. Optionally, the third pixel unit 1103 and the fourth pixel unit 1104 can be located in different data columns in two adjacent data columns, such as... Figure 15 As shown.

[0197] For example, when the third pixel unit 1103 is located in the third data column, the fourth pixel unit 1104 is located in the fourth data column adjacent to the third data column. At least one pixel unit in the third data column is the third pixel unit 1103, and at least one pixel unit in the fourth data column is the fourth pixel unit 1104. Optionally, all pixel units in the third data column are third pixel units 1103, and all pixel units in the fourth data column are fourth pixel units 1104, such as... Figure 15 shown.

[0198] In this configuration, the third pixel unit 1103 and the fourth pixel unit 1104 can be two adjacent pixel units 110, meaning that at least one of the pixel units 110 adjacent to the third pixel unit 1103 is the fourth pixel unit 1104, and at least one of the pixel units 110 adjacent to the fourth pixel unit 1104 is the third pixel unit 1103. Optionally, all pixel units 110 adjacent to the third pixel unit 1103 are fourth pixel units 1104, and all pixel units 110 adjacent to the fourth pixel unit 1104 are third pixel units 1103, such as... Figure 16 As shown.

[0199] In specific implementations, such as Figures 14 to 16As shown, in the third pixel unit 1103, the channel type of each first driving transistor DT1 can be P-type, the first electrode of each first light-emitting device 22 is an anode, and the second electrode of each first light-emitting device 22 is a cathode. In the fourth pixel unit 1104, the channel type of each second driving transistor DT2 can be N-type, the first electrode of each second light-emitting device 23 is a cathode, and the second electrode of each second light-emitting device 23 is an anode. The voltage input to the first power supply terminal 25 is greater than the voltage input to the second power supply terminal 26. For example, the voltage signal input to the first power supply terminal 25 can be a high-level signal VDD, and the voltage signal input to the second power supply terminal 26 can be a low-level signal VSS.

[0200] Alternatively, in the third pixel unit 1103, the channel type of each first driving transistor DT1 can be N-type, the first electrode of each first light-emitting device 22 can be cathode, and the second electrode of each first light-emitting device 22 can be anode. In the fourth pixel unit 1104, the channel type of each second driving transistor DT2 can be P-type, the first electrode of each second light-emitting device 23 can be anode, and the second electrode of each second light-emitting device 23 can be cathode. The voltage input to the first power supply terminal 25 is less than the voltage input to the second power supply terminal 26. For example, the voltage signal input to the first power supply terminal 25 can be a low-level signal VSS, and the voltage signal input to the second power supply terminal 26 can be a high-level signal VDD.

[0201] Figures 14 to 16 The diagram shows a structure where a third pixel unit 1103 and a fourth pixel unit 1104 are connected, i.e., the first sub-pixel units in the third pixel unit 1103 are connected in parallel, the second sub-pixel units in the fourth pixel unit 1104 are connected in parallel, and then the parallel-connected first sub-pixel units and the parallel-connected second sub-pixel units are connected in series.

[0202] In a specific implementation, the first sub-pixel units in multiple third pixel units 1103 (such as 2*2, 3*3 or 2*3, etc.) can be connected in parallel, and the second sub-pixel units in multiple fourth pixel units 1104 (such as 2*2, 3*3 or 2*3, etc.) can be connected in parallel. Then, the parallel first sub-pixel units and the parallel second sub-pixel units can be connected in series.

[0203] Another embodiment of this disclosure also provides a light-emitting device, which may include the light-emitting substrate provided in any embodiment.

[0204] In some embodiments, the light-emitting device can be an illumination device, in which case the light-emitting device acts as a light source to achieve the illumination function. For example, the light-emitting device can be a backlight module in a liquid crystal display device, a lamp for internal or external illumination, or various signal lights, etc.

[0205] In other embodiments, the light-emitting device can be a display device, in which case the light-emitting substrate is a display substrate used to realize the function of displaying images (i.e., screens). The light-emitting device may include a display or a product containing a display. The display may be a flat panel display (FPD), a microdisplay, etc. Based on whether the user can see the back of the display, the display may be a transparent display or an opaque display. Based on whether the display can be bent or rolled, the display may be a flexible display or a regular display (which can be called a rigid display). Examples of products containing displays include: computer monitors, televisions, billboards, laser printers with display functions, telephones, mobile phones, personal digital assistants (PDAs), laptops, digital cameras, portable camcorders, viewfinders, vehicles, large-area walls, theater screens, or stadium signs, etc.

[0206] Another embodiment of this disclosure also provides a driving method for a pixel circuit, used to drive the pixel circuit described in any embodiment, the driving method comprising:

[0207] During the light-emitting phase, the first light-emitting device and the second light-emitting device are controlled to emit light synchronously.

[0208] like Figure 8 As shown, when the first driving circuit includes the first capacitor C1, the first reset module 81, the first write module 82, the first compensation module 83, and the first light-emitting control module 84, and the second driving circuit includes the second capacitor C2, the second reset module 85, the second write module 86, the second compensation module 87, and the second light-emitting control module 88, before the light-emitting stage, it may further include:

[0209] In the first reset phase, the signal controlling the first initialization voltage terminal VINN is transmitted to the gate of the first driving transistor DT1 and the second terminal of the first capacitor C1, the source of the first driving transistor DT1 is disconnected from the first power supply terminal 25, and the drain of the first driving transistor DT1 is disconnected from the first terminal of the first light-emitting device 22.

[0210] In the first writing stage, the data signal of the first data writing terminal Data1 is written to the source of the first driving transistor DT1, the drain of the first driving transistor DT1 is turned on and the gate of the first driving transistor DT1 is turned off, the source of the first driving transistor DT1 is turned off from the first power supply terminal 25, and the drain of the first driving transistor DT1 is turned off from the first terminal of the first light-emitting device 22.

[0211] In the second reset phase, the signal controlling the second initialization voltage terminal VINP is transmitted to the gate of the second driving transistor DT2 and the second terminal of the second capacitor C2, the source of the second driving transistor DT2 is disconnected from the second power supply terminal 26, and the drain of the second driving transistor DT2 is disconnected from the first terminal of the second light-emitting device 23.

[0212] In the second writing stage, the data signal of the second data writing terminal Data2 is written to the source of the second driving transistor DT2, the drain of the second driving transistor DT2 is turned on and the gate of the second driving transistor DT2 is turned off, the source of the second driving transistor DT2 is turned off from the second power supply terminal 26, and the drain of the second driving transistor DT2 is turned off from the first terminal of the second light-emitting device 23.

[0213] During the light-emitting stage, the method further includes: controlling the source of the first driving transistor DT1 to be connected to the first power supply terminal 25, controlling the drain of the first driving transistor DT1 to be connected to the first terminal of the first light-emitting device 22, controlling the source of the second driving transistor DT2 to be connected to the second power supply terminal 26, and controlling the drain of the second driving transistor DT2 to be connected to the first terminal of the second light-emitting device 23.

[0214] The second reset phase is performed synchronously with the first write phase.

[0215] The specific driving process has been described in detail in the embodiment of the pixel circuit, and will not be repeated here.

[0216] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0217] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0218] The pixel circuit, pixel driving method, light-emitting substrate, and light-emitting device provided in this disclosure have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this disclosure. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this disclosure. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this disclosure. Therefore, the content of this specification should not be construed as a limitation of this disclosure.

[0219] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the following claims.

[0220] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.

[0221] The terms "an embodiment," "embodiment," or "one or more embodiments" as used herein mean that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of this disclosure. Furthermore, please note that the examples of the phrase "in one embodiment" do not necessarily all refer to the same embodiment.

[0222] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of this disclosure may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.

[0223] In the claims, any reference signs placed between parentheses should not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. This disclosure can be implemented by means of hardware comprising a plurality of different elements and by means of a suitably programmed computer. In a unit claim enumerating a plurality of means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third, etc., does not indicate any order. These words may be interpreted as names.

[0224] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this disclosure, and are not intended to limit them. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this disclosure.

Claims

1. A pixel circuit, characterized in that, It includes a first driving circuit, a first light-emitting device, a second light-emitting device, and a second driving circuit connected in series. The first driving circuit includes a first driving transistor, the source of the first driving transistor is connected to a first power supply terminal, and the drain of the first driving transistor is connected to a first electrode of the first light-emitting device. The second driving circuit includes a second driving transistor, the source of which is connected to a second power supply terminal, and the drain of which is connected to a first terminal of the second light-emitting device. The second electrode of the first light-emitting device is connected to the second electrode of the second light-emitting device; The first driving transistor and the second driving transistor have different channel types.

2. The pixel circuit according to claim 1, characterized in that, The first driving transistor has a P-type channel, the second driving transistor has an N-type channel, the first electrode of the first light-emitting device is the anode, the first electrode of the second light-emitting device is the cathode, and the voltage input to the first power supply terminal is greater than the voltage input to the second power supply terminal; or... The first driving transistor has an N-type channel, the second driving transistor has a P-type channel, the first electrode of the first light-emitting device is the cathode, the first electrode of the second light-emitting device is the anode, and the voltage input to the first power supply terminal is less than the voltage input to the second power supply terminal.

3. The pixel circuit according to claim 1, characterized in that, The pixel circuit also includes: A current-draining structure is connected to a first node, which is connected to the second electrode of the first light-emitting device and the second light-emitting device, respectively, to make the difference between the current on the first light-emitting device and the current on the second light-emitting device equal to the current on the current-draining structure.

4. The pixel circuit according to claim 3, characterized in that, The bleed-out structure includes a first transistor and a second transistor with the same channel type; The first terminal of the first transistor is connected to the first voltage input terminal, and the second terminal of the first transistor and the gate of the first transistor are respectively connected to the first node; The first terminal of the second transistor is connected to the first node, and the second terminal and the gate of the second transistor are respectively connected to the second voltage input terminal.

5. The pixel circuit according to any one of claims 1 to 4, characterized in that, The first driving circuit includes: A first capacitor, wherein the first terminal of the first capacitor is connected to the first power supply terminal, and the second terminal of the first capacitor is connected to the gate of the first driving transistor; The first reset module is used to transmit the signal from the first initialization voltage terminal to the gate of the first driving transistor and the second terminal of the first capacitor during the first reset phase. The first write module is used to write the data signal of the first data write terminal to the source of the first driving transistor during the first write stage; The first compensation module is used to connect the drain of the first driving transistor to the gate of the first driving transistor during the first writing phase. The first light-emitting control module is used to disconnect the source of the first driving transistor from the first power supply terminal and disconnect the drain of the first driving transistor from the first terminal of the first light-emitting device during the first reset phase and the first write phase, and to connect the source of the first driving transistor to the first power supply terminal and connect the drain of the first driving transistor to the first terminal of the first light-emitting device during the light-emitting phase. The second driving circuit includes: The second capacitor has its first terminal connected to the second power supply terminal and its second terminal connected to the gate of the second driving transistor. The second reset module is used to transmit the signal from the second initialization voltage terminal to the gate of the second driving transistor and the second terminal of the second capacitor during the second reset phase. The second write module is used to write the data signal of the second data write terminal to the source of the second drive transistor during the second write stage; The second compensation module is used to connect the drain of the second driving transistor to the gate of the second driving transistor during the second writing phase. The second light-emitting control module is used to disconnect the source of the second driving transistor from the second power supply terminal and disconnect the drain of the second driving transistor from the first terminal of the second light-emitting device during the second reset phase and the second write phase, and to connect the source of the second driving transistor to the second power supply terminal and connect the drain of the second driving transistor to the first terminal of the second light-emitting device during the light-emitting phase.

6. A light-emitting substrate, characterized in that, Includes the pixel circuit described in any one of claims 1 to 5.

7. The light-emitting substrate according to claim 6, characterized in that, The light-emitting substrate includes multiple pixel units, and the first light-emitting device and the second light-emitting device are located in the same pixel unit.

8. The light-emitting substrate according to claim 7, characterized in that, Within the same pixel unit, the pixel circuit further includes a third light-emitting device and a third driving circuit; The third driving circuit includes a third driving transistor, the source of which is connected to the second power supply terminal, and the drain of which is connected to the first terminal of the third light-emitting device. The second electrode of the third light-emitting device is connected to the second electrode of the first light-emitting device and the second electrode of the second light-emitting device, respectively. The third driving transistor has the same channel type as the second driving transistor.

9. The light-emitting substrate according to claim 8, characterized in that, The first light-emitting device is capable of emitting blue light, the second light-emitting device is capable of emitting green light, and the third light-emitting device is capable of emitting red light.

10. The light-emitting substrate according to claim 8, characterized in that, The plurality of pixel units include a first pixel unit and / or a second pixel unit, and both the first pixel unit and the second pixel unit include the pixel circuit; Within the first pixel unit, the channel type of the first driving transistor is P-type, the channel type of the second driving transistor and the third driving transistor is N-type, the first electrode of the first light-emitting device is the anode, the first electrodes of the second light-emitting device and the third light-emitting device are the cathodes, and the voltage input to the first power supply terminal is greater than the voltage input to the second power supply terminal. Within the second pixel unit, the channel type of the first driving transistor is N-type, the channel type of the second driving transistor and the third driving transistor is P-type, the first electrode of the first light-emitting device is the cathode, the first electrodes of the second light-emitting device and the third light-emitting device are the anodes, and the voltage input to the first power supply terminal is less than the voltage input to the second power supply terminal.

11. The light-emitting substrate according to claim 10, characterized in that, When the plurality of pixel units includes the first pixel unit and the second pixel unit, the first pixel unit and the second pixel unit satisfy any one of the following conditions: The first pixel unit and the second pixel unit are located in different scan lines in two adjacent scan lines; The first pixel unit and the second pixel unit are located in different data columns in two adjacent data columns; At least one of the pixel units adjacent to the first pixel unit is the second pixel unit, and at least one of the pixel units adjacent to the second pixel unit is the first pixel unit.

12. The light-emitting substrate according to claim 6, characterized in that, The light-emitting substrate includes multiple pixel units, including a third pixel unit and a fourth pixel unit. The first light-emitting device is located in the third pixel unit, and the second light-emitting device is located in the fourth pixel unit.

13. The light-emitting substrate according to claim 12, characterized in that, The third pixel unit includes at least one first sub-pixel unit, and each first sub-pixel unit is provided with a first light-emitting device and a first driving circuit. The first light-emitting devices in different first sub-pixel units are different. The fourth pixel unit includes at least one second sub-pixel unit, and each second sub-pixel unit is provided with a second light-emitting device and a second driving circuit. The second light-emitting devices in different second sub-pixel units are different. In this configuration, the second electrode of any one of the first light-emitting devices in the third pixel unit is connected to the second electrode of each of the second light-emitting devices in the fourth pixel unit.

14. The light-emitting substrate according to claim 13, characterized in that, The third pixel unit and the fourth pixel unit are two adjacent pixel units, and the third pixel unit and the fourth pixel unit satisfy any one of the following conditions: The third pixel unit and the fourth pixel unit are located in different scan lines in two adjacent scan lines; The third pixel unit and the fourth pixel unit are located in different data columns in two adjacent data columns; The pixel unit adjacent to the third pixel unit is the fourth pixel unit, and the pixel unit adjacent to the fourth pixel unit is the third pixel unit.

15. The light-emitting substrate according to claim 13, characterized in that, In the third pixel unit, the channel type of each of the first driving transistors is P-type, and the first electrode of each of the first light-emitting devices is an anode; in the fourth pixel unit, the channel type of each of the second driving transistors is N-type, and the first electrode of each of the second light-emitting devices is a cathode; the voltage input to the first power supply terminal is greater than the voltage input to the second power supply terminal; or... The channel type of each of the first driving transistors in the third pixel unit is N-type, and the first electrode of each of the first light-emitting devices is a cathode. The channel type of each of the second driving transistors in the fourth pixel unit is P-type, and the first electrode of each of the second light-emitting devices is an anode. The voltage input to the first power supply terminal is less than the voltage input to the second power supply terminal.

16. A light-emitting device, characterized in that, Includes the light-emitting substrate as described in any one of claims 6 to 15.

17. A driving method for a pixel circuit, characterized in that, The driving method for driving the pixel circuit of claim 5 includes: During the light-emitting phase, the first light-emitting device and the second light-emitting device are controlled to emit light synchronously.

18. The driving method according to claim 17, characterized in that, When the first driving circuit includes the first capacitor, the first reset module, the first write module, the first compensation module, and the first light-emitting control module, and the second driving circuit includes the second capacitor, the second reset module, the second write module, the second compensation module, and the second light-emitting control module, before the light-emitting stage, it further includes: In the first reset phase, the signal controlling the first initialization voltage terminal is transmitted to the gate of the first driving transistor and the second terminal of the first capacitor, the source of the first driving transistor is disconnected from the first power supply terminal, and the drain of the first driving transistor is disconnected from the first terminal of the first light-emitting device. In the first writing stage, the data signal of the first data writing terminal is controlled to be written to the source of the first driving transistor, the drain of the first driving transistor is controlled to be connected to the gate of the first driving transistor, the source of the first driving transistor is controlled to be disconnected from the first power supply terminal, and the drain of the first driving transistor is controlled to be disconnected from the first terminal of the first light-emitting device. In the second reset phase, the signal controlling the second initialization voltage terminal is transmitted to the gate of the second driving transistor and the second terminal of the second capacitor, the source of the second driving transistor is disconnected from the second power supply terminal, and the drain of the second driving transistor is disconnected from the first terminal of the second light-emitting device. In the second writing stage, the data signal of the second data writing terminal is controlled to be written to the source of the second driving transistor, the drain of the second driving transistor is controlled to be turned on with the gate of the second driving transistor, the source of the second driving transistor is controlled to be turned off with the second power supply terminal, and the drain of the second driving transistor is controlled to be turned off with the first terminal of the second light-emitting device. In the light-emitting stage, the method further includes: controlling the source of the first driving transistor to be connected to the first power supply terminal, controlling the drain of the first driving transistor to be connected to the first terminal of the first light-emitting device, controlling the source of the second driving transistor to be connected to the second power supply terminal, and controlling the drain of the second driving transistor to be connected to the first terminal of the second light-emitting device. The second reset phase is performed synchronously with the first write phase.

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