Voltage regulating apparatus, method and memory chip for a memory chip

Abstract

The application discloses a voltage adjusting device and method of a storage chip and the storage chip, and relates to the technical field of storage chips. The application discloses a voltage adjusting device and method of a storage chip and the storage chip, and relates to the technical field of storage chips. The application discloses a voltage adjusting device and method of a storage chip and the storage chip, and relates to the technical field of storage chips. The application discloses a voltage adjusting device and method of a storage chip and the storage chip, and relates to the technical field of storage chips. The application discloses a voltage adjusting device and method of a storage chip and the storage chip, and relates to the technical field of storage chips. The application discloses a voltage adjusting device and method of a storage chip and the storage chip, and relates to the technical field of storage chips. The application discloses a voltage adjusting device and method of a storage chip and the storage chip, and relates to the technical field of storage chips. The application discloses a voltage adjusting device and method of a storage chip and the storage chip, and relates to the technical field of storage chips. The application discloses a voltage adjusting device and method of a storage chip and the storage chip, and relates to the technical field of storage chips. The application discloses a voltage adjusting device and method of a storage chip and the storage chip, and relates to the technical field of storage chips. The application discloses a voltage adjusting device and method of a storage chip and the storage chip, and relates to the technical field of storage chips. The application discloses a voltage adjusting device and method of a storage chip and the storage chip, and relates to the technical field of storage chips. The application discloses a voltage adjusting device and method of a storage chip and the storage chip, and relates to the technical field of storage chips. The application discloses a voltage adjusting device and method of a storage chip and the storage chip, and relates to the technical field of storage chips. The application discloses a voltage adjusting device and method of a storage chip and the storage chip, and relates to the technical field of storage chips. The application discloses a voltage adjusting device and method of a storage chip and the storage chip, and relates to the technical field of storage chips. The application discloses a voltage adjusting device and method of a storage chip and the storage chip, and relates to the technical field of storage chips. The application discloses a voltage adjusting device and method of a storage

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of storage, in particular to a voltage regulating device and method for a storage chip and the storage chip. BACKGROUND

[0002] In a storage chip, a Low Dropout Regulator (LDO for short hereinafter) is usually used to supply power to all the bits in a bit array. Due to the different lengths of the wires from the voltage output end of the LDO to the bits, the voltage of the bits far from the LDO (hereinafter referred to as "remote bits") will be lower than that of the bits close to the LDO (hereinafter referred to as "proximal bits") due to the influence of the wire resistance. In order to ensure that the remote bits have sufficient voltage to ensure the read-write success rate, the voltage output of the LDO needs to be increased.

[0003] However, the read-write life of the chip is sensitive to voltage, and too high a voltage will reduce the read-write life of the chip. Figure 1 The corresponding relationship between the failure rate of the bits of the storage chip and the wire length of the bits from the LDO is shown in FIG. 1. Figure 1 As shown in FIG. 1, tests show that in the current storage chip, the life of the proximal bits of the LDO is significantly lower than that of the remote bits of the LDO.

[0004] To this end, the technical personnel proposed a method of compensating for each bit by a compensation resistor, specifically, by setting a sampling circuit to collect the circuit parameters (voltage or current) in the bit array, calculating the compensation value according to the circuit parameters of the bit array, and adjusting the resistance value of the compensation resistor to balance the voltage of each bit. However, this method requires additional sampling circuit and compensation resistor circuit, and the circuit structure is complex, which is not conducive to the miniaturization of the equipment, and the compensation control is delayed and it is difficult to obtain high compensation accuracy. SUMMARY

[0005] The purpose of the present application is to provide a voltage regulating device and method for a storage chip and the storage chip, which can faster and higher precision voltage regulation for each bit on the storage chip, so that the voltage of each bit is consistent when it is selected, avoiding the contradiction between the insufficient voltage of the remote bits leading to read-write failure and the over-high voltage of the proximal bits leading to reduced life, thereby improving the read-write success rate of the bit array, and saving the chip area compared with the existing compensation scheme.

[0006] To solve the above technical problems, the present application provides a voltage regulating device for a storage chip, comprising: a feedback circuit, a first resistor, a second resistor and a voltage regulating element.

[0007] The positive input end of the voltage regulating element is configured to receive a reference voltage, a power supply end of a bit array of a memory chip is connected with an output end of the voltage regulating element, the feedback circuit is connected in series between the output end of the voltage regulating element and a negative input end of the voltage regulating element, and the second resistor is connected in series between the negative input end of the voltage regulating element and the ground.

[0008] The feedback circuit is a feedback resistor array structure composed of a plurality of feedback resistors and a plurality of feedback circuit switches; the feedback circuit switches are arranged correspondingly to the bits in the bit array; the feedback circuit switches and the corresponding bits are synchronously turned on and turned off, so as to synchronously change the connection relationship of each feedback resistor and further synchronously change the total resistance of the feedback circuit.

[0009] Optionally, the feedback circuit switches and the corresponding bits are synchronously turned on and turned off, so as to synchronously change the connection relationship of each feedback resistor and further synchronously change the total resistance of the feedback circuit, specifically as follows:

[0010] The feedback circuit switches and the corresponding bits are synchronously turned on and turned off, so that the voltage regulating element performs feedback regulation according to the feedback voltage of the negative input end and the reference voltage, and the voltage of each bit when being turned on is kept consistent.

[0011] Optionally, the voltage regulating element is a low-dropout linear regulator or an operational amplifier.

[0012] Optionally, the feedback resistor is specifically a feedback resistor trace for connecting the feedback circuit switches, and each feedback resistor trace is sequentially connected in series as two or more metal lines; the feedback circuit switches are connected between the metal lines, so that the feedback circuit switches are short-circuited to different feedback resistor traces after being turned on.

[0013] Optionally, the number of the metal lines is specifically two.

[0014] Optionally, the feedback circuit switches correspond one-to-one to the gate signal lines of the bit array.

[0015] Optionally, the bit array is specifically a two-dimensional array, and the gate signal lines specifically include x+1 bit lines in a horizontal coordinate direction and y+1 word lines in a vertical coordinate direction.

[0016] From the second end of the first resistor, in the arrangement sequence of the bit lines from the output end of the voltage regulating element, the feedback circuit switches corresponding to each bit line are connected in series between two metal lines in turn, and the control ends of the feedback circuit switches are connected to the control ends of the bit line gate switches corresponding to the bit lines in turn.

[0017] From the first end of the second resistor, in the arrangement order of the word lines from the output end of the voltage regulating element, the feedback circuit switch corresponding to each word line is connected between two metal lines in turn, and the control end of each feedback circuit switch is connected with the corresponding word line;

[0018] Wherein, x and y are positive integers.

[0019] Optionally, the first resistor and the second resistor are specifically trimmable resistors.

[0020] Optionally, the feedback circuit switch is specifically a MOS tube.

[0021] Optionally, the reference voltage is specifically a read operation voltage of the storage chip or a write operation voltage of the storage chip.

[0022] To solve the above technical problems, the application further provides a storage chip comprising the voltage regulating device of any one of the above.

[0023] To solve the above technical problems, the application further provides a voltage regulating method of a storage chip, applied to a voltage regulating device of a storage chip having a feedback circuit, a first resistor, a second resistor and a voltage regulating element; a positive phase input end of the voltage regulating element is used for receiving a reference voltage, a power supply end of a bit array of the storage chip is connected with an output end of the voltage regulating element, the feedback circuit and the first resistor are connected in series between the output end of the voltage regulating element and a negative phase input end of the voltage regulating element, and the second resistor is connected in series between the negative phase input end of the voltage regulating element and the ground; the feedback circuit is a feedback resistor array structure composed of a plurality of feedback resistors and a plurality of feedback circuit switches; the feedback circuit switch is arranged corresponding to a bit in the bit array.

[0024] The voltage regulating method comprises:

[0025] When generating a first control signal for the bit, a second control signal for the feedback circuit switch corresponding to the bit is generated;

[0026] The first control signal and the second control signal are synchronously issued to change the feedback voltage of the negative phase input end of the voltage regulating element by the total resistance value of the feedback circuit controlled by the second control signal.

[0027] The voltage regulating device of the memory chip provided by the present application includes: a feedback circuit, a first resistor, a second resistor and a voltage regulating element; the feedback circuit and the first resistor are connected in series between the output terminal of the voltage regulating element and the negative input terminal of the voltage regulating element, and the second resistor is connected in series between the negative input terminal of the voltage regulating element and the ground; the feedback circuit switch in the feedback circuit and the corresponding bit in the bit array of the memory chip are synchronously selected and turned off, so that when the bit is selected, the wiring resistance corresponding to the bit position is fed back to the negative input terminal of the voltage regulating element through the feedback circuit, so that the voltage regulating element can adjust the output voltage according to the feedback voltage of the negative input terminal and the reference voltage of the positive input terminal, so that when each bit is selected, The voltage tends to be consistent, and there is no difference in bit voltage caused by wiring resistance differences due to the distance from the power supply terminal of the bit array, which can lead to read and write failures due to insufficient voltage at the far end bit, while the life of the near end bit is too high due to excessive voltage, thereby improving the read yield of the bit array. Compared with the existing technology that uses a sampling circuit to sample and then determines the compensation scheme, there is no need to set up a sampling circuit and a compensation resistor circuit separately, which saves chip area and has more space to design a more sophisticated feedback circuit to accurately reflect the changes in bit voltage. The automatic adjustment function of the voltage adjustment element realizes rapid adjustment of bit voltage differences, and can adjust the voltage of each bit on the memory chip faster and with higher precision.

[0028] The present application also provides a voltage regulation method for a memory chip and a memory chip, which have the above-mentioned beneficial effects and will not be described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the embodiments of the present application or the technical solutions of the prior art, the following is a brief introduction to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0030] Figure 1 The corresponding relationship between the bit failure rate of the memory chip and the bit LDO trace length under the same number of write cycles is shown in the figure.

[0031] Figure 2 A schematic structural diagram of a voltage regulating device for a memory chip provided in an embodiment of the present application;

[0032] Figure 3 A method provided in the embodiment of the present application Figure 2 Example diagram based on. DETAILED DESCRIPTION

[0033] The core of this application is to provide a voltage regulation device, method, and memory chip for a memory chip. These devices can regulate the voltage of each bit on the memory chip faster and with higher precision, ensuring consistent voltage across all bits when enabled. This avoids the conflict between insufficient voltage at a far-end bit causing read / write failures and excessive voltage at a near-end bit causing a reduced lifespan. This improves the write and read yield of the bit array and saves chip area compared to existing compensation schemes.

[0034] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0035] Example 1

[0036] Figure 2 A schematic structural diagram of a voltage regulation device for a memory chip provided in an embodiment of the present application.

[0037] like Figure 2 As shown, a two-dimensional bit array with x+1 bit lines and y+1 word lines is used as an example. The bit lines include BL0, BL1, ..., BLx-1, and BLx. The selection signal for each bit line is input into the gate of the bit line selection switch on the corresponding bit line. The word lines include VWL0, VWL1, ..., VWLy-1, and VWLy. The selection signal for each word line is input into the gate of the word line selection switch on the corresponding word line. When a bit line and a word line are simultaneously selected, a single bit is selected, thereby selecting bits BitCell_00 through BitCell_xy in the two-dimensional bit array. Furthermore, there are three-dimensional bit arrays (such as those used in NAND Flash) that add selection signal lines in the ordinate direction in addition to the bit lines in the abscissa direction and the word lines in the ordinate direction.

[0038] In the existing bit array, the voltage at the output terminal VWR of the voltage regulating element U1 (e.g. Figure 2 The voltage received at bit BitCell_00 shown in the figure is fixed. However, the distance between each bit and the output terminal VWR of the voltage regulator U1 varies, resulting in different trace resistance. As a result, the voltage decreases as the bit is farther away from the output terminal VWR of the voltage regulator U1. This leads to the contradiction that insufficient voltage at the far-end bit causes read and write failures, while excessive voltage at the near-end bit causes a shortened lifespan.

[0039] To solve the problem, the embodiment of the present application provides a scheme for voltage compensation when the bits in the bit array are selected, that is, when the near-end bits are selected, the output end VWR of the voltage regulating element U1 provides a smaller voltage, and when the far-end bits are selected, the output end VWR of the voltage regulating element U1 provides a larger voltage, so that the voltage falling on the selected bits remains consistent, and the contradiction between the insufficient voltage of the far-end bits leading to read / write failure and the over-high voltage of the near-end bits leading to reduced service life is eliminated.

[0040] As shown in Figure 2 , the voltage regulating device of the storage chip provided by the embodiment of the present application comprises a feedback circuit, a first resistor R1, a second resistor R2 and a voltage regulating element U1.

[0041] The positive input end of the voltage regulating element U1 is configured to receive a reference voltage , the power supply end of the bit array of the storage chip is connected with the output end of the voltage regulating element U1, the feedback circuit is connected in series between the output end of the voltage regulating element U1 and the negative input end of the voltage regulating element U1, and the second resistor R2 is connected in series between the negative input end of the voltage regulating element U1 and the ground (specifically, as shown in Figure 2 , the power supply end of the bit array of the storage chip and the output end VWR of the voltage regulating element U1 are connected, the second end of the first resistor R1 is connected with the first end of the feedback circuit, the second end of the feedback circuit and the first end of the second resistor R2 are connected with the negative input end of the voltage regulating element U1, and the second end of the second resistor R2 is grounded).

[0042] The feedback circuit is a feedback resistor array structure composed of a plurality of feedback resistors and a plurality of feedback circuit switches; the feedback circuit switches are arranged in correspondence with the bits in the bit array; the feedback circuit switches are synchronously selected and turned off with the corresponding bits to synchronously change the connection relationship of each feedback resistor and further synchronously change the total resistance of the feedback circuit.

[0043] Preferably, the feedback circuit switches are synchronously selected and turned off with the corresponding bits to synchronously change the connection relationship of each feedback resistor and further synchronously change the total resistance of the feedback circuit, specifically, the feedback circuit switches are synchronously selected and turned off with the corresponding bits to make the voltage regulating element perform feedback regulation according to the feedback voltage of the negative input end and the reference voltage, and make the voltage of each bit when selected remain consistent.

[0044] It should be noted that the voltage regulating device of the storage chip provided by the embodiment of the present application is not limited to the structure shown in Figure 2 .

[0045] In a specific implementation, the voltage regulating element U1 can be a linear voltage regulator (low dropout linear voltage regulator) or an operational amplifier, or other voltage regulating element with feedback regulation capability.

[0046] Reference voltage The reference voltage can be a read operation voltage for the memory chip or a write operation voltage for the memory chip.

[0047] The feedback circuit is introduced as the feedback resistor of the voltage regulating element U1, the total resistance of the feedback circuit changes synchronously with the selection of the bit, the feedback circuit and the first resistor R1 are connected in series between the output end of the voltage regulating element U1 and the negative phase input end of the voltage regulating element U1, and the positions of the feedback circuit and the first resistor R1 can be exchanged. By using the virtual short and virtual open characteristics of the operational amplifier, the voltage regulating element U1 automatically adjusts the output voltage, and the voltage of the power supply end of the bit array is adjusted.

[0048] By using the characteristics of the voltage regulating element U1, such as the operational amplifier in the same phase amplification output, the relationship between the first resistor R1, the second resistor R2, the total resistance of the feedback circuit and the corresponding trace resistance when the bit is selected can be obtained, and the corresponding total resistance of the feedback circuit when each bit is selected is designed in combination with the target voltage of each bit. According to the control logic of the feedback circuit switch and the corresponding bit being selected synchronously, the corresponding relationship between the feedback circuit switch and the feedback resistor is designed.

[0049] The corresponding relationship between the feedback circuit switch and the bit can be one-to-one, one-to-many or many-to-one, which can be determined according to the physical space, cost and voltage regulation accuracy of the memory chip. In the case of the highest voltage regulation accuracy, each bit corresponds to a unique selection mode of the feedback resistor array structure; if the voltage regulation accuracy requirement is not high, multiple adjacent bits can correspond to the same selection mode of the feedback resistor array structure.

[0050] The feedback resistor can be in the form of a metal wire, a patch resistor or a combination of different types of feedback resistors, which can be adaptively designed according to the physical space, cost and voltage regulation accuracy of the memory chip.

[0051] The feedback circuit switch is realized by using an electrically controlled switch tube, such as a MOS tube, or other switching elements such as a relay, an IGBT, etc.

[0052] By using the voltage regulating device of the memory chip provided in the present application, when the bit is selected, the corresponding trace resistance of the bit is fed back to the voltage regulating element U1 through the feedback circuit, and the voltage regulating element U1 adjusts the output voltage according to the reference voltage of the same phase input end And the function of the feedback resistance automatically adjusts the output voltage, realizes the reduction of the output voltage of the power supply end of the bit array to the near-end bit, and the increase of the output voltage of the power supply end of the bit array to the far-end bit, so that the voltage at the bit when the bit is selected is consistent. Compared with the control scheme of determining the compensation resistance after sampling in the prior art, the sampling circuit and the compensation resistance circuit do not need to be set respectively, the chip area is saved, there is more space to design more precise feedback circuit to accurately reflect the change of the bit voltage, and the function of the voltage regulating element U1 is used to automatically adjust the bit voltage difference, so that the voltage of each bit on the storage chip can be adjusted faster and more accurately.

[0053] Embodiment two

[0054] On the basis of the above embodiment, as shown in Figure 2 , the feedback resistance is specifically a feedback resistance trace for connecting the feedback circuit switch, and each feedback resistance trace is sequentially connected in series as two or more metal lines; each metal line is connected through the feedback circuit switch, so that the feedback circuit switch is short-circuited after being selected to different feedback resistance traces.

[0055] It should be noted that the above scheme of sequentially connecting each feedback resistance trace in series as two metal lines is not a complete two metal lines, but as shown in Figure 2 , the feedback resistance trace is divided into two groups of connection lines for connecting both ends of the feedback circuit switch, and the feedback resistance array structure in the shape of a ladder is formed by the feedback resistance trace and the feedback circuit switch.

[0056] In addition, each feedback resistance trace can be sequentially connected in series as two or more metal lines, and the feedback resistance array structure in the shape of a chessboard can be formed by the feedback resistance trace in the vertical direction and the plurality of feedback circuit switches in the horizontal direction. Therefore, the sum of the resistances of each feedback resistance trace adjacent in the horizontal direction should be proportional to the resistance of the single-stage gate signal line of the bit corresponding to the feedback circuit switch in the horizontal direction, so as to achieve the purpose of voltage balance by pre-adjusting the first resistance R1 and the second resistance R2. For example, as shown in Figure 2 , the sum of the resistances of the two feedback resistance traces in the feedback resistance array structure is equal to twice the resistance of the single-stage gate signal line in the bit array.

[0057] On this basis, the feedback circuit switches adjacent in the horizontal direction can not be connected to the same connection point.

[0058] In addition, the feedback resistance array structure is not limited to a planar structure, but can also be a three-dimensional structure. When the bit array is a three-dimensional structure, the feedback resistance array structure can be a two-dimensional structure as shown in Figure 2 , or a three-dimensional structure, so as to adapt to different bit array structures and different voltage regulation precision corresponding application scenarios.

[0059] Embodiment Three

[0060] On the basis of the above embodiment, as shown in the feedback circuit in Figure 2 , if the number of metal lines is two, that is, the feedback resistance array structure is in the shape of a ladder composed of feedback resistance wires and feedback circuit switches, the feedback circuit switches can be set to correspond one-to-one to the selection signal lines of the bit array. That is, if the bit array is a two-dimensional array, the number of feedback circuit switches is equal to the sum of the number of bit lines and the number of word lines; if the bit array is a three-dimensional array, the number of feedback circuit switches is the sum of the number of bit lines and the number of word lines plus the number of selection signal lines in the vertical coordinate direction.

[0061] Of course, if the storage chip space and cost are limited and the voltage regulation accuracy is not high, the same feedback circuit switch can be set for adjacent bits, and the feedback circuit switch and the selection signal line of the bit array can also be in a one-to-many relationship.

[0062] Embodiment Four

[0063] Figure 3 An example diagram on the basis of the embodiment of the present application is provided. Figure 2

[0064] On the basis of the above embodiment, the embodiment of the present application takes the one-to-one correspondence between the feedback circuit switch and the selection signal line of the bit array as an example for further description. At this time, the total resistance value change of the feedback circuit should be completely synchronized with the wire resistance in the array structure (from the selected bit), and the line resistance between adjacent selection signal lines and the feedback resistance in the corresponding coordinate direction in the feedback circuit should be in a fixed proportion.

[0065] As shown in Figure 2 , the bit array is specifically a two-dimensional array, and the selection signal line specifically includes x+1 bit lines in the horizontal coordinate direction and y+1 word lines in the vertical coordinate direction;

[0066] From the second end of the first resistor R1, in the arrangement order of the bit lines from the output end VWR of the voltage regulation element U1, the feedback circuit switches corresponding to each bit line are connected between two metal lines in turn, and the control end of each feedback circuit switch is connected to the control end of the bit line selection switch corresponding to the bit line;

[0067] From the first end of the second resistor R2, in the arrangement order of the word lines from the output end VWR of the voltage regulation element U1, the feedback circuit switches corresponding to each word line are connected between two metal lines in turn, and the control end of each feedback circuit switch is connected to the corresponding word line.

[0068] Wherein, x and y are positive integers.

[0069] ​Based on the structure of the voltage regulating device as shown in Figure 2 , by setting the resistance value of the first resistor R1 and the second resistor R2, , ; wherein, is the resistance value of the first resistor R1, is the resistance value of the second resistor R2, is the proportional coefficient between the total resistance value of the feedback circuit after being synchronously gated and the wiring resistance of the output terminal VWR of the bit-to-voltage regulating element U1, is the wiring resistance of the output terminal VWR of the bit-to-voltage regulating element U1, is the target voltage of the bit, is the reference voltage. Under the conditions that the proportional coefficient n, the reference voltage , and the target voltage of the bit are known, the resistance value of the first resistor R1 and the resistance value of the second resistor R2 can be calculated, which are the factory design values of the first resistor R1 and the second resistor R2.

[0070] Based on the structure of the voltage regulating device as shown in Figure 2 , during the control process, the address decoding signal of the bit strobe signal line is synchronized with the address decoding signal of the feedback circuit switch.

[0071] Preferably, the feedback resistance wiring in the horizontal coordinate direction and the feedback resistance wiring in the vertical coordinate direction are respectively realized by two parallel and equal-length wires, the feedback circuit switches in the horizontal coordinate direction of the feedback resistance wiring share the bit line strobe signal line of the bit, the feedback circuit switches in the vertical coordinate direction of the feedback resistance wiring share the word line strobe signal line of the bit and share the array control signal, the feedback resistance wiring adopts the same material as the wiring in the bit array, and preferably also adopts a similar structure, i.e., the feedback resistance wiring has the same length as the corresponding single-bit wiring, and the cross-sectional area can also be the same. As shown in Figure 3As shown, the control terminals of the feedback circuit switches in the feedback resistance traces (Rcomp_x) in the horizontal direction share the bit selection signals BP0, BP1,... BPx-1, BPx of the corresponding bit lines BL0, BL1,... BLx-1, BLx, and the other connection lines of the corresponding bits are SL0, SL1,... SLx-1, SLx; the control terminals of the feedback circuit switches in the feedback resistance traces (Rcomp_y) in the vertical direction share the word line selection signals VWL0, VWL1,... VWLy-1, VWLy of the corresponding word lines VWL0, VWL1,... VWLy-1, VWLy. When a bit line and a word line select a bit, the corresponding feedback circuit switches are also selected synchronously. For example Figure 3 As shown, when the bit line BLx-1 and the word line VWLy-1 select the bit BitCell_(x-1)(y-1), the corresponding trace resistance is the resistance value of the array trace shown by the curve L1, the feedback circuit switch corresponding to the bit line BLx-1 and the feedback circuit switch corresponding to the word line VWLy-1 are selected synchronously, and the resistance of the feedback circuit is the sum of the resistance values of the feedback resistance traces shown by the curve L2.

[0072] The total resistance of the next group of feedback resistance traces selected synchronously is twice the trace resistance of the output terminal VWR of the bit to voltage regulating element U1, and thus:

[0073] .

[0074] Suppose: , , ,

[0075] Then: , ,

[0076] The calculation gives: , ;

[0077] At this time, is fixed as .

[0078] For a three-dimensional bit array structure, feedback resistance in the vertical direction is added to compensate for the voltage of the trace resistance in the vertical direction.

[0079] Example Five

[0080] The calculation method of the design value of the first resistor R1 and the design value of the second resistor R2 is given in the above embodiment. However, in actual application, considering that the resistance values of the first resistor R1 and the second resistor R2 in actual application are deviated from the design values, the first resistor R1 and the second resistor R2 can be adjustable resistors.

[0081] After being put into actual application, by monitoring the voltage of the output terminal VWR of the voltage adjustment element U1 to the bit at different distances, the adjusted values of the first resistor R1 and the second resistor R2 can be obtained.

[0082] The above describes various embodiments of the voltage adjustment device of the storage chip, and on this basis, the application further discloses a voltage adjustment method of a storage chip and a storage chip corresponding to the above voltage adjustment device of the storage chip.

[0083] Embodiment six

[0084] The storage chip provided by the embodiments of the application can include the voltage adjustment device of the storage chip provided by any one of the above embodiments.

[0085] Since the embodiments of the storage chip part correspond to the embodiments of the voltage adjustment device of the storage chip, the embodiments of the storage chip part are described in the description of the embodiments of the voltage adjustment device of the storage chip, and are not described here in detail.

[0086] Embodiment seven

[0087] The voltage adjustment method of the storage chip provided by the embodiments of the application is applied to the voltage adjustment device of the storage chip having a feedback circuit, a first resistor, a second resistor and a voltage adjustment element; a positive input terminal of the voltage adjustment element is used to receive a reference voltage, a first terminal of the first resistor and a power supply terminal of a bit array of the storage chip are connected with an output terminal of the voltage adjustment element, a second terminal of the first resistor is connected with a first terminal of the feedback circuit, a second terminal of the feedback resistor and a first terminal of the second resistor are connected with a negative input terminal of the voltage adjustment element, and a second terminal of the second resistor is grounded; the feedback circuit is a feedback resistor array structure composed of a plurality of feedback resistors and a plurality of feedback circuit switches; and the feedback circuit switches are arranged correspondingly to the bits in the bit array.

[0088] The voltage adjustment method comprises:

[0089] When the first control signal for the bit is generated, a second control signal for the feedback circuit switch corresponding to the bit is generated;

[0090] The first control signal and the second control signal are synchronously issued, so as to change the feedback voltage of the negative input terminal of the voltage adjustment element by using the total resistance value of the feedback circuit controlled by the second control signal.

[0091] Since the embodiments of the voltage regulation method part of the storage chip correspond to the embodiments of the voltage regulation device part of the storage chip, the embodiments of the voltage regulation method part of the storage chip are described in the description of the embodiments of the voltage regulation device part of the storage chip, and are not described here.

[0092] The storage chip voltage regulation device, method and storage chip provided by the present application are described in detail above. Each embodiment in the description is described in a progressive manner, and each embodiment mainly describes the difference from other embodiments. The same or similar parts of each embodiment can be understood by referring to each other. For the embodiments of the storage chip voltage regulation method and the storage chip, since they correspond to the embodiments of the storage chip voltage regulation method, the description is relatively simple, and the relevant parts can be understood by referring to the description of the storage chip voltage regulation method part. It should be pointed out that, for those skilled in the art, without departing from the principles of the present application, some improvements and modifications can be made to the present application, and these improvements and modifications also fall within the protection scope of the claims of the present application.

[0093] It should also be noted that, in the present specification, the relationship terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between the entities or operations. Moreover, the terms "include", "contain" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. Without more limitations, the element defined by the statement "including a" does not exclude the presence of other identical elements in the process, method, article or device including the element.

Claims

1. A voltage regulating device for a memory chip, characterized in that: include: A feedback circuit, a first resistor, a second resistor and a voltage regulating element; The positive input terminal of the voltage regulating element is used to receive a reference voltage, the power supply terminal of the bit array of the memory chip is connected to the output terminal of the voltage regulating element, the feedback circuit and the first resistor are connected in series between the output terminal of the voltage regulating element and the negative input terminal of the voltage regulating element, and the second resistor is connected in series between the negative input terminal of the voltage regulating element and ground; The feedback circuit is a feedback resistor array structure composed of a plurality of feedback resistors and a plurality of feedback circuit switches; the feedback circuit switches are arranged corresponding to the bits in the bit array; the feedback circuit switches and the corresponding bits are synchronously turned on and off to synchronously change the connection relationship of the feedback resistors and thus the total resistance of the feedback circuit; If the bit array is a two-dimensional array, the selection signal lines of the bit array include x+1 bit lines in the horizontal coordinate direction and y+1 word lines in the vertical coordinate direction; Starting from the second end of the first resistor, the feedback circuit switches corresponding to the bit lines are sequentially connected between two metal lines in the order in which the bit lines are arranged from the output end of the voltage regulating element, and the control end of each feedback circuit switch is correspondingly connected to the control end of the bit line selection switch of the corresponding bit line; Starting from the first end of the second resistor, in the order in which the word lines are arranged from the output end of the voltage regulating element, the feedback circuit switches corresponding to the word lines are sequentially connected between the two metal lines, and a control end of each feedback circuit switch is connected to the corresponding word line; Wherein, x and y are both positive integers.

2. The voltage regulating device according to claim 1, wherein: The feedback circuit switch and the corresponding bit are synchronously turned on and off to synchronously change the connection relationship of each feedback resistor and thus synchronously change the total resistance of the feedback circuit, specifically: The feedback circuit switch and the corresponding bit are synchronously turned on and off, so that the voltage regulating element performs feedback regulation according to the feedback voltage of the negative phase input terminal and the reference voltage, so that the voltage of each bit when being turned on remains consistent.

3. The voltage regulating device according to claim 1, wherein: The voltage regulating element is a low voltage drop linear regulator or an operational amplifier.

4. The voltage regulating device according to claim 1, wherein: The feedback resistor is specifically a feedback resistor line used to connect the feedback circuit switch, and each of the feedback resistor lines is sequentially connected in series to form two or more metal lines; the metal lines are connected through the feedback circuit switch, so that different feedback resistor lines are short-circuited when the feedback circuit switch is turned on.

5. The voltage regulating device according to claim 4, characterized in that: The number of the metal wires is specifically two.

6. The voltage regulating device according to claim 5, characterized in that: The feedback circuit switches correspond one-to-one to the selection signal lines of the bit array.

7. The voltage regulating device according to claim 1, wherein: The first resistor and the second resistor are both adjustable resistors.

8. The voltage regulating device according to claim 1, wherein: The feedback circuit switch is specifically a MOS tube.

9. The voltage regulating device according to claim 1, wherein: The reference voltage is specifically a read operation voltage for the memory chip or a write operation voltage for the memory chip.

10. A memory chip, characterized in that: A voltage regulating device comprising the memory chip according to any one of claims 1 to 9.

11. A method for regulating voltage of a memory chip, characterized in that: A voltage regulator device for a memory chip comprising a feedback circuit, a first resistor, a second resistor, and a voltage regulator element; the positive input terminal of the voltage regulator element is used to receive a reference voltage, the power supply terminal of the memory chip's bit array is connected to the output terminal of the voltage regulator element, the feedback circuit and the first resistor are connected in series between the output terminal of the voltage regulator element and the negative input terminal of the voltage regulator element, and the second resistor is connected in series between the negative input terminal of the voltage regulator element and ground; the feedback circuit is a feedback resistor array structure composed of multiple feedback resistors and multiple feedback circuit switches; The feedback circuit switches are arranged corresponding to the bits in the bit array; The voltage regulation method comprises: When generating the first control signal for the bit, generating a second control signal for the feedback circuit switch corresponding to the bit; Synchronously issuing the first control signal and the second control signal to change the feedback voltage at the negative input terminal of the voltage regulating element using the total resistance of the feedback circuit controlled by the second control signal; Wherein, if the bit array is specifically a two-dimensional array, the selection signal lines of the bit array specifically include x+1 bit lines in the horizontal coordinate direction and y+1 word lines in the vertical coordinate direction; Starting from the second end of the first resistor, the feedback circuit switches corresponding to the bit lines are sequentially connected between two metal lines in the order in which the bit lines are arranged from the output end of the voltage regulating element, and the control end of each feedback circuit switch is correspondingly connected to the control end of the bit line selection switch of the corresponding bit line; Starting from the first end of the second resistor, in the order in which the word lines are arranged from the output end of the voltage regulating element, the feedback circuit switches corresponding to the word lines are sequentially connected between the two metal lines, and a control end of each feedback circuit switch is connected to the corresponding word line; Wherein, x and y are both positive integers.

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