A transparent flexible artificial synapse array and a preparation method and application thereof

Abstract

The present application relates to a kind of transparent flexible artificial synapse array and its preparation method and application.The preparation method of the transparent flexible artificial synapse array includes the following steps: forming strip-shaped bottom electrode on transparent flexible substrate, bottom electrode-flexible substrate is obtained;Ti3C2T x Nanosheet is dispersed in solvent, and Ti3C2T x Nanosheet dispersion is obtained;Ti3C2T x Nanosheet dispersion is spin-coated on bottom electrode-flexible substrate, annealing, and TiO y / Ti3C2T x Thin film-bottom electrode-flexible substrate is obtained;Strip-shaped top electrode is formed, and the transparent flexible artificial synapse array is obtained.The transparent flexible artificial synapse array has higher visible light transmittance, high on-off ratio, can maintain the memristive window in the bending state with minimum curvature radius, and can maintain 10 4 times of cycle test under the condition that curvature radius approaches limit, so that the behavior of synapse plasticity with adjustable conductance can be realized, and the behavior of simulating neuron processing external stimulus in human brain can be realized.

Description

Technical Field

[0001] This invention relates to the field of flexible memristor technology, and more specifically, to a transparent flexible artificial synapse array, its fabrication method, and its applications. Background Technology

[0002] Due to the rapid development of big data technology in recent years, the growth rate of the storage and computing capabilities of traditional storage structures can no longer meet the storage requirements of today's data volumes. The limitations of the von Neumann architecture have gradually become apparent, making the "in-memory computing" three-layer memristor structure at both ends increasingly necessary. Flexible memristors, based on their portable, wearable, and foldable design requirements, have gained widespread attention and research interest from researchers. The storage and computing performance of flexible memristors provides a more efficient design approach for the future development of flexible wearable computers, implantable chips, electronic skin, and flexible sensors, and also brings revolutionary changes to flexible artificial synapses, flexible neural networks, and flexible neuromorphic computing.

[0003] MXene is a novel two-dimensional material of transition metal carbon nitride compounds. Based on its unique sheet-like nanosheet structure and good hydrophilicity, it can be used to prepare large-area, high-quality, uniform thin films simply and efficiently through low-cost and universal solution processing methods. Due to its excellent metal-like conductivity, chemical properties, electrical properties and mechanical flexibility, it is widely used in many flexible electronic fields such as electromagnetic shielding films, supercapacitors and electrocatalysis. However, its application in the field of resistive switching memory has been rarely explored.

[0004] A Chinese patent entitled "A Method for Fabricating a Memristor Array Based on Two-Dimensional Material MXene" discloses a method for fabricating a memristor array by introducing an MXene layer. Specifically, it describes a method for successfully fabricating a memristor array by introducing an MXene layer and a SiO2 layer into a traditional memristor structure through physical vapor deposition, spin coating, and the design of a three-layer mask. This method solves the problems of poor cycle stability and poor repeatability in the current-voltage characteristics of memristors by restricting the conductive channels in the memristor. However, it is fabricated on a rigid silicon substrate, and the resulting device does not meet the requirements for flexibility and transparency. In addition, the on / off ratio of the memristor is low, which requires high-precision discrimination circuitry for practical applications. Furthermore, the fabrication process also needs to be optimized.

[0005] Therefore, it is urgent to solve the technical problems of low on / off ratio, complex fabrication process, large differences in device arrays, and to fill the gap in MXene-based transparent flexible memristors. Summary of the Invention

[0006] The primary objective of this invention is to overcome the aforementioned technical problems of low on / off ratio, complex fabrication process, large differences in device arrays, and the need to fill the gap in transparent flexible memristors based on MXene, and to provide a method for fabricating transparent flexible artificial synapse arrays. This invention relates to Ti3C2T x The thin film is annealed at a specific temperature to form a TiO2 film with a relatively small thickness. y / Ti3C2T x A thin film, combined with an active strip-shaped top electrode and a cross-array structure, yields a transparent, flexible artificial synapse array with high visible light transmittance and an on / off ratio ≥2×10⁻⁶. 1 (reaching a maximum of 4×10) 2 It can maintain the memristor window under bending conditions with extremely small curvature radius (1mm) and maintain 10 when the curvature radius is close to the limit. 4 Through repeated cyclic testing, synaptic plasticity behavior with adjustable conductivity (resistance) can be achieved, thereby mimicking the behavior of neurons in the human brain in processing external stimuli and optimizing integrated neural network neuromorphic computing and machine learning technologies. Furthermore, the fabrication method of this invention employs a low-cost and simple spin-coating method, making the transparent flexible artificial synaptic array easy to fabricate and ensuring stable quality.

[0007] A further objective of this invention is to provide a transparent, flexible artificial synapse array.

[0008] A further objective of this invention is to provide the application of the above-described transparent flexible artificial synapse array as a storage and computing device in the fabrication of flexible wearable smart devices.

[0009] The above-mentioned objective of this invention is achieved through the following technical solution:

[0010] A method for fabricating a transparent, flexible artificial synapse array includes the following steps:

[0011] S1. Form a strip-shaped bottom electrode on a transparent flexible substrate to obtain the bottom electrode-flexible substrate, for later use; then apply Ti3C2T x Nanosheets were dispersed in a solvent to obtain Ti3C2T x Nanosheet dispersion, ready for use;

[0012] S2. Ti3C2T x Nanosheet dispersions were spin-coated onto a bottom electrode-flexible substrate and annealed at 200–400 °C to obtain TiO₂. y / Ti3C2T x Thin film - bottom electrode - flexible substrate;

[0013] S3. In TiO y / Ti3C2T xA strip-shaped top electrode is formed on a thin film-bottom electrode-flexible substrate to obtain the transparent flexible artificial synapse array;

[0014] The strip-shaped top electrode is an active electrode, and the strip-shaped bottom electrode and the strip-shaped top electrode form a cross array structure; the TiO y / Ti3C2T x TiO2 thin film-bottom electrode-flexible substrate y / Ti3C2T x The thickness of the thin film is 10–30 nm.

[0015] It should be understood that "TiO" in this invention y "Refers to Ti3C2T after annealing at a specific temperature (200-400℃)" x The material layer formed on the surface consists of titanium atoms, oxygen atoms, and oxygen-containing functional groups. The molar ratio of titanium to oxygen in this material layer is 1:y, where 0 < y < 4. The value of y is related to the annealing temperature; the higher the annealing temperature, the larger the value of y.

[0016] This invention first forms a strip-shaped bottom electrode on a flexible substrate, and then forms TiO2 through spin coating and annealing. y / Ti3C2T x Thin film, then on TiO y / Ti3C2T x A strip-shaped top electrode is formed on the thin film to obtain a transparent flexible artificial synapse array. Specifically, the transparent flexible artificial synapse array of this invention includes a flexible substrate, a strip-shaped bottom electrode, and a TiO2 layer arranged sequentially from bottom to top. y / Ti3C2T x Thin film and strip top electrode.

[0017] Most existing MXene (Ti3C2T) x Memristors can only be fabricated on traditional rigid substrates, and to enable the device to have a memristor mechanism, the MXene film needs to be relatively thick (over 100 nm). However, excessively thick MXene films lead to a higher modulus of the material, resulting in decreased flexibility when stretched or bent. Under excessive stress, wrinkles and cracks can easily form on the surface and inside the film to release stress, affecting the device's performance. At the same time, a thick resistive switching layer is not conducive to the subsequent integration of the device chip and the development of Moore's Law.

[0018] The inventors of this invention attempted to spin-coat relatively thin (10-30 nm) MXene films onto flexible substrates, which gives the device excellent mechanical flexibility and also helps to improve the device's integration density. However, without annealing, the current-voltage characteristic curves of a single MXene film at both ends show a short-circuit IV characteristic curve, and under the application of a bipolar voltage signal, the hysteresis curve characteristic of a memristor is not observed. The reason is that with a small thickness, a single MXene film exhibits excellent metal-like conductivity. Directly applying a voltage signal across its two ends will directly form a conductive path connecting the positive and negative electrodes.

[0019] The inventors of this invention discovered through multiple studies that Ti3C2T x Nanosheet dispersions were spin-coated onto a bottom electrode-flexible substrate to form Ti3C2T. x The thin film is then annealed at a specific temperature (200–400 °C) to produce a Ti3C2T film. x Introducing TiO2 onto the surface of the thin film y High-resistivity layer, forming TiO y / Ti3C2T x This thin film allows the device to exhibit a high on / off ratio and stable oxidation resistance. The reason for this is that annealing at a specific temperature allows for the formation of thin Ti3C2T films with relatively small thicknesses. x Introducing TiO2 onto the thin film surface y A high-resistivity layer allows the device to have a large on / off ratio even with a relatively thin resistive switching layer. Annealing improves the device's transmittance, giving it high transparency. Furthermore, annealing at specific temperatures can enhance the properties of Ti3C2T. x Pre-oxidation of active functional groups on the thin film surface protects the internal functional group structure and provides a stable oxygen environment, playing a crucial role in maintaining the stable operating performance of the memristor. If the annealing temperature is too low, Ti3C2T... x TiO formed on the surface of the thin film y The high-resistivity layer is too thin, resulting in a small difference between the high and low resistance states. This significantly increases the requirements for the subsequent external discrimination circuitry to distinguish between the high and low resistance states. If the annealing temperature is too high, Ti3C2T... x The film will be completely oxidized, becoming a completely amorphous TiO2. y Layer, amorphous TiO y The layering of TiO2 causes the formation of conductive channels in the memristor to be highly random, resulting in large variations in cycle time and a significant decrease in device stability; meanwhile, the completely amorphous TiO2... y Layers will greatly reduce the flexibility of the device and decrease its mechanical properties, making it unsuitable for the application settings of flexible wearable smart devices.

[0020] Further research revealed that, in order to adapt to the low power consumption characteristics of flexible memristors, the strip-shaped top electrode of this invention needs to be an active electrode, in TiO2. y / Ti3C2T x With a small film thickness, the conduction and rupture of the conductive channel can be achieved through the redox reaction of metal ions in the active electrode, forming interconversion between metal cations and metal atoms, thereby reducing the memristor's operating voltage (3V) and power consumption. If an inert electrode is used for the strip top electrode, due to TiO2... y / Ti3C2T x The unique nanosheet structure of the thin film means that the inert electrode cannot achieve the conduction and rupture of the conductive channel through the redox reaction of metal ions to form metal cations and the interconversion between metal atoms. Instead, it requires controlling the TiO2 layer. y / Ti3C2T x The accumulation and diffusion of oxygen vacancies in the thin film enable the conduction and rupture of conductive channels, but due to the TiO₂... y / Ti3C2T x Ti3C2T in thin films x There are gaps between nanosheets, making it difficult for oxygen atoms and oxygen vacancies to accumulate. As a result, memristors require a higher operating voltage (>5V) to conduct and break the conductive channel, which makes it difficult to meet the low power consumption requirements of flexible wearable smart devices.

[0021] The transparent flexible artificial synapse array of this invention features a strip-shaped bottom electrode and a strip-shaped top electrode that form a cross-array structure. Compared to large-area bulk thin-film electrodes, the independent memristor units in this cross-array structure formed by the strip electrodes can better reduce the mutual influence caused by stress during bending. In large-area thin-film electrodes, cracks caused by bending stress can lead to changes in electrode resistance or even electrode open circuits, affecting each memristor unit. Furthermore, if a probe scratches a large-area bulk thin-film electrode during testing, it will directly contact the material surface or even the bottom electrode, causing a short circuit failure. With this cross-array structure, the probe directly contacts the high-resistivity flexible substrate, preventing short circuit failure and improving device testing stability.

[0022] That is, the present invention relates to Ti3C2T x The thin film is annealed at a specific temperature to form a TiO2 film with a relatively small thickness. y / Ti3C2T x A thin film, combined with an active strip-shaped top electrode and a cross-array structure, yields a transparent, flexible artificial synapse array with high visible light transmittance and an on / off ratio ≥2×10⁻⁶. 1 (reaching a maximum of 4×10) 2It can maintain the memristor window under bending conditions with extremely small curvature radius (1mm) and maintain 10 when the curvature radius is close to the limit. 4 Through repeated cyclic testing, synaptic plasticity behavior with adjustable conductivity (resistance) can be achieved, thereby mimicking the behavior of neurons in the human brain in processing external stimuli and optimizing integrated neural network neuromorphic computing and machine learning technologies. Furthermore, the fabrication method of this invention employs a low-cost and simple spin-coating method, making the transparent flexible artificial synaptic array easy to fabricate and ensuring stable quality.

[0023] Preferably, the thickness of the transparent flexible substrate in step S1 is 50–500 μm.

[0024] Preferably, the transparent flexible substrate in step S1 is a polyimide substrate, a polydimethylsiloxane substrate, a polyethylene terephthalate substrate, or a UV-curable adhesive substrate.

[0025] Preferably, the strip-shaped bottom electrode is formed by electron beam evaporation.

[0026] Preferably, before forming the strip bottom electrode on the transparent flexible substrate, a step of cleaning the transparent flexible substrate is included.

[0027] Preferably, the linewidth of the strip bottom electrode in step S1 is 50–200 μm.

[0028] Preferably, the linewidth of the strip-shaped top electrode in step S3 is 50–200 μm.

[0029] Preferably, the thickness of the strip bottom electrode in step S1 is 60–100 nm.

[0030] Preferably, the strip bottom electrode in step S1 is an inert electrode.

[0031] More preferably, the strip bottom electrode in step S1 includes an adhesive layer and a conductive layer, wherein the adhesive layer is made of nickel, titanium or chromium, and the conductive layer is made of gold, platinum or indium tin oxide.

[0032] More preferably, the thickness of the adhesion layer is 10-20 nm, and the thickness of the conductive layer is 50-80 nm.

[0033] Preferably, the solvent in step S1 is at least one of deionized water or ethanol.

[0034] Preferably, the Ti3C2T mentioned in step S1 x Ti3C2T nanosheet dispersion x The concentration of nanosheets is 7–10 mg / mL.

[0035] Preferably, the Ti3C2T mentioned in step S1x The nanosheets are Ti3C2T x Nanosheet aerogel powder.

[0036] Preferably, in step S1, Ti3C2T is subjected to ultrasonic treatment. x Nanosheets are dispersed in a solvent.

[0037] Preferably, the step S2 involves using Ti3C2T x Before the nanosheet dispersion is spin-coated onto the bottom electrode-flexible substrate, the process also includes a step of performing O2-plasma hydrophilic pretreatment or ozone hydrophilic pretreatment on the bottom electrode-flexible substrate.

[0038] More preferably, the time for the O2-plasma hydrophilic pretreatment or ozone hydrophilic pretreatment of the bottom electrode-flexible substrate is 2-3 minutes.

[0039] Preferably, in step S2, 3-5 mL of Ti3C2T is added. x Nanosheet dispersions are spin-coated onto a bottom electrode-flexible substrate.

[0040] Preferably, the spin coating speed in step S2 is 800-1500 rpm, and the spin coating time is 60-90 s.

[0041] By controlling the number of spin coating cycles, the coating process for TiO2 can be optimized. y / Ti3C2T x TiO2 thin film-bottom electrode-flexible substrate y / Ti3C2T x Control of film thickness.

[0042] Preferably, the spin coating in step S2 is performed 1 to 5 times.

[0043] Preferably, in step S2, Ti3C2T x The nanosheet dispersion was spin-coated onto the bottom electrode-flexible substrate and annealed at 300–400 °C.

[0044] Annealing at 300–400°C results in a transparent, flexible artificial synapse array with an even higher on / off ratio, reaching 2 × 10⁻⁶. 2 above.

[0045] Preferably, the annealing time in step S2 is 30 to 60 minutes.

[0046] Preferably, the annealing in step S2 is carried out in an aerobic environment.

[0047] More preferably, the oxygen-rich environment is an air environment.

[0048] Preferably, the TiOy / Ti3C2T x TiO2 thin film-bottom electrode-flexible substrate y / Ti3C2T x The thickness of the thin film is 12–16 nm.

[0049] Preferably, the thickness of the strip-shaped top electrode in step S3 is 60–100 nm.

[0050] Preferably, the strip-shaped top electrode in step S3 is a silver electrode, an aluminum electrode, or a titanium electrode.

[0051] A transparent and flexible artificial synapse array was prepared by the above-described method.

[0052] The application of the aforementioned transparent flexible artificial synapse array as a storage and computing device in the fabrication of flexible wearable smart devices is also within the scope of protection of this invention.

[0053] Compared with the prior art, the beneficial effects of the present invention are:

[0054] This invention relates to Ti3C2T x The thin film is annealed at a specific temperature to form a TiO2 film with a relatively small thickness. y / Ti3C2T x A thin film, combined with an active strip-shaped top electrode and a cross-array structure, yields a transparent, flexible artificial synapse array with high visible light transmittance and an on / off ratio ≥2×10⁻⁶. 1 (reaching a maximum of 4×10) 2 It can maintain the memristor window under bending conditions with extremely small curvature radius (1mm) and maintain 10 when the curvature radius is close to the limit. 4 Through repeated cyclic testing, synaptic plasticity behavior with adjustable conductivity (resistance) can be achieved, thereby mimicking the behavior of neurons in the human brain in processing external stimuli and optimizing integrated neural network neuromorphic computing and machine learning technologies. Furthermore, the fabrication method of this invention employs a low-cost and simple spin-coating method, making the transparent flexible artificial synaptic array easy to fabricate and ensuring stable quality. Attached Figure Description

[0055] Figure 1 This is a schematic diagram of the fabrication process of the transparent flexible artificial synapse array in Example 1.

[0056] Figure 2 This is a physical image of the transparent flexible artificial synapse array of Example 1.

[0057] Figure 3 This is a schematic diagram of the transparent flexible artificial synapse array of the present invention.

[0058] Figure 4TiO2 for transparent flexible artificial synapse arrays in Examples 1-3 y / Ti3C2T x Thin film, Comparative Example 1: transparent flexible array of Ti3C2T x Light transmittance of the thin film at 550 nm.

[0059] Figure 5 The figure shows the current-voltage characteristic curve of the transparent flexible artificial synapse array in Example 1.

[0060] Figure 6 The figure shows the current-voltage characteristic curve of the transparent flexible array in Comparative Example 1.

[0061] Figure 7 This is a distribution diagram of the high-resistivity and low-resistivity states of the memristor cells in the transparent flexible artificial synapse array of Example 1.

[0062] Figure 8 The graph shows the long-term retention characteristics of a single memristor cell in the transparent flexible artificial synapse array of Example 1, specifically the high-resistivity and low-resistivity states.

[0063] Figure 9 The current-voltage characteristic curves of the memristor unit in the transparent flexible artificial synapse array of Example 1 under different bending states are shown in the figure.

[0064] Figure 10 The current-voltage characteristic curves of the memristor unit in the transparent flexible artificial synapse array of Example 1 after different number of bending cycles with a bending radius of 3 mm are shown.

[0065] Figure 11 The response current curve of the memristor unit in the transparent flexible artificial synapse array of Example 1 under unidirectional repetitive voltage cyclic stimulation.

[0066] Figure 12 The double-pulse dissimilarity curve of continuous double-pulse stimulation of memristor units in the transparent flexible artificial synapse array of Example 1. Detailed Implementation

[0067] To more clearly and completely describe the technical solution of the present invention, the present invention will be further described in detail below through specific embodiments. It should be understood that the specific embodiments described herein are only for explaining the present invention and are not intended to limit the present invention. Various changes can be made within the scope of the claims of the present invention.

[0068] Example 1

[0069] This embodiment provides a method for fabricating a transparent flexible artificial synapse array, comprising the following steps:

[0070] (1) A 250 μm thick polyimide substrate was placed in acetone, isopropanol and deionized water and sonicated for 20 min to obtain a clean polyimide substrate. Then, a mask was attached to the clean polyimide substrate, and Ni / Au (Ni is the adhesion layer with a thickness of 20 nm; Au is the conductive layer with a thickness of 65 nm) strip bottom electrode was deposited on the polyimide substrate using an electron beam evaporation machine to obtain Ni / Au bottom electrode-polyimide substrate. The linewidth of the Ni / Au strip bottom electrode is 50 μm and the thickness is 85 nm (Ni is the adhesion layer with a thickness of 20 nm; Au is the conductive layer with a thickness of 65 nm). The Ni / Au strip bottom electrodes are arranged in an array, and there are 20 Ni / Au strip bottom electrodes. The minimum distance between two adjacent Ni / Au strip bottom electrodes is 300 μm.

[0071] (2) Weigh a certain weight of Ti3C2T x Nanosheet aerogel powder was dispersed in a certain amount of deionized water and ultrasonically treated to prepare an 8 mg / mL Ti3C2T solution. x Nanosheet dispersion.

[0072] (3) Place the Ni / Au bottom electrode-polyimide substrate in an O2-plasma machine, perform hydrophilic treatment for 3 min, and then take 4 ml of the prepared Ti3C2T x The nanosheet dispersion was uniformly drop-coated onto the surface, followed by spin coating at 1000 rpm for 60 seconds, completing the first spin coating. Then, the same hydrophilic treatment and drop-coating were performed on Ti3C2T. x The nanosheet dispersion was spin-coated at 1000 rpm for 60 s, completing the second spin-coating, meaning a total of two spin-coatings were performed to obtain Ti3C2T. x Thin film - Ni / Au bottom electrode - polyimide substrate.

[0073] (4) Ti3C2T x A thin film-Ni / Au bottom electrode-polyimide substrate was placed in an annealing furnace and annealed at 300℃ for 40 minutes in air to obtain TiO2. y / Ti3C2T x Thin-film Ni / Au bottom electrode - polyimide substrate. TiO y / Ti3C2T x Thin film - Ni / Au bottom electrode - TiO2 on polyimide substrate y / Ti3C2T x The thickness of the thin film is 14 nm.

[0074] (5) In TiO y / Ti3C2T xA thin-film Ni / Au bottom electrode and a polyimide substrate are attached with a mask, and Ag strip-shaped top electrodes are formed by electron beam evaporation. The Ag strip-shaped top electrodes are arranged in an array and form a cross array structure with the Ni / Au bottom electrode, thus obtaining a transparent and flexible artificial synapse array. The linewidth of the Ag strip-shaped top electrode is 50 μm, the thickness is 100 nm, the number of Ag strip-shaped top electrodes is 20, and the minimum distance between two adjacent Ag strip-shaped top electrodes is 300 μm.

[0075] A flowchart illustrating the fabrication method of the transparent flexible artificial synaptic array in this embodiment is shown below. Figure 1 As shown.

[0076] The resistive switching ratio of the transparent flexible artificial synapse array in this embodiment is 2×10. 2 Its TiO y / Ti3C2T x The light transmittance of the thin film is 89%.

[0077] Example 2

[0078] This embodiment provides a method for preparing a transparent flexible artificial synapse array, which is basically the same as the method for preparing a transparent flexible artificial synapse array in Example 1, except that the annealing temperature in step (4) is 200℃. TiO y / Ti3C2T x Thin film - Ni / Au bottom electrode - TiO2 on polyimide substrate y / Ti3C2T x The thickness of the thin film is 12 nm.

[0079] The resistive switching ratio of the transparent flexible artificial synapse array in this embodiment is 2×10. 1 Its light transmittance is 77%.

[0080] Example 3

[0081] This embodiment provides a method for preparing a transparent flexible artificial synapse array, which is basically the same as the method for preparing a transparent flexible artificial synapse array in Example 1, except that the annealing temperature in step (4) is 400℃. TiO y / Ti3C2T x Thin film - Ni / Au bottom electrode - TiO2 on polyimide substrate y / Ti3C2T x The thickness of the thin film is 16 nm.

[0082] The resistive switching ratio of the transparent flexible artificial synapse array in this embodiment is 4×10. 2 Its TiO y / Ti3C2T x The light transmittance of the thin film is 92%.

[0083] Comparative Example 1

[0084] This comparative example provides a method for fabricating a transparent flexible array, including the following steps:

[0085] (1) A 250 μm thick polyimide substrate was placed in acetone, isopropanol and deionized water and sonicated for 20 min to obtain a clean polyimide substrate. Then, a mask was attached to the clean polyimide substrate, and Ni / Au (Ni is the adhesion layer with a thickness of 20 nm; Au is the conductive layer with a thickness of 65 nm) strip bottom electrode was deposited on the polyimide substrate using an electron beam evaporation machine to obtain Ni / Au bottom electrode-polyimide substrate. The linewidth of the Ni / Au strip bottom electrode is 50 μm and the thickness is 85 nm (Ni is the adhesion layer with a thickness of 20 nm; Au is the conductive layer with a thickness of 65 nm). The Ni / Au strip bottom electrodes are arranged in an array, and there are 20 Ni / Au strip bottom electrodes. The minimum distance between two adjacent Ni / Au strip bottom electrodes is 300 μm.

[0086] (2) Weigh a certain weight of Ti3C2T x Nanosheet aerogel powder was dispersed in a certain amount of deionized water and ultrasonically treated to prepare an 8 mg / mL Ti3C2T solution. x Nanosheet dispersion.

[0087] (3) Place the Ni / Au bottom electrode-polyimide substrate in an O2-plasma machine, perform hydrophilic treatment for 3 min, and then take 4 ml of the prepared Ti3C2T x The nanosheet dispersion was uniformly drop-coated onto the surface, followed by spin coating at 1000 rpm for 60 seconds, completing the first spin coating. Then, the same hydrophilic treatment and drop-coating were performed on Ti3C2T. x The nanosheet dispersion was spin-coated at 1000 rpm for 60 s, completing the second spin-coating, meaning a total of two spin-coatings were performed to obtain Ti3C2T. x Thin film - Ni / Au bottom electrode - polyimide substrate. Ti3C2T x Thin film - Ni / Au bottom electrode - polyimide substrate Ti3C2T x The thickness of the thin film is 11 nm.

[0088] (4) In Ti3C2T xA thin-film Ni / Au bottom electrode and a polyimide substrate are attached to a mask, and Ag strip top electrodes are formed by electron beam evaporation. The Ag strip top electrodes are arranged in an array and cross-array with the Ni / Au bottom electrode, resulting in a transparent flexible array. The linewidth of the Ag strip top electrodes is 50 μm, the thickness is 100 nm, the number of Ag strip top electrodes is 20, and the minimum distance between two adjacent Ag strip top electrodes is 300 μm.

[0089] The resistive switching ratio of the transparent flexible array in this comparative example is 1 (short circuit), and its Ti3C2T x The light transmittance of the thin film is 74%. This is due to the Ti3C2T... x It is a highly conductive two-dimensional nanosheet material. When the thickness is thin, its bottom electrode and top electrode are directly connected, and it cannot exhibit the memristor operating characteristics of a hysteresis curve.

[0090] Comparative Example 2

[0091] This comparative example provides a method for preparing a transparent flexible array, which is basically the same as the method for preparing a transparent flexible artificial synapse array in Example 1, except that the annealing temperature in step (4) is 100℃. TiO y / Ti3C2T x Thin film - Ni / Au bottom electrode - TiO2 on polyimide substrate y / Ti3C2T x The thickness of the thin film is 12 nm.

[0092] The resistive switching ratio of the transparent flexible artificial synapse array in this comparative example is 5, and its TiO₂... y / Ti3C2T x The light transmittance of the thin film is 75%.

[0093] Comparative Example 3

[0094] This comparative example provides a method for preparing a transparent flexible array, which is basically the same as the method for preparing the transparent flexible artificial synapse array in Example 1, except that: in step (3), only the first spin coating is completed, and the second spin coating is not performed. The TiO2 obtained in step (4) y / Ti3C2T x Thin film - Ni / Au bottom electrode - TiO2 on polyimide substrate y / Ti3C2T x The film thickness is 7 nm. Because only one drop-and-spray coating operation was performed, the TiO₂... y / Ti3C2T x The film thickness is too small, resulting in Ti3C2T xThe density difference between the layers and the low continuity, along with the gaps that allow direct conduction between the bottom and top electrodes, prevent the memristor from exhibiting the hysteresis curve characteristic.

[0095] Comparative Example 4

[0096] This comparative example provides a method for preparing a transparent flexible array, which is basically the same as the method for preparing a transparent flexible artificial synapse array in Example 1, except that the strip-shaped top electrode in step (5) is an Au strip-shaped top electrode (inert electrode).

[0097] Performance testing

[0098] 1. Sample characterization

[0099] The transparent flexible artificial synapse array of Example 1 was photographed, and its physical image is shown below. Figure 2 As shown. From Figure 2 It can be seen that the bottom and top electrodes of the transparent flexible artificial synapse array have a periodic parallel arrangement with the bottom and top electrodes intersecting vertically. Under bending conditions, TiO₂... y / Ti3C2T x No obvious cracks were found in the thin film, bottom electrode, and top electrode, and the original structure and properties were maintained, indicating that the transparent flexible artificial synapse array of the present invention has excellent mechanical flexibility.

[0100] Figure 3 This is a schematic diagram of the overall structure of the transparent flexible artificial synapse array of the present invention. Figure 3 a) and a partially enlarged structural diagram ( Figure 3 b). By amplifying a portion (memristor cell) where the bottom and top electrodes of the strip intersect, we can obtain... Figure 3 b. From Figure 3 As can be seen from b, the overlapping portion (memristor unit) of the strip bottom electrode and strip top electrode of the transparent flexible artificial synapse array of the present invention includes a flexible substrate (not shown in the figure), a strip bottom electrode layer (Au), and TiO2 arranged sequentially from bottom to top. y / Ti3C2T x Thin film layer and strip top electrode layer (Ag), TiO y / Ti3C2T x The thin film layer is composed of Ti3C2T x After the thin film is annealed at a specific temperature, it forms a Ti3C2T film. x TiO2 is formed on the upper surface of the thin film y It is obtained by using a high-resistivity layer.

[0101] TiO₂ from the transparent flexible artificial synapse arrays of Examples 1-3 y / Ti3C2T xThin film, Comparative Example 1: transparent flexible array of Ti3C2T x The light transmittance of the thin films was measured using a UV spectrophotometer. The light transmittance curves for each thin film are shown in the figure below. Figure 4 The illustration shows a TiO2 transparent flexible artificial synapse array from Example 1. y / Ti3C2T x (Actual image of the thin film). Ti3C2T without annealing treatment. x The light transmittance of the thin film (Comparative Example 1) was 74%; with increasing annealing temperature, the light transmittance of the Ti3C2T film decreased. x Particulate TiO gradually precipitates on the surface of the thin film. y Its light transmittance also gradually increases with the annealing temperature. This results in the transparent flexible artificial synapse array of the present invention having high light transmittance. When the annealing temperature reaches 300℃ (Example 1), TiO₂... y / Ti3C2T x The light transmittance of the thin film reached 89%.

[0102] 2. Current-voltage characteristic resistive switching performance test

[0103] The transparent flexible artificial synapse array of Example 1, and the transparent flexible arrays of Comparative Example 1 and Comparative Example 4 were used, and their relevant current-voltage characteristics were tested on an electrical test probe station using a Keithley source meter. The results are as follows. Figure 5 , Figure 6 As shown. The test method is as follows: Connect the positive terminal of the source meter to the Ag strip top electrode of the transparent flexible artificial synapse array / transparent flexible array, and connect the negative terminal of the source meter to the Ni / Au strip bottom electrode. Then apply a bipolar voltage signal of -3 to +3V. Initially, it is in a high-resistance state, and its current increases with the voltage applied across the memristor unit. When the voltage is applied to the set voltage value, the internal structure of the memristor unit changes (such as the formation of conductive channels, changes in the potential barrier, etc.), causing the resistance to decrease, and the memristor unit becomes a low-resistance state. When the voltage decreases to the reset voltage value, the internal structure of the memristor unit also changes, causing the resistance to increase, and the memristor unit becomes a high-resistance state, that is, it returns to the initial state. Therefore, in a binary system, the high-resistance state of a memristor unit can be used as a "0" code. The switching from a high-resistance state to a low-resistance state is equivalent to a binary conversion from "0" to "1". Based on this concept, when a memristor unit has the function of being triggered by electrical stimulation and still maintaining a stable high and low resistance state after the trigger voltage is removed, an artificial neural network composed of multiple memristor units forming a memristor array can be built. Based on the principle of matrix operation, a "memory-computing integration" storage architecture can be realized, breaking through the bottleneck of the traditional von Neumann architecture of computers.

[0104] like Figure 5As shown, the transparent flexible artificial synapse array of Example 1 exhibits obvious resistive-hysteresis curve characteristics. The mechanism of its resistive switching is: by changing the applied voltage, the Ag... + Accumulation and fracture in the functional layer of the heterojunction: When a positive voltage is applied to the top electrode of the device, Ag loses electrons to form silver ions Ag. + Under the influence of an electric field, the ions migrate towards the Au bottom electrode and are reduced to Ag particles. With the migration and accumulation of ions, silver conductive filaments are formed between the top and bottom electrodes, corresponding to the low-resistivity state. When a negative voltage is applied to the top electrode of the device, the Ag particles in the conductive channel gain electrons and are oxidized to Ag. + This causes the conductive channel to break, corresponding to a high-resistivity state. This TiO₂ y / Ti3C2T x The set voltage of the heterojunction resistive random access memory is 1.6V, the reset voltage is -1.6V, and the applied voltage range is -3V to 3V. Its switching power consumption is 6.4μW, which is significantly lower than the operating voltage (>5V) and power consumption of other inert electrode MXene-based memristors.

[0105] like Figure 6 As shown, the transparent flexible array of Ti3C2T in Comparative Example 1 x The thin film, without annealing treatment, lacks the memory properties of the hysteresis curve in the transparent flexible array. This is due to the fact that Ti3C2T... x It is a highly conductive two-dimensional nanosheet material. When the thickness is thin, its strip bottom electrode and strip top electrode conduct, and it cannot exhibit the memristor operating characteristics of hysteresis curve.

[0106] The transparent flexible array in Comparative Example 4, due to the use of an inert top electrode, did not exhibit significant memristor characteristics under relatively small hysteresis voltages (-3V→3V→-3V). The obtained current-voltage characteristic test results are shown in the figure. Figure 6 Similar. Unstable memristor characteristics appeared when a large operating voltage was applied over a wide range of -7V→7V→-7V.

[0107] Figure 7 This is a graph showing the results of a 100-cycle switching performance test of the transparent flexible artificial synapse array in Example 1. Figure 7 The results show that the transparent flexible artificial synapse array of the present invention can maintain more than 100 switching cycles as a memristor, has a stable memristor window, and has excellent cycle stability performance, which can meet the requirements for use as a storage unit.

[0108] Figure 8 This is a graph showing the test results of the resistive state retention performance of the transparent flexible artificial synapse array in Example 1. Figure 8The results show that the transparent flexible artificial synapse array of the present invention, as a memristor, can maintain a stable resistive switching window for a long time after the working voltage is removed, that is, it exhibits a stable memory function and is suitable for non-volatile memory.

[0109] 3. Mechanical properties

[0110] The transparent flexible artificial synapse array from Example 1 was used to test its resistive switching performance under bending conditions. The test method was as follows: a tensile displacement stage was used to perform bending tests on the transparent flexible artificial synapse array with different bending radii. During this process, the current-voltage characteristic curves of the transparent flexible artificial synapse array were recorded using a Keithley source table. The test results are shown in […]. Figure 9 .from Figure 9 It can be seen that after bending with different radii of curvature and strain, the resistive switching current-voltage characteristic curve of the device does not change significantly. The bending radius is as low as 1 mm, which is significantly better than the performance of other previous flexible memristors (the limiting bending radius of most previous flexible memristors is 10 mm). 1 The fact that the flexible artificial synapse array of the present invention has good mechanical properties (on the order of mm (1cm)) indicates that it can meet the storage and computing requirements of flexible wearable smart devices.

[0111] Figure 10 This is a graph showing the current-voltage characteristic of a memristor unit in a transparent flexible artificial synapse array after different number of bending cycles at a bending radius of 3 mm. Figure 10 It can be seen that this transparent flexible artificial synapse array has undergone 10 4 After several cycles of testing, its memristor window did not show significant degradation, indicating that the TiO2-based system... y / Ti3C2T x Thin-film memristors can maintain the integrity of the film well during bending, which is suitable for the needs of the flexible electronics industry.

[0112] 4. Characteristics of artificial synaptic impulses

[0113] The transparent flexible artificial synapse array from Example 1 was used to test its impulse response, and the results are as follows: Figure 11 As shown. From Figure 11It is known that when five cyclic unidirectional positive voltage stimuli with amplitudes ranging from 0 to +3V to 0 are continuously applied to the electrodes at both ends of the transparent flexible artificial synapse array, the response current value gradually increases with the increase in the number of cycles, corresponding to the process of stimulating memory. After applying five positive voltage cycles, five cyclic unidirectional negative pulses with amplitudes ranging from 0 to -3V to 0 are continuously applied to the electrodes at both ends of the transparent flexible artificial synapse array for inhibition. During this process, the response current value gradually decreases with the increase in the number of cycles, corresponding to the process of inhibiting memory. Finally, the current value returns to the initial value before the voltage was applied, which mimics the human forgetting process.

[0114] Figure 12 This is a diagram showing the double-pulse dissimilarity curve of a memristor unit in the transparent flexible artificial synapse array of Example 1 under continuous double-pulse stimulation. Figure 12 It can be seen that when two consecutive positive pulses with an amplitude of 2V and a pulse width of 1ms are applied to both ends of the artificial synapse, the peak value of the first pulse is significantly smaller than that of the second pulse. This is because after the first pulse stimulation, the conductive channel between the upper and lower electrodes is partially opened. Applying the second pulse stimulation directly on this basis results in a significantly higher degree of channel openness than the first pulse, indicating that the first pulse influences the second pulse. After the voltage is removed following the application of the first pulse, the memory current value is significantly higher than the initial current value. Similarly, after the voltage is removed following the application of the second pulse, the memory current value is significantly higher than the first memory current value, demonstrating the dual-pulse differential characteristic of the transparent flexible artificial synapse array of this invention.

[0115] The current-voltage characteristics, resistive switching properties, mechanical properties, and artificial synaptic pulse characteristics of the transparent flexible artificial synaptic arrays in Examples 2 and 3 are similar to those in Example 1.

[0116] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the implementation of the present invention. Those skilled in the art can make other variations or modifications based on the above description. It is neither necessary nor possible to exhaustively describe all embodiments here. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the claims of the present invention.

Claims

1. A method for preparing a transparent flexible artificial synapse array, characterized by, Includes the following steps: S1. Forming a strip-shaped bottom electrode on a transparent flexible substrate to obtain a bottom electrode-flexible substrate, ready for use; dispersing Ti3C2T x nanoplatelets in a solvent to obtain a Ti3C2T x nanoplatelets dispersion, ready for use; S2. Ti3C2T x nanosheet dispersion solution was spin-coated on the bottom electrode-flexible substrate, and annealed at 200-400 ℃ to obtain TiO y / Ti3C2T x thin film-bottom electrode-flexible substrate; S3. In TiO y / Ti3C2T x thin film - bottom electrode - flexible substrate on which a strip-shaped top electrode is formed, thus obtaining the transparent flexible artificial synapse array; The strip-shaped top electrode is an active electrode, and the strip-shaped bottom electrode and the strip-shaped top electrode form a cross array structure; the TiO y / Ti3C2T x The thickness of the thin film is 12-16 nm. y / Ti3C2T x The thickness of the thin film is 12-16 nm.

2. The method of claim 1, wherein The thickness of the transparent flexible substrate mentioned in step S1 is 50~500 μm.

3. The preparation method according to claim 1, characterized in that, The strip bottom electrode mentioned in step S1 is an inert electrode.

4. The method of claim 1, wherein Ti3C2T x Ti3C2T x The concentration of the nanosheets was 7-10 mg / mL.

5. The method of claim 1, wherein the step of forming the first and second layers is performed by a process selected from the group consisting of: sputtering, evaporation, and chemical vapor deposition. The Ti3C2T x The step of spin-coating the nanosheet dispersion on the bottom electrode-flexible substrate further comprises performing O 2- a step of plasma hydrophilic pretreatment or ozone hydrophilic pretreatment.

6. The method of claim 1, wherein The spin coating speed in step S2 is 800~1500 rpm, and the spin coating time is 60~90 s.

7. The method of claim 1, wherein The annealing time in step S2 is 30~60 minutes.

8. The method of claim 1, wherein the step of forming the first and second layers is performed by a process selected from the group consisting of: sputtering, evaporation, and chemical vapor deposition. The strip-shaped top electrode mentioned in step S3 is a silver electrode, an aluminum electrode, or a titanium electrode.

9. A transparent flexible artificial synapse array, characterized by, It is prepared by any of the preparation methods described in claims 1 to 8.

10. The application of the transparent flexible artificial synapse array of claim 9 as a storage computing device in the fabrication of flexible wearable smart devices.

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