A g-C3N4 layer-coated silicon negative electrode material, preparation method and application thereof

The porous silicon material coated with g-C3N4 layer solves the problem of poor electrochemical performance of the negative electrode material of lithium-ion battery, and achieves the effect of improving conductivity and cycling stability. At the same time, the preparation process is simplified and cost and safety hazards are reduced.

CN116177502BActive Publication Date: 2025-03-04WUHAN UNIV OF SCI & TECH
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Patent Information

Application Number
CN202211516781.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-11-30
Publication Date
2025-03-04
Estimated Expiration
2042-11-30

AI Technical Summary

Technical Problem

The electrochemical performance of existing lithium-ion battery anode materials is not ideal, the preparation process is complex, the cost is high, the toxicity is high, and the safety risks are great, which seriously hinders the development of silicon anode materials.

Method used

A porous silicon material coated with a g-C3N4 layer was prepared by ultrasonic oscillation, evaporation and freeze-drying by immersing a nitrogen-containing compound solution, and then heating under an inert atmosphere to form a core-shell structure.

Benefits of technology

It improves the electrochemical performance of silicon negative electrode, provides mechanical strength, alleviates volume expansion, improves conductivity and cyclic stability, reduces production costs, and is suitable for large-scale industrial production.

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Abstract

The present invention provides a preparation method and application of a g‑C3N4 layer-coated silicon negative electrode material. The present invention uses silicon nanoparticles, silicon nanowires or porous silicon as raw materials, puts the silicon raw materials into urea solutions of different concentrations for ultrasonic oscillation, evaporates them in a water bath and then freeze-dries them; the silicon sample is placed in a tubular furnace, annealed at a certain heating rate under an inert atmosphere, and cooled to room temperature to obtain a g‑C3N4 layer-coated silicon composite negative electrode material. The g‑C3N4 coating layer can solve the problems of insufficient silicon conductivity and unstable solid electrolyte membranes. In addition, g‑C3N4 can be embedded in Li + After that, Li3N with high conductivity and high lithium ion transport is formed. Therefore, the g-C3N4 layer-coated silicon negative electrode material exhibits excellent electrochemical properties and has broad application prospects in lithium-ion batteries.
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Description

Technical Field

[0001] The present invention relates to a negative electrode material for a lithium ion battery, and in particular to a preparation method and application of a g-C3N4 coated silicon negative electrode material. Background Art

[0002] After decades of development, lithium-ion batteries are widely used in daily life such as portable electronics, electric transportation, and even grid energy storage. However, with the continuous advancement of electric vehicles and electronic devices, there is an urgent need to improve the performance of lithium-ion batteries to meet the energy needs of electronic devices. Lithium-ion batteries include positive electrodes, negative electrodes, electrolytes, separators, etc. Among them, improving the electrochemical properties of negative electrode materials is one of the effective methods to improve the electrochemical properties of lithium-ion batteries. Traditional graphite negative electrodes are difficult to meet the needs of electronic devices for endurance and fast charging and discharging due to their low reversible specific capacity and poor rate performance.

[0003] Silicon, because of its higher theoretical specific capacity (4200mAhg -1 ), lower lithium insertion potential (0.2-0.3V vs.Li / Li + ), abundant reserves and good environment make it one of the most promising negative electrode materials for lithium-ion batteries. However, due to the huge volume expansion of silicon materials during the process of lithium insertion and extraction, the electrode materials will be pulverized and the structure will be destroyed. At the same time, the serious interface side reactions will continuously consume the lithium ions in the electrolyte. In addition, the inherent low electronic conductivity (about 10 -3 Scm -1 ) will limit its cycle stability, Coulombic efficiency (CE) and rate capability. In addition to the above problems, silicon anodes also involve production costs and process issues. High production costs and complex technical processes cannot promote the rapid development of silicon anodes. These problems seriously hinder their further practical application.

[0004] At present, the methods to improve silicon negative electrode materials mainly include silicon structural design, such as nano silicon particles, one-dimensional silicon nanowires, two-dimensional layered silicon, three-dimensional porous silicon, etc.; silicon composite design, such as silicon carbon composite, silicon phosphorus composite, etc.; silicon alloy design, such as silicon nickel, silicon copper, silicon germanium, etc. These methods to improve silicon negative electrode materials have greatly promoted the commercialization of silicon. Among them, silicon surface modification engineering is one of the most efficient methods to improve silicon performance. Since a solid electrolyte interface (SEI) is formed on the silicon surface, the huge volume expansion will cause the SEI layer to be destroyed, resulting in the continuous formation and destruction of the SEI layer, causing the consumption of lithium ions in the electrolyte. Therefore, constructing a surface coating layer to stabilize the SEI layer can promote the transmission of lithium ions, reduce interface side reactions, and reduce battery impedance.

[0005] At present, there are many works on constructing silicon surface coatings to improve the electrochemical properties of silicon. In the literature "Tailoring a multifunctional, boron and fluoride-enriched solid-electrolyte interphase precursor towards high-rate and stable-cycling silicon anodes (NanoEnergy, 2022, 93: 106811.)", 4-trifluoromethylphenylboronic acid (TFPBA) is grafted to the silicon surface through hydrogen bonds and covalent bonds, and TFPBA forms 2,4,6-trifluoromethylphenylboronic acid (TTFPB) on the silicon surface through self-polymerization dehydration reaction under heating conditions. The TTFPB layer is used as an artificial SEI layer on the surface of nano-silicon. The TTFPB layer has high elasticity and can effectively alleviate the volume expansion of silicon, while improving the electrolyte absorption rate of the electrode film and promoting Li +Transfer kinetics. However, TFPBA is toxic and cannot be easily discharged. It requires special treatment, which undoubtedly increases the cost of negative electrode materials and is not conducive to commercial production. In the document "Insitu formation of ionically conductive nanointerphase on Si particles forstable battery anode. (Science China Chemistry, 2021, 64 (8): 1417-1425.)", a chemically bonded Si-P interface is prepared at the Si interface by a simple mechanical alloying reaction between red phosphorus and solar silicon photovoltaic waste. The P nanoshell with a thickness of less than 15nm is converted to Li3P during the initial lithiation process and maintains its phase during the cycle. The formed Li3P nanolayer acts as a stable ion conductive protective layer, reducing the direct contact between silicon and the electrolyte, thereby inhibiting undesirable side reactions. However, red phosphorus is in danger of causing combustion when exposed to open flames, high heat, friction, and impact. It emits toxic and irritating smoke when burning, which poses a huge safety hazard. In the document "Atomic layer deposited aluminum oxynitride coating for high-performance Si anode inlithium-ion batteries (Applied Surface Science, 2022, 578: 151982.)", plasma enhanced atomic layer deposition technology is used to coat the silicon surface with aluminum nitride (AlOxNy) coating using trimethylaluminum and plasma N2 / H2 as precursors to inhibit the formation and rupture of SEI on the silicon surface and improve the electronic conductivity of the silicon negative electrode material. However, this solution has high requirements for equipment and is not conducive to large-scale commercial production.

[0006] In addition, coating the silicon surface with nitrogen-doped carbon materials is also a commonly used improvement method. For example, Chinese patent CN112768661A discloses that a graphite-phase carbon nitride precursor is prepared by high-temperature calcination of a mixture of melamine and urea, and then the nitrogen-doped carbon material is coated on the surface of silicon dioxide powder by high-temperature calcination, and then the silicon dioxide is etched away with hydrofluoric acid to obtain nitrogen-doped hollow carbon spheres; the nitrogen-doped hollow carbon spheres have the characteristics of large specific surface area and strong electrical conductivity, which is conducive to improving the electron transport rate and accelerating the insertion and extraction process of lithium ions, and improving the rate charge and discharge performance of lithium-ion batteries. However, the main purpose of this method is to prepare carbon nitride negative electrode materials, and silicon dioxide is used as a template to obtain a graphite phase carbon nitride hollow shell. This method requires the use of highly corrosive hydrofluoric acid, which is very dangerous and not conducive to industrial production. The nitrogen-doped carbon material-coated silicon dioxide material prepared by this method has relatively low initial discharge capacity, initial efficiency and cycle capacity retention rate without hydrofluoric acid etching of silicon dioxide.

[0007] Chinese patent CN114824261A discloses a nano-silicon composite material, including nano-silicon, a g-C3N4 coating layer formed on the surface of the nano-silicon, and a triphenylphosphine coating layer formed on the surface of the g-C3N4 coating layer, wherein the g-C3N4 coating layer is provided with a first hole penetrating to the surface of the nano-silicon, and the triphenylphosphine coating layer is provided with a second hole penetrating to the surface of the g-C3N4 coating layer. The method requires two steps of coating, and the process is relatively complicated; secondly, the preparation of the g-C3N4 coated nano-silicon material uses spray drying as a urea-coated nano-silicon precursor, and its disadvantage is that the high temperature easily causes the oxidation of nano-silicon, resulting in a decrease in the first effect and reversible specific capacity of the silicon composite material, and at the same time, it is necessary to keep warm twice continuously during the urea thermal decomposition process, especially the second time when the temperature is high, which will cause the g-C3N4 coating layer to be densified, which is not conducive to the migration of lithium ions. The g-C3N4 coated nano-silicon composite material obtained by this method without triphenylphosphine coating has a rapid cycle decay because the electrolyte is constantly in contact with the active material during the charge and discharge process, the surface structure of Si becomes increasingly unstable, and the SEI production is uneven.

[0008] In summary, the current surface-coated silicon negative electrode materials generally have unsatisfactory electrochemical performance of the silicon negative electrode, and have complex preparation processes, high costs, high toxicity, and great safety hazards, which seriously hinder the development of silicon negative electrode materials. Summary of the invention

[0009] In view of the problems existing in the prior art, the present invention provides a porous silicon material coated with a g-C3N4 layer, which can improve the electrochemical performance of the silicon negative electrode, and has a simple preparation method, high efficiency, low temperature, and low safety hazard, which is conducive to saving production costs and is suitable for large-scale industrial production.

[0010] To achieve the above purpose, the technical solution adopted by the present invention is as follows:

[0011] A method for preparing a silicon material coated with a g-C3N4 layer comprises the following steps:

[0012] S1: Select porous silicon or nano silicon particles or one-dimensional silicon nanowire materials, immerse them in a nitrogen-containing compound solution for ultrasonic oscillation for a certain period of time, then put them in a water bath to evaporate them, and then freeze-dry them;

[0013] S2: placing the sample obtained in step S1 in a tube furnace, heating it to a certain temperature under an inert atmosphere, keeping it warm for a certain period of time, and cooling it to room temperature to obtain the silicon material coated with the g-C3N4 layer.

[0014] Compared with the prior art, the present invention has the following beneficial effects:

[0015] The present invention can effectively solve the problem of insufficient conductivity of silicon by coating with g-C3N4, and at the same time provide a certain mechanical strength and alleviate the structural powdering phenomenon caused by excessive expansion. + After that, Li3N with high conductivity and high lithium ion transport is formed, and the direct contact with the Si core can improve the problem of insufficient conductivity of silicon as a semiconductor to the greatest extent. In addition to being able to improve the electrochemical performance of the Si negative electrode, the preparation method is simple, the process is short, and the preparation temperature is low, the safety hazard in the preparation process is low, and the raw materials of the invention are cheap and easy to obtain, which is conducive to saving production costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 XRD diagram of the porous silicon (p-Si) and the g-C3N4 coated porous silicon material (p-Si / g-C3N4) of Example 1;

[0017] Figure 2 The scanning electron microscope images of p-Si / g-C3N4 and p-Si in Example 1, wherein (a) is the scanning electron microscope image of the g-C3N4 coated porous silicon material, and (b) is the scanning electron microscope image of the pure porous silicon material;

[0018] Figure 3 TEM images of p-Si / g-C3N4 of Example 1, wherein (a) is a TEM image at 100 nm; (b) is a TEM image at 20 nm;

[0019] Figure 4 The electrochemical cycle performance diagram of the porous silicon (p-Si) and the g-C3N4 coated porous silicon material (p-Si / g-C3N4) of Example 1;

[0020] Figure 5The first coulomb efficiency diagram of the porous silicon (p-Si) and the g-C3N4 coated porous silicon material (p-Si / g-C3N4) of Example 1;

[0021] Figure 6 This is the electrochemical cycle performance diagram of p-Si / g-C3N4 of Example 2;

[0022] Figure 7 This is the electrochemical cycle performance diagram of n-Si / g-C3N4 of Example 3;

[0023] Figure 8 This is the electrochemical cycle performance diagram of n-Si / g-C3N4 of Example 4;

[0024] Fig. 9 This is the electrochemical cycle performance diagram of n-Si / g-C3N4 of Example 5;

[0025] Fig.10 This is the electrochemical cycle performance diagram of w-Si / g-C3N4 of Example 6;

[0026] Fig.11 This is a scanning electron microscope image of p-Si / g-C3N4 of Comparative Example 1;

[0027] Fig.12 This is the electrochemical cycle performance diagram of p-Si / g-C3N4 of Comparative Example 1;

[0028] Fig.13 This is the electrochemical cycling performance diagram of p-Si / g-C3N4 of Comparative Example 2. DETAILED DESCRIPTION

[0029] The present invention is described in detail below.

[0030] On the one hand, the present invention provides a method for preparing a silicon material coated with a g-C3N4 layer, comprising the following steps:

[0031] S1: Select porous silicon or nano silicon particles or one-dimensional silicon nanowire materials, immerse them in a nitrogen-containing compound urea solution for ultrasonic oscillation for a certain period of time, then put them in a water bath to evaporate them, and then freeze-dry them;

[0032] S2: placing the sample obtained in step S1 in a tube furnace, heating it to a certain temperature under an inert atmosphere, keeping it warm for a certain period of time, and cooling it to room temperature to obtain the silicon material coated with the g-C3N4 layer.

[0033] In some embodiments of the present invention, the nitrogen-containing compound in step S1 is selected from any one of urea, melamine, thiourea, melamine and dicyandiamide; urea is more preferred.

[0034] In some embodiments of the present invention, the concentration of the nitrogen-containing compound solution in step S1 is 0.25 to 4 wt %;

[0035] In some embodiments of the present invention, the mass ratio of porous silicon or nano silicon particles or one-dimensional silicon nanowire material to the nitrogen-containing compound is 4:1 to 1:4; preferably 1:1 to 4; further preferably 1:1.8 to 2.5; more preferably 1:2.

[0036] The present invention controls the thickness of the coating layer g-C3N4 by controlling the mass ratio of silicon to the nitrogen-containing compound. The mass ratio control of silicon to the nitrogen-containing compound is particularly critical. The nitrogen-containing compound directly affects the thickness of the g-C3N4 coating layer. If the thickness of the g-C3N4 coating layer is low, the volume expansion of silicon cannot be alleviated, which directly leads to the rupture of the g-C3N4 coating layer. If the thickness of the g-C3N4 coating layer is too high, the electrochemical performance of p-Si / g-C3N4 is affected because the thicker surface coating layer can better resist the expansion of the silicon core, but its increased density leads to a decrease in lithium ion transmission performance, making the lithium insertion process of silicon difficult. Therefore, the selection of the mass ratio of silicon to the nitrogen-containing compound in the present invention is extremely important.

[0037] In some embodiments of the present invention, the time of ultrasonic oscillation in step S1 is controlled within 5-120 min; preferably 30-100 min; further preferably 60-80 min; more preferably 60 min.

[0038] The ultrasonic time is too short, resulting in insufficient contact between silicon and the nitrogen-containing compound solution, silicon agglomeration, and subsequent g-C3N4 not being evenly coated. At the same time, large particles of negative electrode material are formed, affecting the electrochemical performance of p-Si / g-C3N4. If the ultrasonic time is too long, the structure of porous silicon or one-dimensional silicon nanowires may be destroyed.

[0039] In some embodiments of the present invention, the temperature of the water bath in step S1 is 40-120°C; more preferably 60-80°C; more preferably 60°C.

[0040] In the present invention, the selection of the temperature of the water bath evaporation solution is extremely important, and the temperature cannot be too high. If the temperature of the water bath evaporation is too high, it will cause oxidation of silicon, and ultimately affect the electrochemical performance.

[0041] In some embodiments of the present invention, the freeze drying time in step S1 is 10-30 hours; preferably 20-30 hours; more preferably 20-25 hours. If the drying time is short, the water content in the sample is high, affecting the performance of the subsequent sample preparation; if the drying time is too long, it has little effect on removing the water content in the sample and increases the production cost.

[0042] The present invention dries the sample by evaporating in a water bath and then freeze-drying. First, in the process of evaporating in a water bath, the silicon and the nitrogen-containing compound are evenly distributed by stirring to prevent silicon from being deposited at the bottom and to ensure that the nitrogen-containing compound is evenly coated on the outer surface of the silicon. At the same time, the water content of the precursor is further reduced by freeze-drying at low temperature, thereby minimizing the degree of oxidation of silicon and ensuring the high capacity advantage of silicon.

[0043] In some embodiments of the present invention, the inert atmosphere in step S2 is selected from argon or nitrogen; preferably argon.

[0044] In some embodiments of the present invention, the heating rate in step S2 is 0.1-20°C / min; preferably 2-10°C / min; further preferably 5-10°C / min; more preferably 5°C / min.

[0045] The heating temperature in step S2 is 400-800°C, preferably 500-800°C, and more preferably 550°C.

[0046] The insulation time in step S2 is 1-180 min; preferably 30-120 min; more preferably 60-100 min; more preferably 60 min.

[0047] The selection of heating rate, heating temperature and holding time is very important in the present invention. If the heating rate is too fast, the g-C3N4 coating layer will have more pores and loose structure, and will break due to the huge volume expansion of silicon during the lithium insertion and extraction process; if the heating rate is too slow, the g-C3N4 coating layer will have a dense structure, which is not conducive to the migration of lithium ions; if the heating temperature is too low or the holding time is too short, the reaction will be incomplete and the surface of the prepared material will not be completely coated with g-C3N4. When the heating temperature is low, even if the holding time is extended, a uniform g-C3N4-coated silicon material cannot be obtained; if the heating temperature is too high or the holding time is too long, the thickness of the g-C3N4 coating layer on the surface cannot be controlled, which will reduce the electrochemical properties of the material.

[0048] On the other hand, the present invention provides a g-C3N4 layer-coated silicon material obtained by the above-mentioned preparation method, wherein the material is a porous silicon or nano-silicon particle or silicon nanowire composite material coated with a g-C3N4 layer to form a typical core-shell structure, wherein the material has silicon inside and a g-C3N4 layer outside.

[0049] The present invention strictly controls the reaction conditions, and the obtained g-C3N4 layer-coated silicon material has a uniformly distributed porous structure, which is conducive to the entry of the electrolyte, shortens the transmission path of lithium ions, and the holes can provide a certain space for silicon expansion, reduce the pulverization of the material, and the coated g-C3N4 layer simultaneously improves the electronic conductivity and stabilizes the SEI. After lithium insertion, Li3N with high conductivity and high lithium ion transmission is formed, which can effectively improve the conductivity of silicon. Therefore, the composite coating can effectively increase the rate performance and cycle stability of the electrode material. The thickness of the g-C3N4 layer coated on the surface of the material is only 3-5nm, which will not reduce the capacity of the silicon negative electrode material, and at the same time can improve the conductivity of the silicon negative electrode and enhance the electrochemical performance.

[0050] The present invention obtains a g-C3N4 layer-coated silicon material at low temperature (below 1200°C) by simple impregnation and subsequent rapid heating and short-time annealing treatment, and is used as a negative electrode material for lithium-ion batteries to improve the electrochemical properties of the material. The processing process of the present invention is simple, the raw materials are cheap and easy to obtain, the cost is low, and it is conducive to large-scale commercial production.

[0051] On the other hand, the present invention provides the use of the above-mentioned g-C3N4 layer-coated silicon material in the preparation of lithium-ion battery negative electrode materials.

[0052] On the other hand, the present invention provides a lithium-ion battery, comprising a positive electrode material, a negative electrode material, an electrolyte and a separator; the negative electrode material comprises the silicon material coated with the g-C3N4 layer of the present invention.

[0053] The present invention does not impose any specific restrictions on the preparation method of the battery negative electrode material and the lithium ion battery, and they can be prepared by conventional methods in the art.

[0054] The technical solution of the present invention will be described clearly and completely below in conjunction with specific embodiments. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. In addition, it is worth noting that the raw materials involved in the present invention are all common commercial products unless otherwise specified.

[0055] Example 1

[0056] (1) Porous silicon with a particle size of 3-5 μm was selected as the raw material, immersed in a 2 wt% urea solution (the mass ratio of silicon to urea was 1:2), ultrasonically vibrated for 60 min, and then the solution was evaporated to dryness in a 60° C. water bath and freeze-dried for 24 h;

[0057] (2) The sample in step (1) was placed in a tubular furnace. First, the temperature was raised to 550°C at a heating rate of 5°C / min under an argon atmosphere. The temperature was then kept for 60 minutes. After the sample was naturally cooled to room temperature, a porous silicon sample coated with a g-C3N4 layer was obtained.

[0058] Experimental Results

[0059] Figure 1 Figure 3 is the XRD pattern of porous silicon (p-Si) and g-C3N4 coated porous silicon material (p-Si / g-C3N4). p-Si and p-Si / g-C3N4 have the same peak position. The broad diffraction peaks at 28.5°, 47.3°, 56.2°, 69.2°, 76.5° and 87.9° are assigned to the (111), (220), (311), (400), (331) and (442) planes of Si cubic phase. Figure 1 Except for the pure silicon phase, no other phases were detected, but the peak of p-Si / g-C3N4 was weaker than that of p-Si.

[0060] Figure 2 The scanning electron microscope images of p-Si / g-C3N4 and p-Si, where (a) is a scanning electron microscope image of a porous silicon material coated with g-C3N4, and (b) is a scanning electron microscope image of pure porous silicon. The p-Si / g-C3N4 composite material with g-C3N4 as the surface coating layer prepared in this embodiment has a three-dimensional cross-linked porous structure like the porous silicon raw material, indicating that the g-C3N4 coating layer has not changed the morphology of porous silicon. The particle size of the p-Si / g-C3N4 negative electrode material is 3-5μm, and it has a uniformly distributed porous structure, which is conducive to the entry of the electrolyte and shortens the transmission path of lithium ions. The pores can provide a certain space for silicon expansion and reduce the pulverization of the material. The coated g-C3N4 layer also improves the electronic conductivity and stabilizes the SEI.

[0061] Figure 3 Transmission electron micrographs of p-Si / g-C3N4 composite materials coated with g-C3N4 as a surface coating layer prepared from porous silicon as raw material, where (a) is a transmission electron micrograph at 100 nm, where a large number of pores and skeletons can be clearly observed; (b) is a transmission electron micrograph at 20 nm, where the external g-C3N4 layer is tightly fitted to the internal silicon core, and the thickness of the surface-coated g-C3N4 layer is less than 10 nm, which will not reduce the capacity of the silicon negative electrode material, while at the same time being able to increase the conductivity of the silicon negative electrode and enhance the electrochemical performance.

[0062] Figure 4The electrochemical cycling performance diagram of porous silicon and porous silicon coated with g-C3N4 as a surface coating layer. After cycling at a current density of 0.1A / g for 3 cycles and then cycling at a current density of 1A / g, p-Si / g-C3N4 exhibits a higher reversible specific capacity than pure p-Si. -1 At a current density of 1.547 W, p-Si / g-C3N4 still retains 1250 mAh g after 500 cycles. -1 The reversible specific capacity of the porous silicon was 42%, while the capacity retention rate of the pure porous silicon was only 500 mAhg after 500 cycles. -1 The reversible specific capacity and capacity retention rate are 16%, reflecting the good cycle stability of p-Si / g-C3N4.

[0063] Figure 5 The first efficiency of porous silicon and porous silicon coated with g-C3N4 layer is 71.1%. Since g-C3N4 does not provide capacity, the first efficiency of porous silicon coated with g-C3N4 layer is slightly lower than that of porous silicon, which is 70.2%.

[0064] Example 2

[0065] (1) Porous silicon with a particle size of 0.05-20 μm was used as a raw material, and the silicon raw material was immersed in a 0.5 wt % urea solution (the mass ratio of silicon to urea was 1:0.5) and ultrasonically vibrated for 60 min, then evaporated in a 60° C. water bath and dried in a freeze dryer for 24 h.

[0066] (2) The sample in step 1 is placed in a tubular furnace, and in an argon atmosphere, the temperature is raised to 550°C at a heating rate of 5°C / min, and the temperature is kept for 60 minutes. After the sample is naturally cooled to room temperature, a porous silicon sample coated with a g-C3N4 layer is obtained.

[0067] Figure 6 The electrochemical cycle performance diagram of p-Si / g-C3N4 (Si:CH4N2O=1:0.5) shows that the first efficiency is 74.6%. -1 At the current density, the reversible specific capacity is 1100 mAh g after 500 cycles. -1 , the capacity retention rate is 37.5%.

[0068] The urea content in this embodiment is low, resulting in a low thickness of the g-C3N4 coating layer, which cannot alleviate the volume expansion of silicon and directly leads to the rupture of the g-C3N4 coating layer.

[0069] Example 3

[0070] (1) Nano-silicon particles with a particle size of 10-500 nm were used as raw materials. The silicon raw materials were immersed in a 2 wt% urea solution (the mass ratio of silicon to urea was 1:2) and ultrasonically vibrated for 5 min. The solution was then evaporated to dryness in a 60°C water bath and dried in a freeze dryer for 24 h.

[0071] (2) The sample in step 1 is placed in a tubular furnace, and in an argon atmosphere, the temperature is raised to 550°C at a heating rate of 5°C / min, and the temperature is kept for 60 minutes. After the sample is naturally cooled to room temperature, a g-C3N4 layer-coated nanosilicon sample is obtained.

[0072] Figure 7 The electrochemical cycle performance diagram of n-Si / g-C3N4 (ultrasonic oscillation 5min) shows that the first efficiency is 65.8%. -1 At the current density, the reversible specific capacity after 500 cycles is 928 mAh g -1 , the capacity retention rate is 30.9%.

[0073] In this embodiment, the ultrasonic time is short, resulting in insufficient contact between silicon and urea solution, agglomeration of nano-silicon, and subsequent non-uniform coating of g-C3N4. At the same time, large particles of negative electrode material are formed, affecting the electrochemical performance of n-Si / g-C3N4.

[0074] Example 4

[0075] (1) Nano-silicon particles with a particle size of 10-500 nm were selected as raw materials, and the silicon raw materials were immersed in a 2wt% urea solution (the mass ratio of silicon to urea was 1:2) and ultrasonically vibrated for 60 minutes, then the solution was evaporated in a 120°C water bath and dried in a freeze dryer for 24 hours.

[0076] (2) The dried silicon nanoparticles in step 1 are placed in a tubular furnace, and the temperature is increased to 550°C at a heating rate of 5°C / min under an argon atmosphere, and the reaction is kept at this temperature for 60 minutes. After the sample is naturally cooled to room temperature, a g-C3N4 layer-coated nano-silicon composite material sample is obtained.

[0077] Figure 8 The electrochemical cycle performance diagram of n-Si / g-C3N4 (120℃ water bath drying) shows that the first efficiency is 65.2%. -1 At the current density, the reversible specific capacity after 500 cycles is 816 mAh g -1 , the capacity retention rate is 27.74%.

[0078] The temperature of the water bath evaporation in this embodiment is too high, which leads to oxidation of silicon and ultimately affects the electrochemical performance.

[0079] Example 5

[0080] (1) Nano-silicon particles with a particle size of 10-500 nm were selected as raw materials, and the silicon raw materials were immersed in a 2wt% urea solution (the mass ratio of silicon to urea was 1:2) and shaken for 60 minutes, then evaporated to dryness in a 60°C water bath and dried in a freeze dryer for 24 hours.

[0081] (2) The sample in step 1 is placed in a tube furnace, and the temperature is raised to 400°C at a heating rate of 5°C / min under an argon atmosphere, and the reaction is kept at this temperature for 120 minutes. After the sample is naturally cooled to room temperature, nano-silicon particles coated with a g-C3N4 layer are obtained.

[0082] Fig. 9 The electrochemical cycle performance diagram of n-Si / g-C3N4 (temperature 400℃, insulation 120min), its first efficiency is 71.2%, and at 1A g -1 At the current density, the reversible specific capacity after 300 cycles is 1142 mAh g -1 , the capacity retention rate is 38.3%.

[0083] The heat treatment temperature in this embodiment is relatively low. Although the insulation time is prolonged, as the reaction temperature decreases, the g-C3N4 coating on the surface of the prepared material is incomplete, indicating that a uniform g-C3N4-coated silicon negative electrode material cannot be obtained at this reaction temperature.

[0084] Example 6

[0085] (1) Nanosilicon wires with a diameter of 10-500 nm were selected as raw materials, and the silicon raw materials were immersed in a 2 wt % urea solution (the mass ratio of silicon to urea was 1:2) and ultrasonically vibrated for 60 min, then the solution was evaporated at 60° C. and dried in a freeze dryer for 24 h.

[0086] (2) The sample in step 1 is placed in a tube furnace, and in an argon atmosphere, the temperature is raised to 800°C at a heating rate of 5°C / min, and the reaction is kept at this temperature for 60 minutes. After the sample is naturally cooled to room temperature, a silicon sample coated with a g-C3N4 layer is obtained.

[0087] Fig.10 The electrochemical cycle performance diagram of w-Si / g-C3N4 (temperature 800℃, insulation 60min), its first efficiency is 72.4%, and at 1A g -1 At the current density, the reversible specific capacity after 500 cycles is 739.5 mAh g -1 , the capacity retention rate is 24.6%.

[0088] The heat treatment temperature of this embodiment is relatively high, and the thickness of the g-C3N4 layer on the surface of the material is too large and uneven, which reduces the electrochemical performance of the material.

[0089] Comparative Example 1

[0090] (1) Select porous silicon with a particle size of 3-5 μm as raw material, mix it with g-C3N4 and grind it thoroughly;

[0091] (2) The sample in step (1) was placed in a tubular furnace, and heated to 550°C at a heating rate of 5°C / min under argon atmosphere, followed by insulation reaction for 60 min. After the sample was naturally cooled to room temperature, a silicon sample coated with a g-C3N4 layer was obtained.

[0092] Fig.11 This is the morphology of p-Si / g-C3N4 (physical mixing), in which g-C3N4 and porous silicon can be clearly distinguished because it is only a physical mixture, where the large particles of 10um are g-C3N4, and the small particles of 3-5um are p-Si.

[0093] Fig.12 The cycle performance diagram of p-Si / g-C3N4 (physical mixture) shows that the first efficiency is 73.79%. 1 At the current density, the reversible specific capacity is 867 mAh g-1 after 500 cycles, and the capacity retention rate is 29.12%.

[0094] Comparative Example 2

[0095] (1) Porous silicon with a particle size of 3-5 μm was selected as a raw material, immersed in a 2 wt% urea solution (silicon: urea = 1:2), ultrasonically vibrated for 60 min, and then the solution was sprayed and granulated. The outlet temperature of the spray granulation was set to 185° C. and the speed was set to 25 r / min to obtain a particle sample;

[0096] (2) The particle sample in step (1) is placed in a tubular furnace. First, the temperature is increased to 550°C at a heating rate of 5°C / min under argon atmosphere, and then the temperature is kept for 60 minutes. After the sample is naturally cooled to room temperature, a porous silicon sample coated with a g-C3N4 layer is obtained.

[0097] Fig.13 The electrochemical cycle performance diagram of p-Si / g-C3N4 (spray drying) shows that the first efficiency is 68.9%. -1 At the current density, the reversible specific capacity after 500 cycles is 954 mAh g -1 , the capacity retention rate is 31.8%.

[0098] Finally, it should be noted that the above content is only used to illustrate the technical solution of the present invention, rather than to limit the scope of protection of the present invention. Simple modifications or equivalent substitutions of the technical solution of the present invention by ordinary technicians in this field do not deviate from the essence and scope of the technical solution of the present invention.

Claims

1. A method for preparing a silicon material coated with a g-C3N4 layer, comprising the following steps: S1: Select porous silicon or nano silicon particles or one-dimensional silicon nanowire materials, immerse them in a nitrogen-containing compound solution for ultrasonic oscillation for a certain period of time, then put them in a water bath to evaporate them, and then freeze-dry them; S2: heating the sample obtained in S1 to a certain temperature under an inert atmosphere, keeping the temperature for a certain period of time, and cooling it to room temperature to obtain the silicon material coated with the g-C3N4 layer; Its characteristics are: The nitrogen-containing compound in S1 is selected from any one of thiourea and melamine; the mass ratio of the porous silicon or nano-silicon particles or one-dimensional silicon nanowire material to the nitrogen-containing compound is 1:2; the ultrasonic oscillation time is controlled at 60 minutes; the temperature of the water bath is 60°C; The heating rate in S2 is 5°C / min; the heating temperature is 550°C; and the insulation time is 60min.

2. A silicon material coated with a g-C3N4 layer, characterized in that: The preparation method according to claim 1 is adopted.

3. A lithium-ion battery comprising a positive electrode material, a negative electrode material, an electrolyte and a separator, wherein the negative electrode material comprises the silicon material coated with the g-C3N4 layer according to claim 2.

Citation Information

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