Array substrate and display panel

Abstract

The present application provides an array substrate and a display panel. The array substrate is applied to a liquid crystal display panel, and includes a common electrode layer, common electrode wiring, and a pixel electrode layer. The pixel electrode layer includes a pixel electrode connection portion and a plurality of pixel electrodes. The common electrode layer is used to form an electric field with the pixel electrodes to drive liquid crystal deflection. The common electrode layer includes a common electrode connection portion and a plurality of common electrodes. By forming a pixel electrode group with two adjacent pixel electrodes and a common electrode group with two adjacent common electrodes, the pixel electrode groups and the common electrode groups are alternately arranged to form a horizontal electric field, so that the liquid crystal above the pixel electrodes and the common electrodes can be deflected, thereby improving the display light effect and increasing the transmittance of the display panel.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to an array substrate and a display panel. Background Art

[0002] The pixel electrodes and common electrodes of IPS display panels (In-Plane Switching) are on the same surface. When a signal is applied, the alternating positive and negative electrodes generate an electric field that causes the liquid crystal to rotate within the plane. Since the two electrodes are on the same surface, the liquid crystal directly above the positive and negative electrodes is not affected by the electric field after power is applied. In other words, the liquid crystal directly above the positive and negative electrodes does not deflect, which seriously affects the light efficiency of this area. The current methods to improve this situation mainly rely on adjusting the electrode width or changing the height difference between the positive and negative electrodes. The former does not provide a significant improvement, while the latter adds a process to the pixel manufacturing process, making it more complex to implement. Summary of the Invention

[0003] The main technical problem solved by the present application is to provide an array substrate and a display panel to solve the problem of low light efficiency of the display panel in the prior art due to the non-deflection of liquid crystal above the electrode.

[0004] In order to solve the above technical problems, the first technical solution provided by the present application is to provide an array substrate for use in a liquid crystal display panel, the array substrate comprising:

[0005] A substrate, wherein a first metal layer, a second metal layer, and a transparent conductive layer are sequentially provided on one side of the substrate, which are insulated from each other; the first metal layer forms a scan line and a common electrode wiring, the second metal layer forms a data line, and the transparent conductive layer forms a pixel electrode layer, wherein the pixel electrode layer includes a pixel electrode connecting portion and a plurality of pixel electrodes connected to the pixel electrode connecting portion;

[0006] A common electrode layer, configured to form an electric field with the pixel electrode to drive liquid crystal deflection; the common electrode layer comprises a common electrode connecting portion and a plurality of common electrodes connected to the common electrode connecting portion;

[0007] Among them, the pixel electrode layer includes multiple pixel electrode groups, each pixel electrode group includes two adjacent pixel electrodes; the common electrode layer includes multiple common electrode groups, each common electrode group includes two adjacent common electrodes; the pixel electrode groups and the common electrode groups are alternately arranged to form a horizontal electric field.

[0008] The common electrode layer and the pixel electrode layer are provided in the same layer; or the common electrode layer and the pixel electrode layer are provided in different layers.

[0009] The pixel electrode connecting portion and the common electrode connecting portion are respectively located on two opposite sides of the pixel electrode along an extending direction of the pixel electrode.

[0010] Wherein, the voltage of the pixel electrodes in the pixel electrode group is different from the voltage of the common electrodes in the common electrode group.

[0011] The polarity of the pixel electrodes in the pixel electrode group is opposite to the polarity of the common electrodes in the common electrode group.

[0012] In which, the spacing between two pixel electrodes in the pixel electrode group is smaller than the spacing between adjacent pixel electrodes and the common electrodes in adjacent pixel electrode groups and the common electrode group; the spacing between two common electrodes in the common electrode group is smaller than the spacing between adjacent pixel electrodes and the common electrodes in adjacent pixel electrode groups and the common electrode group.

[0013] Wherein, the distance between two pixel electrodes in the pixel electrode group is equal to the distance between two common electrodes in the common electrode group.

[0014] Wherein, the intervals between the adjacent pixel electrodes and the common electrodes in all adjacent pixel electrode groups and the common electrode group are equal.

[0015] The common electrode and the pixel electrode are both strip-shaped structures, and the extending direction of the pixel electrode is the same as the extending direction of the common electrode.

[0016] In order to solve the above technical problems, the second technical solution provided in the present application is: providing a display panel, wherein the display panel includes a color filter substrate and the above array substrate.

[0017] Beneficial effects of the present application: Different from the prior art, the present application provides an array substrate and a display panel, wherein the array substrate is applied to a liquid crystal display panel, the array substrate comprising a substrate and a common electrode layer, wherein a first metal layer, a second metal layer, and a transparent conductive layer are sequentially provided on one side of the substrate and are insulated from each other; the first metal layer forms a scan line and a common electrode line, the second metal layer forms a data line, and the transparent conductive layer forms a pixel electrode layer, wherein the pixel electrode layer comprises a pixel electrode connection portion and a plurality of pixel electrodes connected to the pixel electrode connection portion. The common electrode layer is used to form an electric field with the pixel electrode to drive liquid crystal deflection; the common electrode layer comprises a common electrode connection portion and a plurality of common electrodes connected to the common electrode connection portion; wherein the pixel electrode layer comprises a plurality of pixel electrode groups, each pixel electrode group comprising two adjacent pixel electrodes; the common electrode layer comprises a plurality of common electrode groups, each common electrode group comprising two adjacent common electrodes; the pixel electrode groups and the common electrode groups are alternately arranged to form a horizontal electric field. By forming a pixel electrode group with two adjacent pixel electrodes and a common electrode group with two adjacent common electrodes, the pixel electrode groups and the common electrode groups are alternately arranged to form a horizontal electric field, so that the liquid crystal above the pixel electrodes and the common electrodes can be deflected, thereby improving the display light effect and increasing the transmittance of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0019] Figure 1 is a structural diagram of an embodiment of a display panel provided by the present application;

[0020] Figure 2 This is a structural diagram of an embodiment of an array substrate provided by the present application;

[0021] Figure 3 This is a schematic structural diagram of an embodiment of a transparent conductive layer provided by the present application;

[0022] Figure 4 yes Figure 2 Schematic diagram of the cross-sectional structure at AA in the middle.

[0023] Description of Figure Numbers:

[0024] Array substrate 100, substrate 10, first metal layer 20, scan line 21, second metal layer 30, data line 31, transparent conductive layer 40, pixel electrode layer 41, pixel electrode connecting portion 411, pixel electrode 412, pixel electrode group 413, first pixel electrode 4131, second pixel electrode 4132, common electrode layer 50, common electrode connecting portion 51, common electrode 52, common electrode group 53 , first common electrode-531, second common electrode-532, thin film transistor-60, gate-61, source-62, drain-63, first insulating layer-70, second insulating layer-80, first horizontal electric field-E1, second horizontal electric field-E2, third horizontal electric field-E3, fourth horizontal electric field-E4, spacing-d1 / d2 / d3 / d4, color filter substrate-200, liquid crystal layer-300, liquid crystal-301, display panel-400. DETAILED DESCRIPTION

[0025] The following describes the embodiments of the present application in detail with reference to the accompanying drawings.

[0026] In the following description, for the purpose of explanation rather than limitation, specific details such as specific system structures, interfaces, and technologies are provided to facilitate a thorough understanding of the present application.

[0027] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0028] The terms "first," "second," and "third" in this application are used only for descriptive purposes and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of such features. In the description of this application, "multiple" means at least two, for example, two, three, etc., unless otherwise specifically defined. All directional indications in the embodiments of this application (such as up, down, left, right, front, back...) are only used to explain the relative positional relationship, movement, etc. between the components under a specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indications also change accordingly. In addition, the terms "including" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units that are not listed, or may optionally include other steps or units that are inherent to these processes, methods, products, or devices.

[0029] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0030] See also Figure 1 , Figure 1 Schematic diagram of the structure of a display panel according to an embodiment of the present application.

[0031] The present application provides a display panel 400, which includes an array substrate 100, a color filter substrate 200, and a liquid crystal layer 300. That is, the display panel 400 is a liquid crystal display panel.

[0032] The display panel 400 is an IPS (In-Plane Switching) display panel.

[0033] The color filter substrate 200 and the array substrate 100 are disposed opposite each other, and the liquid crystal layer 300 is disposed between the color filter substrate 200 and the array substrate 100. The liquid crystal layer 300 includes liquid crystals 301, which act like a light valve in the display panel 400, controlling the brightness of the transmitted light and thus achieving the effect of information display.

[0034] See also Figures 1 to 4 , Figure 2 is a structural diagram of an embodiment of an array substrate provided by this application. Figure 3 : is a structural diagram of an embodiment of a transparent conductive layer provided by this application, Figure 4 yes Figure 2 Schematic diagram of the cross-sectional structure at AA in the middle.

[0035] The present application provides an array substrate 100 for use in a liquid crystal display panel. Specifically, the array substrate 100 includes a substrate 10 and a first metal layer 20, a second metal layer 30, and a transparent conductive layer 40, which are insulated from each other and arranged in sequence on one side of the substrate 10.

[0036] The transparent conductive layer 40 forms a pixel electrode layer 41, and the pixel electrode layer 41 includes a pixel electrode connecting portion 411 and a plurality of pixel electrodes 412 connected to the pixel electrode connecting portion 411. In the present embodiment, the pixel electrode connecting portion 411 is arranged along the extension direction of the scanning line 21, and is located on one side of the pixel electrode 412 along the extension direction of the pixel electrode 412. The material of the transparent conductive layer 40 is indium tin oxide (ITO), and can also be other transparent conductive materials. There is no limitation here, and the selection is made according to actual needs. It should be understood that the pixel electrode connecting portion 411 can also be arranged along the extension direction of the data line 31, and is located on one side of the pixel electrode 412 along the extension direction of the pixel electrode 412. There is no excessive limitation on the extension direction of the pixel electrode connecting portion 411, and it can be designed according to actual needs.

[0037] Furthermore, the pixel electrode layer 41 includes a plurality of pixel electrode groups 413, each of which includes two adjacent pixel electrodes 412. The pixel electrodes 412 are strip-shaped and arranged along the extension direction of the data lines 31. The plurality of pixel electrodes 412 are spaced apart along the extension direction of the scan lines 21. It should be noted that the pixel electrodes 412 can have a straight structure, a curved structure, or other shapes. The shape of the pixel electrodes 412 is not particularly limited and can be designed based on actual needs.

[0038] The first metal layer 20 forms a scan line 21 and a common electrode trace (not shown). Furthermore, the first metal layer 20 also includes a gate electrode 61 that forms a thin-film transistor 60. The thin-film transistor 60 serves as a switching device for a pixel in the array substrate 100. The gate electrode 61 of the thin-film transistor 60 is connected to the scan line 21 of the display panel 400 and, via the scan line 21, to a gate electrode 61 scanning circuit (not shown). At least a portion of the common electrode trace is disposed perpendicularly to the pixel electrode 412 and forms a storage capacitor with the pixel electrode 412.

[0039] The second metal layer 30 forms a data line 31. In addition, the second metal layer 30 also includes a source 62 and a drain 63 that constitute a thin film transistor 60. The source 62 of the thin film transistor 60 is connected to the data line 31, and is connected to an external driver chip (not shown in the figure) or a flexible circuit board (not shown in the figure) via the data line 31. The drain 63 of the thin film transistor 60 is connected to the pixel electrode layer 41, and a voltage is applied to the pixel electrode 412 through the data line 31. Among them, multiple scan lines 21 and multiple data lines 31 are arranged to intersect to define multiple pixel areas.

[0040] The array substrate 100 further includes a first insulating layer 70 and a second insulating layer 80. The first insulating layer 70 is disposed between the first metal layer 20 and the second metal layer 30. That is, the first insulating layer 70 serves as a gate insulating layer. The second insulating layer 80 is disposed between the second metal layer 30 and the transparent conductive layer 40. The materials for the first insulating layer 70 and the second insulating layer 80 are not limited herein and can be selected based on actual needs.

[0041] The array substrate 100 also includes a common electrode layer 50, which is used to form an electric field with the pixel electrode 412 to drive the liquid crystal 301 to deflect. The common electrode layer 50 can form a horizontal electric field with the pixel electrode 412. The common electrode layer 50 includes a common electrode connecting portion 51 and a plurality of common electrodes 52 connected to the common electrode connecting portion 51. The extension direction of the common electrode 52 is the same as the extension direction of the pixel electrode 412, that is, in this embodiment, the common electrode 52 is arranged along the extension direction of the data line 31, and the plurality of common electrodes 52 are arranged at intervals along the extension direction of the scan line 21. The shape of the common electrode 52 is not limited here and is selected according to actual needs. The common electrode connecting portion 51 is arranged along the extension direction of the scan line 21 and is located on one side of the common electrode 52 along the extension direction of the common electrode 52.

[0042] Furthermore, the common electrode layer 50 includes a plurality of common electrode groups 53, each of which includes two adjacent common electrodes 52. The common electrode layer 50 can be provided in the same layer as the pixel electrode layer 41, or in a different layer from the pixel electrode layer 41. When the common electrode layer 50 and the pixel electrode layer 41 are provided in the same layer, the common electrode connecting portion 51 and the pixel electrode connecting portion 411 are located on opposite sides of the pixel electrode 412 along the extension direction of the pixel electrode 412. When the common electrode layer 50 and the pixel electrode layer 41 are provided in different layers, the common electrode layer 50 can be provided on a side of the pixel electrode layer 41 away from the substrate 10, or on a side of the pixel electrode 412 close to the common electrode trace.

[0043] The pixel electrode groups 413 and the common electrode groups 53 are alternately arranged and form a horizontal electric field. The spacing between two pixel electrodes 412 in the pixel electrode group 413 is smaller than the spacing between adjacent pixel electrodes 412 and the common electrode 52 in adjacent pixel electrode groups 413 and common electrode groups 53. The spacing between two common electrodes 52 in the common electrode group 53 is smaller than the spacing between adjacent pixel electrodes 412 and the common electrode 52 in adjacent pixel electrode groups 413 and common electrode groups 53. The spacing between two pixel electrodes 412 in the pixel electrode group 413 and the spacing between two common electrodes 52 in the common electrode group 53 may be equal to or unequal to each other. The spacing between adjacent pixel electrodes 412 and the common electrode 52 in all adjacent pixel electrode groups 413 and common electrode groups 53 may be equal to or unequal to each other. The width of the pixel electrode 412 may be equal to or unequal to the width of the common electrode 52. There is no restriction on the width of the pixel electrode 412 and the width of the common electrode 52, and they are selected according to actual needs.

[0044] Furthermore, a first drive signal is applied to the pixel electrode connection portion 411, and the first drive signal is conducted to the pixel electrode 412 via the pixel electrode connection portion 411. A second drive signal is applied to the common electrode connection portion 51, and the second drive signal is conducted to the common electrode 52 via the common electrode connection portion 51. The first drive signal and the second drive signal are different, so that a horizontal electric field can be generated between the pixel electrode 412 and the common electrode 52 to drive the liquid crystal 301 to deflect. That is, the voltage of the pixel electrode 412 in the pixel electrode group 413 is different from the voltage of the common electrode 52 in the common electrode group 53. The polarity of the pixel electrode 412 in the pixel electrode group 413 can be opposite to the polarity of the common electrode 52 in the common electrode group 53, or the polarity of the pixel electrode 412 in the pixel electrode group 413 can be the same as the polarity of the common electrode 52 in the common electrode group 53.

[0045] It should be noted that adjacent pixel electrode groups 413 and common electrode groups 53 are defined as one group, and the following mainly takes two adjacent pixel electrode groups 413 and common electrode groups 53 as an example for detailed description.

[0046] like Figure 3 and Figure 4As shown, in one embodiment, the pixel electrode layer 41 and the common electrode layer 50 are arranged in the same layer. Specifically, the common electrode layer 50 is formed on the transparent conductive layer 40, and the common electrode layer 50 is insulated from the pixel electrode layer 41 and is spaced apart. The common electrode layer 50 and the pixel electrode layer 41 are prepared by the same transparent conductive layer 40, which can simplify the preparation process. In this embodiment, the common electrode 52 and the pixel electrode 412 are both straight strip structures. The pixel electrode connecting portion 411 and the common electrode connecting portion 51 are respectively located on opposite sides of the pixel electrode 412 along the extension direction of the pixel electrode 412. The polarity of the pixel electrode 412 in the pixel electrode group 413 is opposite to the polarity of the common electrode 52 in the common electrode group 53.

[0047] The pixel electrode groups 413 and the common electrode groups 53 are alternately arranged, and the voltage of the pixel electrodes 412 in the pixel electrode groups 413 is different from the voltage of the pixel electrodes 412 in the common electrode group 53, so that the pixel electrode groups 413 can form a horizontal electric field with the common electrode group 53, thereby driving the liquid crystal 301 to deflect.

[0048] Specifically, the two pixel electrodes 412 in the pixel electrode group 413 are defined as a first pixel electrode 4131 and a second pixel electrode 4132, and the two common electrodes 52 in the common electrode group 53 are defined as a first common electrode 531 and a second common electrode 532. The voltages of the first pixel electrode 4131 and the second pixel electrode 4132 are the same, the voltages of the first common electrode 531 and the second common electrode 532 are the same, and the voltages of the first pixel electrode 4131 and the second pixel electrode 4132 are different, so that a first horizontal electric field E1 can be formed between the first pixel electrode 4131 and the first common electrode 531, a second horizontal electric field E2 can be formed between the first pixel electrode 4131 and the second common electrode 532, a third horizontal electric field E3 can be formed between the second pixel electrode 4132 and the first common electrode 531, and a fourth horizontal electric field E4 can be formed between the second pixel electrode 4132 and the second common electrode 532. Depending on the distance between the pixel electrode 412 and the common electrode 52, the intensity of the third horizontal electric field E3 is greater than the intensity of the first horizontal electric field E1 and greater than the intensity of the fourth horizontal electric field E4. The intensity of the first horizontal electric field E1 is greater than the intensity of the second horizontal electric field E2, and the intensity of the fourth horizontal electric field E4 is greater than the intensity of the second horizontal electric field E2. This design not only allows the liquid crystals 301 corresponding to the areas between the pixel electrodes 412 and the liquid crystals 301 corresponding to the areas between the common electrodes 52 to rotate, but also allows the liquid crystals 301 corresponding to the pixel electrodes 412 and above the common electrodes 52 to rotate, thereby improving display light efficiency and increasing the transmittance of the display panel 400. Furthermore, this embodiment effectively improves the situation in which the liquid crystals 301 directly above the electrodes are not rotated by the electric field force in the IPS mode without significantly changing the structure of the array substrate 100. This eliminates the need to add a new process, saving costs and achieving significant improvements.

[0049] Furthermore, the spacing d1 between the first pixel electrode 4131 and the second pixel electrode 4132 is slightly smaller than the spacing d2 between the adjacent second pixel electrode 4132 and the first common electrode 531, and slightly smaller than the spacing d3 between the adjacent first pixel electrode 4131 and the second common electrode 532. The spacing d4 between the first common electrode 531 and the second common electrode 532 is slightly smaller than the spacing d2 between the second pixel electrode 4132 and the first common electrode 531, and slightly smaller than the spacing d3 between the adjacent first pixel electrode 4131 and the second common electrode 532. The spacing d3 between the adjacent first pixel electrode 4131 and the second common electrode 532 is equal to the spacing d2 between the adjacent second pixel electrode 4132 and the first common electrode 531. The spacing d1 between the first pixel electrode 4131 and the second pixel electrode 4132 is equal to the spacing d4 between the first common electrode 531 and the second common electrode 532. This design makes the intensity of the first horizontal electric field E1 equal to the intensity of the fourth horizontal electric field E4; since the spacing between the two pixel electrodes 412 in the pixel electrode group 413 is smaller than the spacing between adjacent pixel electrodes 412 and the common electrode 52 in the adjacent pixel electrode group 413 and the common electrode group 53, the intensity of the first horizontal electric field E1 is as close as possible to the intensity of the third horizontal electric field E3; and since the spacing between the two common electrodes 52 in the common electrode group 53 is smaller than the spacing between adjacent pixel electrodes 412 and the common electrode 52 in the adjacent pixel electrode group 413 and the common electrode group 53, the intensity of the third horizontal electric field E3 is as close as possible to the intensity of the fourth horizontal electric field E4, thereby making the intensity of the second horizontal electric field E2 as close as possible to the intensity of the fourth horizontal electric field E4, thereby making the electric field intensity in the display panel 400 more uniform, the deflection angle of the liquid crystal 301 closer, and the display effect better.

[0050] In other embodiments, the pixel electrode layer 41 and the common electrode layer 50 may be provided in the same layer, and the materials of the pixel electrode layer 41 and the common electrode layer 50 are different. Alternatively, the pixel electrode layer 41 and the common electrode layer 50 are provided in different layers, and the pixel electrode 412 and the common electrode 52 are staggered and spaced apart in a direction perpendicular to the substrate 10, so that a horizontal electric field is formed between the pixel electrode 412 and the common electrode 52 to drive the liquid crystal 301 to deflect.

[0051] The present application provides an array substrate 100, which is applied to a liquid crystal display panel 400. The array substrate 100 includes a common electrode layer 50, common electrode wiring, and a pixel electrode layer 41. The pixel electrode layer 41 includes a pixel electrode connection portion 411 and a plurality of pixel electrodes 412 connected to the pixel electrode connection portion 411. The common electrode layer 50 is used to form an electric field with the pixel electrodes 412 to drive the liquid crystal 301 to deflect. The common electrode layer 50 includes a common electrode connection portion 51 and a plurality of common electrodes 52. By combining two adjacent pixel electrodes 412 into a pixel electrode group 413 and two adjacent common electrodes 52 into a common electrode group 53, the pixel electrode groups 413 and the common electrode groups 53 are alternately arranged to form a horizontal electric field, thereby causing the liquid crystal 301 above the pixel electrodes 412 and the common electrodes 52 to deflect, thereby improving display light efficiency and increasing the transmittance of the display panel 400.

[0052] The above is only an implementation method of the present application and does not limit the scope of patent protection of the present application. Any equivalent structure or equivalent process transformation made using the contents of the description and drawings of this application, or directly or indirectly applied in other related technical fields, are also included in the scope of patent protection of the present application.

Claims

1. An array substrate, applied to a liquid crystal display panel, comprising: A substrate, wherein a first metal layer, a second metal layer, and a transparent conductive layer are sequentially provided on one side of the substrate, which are insulated from each other; the first metal layer forms a scan line and a common electrode wiring, the second metal layer forms a data line, and the transparent conductive layer forms a pixel electrode layer, wherein the pixel electrode layer includes a pixel electrode connecting portion and a plurality of pixel electrodes connected to the pixel electrode connecting portion; A common electrode layer, configured to form an electric field with the pixel electrode to drive liquid crystal deflection; the common electrode layer comprises a common electrode connecting portion and a plurality of common electrodes connected to the common electrode connecting portion; The pixel electrode layer includes a plurality of pixel electrode groups, each of which includes two adjacent pixel electrodes; the common electrode layer includes a plurality of common electrode groups, each of which includes two adjacent common electrodes; the pixel electrode groups and the common electrode groups are alternately arranged to form a horizontal electric field; The common electrode layer and the pixel electrode layer are arranged in the same layer; The spacing between two pixel electrodes in the pixel electrode group is smaller than the spacing between adjacent pixel electrodes and the common electrodes in adjacent pixel electrode groups and the common electrode group; the spacing between two common electrodes in the common electrode group is smaller than the spacing between adjacent pixel electrodes and the common electrodes in adjacent pixel electrode groups and the common electrode group.

2. The array substrate according to claim 1, wherein: The pixel electrode connecting portion and the common electrode connecting portion are respectively located on two opposite sides of the pixel electrode along an extending direction of the pixel electrode.

3. The array substrate according to claim 2, wherein: The voltage of the pixel electrodes in the pixel electrode group is different from the voltage of the common electrodes in the common electrode group.

4. The array substrate according to claim 3, wherein: The polarity of the pixel electrodes in the pixel electrode group is opposite to the polarity of the common electrodes in the common electrode group.

5. The array substrate according to claim 1, wherein: The distance between two pixel electrodes in the pixel electrode group is equal to the distance between two common electrodes in the common electrode group.

6. The array substrate according to claim 1, wherein: The distances between the adjacent pixel electrodes and the common electrodes in all adjacent pixel electrode groups and the common electrode groups are equal.

7. The array substrate according to claim 1, wherein: The common electrode and the pixel electrode are both strip-shaped structures, and the extending direction of the pixel electrode is the same as the extending direction of the common electrode.

8. A display panel, characterized in that: The display panel includes a color filter substrate and the array substrate according to any one of claims 1 to 7.

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