A checksum calculation sequence determination method and device, equipment and storage medium

Abstract

Embodiments of the present application provide a method, device and equipment for determining the order of checksum calculation, and a storage medium. The method comprises: creating a simulated memory space according to the size of the burn-in space of a device to be burned, obtaining a burn-in map, and creating a mapping table corresponding to the burn-in map in the simulated memory space, thereby creating a mapping of the address of the checksum, the correction data, the start address of the space for calculating the checksum and the end address of the space for calculating the checksum in the simulated memory space. The mapping table is only traversed to confirm whether the space initialization value of the checksum is traversed; if the space initialization value of the checksum is not traversed, the order of the checksum calculation can be determined based on the value corresponding to the mapping table, the checksum calculation of any existing inclusion relationship can be sorted, and the correction parameters to be burned can be checked more flexibly.

Description

Technical Field

[0001] This invention relates to the field of data verification technology, and in particular to a method, apparatus, device, and storage medium for determining the verification and calculation order. Background Technology

[0002] Based on the existing camera module manufacturing process and hardware, even camera modules of the same model may have significant performance differences. Therefore, it is generally necessary to pre-program some calibration parameters into the terminal to adjust and compensate for the shortcomings of the camera, so that the performance of camera modules of the same model is basically consistent.

[0003] like Figure 1 As shown, to ensure that the generated calibration parameters are consistent with the parameters burned into the terminal, a checksum is usually set for each part of the calibration parameters. The checksum is usually calculated by summing all the data in that part, dividing by 255, and taking the remainder. Existing calibration parameters generally have multiple parts, so multiple checksums are set. Finally, the calibration parameters of all parts and their corresponding checksums are summed to obtain the total checksum of the entire calibration data.

[0004] Currently, programming software in the industry is configurable. The traditional checksum sorting method calculates the checksum of each part from top to bottom, and then calculates the final total checksum. This requires that the address bits of the checksum must be greater than the address bits of the data to be calculated, and it cannot automatically identify and sort checksums with any inclusion relationship. Summary of the Invention

[0005] The embodiments of the present invention provide a method, apparatus, device, and storage medium for determining the order of checksum calculations, thereby solving the technical problem that the prior art cannot sort checksum calculations that have any inclusion relationship.

[0006] In a first aspect, the present invention provides a method for determining the checksum calculation order through an embodiment of the present invention. The method includes: creating a simulated memory space according to the size of the programming space of the device to be programmed; obtaining a map to be programmed in the simulated memory space and creating a mapping table corresponding to the map to be programmed in the simulated memory space; traversing the correction data and checksums in the mapping table to confirm whether the initial value of the checksum has been traversed; and determining the calculation order of the checksum based on the initial value of the checksum traversed.

[0007] As an optional implementation, the step of obtaining the map to be programmed in the simulated memory space and creating a mapping table corresponding to the map to be programmed in the simulated memory space includes: obtaining the map to be programmed corresponding to the calibration data and the corresponding checksum in the simulated memory space based on the calibration data and the corresponding checksum in the device to be programmed; and creating a mapping in the simulated memory space of the address of the checksum, the calibration data and the checksum, the starting address of the space for calculating the checksum and the ending address of the space for calculating the checksum, so as to obtain the mapping table.

[0008] As an optional implementation, before traversing the correction data and checksum in the mapping table, the method further includes: initializing the value corresponding to the correction data in the mapping table and initializing the value corresponding to the checksum, wherein the initialization value of the correction data is different from the initialization value of the checksum.

[0009] As an optional implementation, before traversing the correction data and checksums in the mapping table, the method further includes: setting the checksum position in the mapping table as a flag bit and setting an initial value for the flag bit.

[0010] As an optional implementation, the calculation order of the checksum is determined based on the initial value of the checksum encountered during traversal, including: when the initial value of the checksum is encountered, calculating the sum value in the mapping table, where the sum value is the sum of the correction data values ​​corresponding to the space start address and space end address in the mapping table; if the sum value is equal to the initial value of the correction data, then updating the current value of the flag bit; if the sum value is not equal to the initial value of the correction data, then re-executing the step of traversing the mapping table.

[0011] As an optional implementation, updating the current value of the flag bit includes: incrementing the current value of the flag bit one by one, recording the updated flag bit value in the mapping table, and re-executing the traversal step.

[0012] As an optional implementation, if the initial value of the checksum is not found during the traversal of the mapping table, the order of the values ​​of the flag bits in the mapping table from smallest to largest is the calculation order of the checksum.

[0013] Secondly, according to an embodiment of the present invention, a device for determining the verification and calculation order is provided, the device comprising:

[0014] The simulated memory space creation unit is used to create a simulated memory space according to the size of the programming space of the device to be programmed.

[0015] The verification and mapping unit is used to simulate obtaining the map to be burned from the memory space and create a mapping table corresponding to the map to be burned.

[0016] The checksum calculation order determination unit is used to traverse the mapping table to confirm whether the initial value of the checksum has been traversed; if the initial value of the checksum has not been traversed, the calculation order of the checksum is determined based on the value corresponding to the mapping table.

[0017] Thirdly, through an embodiment of the present invention, a checksum calculation order determination device is provided, including a memory, a processor, and code stored in the memory and executable on the processor, wherein the processor executes the code to implement any of the embodiments in the first aspect.

[0018] Fourthly, through one embodiment of the present invention, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements any of the embodiments in the first aspect.

[0019] One or more technical solutions provided in the embodiments of the present invention have at least the following technical effects or advantages:

[0020] First, based on the programming space size of the device to be programmed, a simulated memory space is created. The programming map is then retrieved from this simulated memory space, and a mapping table corresponding to the programming map is created within it. This creates mappings in the simulated memory space for checksum addresses, correction data, checksums, the starting address for checksum calculation, and the ending address for checksum calculation. Then, it is only necessary to iterate through the correction data and checksums in the mapping table to confirm whether the initial checksum value has been encountered, and determine the calculation order of the checksum based on the encountered initial checksum value. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 This is a schematic diagram of the structure of correction data and corresponding checksums in the prior art;

[0023] Figure 2 This is a flowchart of the method for determining the verification and calculation order in an embodiment of the present invention;

[0024] Figure 3This is a schematic diagram of the mapping table structure in one embodiment of the present invention;

[0025] Figure 4 This is a schematic diagram of the structure of the verification and calculation order determination device in an embodiment of the present invention;

[0026] Figure 5 This is a schematic diagram illustrating the device structure for determining the verification and calculation order in an embodiment of the present invention;

[0027] Figure 6 This is a schematic diagram of a computer-readable storage medium structure in an embodiment of the present invention. Detailed Implementation

[0028] The embodiments of the present invention provide a method, apparatus, device, and storage medium for determining the order of checksum calculations, thereby solving the technical problem that the prior art cannot sort checksum calculations that have any inclusion relationship.

[0029] The technical solution provided by the embodiments of the present invention is to solve the above-mentioned technical problems, and the general idea is as follows:

[0030] Based on the programming space size of the device to be programmed, a simulated memory space is created. A programming map is obtained, and a mapping table corresponding to the programming map is created in the simulated memory space. This creates mappings in the simulated memory space for checksum addresses, correction data, the starting address for calculating the checksum, and the ending address for calculating the checksum. Then, by simply traversing the mapping table, and if the initial checksum value is not found, the calculation order for the checksum can be determined based on the corresponding values ​​in the mapping table.

[0031] To better understand the above technical solutions, the following will provide a detailed explanation of the technical solutions in conjunction with the accompanying drawings and specific implementation methods.

[0032] First, it should be clarified that the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0033] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented in sequences other than those illustrated or described herein.

[0034] In a first aspect, the present invention provides a method for determining the checksum calculation order through an embodiment of the present invention, which can be applied to the communication data verification of multiple interconnected communication devices, especially interconnected devices using the same checksum method.

[0035] To determine whether communication data between interconnected devices has been lost or mutated, when the interconnected devices use the same checksum calculation method, once one device receives the communication data and can calculate a reference checksum, the remaining devices can then recalculate a new checksum based on that data. By comparing the new checksums obtained by the remaining devices with the reference checksum one by one, it is possible to determine whether the communication data between these interconnected devices is normal.

[0036] In practical implementation, this method for determining the verification and calculation order can be applied to camera modules, especially during the programming communication process between the programming device and the camera module driver chip. This method ensures that the calibration parameters pre-generated by the programming device are consistent with the parameters programmed into the camera module.

[0037] Existing technologies require data verification to be performed according to a preset calculation order. The checksum address must be within the range of data for which the checksum needs to be calculated, and the calculation order is determined by the size of the checksum address bits. However, the checksum address bits can appear anywhere within the range of data for which the checksum needs to be calculated, making it impossible to use the checksum address bits for sorting and calculation.

[0038] The checksum is calculated based on the address of the checksum, and the address of the register storing the checksum is the address bit of the checksum.

[0039] Unlike existing technologies, the verification and calculation order determination method provided in this invention can sort any verification and calculation that has an inclusion relationship, and can more flexibly verify the correction parameters to be burned.

[0040] Please see as follows Figure 2 As shown, the method for determining the checksum calculation order may include the following steps:

[0041] Step S201: Create a simulated memory space according to the programming space size of the device to be programmed.

[0042] Specifically, a simulated memory space can be created using programming software, which can run on any electronic device equipped with RAM (Random Access Memory).

[0043] In practice, the device to be programmed can be the driver chip of a camera module. The programming software can allocate a space in the computer's memory that is the same size as the storage space of the device to be programmed, as a simulated memory space.

[0044] Step S202: Obtain the map to be programmed from the simulated memory space and create a mapping table corresponding to the map to be programmed. Specifically, based on the calibration data and corresponding checksum in the device to be programmed, obtain the map from the simulated memory space. Figure 1 The corresponding map to be burned is generated, and a mapping table corresponding to the map to be burned is created in the simulated memory space. Specifically, this includes creating a mapping for the checksum address, correction data, the starting address of the space used to calculate the checksum, and the ending address of the space used to calculate the checksum.

[0045] Specifically, the checksum can be obtained using programming software, along with the address of the checksum, the starting address of the space used to calculate the checksum, and the ending address of the space used to calculate the checksum.

[0046] In the specific implementation process, Figure 1 The calibration data and checksums, along with the corresponding maps to be burned, include...<addr,value,startaddr,endaddr> The mapping table includes the same map, denoted as Map.<addr,value,startaddr,endaddr> Where addr is the address value, value is the calibration data and checksum, startaddr is the spatial start address, and endaddr is the spatial end address. The address in the map to be burned is the same as the address in the mapping table. The mapping table initializes the calibration data and checksum values; the initial value for calibration data is 0, and the spatial initial value for the checksum (CheckSum) is -1. Please refer to [reference needed]. Figure 3 As shown. In some specific embodiments, the initial values ​​of the correction data and the checksum can be set according to actual needs.

[0047] As an optional implementation, a flag can be set for the mapping table before traversing it. In practice, the value of the flag can be written into the value field of the mapping table. The flag corresponds to the checksum bit in the value field, therefore there can be multiple flags, and the flags of the mapping table can be represented by the flag symbol. The flag can be initialized according to the actual situation; in some implementations, the initial value of the flag can be set to -1.

[0048] Step S203: Traverse the mapping table to confirm whether the initial value of the checksum has been found.

[0049] In the specific implementation process, if the initial value of the checksum is not found during the traversal of the mapping table (in this embodiment, if -1 is not found), step S205 is executed to determine the calculation order of the checksum based on the corresponding value in the mapping table. If the initial value of the checksum is found, i.e., -1 is found, the sum value (sum) in the mapping table is calculated. The sum value is the sum of the correction data values ​​corresponding to the space start address and space end address in the mapping table.

[0050] Step S204: Determine the sum in the mapping table and operate on the flag bit according to the sum. If the sum in the mapping table is equal to the initial value of the correction data, that is, equal to 0 in this embodiment, then update the current value of the flag bit; if the sum in the mapping table is not equal to the initial value of the correction data, then directly return to step S203 and re-execute the traversal step.

[0051] Regarding how to update the current value of the flag, specifically, the current value of the flag can be incremented (flag++) one by one, that is, the current flag is incremented by 1 according to the number of traversals, and the updated flag value is recorded in Map[value]. Then, return to step S203 and re-execute the traversal steps. Finally, the flag will be assigned different values, such as 0, 1, 2, 3, 4, etc. Of course, it may also be non-contiguous values, which is not limited here.

[0052] The value of the flag bit is fed back to the checksum position of the corresponding location in the map to be burned. The calculation order of the checksum in the map to be burned is the order in which the values ​​of the flag bit are arranged from smallest to largest.

[0053] Step S205: Sort the values ​​of the flag bits in the mapping table from smallest to largest to obtain the calculation order of the checksum. Specifically, assign the values ​​of the flag bits to 0, 1, 2, 3, 4 in positional order, and feed back the values ​​of the flag bits to the corresponding positions of the correction data and the checksum to be burned map, thereby calculating the checksum based on the sorting of the checksum position values ​​from smallest to largest.

[0054] See also Figure 1 As shown, in the prior art, the checksum calculation order can only be performed according to the size of the checksum address bits. For example, the checksum at position [0x04] can only calculate the correction data located before this address, that is, the checksum corresponding to the correction data at [0x01, 0x03] can only be calculated first. The checksum at position [0x09] can only calculate the checksum between the address before this address and the previous checksum address, such as calculating the checksum corresponding to the correction data at [0x05, 0x08]. Similarly, the checksum at position [0x15] can only calculate the checksum corresponding to the correction data at [0x10, 0x14].

[0055] Unlike the checksum calculation order in existing technologies, the checksum calculation order determination method provided in this embodiment of the invention can sort any checksum calculations with inclusion relationships. For example, the checksum at position [0×04] can be used to calculate the checksums of the corresponding correction data [0×01, 0×03] and [0×05, 0×09], the checksum at position [0×09] can be used to calculate the checksums of the corresponding correction data [0×05, 0×08] and [0×10, 0×15], and the checksum at position [0×15] can be used to calculate the checksum of the corresponding correction data [0×10, 0×14].

[0056] The correction data that can be calculated by the checksum bit is not limited to the examples above. For instance, in some embodiments, the checksum at position [0×04] can be used to calculate the checksums of the corresponding correction data for [0×01, 0×03] and [0×10, 0×14]. In other embodiments, the checksum at position [0×04] can be used to calculate the checksums of the corresponding correction data for [0×01, 0×03], [0×05, 0×09], and [0×10, 0×14]. The calculation order of the checksums is calculated using the methods in steps S201 to S205, which allows for the sorting of checksum calculations with any inclusion relationship, enabling more flexible verification of the correction parameters to be programmed.

[0057] Secondly, based on the same inventive concept, this invention provides a checksum calculation order determination device through one embodiment, which can be applied to the communication data verification of multiple interconnected communication devices, especially interconnected devices using the same checksum method. Please refer to... Figure 4 As shown, the checksum calculation order determination device includes:

[0058] The simulated memory space creation unit 301 is used to create a simulated memory space according to the size of the programming space of the device to be programmed.

[0059] The verification and mapping unit 302 is used to obtain the map to be burned in the simulated memory space and create a mapping table corresponding to the map to be burned.

[0060] The checksum calculation order determination unit 303 is used to traverse the mapping table to confirm whether the space initialization value of the checksum has been traversed; if the space initialization value of the checksum has not been traversed, the calculation order of the checksum is determined based on the corresponding value in the mapping table.

[0061] As an optional implementation, the checksum mapping unit 302 is specifically used for:

[0062] Based on the calibration data to be programmed into the device and the corresponding checksum stored in the simulated memory space, a programming map is obtained; a mapping table is created in the simulated memory space for the address of the checksum, the calibration data, the starting address of the space used to calculate the checksum, and the ending address of the space used to calculate the checksum.

[0063] As an optional implementation, the checksum calculation order determination unit 303 is specifically used for:

[0064] During the traversal of the mapping table, if the initial value of the checksum is not found, the values ​​of the flag bits in Map[value] are sorted from smallest to largest to obtain the calculation order of the checksum. If the initial value of the checksum is found, the sum value (sum) in the mapping table is calculated. The sum value is the sum of the correction data values ​​corresponding to the start address and end address of the space in the mapping table. If the sum value (sum) in the mapping table is equal to the initial value of the correction data, the current value of the flag bit is updated. If the sum value (sum) in the mapping table is not equal to the initial value of the correction data, the traversal steps are re-executed.

[0065] As an optional implementation, regarding how to update the current value of the flag, specifically, the current value of the flag can be incremented by flag++, that is, the current flag is incremented by 1 according to the number of traversals, and the updated flag value is recorded in Map[value].

[0066] Since the verification and calculation order determination device described in this embodiment is an electronic device used to implement the verification and calculation order determination method in this embodiment of the invention, those skilled in the art can understand the specific implementation and various variations of the electronic device in this embodiment based on the verification and calculation order determination method described in this embodiment of the invention. Therefore, how the electronic device implements the method in this embodiment of the invention will not be described in detail here. Any electronic device used by those skilled in the art to implement the verification and calculation order determination method in this embodiment of the invention falls within the scope of protection of this invention.

[0067] Thirdly, based on the same inventive concept, embodiments of the present invention provide a checksum calculation order determination device, which can be applied to the communication data verification of multiple interconnected communication devices, especially interconnected devices using the same checksum method.

[0068] refer to Figure 5 As shown, the verification and calculation order determination device provided in this embodiment of the invention includes: a memory 401, a processor 402, and code stored in the memory and executable on the processor 402. When the processor 402 executes the code, it implements any of the embodiments of the verification and calculation order determination method described above.

[0069] Among them, Figure 5 In this document, a bus architecture (represented by bus 400) is used. Bus 400 may include any number of interconnected buses and bridges, linking various circuits including one or more processors represented by processor 402 and memory represented by memory 401. Bus 400 may also link various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and therefore will not be described further herein. Bus interface 405 provides an interface between bus 400 and receiver 403 and transmitter 404. Receiver 403 and transmitter 404 may be the same element, i.e., a transceiver, providing a unit for communicating with various other devices over a transmission medium. Processor 402 is responsible for managing bus 400 and general processing, while memory 401 can be used to store data used by processor 402 during operation.

[0070] Fourthly, such as Figure 6 As shown, based on the same inventive concept, the present invention provides a computer-readable storage medium 500 through an embodiment of the present invention, on which a computer program 501 is stored, which, when executed by a processor, implements any of the embodiments of the method for determining the preceding verification and calculation order.

[0071] The technical solutions in the above embodiments of the present invention have at least the following technical effects or advantages:

[0072] The method for determining the checksum calculation order provided in this invention first creates a simulated memory space based on the size of the programming space of the device to be programmed. By obtaining the checksum to be programmed into the device, a mapping table is created in the simulated memory space, containing the address of the checksum, correction data, the starting address of the space used for calculating the checksum, and the ending address of the space used for calculating the checksum. Then, by simply traversing the mapping table, and when the initialization value of the checksum space is not found, the values ​​in the mapping table can be used to sort any checksum calculations with inclusion relationships, allowing for more flexible verification of the correction parameters to be programmed.

[0073] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable code.

[0074] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer instructions. These computer instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0075] These computer instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0076] These computer instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0077] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0078] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A method for determining the order of checksum calculation, characterized in that, The method includes: Create a simulated memory space based on the size of the programming space of the device to be programmed; Obtain the map to be burned in the simulated memory space, and create a mapping table corresponding to the map to be burned in the simulated memory space; The values ​​corresponding to the correction data in the mapping table are initialized, and the values ​​corresponding to the checksum are also initialized. The initial values ​​of the correction data and the checksum are different. Set a flag bit for the mapping table and assign an initial value to the flag bit; The correction data and checksum in the mapping table are traversed to confirm whether the initial value of the checksum has been reached. The calculation order of the checksum is determined based on the initial value of the checksum obtained from the iteration. Determining the calculation order of the checksum based on the initial value obtained by traversing to the checksum includes: When traversing to the checksum initialization value, the sum value in the mapping table is calculated. The sum value is the sum of the correction data values ​​corresponding to the space start address and space end address in the mapping table. If the sum is equal to the initial value of the correction data, then update the current value of the flag bit; If the sum is not equal to the initial value of the correction data, then the step of traversing the mapping table is executed again; The calculation order of the checksum in the map to be burned is determined by the ascending order of the values ​​of the flag bits.

2. The method as described in claim 1, characterized in that, The step of obtaining the map to be burned in the simulated memory space and creating a mapping table corresponding to the map to be burned in the simulated memory space includes: Based on the calibration data and corresponding checksum in the device to be programmed, the map to be programmed corresponding to the calibration data and corresponding checksum is obtained in the simulated memory space. A mapping table is created in the simulated memory space for the address of the checksum, the correction data and the checksum, the starting address of the space for calculating the checksum, and the ending address of the space for calculating the checksum.

3. The method as described in claim 1, characterized in that, Updating the current value of the flag bit includes: The current value of the flag is incremented sequentially, and the updated flag value is recorded in the mapping table. The traversal steps are then executed again.

4. The method as described in claim 1, characterized in that, During the traversal of the mapping table, if the initial value of the checksum is not found, the order of the flag values ​​in the mapping table from smallest to largest is the calculation order of the checksum.

5. A device for determining the order of verification and calculation, characterized in that, The device includes: The simulated memory space creation unit is used to create a simulated memory space according to the size of the programming space of the device to be programmed. The verification and mapping unit is used to simulate obtaining the map to be burned from the memory space and create a mapping table corresponding to the map to be burned. The checksum calculation order determination unit is used to initialize the values ​​corresponding to the correction data in the mapping table and the values ​​corresponding to the checksum (CheckSum), wherein the initial values ​​of the correction data and the initial values ​​of the checksum (CheckSum) are different; set a flag bit for the mapping table and set an initial value for the flag bit; traverse the mapping table to confirm whether the initial value of the checksum has been traversed; if the initial value of the checksum has not been traversed, determine the calculation order of the checksum based on the values ​​corresponding to the mapping table; The checksum calculation order determination unit is further configured to calculate the sum value in the mapping table when traversing to the checksum initialization value, wherein the sum value is the sum of the correction data values ​​corresponding to the spatial start address and spatial end address in the mapping table; if the sum value is equal to the correction data initialization value, then update the current value of the flag bit; if the sum value is not equal to the correction data initialization value, then re-execute the step of traversing the mapping table; and determine the checksum calculation order in the map to be burned as the ascending order of the flag bit values.

6. A device for determining the order of checksum calculations, comprising a memory, a processor, and code stored in the memory and executable on the processor, characterized in that, When the processor executes the code, it implements the method described in any one of claims 1-4.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method described in any one of claims 1-4.

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