Analog front-end circuit and its gain amplifier

Abstract

Analog front end circuit and gain amplifier thereof are disclosed. The analog front end circuit is configured to be coupled to a sensor having a plurality of sensing units. The analog front end circuit includes a plurality of sensing circuits and a plurality of multiplexers. Each multiplexer is coupled between one of the plurality of sensing units and at least two of the plurality of sensing circuits.

Description

Technical Field

[0001] This invention relates to an analog front-end (AFE) circuit and a gain amplifier, and more particularly to an analog front-end circuit and a gain amplifier that can be used in sensors. Background Technology

[0002] Sensors are widely used in various electronic products to perform various sensing operations, such as capacitive sensing, resistive sensing, optical sensing, and ultrasonic sensing. These sensors may be touch sensors, fingerprint sensors, light sensors, and the like. A sensor generates a sensing signal, which is received by a readout circuit for subsequent processing. Generally, a sensor may include multiple sensing elements, and the readout circuit may include multiple channels, each corresponding to one of the sensing elements. The sensing signal generated by the sensing element can be transmitted through the corresponding channel in the readout circuit.

[0003] However, the sensed signal received by the readout circuit may have an offset. This offset typically arises from mismatches between sensing elements within the sensor (such as process mismatches) and / or circuit mismatches between channels of the readout circuit (such as process mismatches). For example, if the sensor is an under-display fingerprint sensor or touch sensor integrated into the display, the sensor has a large area and many sensing elements, especially under large panels, resulting in a non-negligible offset between the sensing elements. Furthermore, large sensors require processing by large readout circuits with numerous channels; therefore, circuit mismatches between these channels can also produce significant offsets.

[0004] Existing technologies typically eliminate offset through correction, where a predetermined compensation signal is applied to the sensing signal to compensate for the offset in the processing circuit. However, in some applications, the sensing signal has variable gain, meaning the gain applied to the sensing signal changes dynamically. Since a fixed compensation value cannot compensate for sensing signals with variable gain, it is difficult to effectively compensate for dynamically changing gain, and determining the value of the compensation signal is also challenging in the case of variable gain. Therefore, improvements to existing technologies are necessary. Summary of the Invention

[0005] Therefore, the main objective of this invention is to provide a novel readout circuit that can reduce or eliminate the effects of offset caused by process mismatch, thereby solving the above-mentioned problems.

[0006] One embodiment of the present invention discloses an analog front-end (AFE) circuit configured to be coupled to a sensor having a plurality of sensing elements. The analog front-end circuit includes a plurality of sensing circuits and a plurality of multiplexers, wherein each multiplexer is coupled between one of the plurality of sensing elements and at least two of the plurality of sensing circuits.

[0007] Another embodiment of the present invention discloses a gain amplifier for an analog front-end circuit. The gain amplifier includes a plurality of output components and a plurality of switches, wherein each switch is coupled to one of the plurality of output components. The plurality of output components are configured to generate a first gain under a first setting of the plurality of switches and a second gain under a second setting of the plurality of switches; wherein the first gain is substantially equal to the second gain, and the first setting is different from the second setting. Attached Figure Description

[0008] Figure 1 This is a schematic diagram of a typical sensing system.

[0009] Figure 2 This is a schematic diagram of the sensing system according to Embodiment 1 of the present invention.

[0010] Figure 3 This is a schematic diagram of a detailed implementation of an analog front-end circuit in a sensing system.

[0011] Figures 4A to 4D An implementation of an analog front-end circuit using different sensing circuits to receive and process sensing signals from the same sensing unit is shown.

[0012] Figure 5 This is a schematic diagram of the amplification stage of a typical current gain amplifier.

[0013] Figure 6 This is a schematic diagram of the amplification stage of the current gain amplifier in Embodiment 1 of the present invention.

[0014] Figure 7 This is a schematic diagram of a typical voltage gain amplifier.

[0015] Figure 8 This is a schematic diagram of a voltage gain amplifier according to Embodiment 1 of the present invention.

[0016] Figure 9 This is a schematic diagram of the sensing system according to Embodiment 1 of the present invention.

[0017] The reference numerals in the attached figures are explained as follows:

[0018] 10, 20, 90 sensing systems

[0019] S[1]~S[n] sensing units

[0020] 100, 200 analog front-end circuits

[0021] SW_1~SW_n, SW_2, SW_1, SW_0, switch

[0022] SW_A~SW_G

[0023] AFE_1~AFE_n sensing circuits

[0024] M_1~M_n, MUX_A, MUX_B, Multiplexers

[0025] MUX_C

[0026] T_1~T_x time slots

[0027] ADC_1~ADC_n Analog-to-Digital Converters

[0028] STG_A1, STG_A2, STG_B1, STG_B2 circuit level

[0029] 50, 60 current gain amplifiers

[0030] CS_2, CS_1, CS_0, CS_A~CS_G Current Sources

[0031] CTRL_CUR and CTRL_VOL control signals

[0032] 70, 80 voltage gain amplifiers

[0033] 700 and 800 operational amplifiers

[0034] CA_0 Input Capacitor

[0035] Output capacitors CB_2, CB_1, CB_0, CB_A to CB_G Detailed Implementation

[0036] Please refer to Figure 1 , Figure 1 This is a schematic diagram of a typical sensing system 10. (Example) Figure 1As shown, the sensing system 10 includes multiple sensing units S[1] to S[n] and an analog front-end (AFE) circuit 100. Each sensing unit S[1] to S[n] can be a region on a sensor and can be used to perform sensing to generate a sensing signal. The analog front-end circuit 100 can be regarded as a readout circuit for the sensing units S[1] to S[n], which includes switches SW_1 to SW_n and sensing circuits AFE_1 to AFE_n, wherein each switch SW_1 to SW_n and each sensing circuit AFE_1 to AFE_n are respectively disposed in a channel of the analog front-end circuit 100, and are used to read out or receive the sensing signal from one of the sensing units S[1] to S[n]. In this example, each sensing circuit AFE_1 to AFE_n is respectively associated with a sensing unit S[1] to S[n] in a one-to-one manner.

[0037] In detail, during the sensing period for sensing unit S[1], switch SW_1 is turned on and sensing circuit AFE_1 receives sensing signal from sensing unit S[1]; during the sensing period for sensing unit S[2], switch SW_2 is turned on and sensing circuit AFE_2 receives sensing signal from sensing unit S[2]; and so on. The sensing period for sensing unit S[1] and the sensing period for sensing unit S[2] may overlap or not overlap. In this case, the sensing signal generated by a sensing unit will necessarily be received by the same sensing circuit, and thus is easily affected by process mismatch on individual sensing circuits, especially when there are a large number of sensing circuits and channels in the analog front-end circuit 100, the sensing circuits are far apart and the surrounding environment is very different. Furthermore, if the sensing circuit wants to apply a variable gain to the sensing signal, the output of the sensing signal will have different offsets, which cannot be eliminated by a predetermined compensation value. More specifically, the compensation value cannot be dynamically changed to adjust for the gain variation of the received sensing signal.

[0038] Please refer to Figure 2 , Figure 2 This is a schematic diagram of the sensing system 20 according to Embodiment 1 of the present invention. Figure 2As shown, the sensing system 20 includes multiple sensing units S[1] to S[n] and an analog front-end circuit 200. Each sensing unit S[1] to S[n] can be a region on a sensor and can be used to perform sensing to generate a sensing signal. The sensor including sensing units S[1] to S[n] can be a touch sensor, a fingerprint sensor, a light sensor, or any other type of sensing device, but is not limited thereto. For example, if the sensor is a capacitive touch sensor, each sensing unit S[1] to S[n] can be a touch area including a touch sensing electrode or a touchpad, or a row or column of touch sensing electrodes. If the sensor is an optical image sensor (such as an optical fingerprint sensor), each sensing unit S[1] to S[n] can be a sensing pixel including a photodiode and several transistors, or a group, a row, or a column of sensing pixels with similar structures.

[0039] The analog front-end circuit 200 can be considered as a readout circuit for sensing units S[1] to S[n], which includes multiplexers (MUX) M_1 to M_n and sensing circuits AFE_1 to AFE_n. Generally, the analog front-end circuit 200 may also be coupled to an analog-to-digital converter (ADC) and a digital processing circuit, but these components are omitted here for simplification.

[0040] Unlike the analog front-end circuit 100 where each sensing circuit AFE_1 to AFE_n is paired with a sensing unit S[1] to S[n] in a one-to-one manner, in the analog front-end circuit 200, each multiplexer M_1 to M_n is coupled between a sensing unit S[1] to S[n] and at least two sensing circuits AFE_1 to AFE_n. Therefore, each multiplexer M_1 to M_n can selectively couple the corresponding sensing unit S[1] to S[n] to one of the at least two sensing circuits AFE_1 to AFE_n. In this case, the sensing signal generated by each sensing unit S[1] to S[n] can be received and processed by at least two different sensing circuits in the sensing circuits AFE_1 to AFE_n located in different channels.

[0041] In this example, depending on the connection method of the multiplexer M_1, the sensing unit S[1] can be selectively coupled to either the sensing circuits AFE_1 or AFE_n. The multiplexer M_1 includes a first switch coupled between the sensing unit S[1] and the sensing circuit AFE_1, and a second switch coupled between the sensing unit S[1] and the sensing circuit AFE_n, allowing the sensing unit S[1] to be selectively coupled to either the sensing circuit AFE_1 or AFE_n. For example... Figure 2As shown, the sensing unit S[1] can be alternately coupled to the sensing circuits AFE_1 and AFE_n. Specifically, the sensing period for the sensing unit S[1] can be divided into multiple time slots T_1 to T_x, where x is an integer greater than 1, and in this example, x is an even number. In the odd time slots T_1, T_3, ..., and T_(x-1), the first switch is turned on and the second switch is turned off. Therefore, the sensing unit S[1] is coupled to the sensing circuit AFE_1, and the sensing signal of the sensing unit S[1] is received by the sensing circuit AFE_1. In the even time slots T_2, T_4, ..., and T_x, the first switch is turned off and the second switch is turned on. Therefore, the sensing unit S[1] is coupled to the sensing circuit AFE_n, and the sensing signal of the sensing unit S[1] is received by the sensing circuit AFE_n.

[0042] Therefore, in the analog front-end circuit 200, the sensing signal from the sensing unit S[1] can be received alternately through the sensing circuits AFE_1 and AFE_n, thereby reducing or eliminating the influence of the individual offsets in the sensing circuits AFE_1 and AFE_n on the signal of S[1]. If we consider the influence of this offset in the frequency domain, we assume that the sensing circuits AFE_1 and AFE_n themselves have different offset values, that is, the offset between every two consecutive time slots changes. When the gain of the sensing circuits AFE_1 and AFE_n changes dynamically, this offset will cause the output signal of the sensing circuits AFE_1 and AFE_n to be distorted in the frequency domain. Since the offset values ​​of each gain value in the sensing circuits AFE_1 and AFE_n are different, the corresponding sensing circuits AFE_1 and AFE_n have different harmonics in the spectrum. Therefore, the different harmonic energies will be switched between the sensing circuits AFE_1 and AFE_n by the multiplexer, so that the harmonic differences caused by the offset are shifted to a higher frequency. In this case, the effect of the offset on the sensing signal in the frequency domain can be reduced.

[0043] If we consider the effect of this offset in the time domain, the reception of the sensing signal will have different offset magnitudes in different time slots T_1 to T_x during the sensing period, influenced by the sensing circuits AFE_1 to AFE_n. Therefore, the analog front-end circuit 200 can receive the sensing signal from a specific sensing unit through multiple sensing circuits in time slots T_1 to T_x. For example, such as Figure 2 As shown, the sensing signal of sensing unit S[1] is received alternately through sensing circuits AFE_1 and AFE_n. The same sensing signal received by different sensing circuits is dynamically averaged over time to produce a sensing result corresponding to the specific sensing unit. In this case, the effect of offset on the sensing signal can be mitigated.

[0044] Furthermore, when considering the application of variable gain to the sensing signal, the method of receiving the sensing signal from a sensing unit using multiple sensing circuits can also be used to handle offset. In cases with variable gain and continuous dynamic switching, the offset will vary depending on the different variable amplification rates. Since the offset generated by different channels or different sensing circuits is randomly amplified by different gains, the overall offset can be reduced if the number of sensing circuits used to receive the sensing signal and the number of time slots allocated to the sensing circuits are sufficiently large. In this case, the effects of offset can be effectively eliminated by dynamically averaging the same sensing signals received by different sensing circuits over the reception time.

[0045] Similarly, depending on the connection method of the multiplexer M_n, the multiplexer M_n can selectively couple the sensing unit S[n] to either the sensing circuit AFE_1 or AFE_n. More specifically, the sensing unit S[n] can be coupled to the sensing circuit AFE_1 and AFE_n respectively in different time slots T_1 to T_x. In this example, in the odd-numbered time slots T_1, T_3, ..., and T_(x-1) where the sensing unit S[1] is coupled to the sensing circuit AFE_1, the sensing unit S[n] can be coupled to the sensing circuit AFE_n simultaneously; while in the even-numbered time slots T_2, T_4, ..., and T_x where the sensing unit S[1] is coupled to the sensing circuit AFE_n, the sensing unit S[n] can be coupled to the sensing circuit AFE_1 simultaneously.

[0046] In addition, sensing units S[2] and S[n-1] can also be selectively coupled to one of sensing circuits AFE_2 and AFE_(n-1) in each time slot T_1 to T_x. Multiplexer M_2 can select to couple sensing unit S[2] to sensing circuit AFE_2 or AFE_(n-1) in different time slots, so that the sensing signal of sensing unit S[2] can be received alternately by sensing circuits AFE_2 and AFE_(n-1). Multiplexer M_(n-1) can select to couple sensing unit S[n-1] to sensing circuit AFE_2 or AFE_(n-1) in different time slots, so that the sensing signal of sensing unit S[n-1] can be received alternately by sensing circuits AFE_2 and AFE_(n-1). In a similar way, every two sensing circuits can be regarded as a group to share the same sensing unit in a time-sharing manner, thereby reducing or eliminating the impact caused by the offset between sensing circuits.

[0047] In another embodiment, three or more sensing units can be considered as a group to correspondingly configure a multiplexer. For example, a multiplexer corresponding to a sensing unit may include three or more switches, allowing the sensing unit to be coupled to three or more sensing circuits located on different channels in different time slots. In this case, the sensing signal of the sensing unit can be received by these sensing circuits, reducing the impact of offset between sensing circuits on the sensing signal. Using more sensing circuits for a sensing unit can more effectively reduce the impact of offset, but this is accompanied by higher hardware costs derived from more switching components and more complex wiring connections. In one embodiment, each sensing unit can be selectively and dynamically coupled to different sensing circuits in different time slots, allowing the sensing signal to be received by different sensing circuits, thereby minimizing the impact of offset between sensing circuits.

[0048] Please refer to Figure 3 , Figure 3 This is a schematic diagram illustrating a detailed implementation of the analog front-end circuit 200 in the sensing system 20. (See diagram for details.) Figure 3 As shown, the analog front-end circuit 200 includes sensing circuits AFE_1 to AFE_n and multiplexers MUX_A, MUX_B, and MUX_C. The analog front-end circuit 200 is also coupled to one or more analog-to-digital converters ADC_1 to ADC_n. The sensed signal can be received and processed by the sensing circuits AFE_1 to AFE_n before being output to the ADC_1 to ADC_n for conversion into digital data. Each sensing circuit is located in a channel and includes several circuit stages. For example, sensing circuit AFE_1 is located in one channel and includes a first stage STG_A1 and a second stage STG_A2, while sensing circuit AFE_n is located in another channel and includes a first stage STG_B1 and a second stage STG_B2. Generally, the first stage can be a sampling stage used to sample the sensed signal and convert it to the voltage domain; the second stage can be an amplification stage used to amplify the sensed signal. However, those skilled in the art should understand that the implementation of the circuit stages is not limited thereto.

[0049] The analog front-end circuit 200 includes three multiplexers MUX_A, MUX_B and MUX_C. Multiplexer MUX_A is coupled between sensing units S[1] and S[n] and the first stage STG_A1 of sensing circuit AFE_1 and the first stage STG_B1 of sensing circuit AFE_n. Multiplexer MUX_B is coupled between the first stage STG_A1 of sensing circuit AFE_1, the first stage STG_B1 of sensing circuit AFE_n, the second stage STG_A2 of sensing circuit AFE_1 and the second stage STG_B2 of sensing circuit AFE_n. Multiplexer MUX_C is coupled between the second stage STG_A2 of sensing circuit AFE_1, the second stage STG_B2 of sensing circuit AFE_N and the analog-to-digital converters ADC_1 and ADC_n.

[0050] Figures 4A-4D Various implementations of the analog front-end circuit 200 are shown, which utilize different sensing circuits to receive and process the sensing signals of the same sensing unit.

[0051] like Figure 4A As shown, multiplexer MUX_A couples sensing unit S[1] to the first stage STG_A1 of sensing circuit AFE_1 and couples sensing unit S[n] to the first stage STG_B1 of sensing circuit AFE_n. Multiplexer MUX_B couples the first stage STG_A1 of sensing circuit AFE_1 to the second stage STG_A2 of sensing circuit AFE_1 and couples the first stage STG_B1 of sensing circuit AFE_n to the second stage STG_B2 of sensing circuit AFE_n. Multiplexer MUX_C couples the second stage STG_A2 of sensing circuit AFE_1 to analog-to-digital converter ADC_1 and couples the second stage STG_B2 of sensing circuit AFE_n to analog-to-digital converter ADC_n. Under this configuration, the sensing signal from the sensing unit S[1] can be received and processed by the first stage STG_A1 and the second stage STG_A2 of the sensing circuit AFE_1, and then output to the analog-to-digital converter ADC_1; while the sensing signal from the sensing unit S[n] can be received and processed by the first stage STG_B1 and the second stage STG_B2 of the sensing circuit AFE_n, and then output to the analog-to-digital converter ADC_n.

[0052] like Figure 4BAs shown, multiplexer MUX_A couples sensing unit S[1] to the first stage STG_B1 of sensing circuit AFE_n and couples sensing unit S[n] to the first stage STG_A1 of sensing circuit AFE_1. Multiplexer MUX_B couples the first stage STG_B1 of sensing circuit AFE_n to the second stage STG_B2 of sensing circuit AFE_n and couples the first stage STG_A1 of sensing circuit AFE_1 to the second stage STG_A2 of sensing circuit AFE_1. Multiplexer MUX_C couples the second stage STG_B2 of sensing circuit AFE_n to analog-to-digital converter ADC_1 and couples the second stage STG_A2 of sensing circuit AFE_1 to analog-to-digital converter ADC_n. Under this configuration, the sensing signal from the sensing unit S[1] can be received and processed by the first stage STG_B1 and the second stage STG_B2 of the sensing circuit AFE_n, and then output to the analog-to-digital converter ADC_1; while the sensing signal from the sensing unit S[n] can be received and processed by the first stage STG_A1 and the second stage STG_A2 of the sensing circuit AFE_1, and then output to the analog-to-digital converter ADC_n.

[0053] As described above, the sensing period for each sensing unit can be divided into multiple time slots T_1 to T_x. In one embodiment, it is possible to... Figure 4A and Figure 4B The multiplexer settings are switched alternately, for example... Figure 4A The multiplexer settings shown can be used for an odd number of time slots T_1, T_3, ..., and T_(x-1), while Figure 4B The multiplexer settings shown can be used for an even number of time slots T_2, T_4, ..., and T_x. In this way, the sensing signals from sensing units S[1] or S[n] can be dynamically received and processed by different sensing circuits in different channels, thereby reducing the overall offset of the analog front-end circuit 200.

[0054] like Figure 4CAs shown, multiplexer MUX_A couples sensing unit S[1] to the first stage STG_B1 of sensing circuit AFE_n and couples sensing unit S[n] to the first stage STG_A1 of sensing circuit AFE_1. Multiplexer MUX_B couples the first stage STG_B1 of sensing circuit AFE_n to the second stage STG_A2 of sensing circuit AFE_1 and couples the first stage STG_A1 of sensing circuit AFE_1 to the second stage STG_B2 of sensing circuit AFE_n. Multiplexer MUX_C couples the second stage STG_A2 of sensing circuit AFE_1 to analog-to-digital converter ADC_1 and couples the second stage STG_B2 of sensing circuit AFE_n to analog-to-digital converter ADC_n. Under this configuration, the sensing signal from the sensing unit S[1] can be received and processed by the first stage STG_B1 of the sensing circuit AFE_n and the second stage STG_A2 of the sensing circuit AFE_1, and then output to the analog-to-digital converter ADC_1; while the sensing signal from the sensing unit S[n] can be received and processed by the first stage STG_A1 of the sensing circuit AFE_1 and the second stage STG_B2 of the sensing circuit AFE_n, and then output to the analog-to-digital converter ADC_n.

[0055] like Figure 4D As shown, the multiplexer MUX_A couples the sensing unit S[1] to the first stage STG_A1 of the sensing circuit AFE_1 and the sensing unit S[n] to the first stage STG_B1 of the sensing circuit AFE_n. The multiplexer MUX_B couples the first stage STG_A1 of the sensing circuit AFE_1 to the second stage STG_B2 of the sensing circuit AFE_n and the first stage STG_B1 of the sensing circuit AFE_n to the second stage STG_A2 of the sensing circuit AFE_1. The multiplexer MUX_C couples the second stage STG_B2 of the sensing circuit AFE_n to the analog-to-digital converter ADC_1 and the second stage STG_A2 of the sensing circuit AFE_1 to the analog-to-digital converter ADC_n. Under this configuration, the sensing signal from the sensing unit S[1] can be received and processed by the first stage STG_A1 of the sensing circuit AFE_1 and the second stage STG_B2 of the sensing circuit AFE_n, and then output to the analog-to-digital converter ADC_1; while the sensing signal from the sensing unit S[n] can be received and processed by the first stage STG_B1 of the sensing circuit AFE_n and the second stage STG_A2 of the sensing circuit AFE_1, and then output to the analog-to-digital converter ADC_n.

[0056] In one embodiment, it is possible to Figure 4A and Figure 4C The multiplexer settings are switched alternately, for example... Figure 4A The multiplexer settings shown can be used for an odd number of time slots T_1, T_3, ..., and T_(x-1), while Figure 4C The multiplexer settings shown can be used for an even number of time slots T_2, T_4… and T_x. Alternatively, they can also be set to… Figure 4A and Figure 4D The multiplexer settings are switched alternately, for example... Figure 4A The multiplexer settings shown can be used for an odd number of time slots T_1, T_3, ..., and T_(x-1), while Figure 4D The multiplexer configuration shown can be used for an even number of time slots T_2, T_4, ..., and T_x. In yet another embodiment, it can be arranged in any manner. Figures 4A-4D The multiplexer configuration further distributes the offset values ​​of each sensing circuit and its circuit level. For example, the time slots T_1 to T_x during the sensing period can be divided into 4 groups, and Figures 4A-4D Each multiplexer setting is used for one set of time slots.

[0057] It is worth noting that the sensing signals are typically processed by digital processing circuitry behind the analog-to-digital converter (ADC). For example, the sensing signals from the same sensing unit can be filtered in the digital domain to produce the final sensing result. If the sensing signals from the same sensing unit are converted by different ADCs, the digital processing circuitry needs to know which ADC received the relevant information about which sensing unit's sensing signal. Therefore, the digital processing circuitry needs to be coupled to a memory or include a storage unit to store the received data and perform complex logic operations to reallocate the received data so that the sensing signal can be correctly calculated. Preferably, to reduce the burden on the digital processing circuitry, the multiplexer in the analog front-end circuitry can be configured appropriately so that a sensing unit is coupled to the same ADC under various settings, thus enabling the sensing signal of that sensing unit to be output to the same ADC.

[0058] Therefore, regardless of how the multiplexers MUX_A, MUX_B, and MUX_C are configured, the sensing unit can be set to be coupled to the same analog-to-digital converter in different time slots through different sensing circuits and / or different circuit stages. For example, in Figures 4A-4D In the embodiment, the sensing signal of sensing unit S[1] must be output to analog-to-digital converter ADC_1, and the sensing signal of sensing unit S[n] must be output to analog-to-digital converter ADC_n. This can be achieved by appropriately setting the switching and connection mode of multiplexers MUX_A, MUX_B and MUX_C in analog front-end circuit 200.

[0059] In another embodiment, the analog front-end circuitry 200 may include any number of multiplexers. For example, the analog front-end circuitry may only include two of the multiplexers MUX_A, MUX_B, and MUX_C, and thereby implement switching of sensing circuits and / or circuit levels. In an alternative embodiment, more than three multiplexers may be included in the analog front-end circuitry to divide each channel into more circuit levels to further distribute the offset values ​​of a single sensing circuit.

[0060] In the above embodiments, the sensing circuit can be one or more circuit stages in a channel, and the multiplexer can be used to switch the connection methods between different channels and / or circuit stages to reduce overall offset. In other embodiments, the sensing circuit in the analog front-end circuit can also be a module or block (such as a gain amplifier) ​​included in the circuit stage, and the switching of the sensing circuit can be achieved by using different settings of the circuit components in the gain amplifier.

[0061] For example, a gain amplifier may include multiple output components, each coupled to multiple switches. The output components can generate gain under the settings of the switches, where the switch settings represent the on / off states of the switches. In this invention, the same gain value can be achieved using different switch settings to reduce the effects of offset. In one embodiment, the output component can generate a first gain under a first switch setting and a second gain under a second switch setting, wherein the first gain is substantially equal to the second gain, and the first setting differs from the second setting. That is, at least one switch is on in the first setting and off in the second setting, and / or at least one switch is on in the second setting and off in the first setting.

[0062] In one embodiment, the gain amplifier may be a current gain amplifier, and the output component may be multiple current sources of the current gain amplifier. Generally, a current gain amplifier can utilize multiple current sources with binary current values ​​to output an adjustable current gain. Please refer to... Figure 5 , Figure 5 This is a schematic diagram of the amplification stage of a typical current gain amplifier 50, whose current gain is adjustable. Figure 5 As shown, the current gain amplifier 50 includes three current sources CS_2, CS_1 and CS_0 and three switches SW_2, SW_1 and SW_0. Current source CS_2 is coupled to switch SW_2, current source CS_1 is coupled to switch SW_1, and current source CS_0 is coupled to switch SW_0.

[0063] In detail, current sources CS_2, CS_1, and CS_0 are set to have current values ​​of 4I, 2I, and I, respectively, where I is the unity current gain. The output current gain of the current gain amplifier 50 can be selected by controlling the switches SW_2, SW_1, and SW_0 to be on or off. For example, the output current gain can be determined by using the 3-bit control signal CTRL_CUR to control switches SW_2, SW_1, and SW_0, with a range from 0I to 7I. For instance, if the control signal CTRL_CUR is "100", it means that switch SW_2 is on while switches SW_1 and SW_0 are off, and the output current gain is 4I; if the control signal CTRL_CUR is "010", it means that switch SW_1 is on while switches SW_2 and SW_0 are off, and the output current gain is 2I; if the control signal CTRL_CUR is "001", it means that switch SW_0 is on while switches SW_2 and SW_1 are off, and the output current gain is I.

[0064] However, the current sources in a current gain amplifier typically have offsets. In this example, current source CS_2 has an offset of -6×ΔI, current source CS_1 has an offset of +3×ΔI, and current source CS_0 has an offset of +3×ΔI. These offsets cause the output current gain to deviate from its correct value. For instance, for current gain amplifier 50, if the expected output current gain is 4I, the actual output current gain is 4I-6×ΔI; if the expected output current gain is 2I, the actual output current gain is 2I+3×ΔI; and if the expected output current gain is I, the actual output current gain is I+3×ΔI. The offset of each current source is constant and cannot be easily eliminated, especially when current gain amplifier 50 needs to produce variable gain.

[0065] This invention provides a novel current gain amplifier that can reduce or eliminate the effects caused by current source offset. Please refer to [link / reference]. Figure 6 , Figure 6 This is a schematic diagram of the amplification stage of the current gain amplifier 60 according to Embodiment 1 of the present invention. Figure 6 As shown, the current gain amplifier 60 includes seven current sources CS_A to CS_G and seven switches SW_A to SW_G. Each current source CS_A to CS_G is coupled to one of the switches SW_A to SW_G in a one-to-one correspondence. Each current source CS_A to CS_G can be a voltage-controlled current source (VCCS), but the implementation of the current source is not limited to this.

[0066] In detail, each current source CS_A to CS_G is set to have the same current gain I, but may have different offset values ​​due to process mismatch and / or other factors. In this example, assuming the offset values ​​of current sources CS_A to CS_G are -3×ΔI, -2×ΔI, -1×ΔI, 0×ΔI, +1×ΔI, +2×ΔI, and +3×ΔI, respectively, the output current gain of the current gain amplifier 60 can also be controlled by the 3-bit control signal CTRL_CUR.

[0067] To reduce the overall offset value generated by current sources CS_A to CS_G, the settings of switches SW_A to SW_G can be dynamically changed using the control signal CTRL_CUR. For example, if the current gain amplifier 60 wants to output a current gain of 4I, the control signal CTRL_CUR can turn on four of the switches SW_A to SW_G in different ways; that is, the switches SW_A to SW_G can be controlled to generate an output current gain of 4I using multiple setting methods. In an exemplary embodiment, switches SW_A, SW_B, SW_C, and SW_D can be turned on and other switches can be turned off under a first setting, and switches SW_D, SW_E, SW_F, and SW_G can be turned on and other switches can be turned off under a second setting. Both of these setting methods can achieve an output current gain of 4I. If the current gain amplifier 60 wants to apply an output current gain of 4I to the sensing signal during a sensing period, switches SW_A to SW_G can alternately switch between the first setting and the second setting during that sensing period. More specifically, the sensing period can be divided into multiple time slots, and switches SW_A to SW_G can have a first setting in some time slots and a second setting in other time slots. Alternatively or additionally, a third, fourth, or more setting methods can be achieved by turning on four of the switches and turning off the other three. Therefore, in an embodiment where the current gain amplifier 60 has multiple switchable settings, by dynamically switching between the various settings of switches SW_A to SW_G, the influence of the offset of the current sources CS_A to CS_G on the sensing signal can be reduced or eliminated, thereby achieving the desired output gain of the current gain amplifier 60.

[0068] like Figure 6As shown, due to the dynamic switching of switches SW_A to SW_G between different settings, the overall offset value will be a function of time. That is, depending on the current source CS_A to CS_G selected in different time slots, the offset value will change between time slots. For example, considering the offset value, if the expected output current gain is 4I, then the actual output current gain is 4I + ε2(t) × ΔI; if the expected output current gain is 2I, then the actual output current gain is 2I + ε1(t) × ΔI; if the expected output current gain is I, then the actual output current gain is I + ε0(t) × ΔI. The parameters ε2(t), ε1(t), and ε0(t) represent the offset value as a function of time. They are the result of dynamically averaging the sensing signals with different offset values ​​generated by different switch settings over time, thereby reducing or eliminating the impact caused by the offset.

[0069] In another embodiment, the gain amplifier may be a voltage gain amplifier, and the output component may be multiple capacitors of the voltage gain amplifier. Generally, a voltage gain amplifier can utilize multiple capacitors with binary capacitance values ​​to output an adjustable voltage gain. Please refer to... Figure 7 , Figure 7 This is a schematic diagram of a typical voltage gain amplifier 70, whose voltage gain is adjustable. For example... Figure 7 As shown, the voltage gain amplifier 70 includes an operational amplifier 700, an input capacitor CA_0, three output capacitors CB_2, CB_1 and CB_0, and three switches SW_2, SW_1 and SW_0. The output capacitor CB_2 is coupled to the switch SW_2, the output capacitor CB_1 is coupled to the switch SW_1, and the output capacitor CB_0 is coupled to the switch SW_0.

[0070] In detail, the output capacitors CB_2, CB_1, and CB_0 are each set to have a capacitance value of 4C. B 2C B and C B The output voltage gain of the voltage gain amplifier 70 can be selected by controlling the switches SW_2, SW_1, and SW_0 to turn them on or off. For example, the output voltage gain can be determined by using the 3-bit control signal CTRL_VOL to control switches SW_2, SW_1, and SW_0, with a range falling within C. A / C B and C A / 7C B Between. For example, if the control signal CTRL_VOL is "100", it means that switch SW_2 is on while switches SW_1 and SW_0 are off. At this time, the output voltage gain is C. A / 4C BIf the control signal CTRL_VOL is "010", it means that switch SW_1 is on while switches SW_2 and SW_0 are off. At this time, the output voltage gain is C. A / 2C B If the control signal CTRL_VOL is "001", it means that switch SW_0 is on while switches SW_2 and SW_1 are off. At this time, the output voltage gain is C. A / C B .

[0071] However, capacitors in voltage gain amplifiers typically have a offset; in this example, the offset capacitance of the output capacitor CB_2 is -6 × ΔC. B The offset capacitance value of output capacitor CB_1 is +3×ΔC B The offset capacitance value of the output capacitor CB_0 is +3×ΔC B These offset capacitance values ​​cause the output voltage gain to deviate from its correct value. For example, for voltage gain amplifier 70, if the expected output voltage gain is C... A / 4C B The actual output voltage gain is C. A / (4C B -6×ΔC B If the expected output voltage gain is C A / 2C B The actual output voltage gain is C. A / (2C B +3×ΔC B If the expected output voltage gain is C A / C B The actual output voltage gain is C. A / (C B +3×ΔC B The offset of each capacitor is constant and cannot be easily eliminated, especially when the voltage gain amplifier 70 needs to generate variable gain.

[0072] This invention provides a novel voltage gain amplifier that can reduce or eliminate the effects caused by capacitor offset. Please refer to [link / reference]. Figure 8 , Figure 8 This is a schematic diagram of a voltage gain amplifier 80 according to Embodiment 1 of the present invention. Figure 8 As shown, the voltage gain amplifier 80 includes an operational amplifier 800, an input capacitor CA_0, seven output capacitors CB_A to CB_G, and seven switches SW_A to SW_G. Each output capacitor CB_A to CB_G is coupled to one of the switches SW_A to SW_G in a one-to-one correspondence.

[0073] In detail, each output capacitor CB_A to CB_G is set to have the same capacitance value C. B However, these offset values ​​may differ due to process mismatches and / or other factors. In this example, assume the offset capacitance values ​​of the output capacitors CB_A to CB_G are -3 × ΔC respectively. B -2×ΔC B -1×ΔC B 0×ΔC B +1×ΔC B +2×ΔC B and +3×ΔC B In this case, the output voltage gain of the voltage gain amplifier 80 can also be controlled by the 3-bit control signal CTRL_VOL.

[0074] To reduce the overall offset caused by the output capacitors CB_A to CB_G, the settings of the switches SW_A to SW_G can be dynamically changed by controlling the control signal CTRL_VOL. For example, if the voltage gain amplifier 80 wants to output a voltage gain C... A / 4C B At this time, the control signal CTRL_VOL can turn on four of the switches SW_A to SW_G in different ways, that is, it can control the switches SW_A to SW_G to generate the output voltage gain C using various setting methods. A / 4C B In one exemplary embodiment, switches SW_A, SW_B, SW_C, and SW_D can be turned on and other switches can be turned off under a first setting; and switches SW_D, SW_E, SW_F, and SW_G can be turned on and other switches can be turned off under a second setting. Both of these settings can achieve the output voltage gain C. A / 4C B If the voltage gain amplifier 80 is to apply an output voltage gain C to the sensed signal during a sensing period... A / 4C B During the sensing period, switches SW_A to SW_G can alternately switch between a first setting and a second setting. More specifically, the sensing period can be divided into multiple time slots, and switches SW_A to SW_G can have the first setting in some time slots and the second setting in other time slots. Alternatively or additionally, a third, fourth, or more setting methods can be achieved by turning on four of the switches and turning off the other three. Therefore, in an embodiment where the voltage gain amplifier 80 has multiple switchable settings, by dynamically switching between the various settings of switches SW_A to SW_G, the influence of the offset of output capacitors CB_A to CB_G on the sensing signal can be reduced or eliminated, thereby achieving the desired output gain of the voltage gain amplifier 80.

[0075] like Figure 8 As shown, due to the dynamic switching of switches SW_A to SW_G between different settings, the overall offset value will be a function of time. That is, depending on the output capacitors CB_A to CB_G selected in different time slots, the offset value will change between time slots. For example, considering the offset value, if the expected output voltage gain is C... A / 4C B The actual output voltage gain is C. A / (4C B +ε2(t)×ΔC B If the expected output voltage gain is C A / 2C B The actual output voltage gain is C. A / (2C B +ε1(t)×ΔC B If the expected output voltage gain is C A / C B The actual output voltage gain is C. A / (C B +ε0(t)×ΔC B The parameters ε2(t), ε1(t), and ε0(t) represent the offset values ​​as a function of time. They are the result of dynamic averaging of sensing signals with different offset values ​​generated by different switch settings over time, thereby reducing or eliminating the effects caused by the offset.

[0076] It is worth noting that variable gain is feasible in the sensing system of this invention. Variable gain can be achieved by using different voltage / current gain values ​​in different time slots within the sensing time. For example, a gain amplifier (e.g., a current gain amplifier or a voltage gain amplifier) ​​can provide a first gain, a second gain, and a third gain in a first time slot, a second time slot, and a third time slot, respectively. In variable gain applications, the first gain and the second gain may have different gain values, or the second gain and the third gain may have different gain values. Furthermore, assuming the first gain and the third gain are equal, the output components of the gain amplifier can also be configured differently to achieve the same gain value, thereby reducing the impact of gain amplifier offset.

[0077] Please refer to Figure 9 , Figure 9 This is a schematic diagram of a sensing system 90 according to Embodiment 1 of the present invention. The structure of the sensing system 90 is similar to that of the sensing system 20; therefore, signals or components with similar functions are represented by the same symbols. For example... Figure 9 As shown, the sensing system 90 also includes a current gain amplifier and a voltage gain amplifier, which respectively have the following characteristics: Figure 6 and Figure 8The circuit structure is shown. Both the current gain amplifier and the voltage gain amplifier can be included in the first or second stage of the sensing circuit in each channel.

[0078] In the sensing system 90, the sensing period for a sensing unit (such as S[1]) can be divided into x time slots T_1 to T_x, and each time slot T_1 to T_x adopts a specific setting, which can be a combination of the settings of multiplexers MUX_A to MUX_C, the current source setting of the current gain amplifier, and the output capacitor setting of the voltage gain amplifier. More specifically, in each time slot T_1 to T_x, the multiplexers MUX_A to MUX_C can be connected as follows: Figures 4A-4D In one embodiment shown, a specified number of switches in the current gain amplifier and a specified number of switches in the voltage gain amplifier are simultaneously turned on to generate a predetermined gain value. All of the above settings can be dynamically changed between different time slots to reduce or eliminate the effect of offset on the sensing signal after the harmonic differences of the sensing signals received in multiple time slots have been frequency-shifted in the frequency domain.

[0079] It is worth noting that the purpose of this invention is to provide an analog front-end circuit for receiving sensing signals from a sensor, wherein the settings of the analog front-end circuit can be dynamically changed to eliminate the effects caused by offsets such as process mismatches. Those skilled in the art will be able to make modifications or variations accordingly, and are not limited thereto. For example, in the above embodiments, sensing circuits in two channels can be used alternately to receive and process sensing signals from a sensing unit; while in another embodiment, three or more sensing circuits or channels can be dynamically used for sensing signals from the same sensing unit to further improve the randomness and dispersion of offset values.

[0080] It should also be noted that the embodiments of the present invention can be used not only in variable gain implementations but also in fixed gain implementations. Regardless of the value of the output gain, different setting methods can be used alternately in the analog front-end circuit to reduce the overall offset value generated by the sensing circuit, thereby improving the accuracy of the sensing signal.

[0081] In summary, this invention proposes a novel analog front-end circuit for receiving and processing sensor signals. For sensing signals from a sensing unit, the analog front-end circuit can utilize different sensing circuits to receive the sensing signals in different time slots. In one embodiment, a multiplexer can be coupled between the sensing unit and multiple sensing circuits to dynamically switch the sensing unit's coupling to different sensing circuits. Therefore, the sensing signal can be received and processed through different sensing circuits. In this case, when sensing signals received by sensing circuits with different offsets are switched according to the settings of this invention, the influence of the sensing circuit offset on the sensing signal can be reduced or eliminated. In another embodiment, the sensing circuit may include a gain amplifier with different settings. Specifically, the gain amplifier may include multiple output components, each output component coupled to a switch, and the output gain value is determined by the control of the switch. Since each output component may have a different offset, the gain amplifier can dynamically select different output components in different time slots to generate a predetermined output gain. In this case, the influence of the output component offset on the sensing signal can be reduced or eliminated.

[0082] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. An analog front-end circuit, configured to be coupled to a sensor having multiple sensing units, characterized in that, The analog front-end circuit includes: Multiple sensing circuits; and Multiple multiplexers, wherein each multiplexer is coupled between one of the multiple sensing units and at least two of the multiple sensing circuits; Each of the plurality of multiplexers includes: A first switch, coupled between one of the plurality of sensing units and a first sensing circuit of at least two of the plurality of sensing circuits; and A second switch is coupled between one of the plurality of sensing units and a second sensing circuit of at least two of the plurality of sensing circuits; The outputs of a first sensing unit and a second sensing unit among the plurality of sensing units alternately switch between the first sensing circuit and the second sensing circuit.

2. The analog front-end circuit as described in claim 1, characterized in that, Each of the plurality of multiplexers is used to select one of the plurality of sensing units to be coupled to one of the plurality of sensing circuits, at least two of them.

3. The analog front-end circuit as described in claim 1, characterized in that, The first sensing circuit is configured to be coupled to the first sensing unit in a first time slot, and the second sensing circuit is configured to be coupled to the first sensing unit in a second time slot different from the first time slot.

4. The analog front-end circuit as described in claim 3, characterized in that, The first sensing circuit is configured to be coupled to the second sensing unit in the second time slot.

5. The analog front-end circuit as described in claim 4, characterized in that, The second sensing circuit is configured to be coupled to the second sensing unit in the first time slot.

6. The analog front-end circuit as described in claim 1, characterized in that, Each of the plurality of sensing circuits includes a circuit level of the analog front-end circuit.

7. The analog front-end circuit as described in claim 1, characterized in that, The plurality of sensing circuits include a first stage and a second stage located in a first channel of the analog front-end circuit, and a first stage and a second stage located in a second channel of the analog front-end circuit, and the plurality of multiplexers include: A first multiplexer is coupled between the first sensing unit and the first stage of the first channel of the analog front-end circuit and the first stage of the second channel of the analog front-end circuit; and A second multiplexer is coupled between the first stage of the first channel of the analog front-end circuit, the first stage of the second channel of the analog front-end circuit, the second stage of the first channel of the analog front-end circuit, and the second stage of the second channel of the analog front-end circuit.

8. The analog front-end circuit as described in claim 1, characterized in that, The analog front-end circuit is configured to be coupled to an analog-to-digital converter, and the plurality of multiplexers include: A first multiplexer is coupled between the first sensing unit and the first sensing circuit and the second sensing circuit; and A second multiplexer is coupled between the first sensing circuit, the second sensing circuit, and the analog-to-digital converter; The first sensing circuit is located in a first channel of the analog front-end circuit, and the second sensing circuit is located in a second channel of the analog front-end circuit, which is different from the first channel.

9. The analog front-end circuit as described in claim 8, characterized in that, In a first time slot, the first sensing unit is configured to be coupled to the first sensing circuit and the first sensing circuit is configured to be coupled to the analog-to-digital converter, and in a second time slot, the first sensing unit is configured to be coupled to the second sensing circuit and the second sensing circuit is configured to be coupled to the analog-to-digital converter.

10. The analog front-end circuit as described in claim 1, characterized in that, Each of the plurality of sensing circuits includes a plurality of output components of a gain amplifier.

11. The analog front-end circuit as described in claim 10, characterized in that, The multiple output components include multiple current sources or multiple capacitors coupled to multiple switches.

12. The analog front-end circuit as described in claim 1, characterized in that, The analog front-end circuit is used to receive multiple sensing signals from the first sensing unit through at least two of the multiple sensing circuits.

13. The analog front-end circuit as described in claim 12, characterized in that, The plurality of sensing signals received by at least two of the plurality of sensing circuits are averaged to generate a sensing result corresponding to the first sensing unit.

14. An analog front-end circuit, configured to be coupled to a sensor having a plurality of sensing units, characterized in that, The analog front-end circuit includes: Multiple sensing circuits; and Multiple multiplexers, wherein each multiplexer is coupled between one of the multiple sensing units and at least two of the multiple sensing circuits; The analog front-end circuit is used to receive multiple sensing signals from a first sensing unit among the multiple sensing units through at least two of the multiple sensing circuits, and the multiple sensing signals are combined to generate a sensing result corresponding to the first sensing unit.

15. The analog front-end circuit as described in claim 14, characterized in that, The plurality of sensing signals received by at least two of the plurality of sensing circuits are averaged to produce the sensing result corresponding to the first sensing unit.

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