Asynchronous parallel quantum chip automatic calibration software design method and system

Abstract

The application provides an asynchronous parallel quantum chip automatic calibration software design method and system, comprising: a quantum chip calibration scheduler; two task queues are set in the scheduler: a ready task queue and a waiting task queue; when the tasks in the waiting task queue meet the conditions that can be executed, the tasks are added to the ready task queue; the scheduler schedules the tasks in the two queues in a non-blocking manner; the task is defined as a single loop scanning process of the quantum chip calibration process; for different parameter calibration of a single quantum bit in the quantum chip, the calibration process without a predecessor node in the directed acyclic graph is added to the ready task queue, and the calibration tasks of the remaining nodes are put into the waiting task queue; for calibration of a parameter of multiple quantum bits in the quantum chip, the scanning values of each quantum bit need to be calculated separately; for calibration of different parameters of multiple quantum bits in the quantum chip, the calibration strategy is customized according to the structure of the quantum chip.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of quantum chip measurement and control technology, in particular, to the field of automatic calibration of quantum chips for superconducting quantum computers, and more particularly to an asynchronous parallel automatic calibration software design method and system for quantum chips. BACKGROUND

[0002] With the development of quantum computing technology to the era of noisy intermediate-scale quantum computing (NISQ), the number of quantum bits of superconducting quantum chips has reached dozens or even hundreds. Due to the immaturity of the process technology, it is impossible to produce quantum chips that meet industrial standards. The parameters of quantum chips of the same structure in the same batch are not the same, and even differ greatly from the design template. Superconducting quantum computers use microwave pulses to measure and control quantum chips. First, the accurate parameters related to each quantum bit and coupled quantum bits in the quantum chip need to be known, and appropriate measurement and control pulses are generated based on these parameters. The accurate value of each parameter is obtained by cyclic scanning calibration in a given range, and there is a dependent relationship between different parameters, so multiple levels of cyclic scanning are formed, greatly increasing the calibration time.

[0003] At present, since superconducting quantum computers are still in the stage of scientific research, there is no general and asynchronous parallel quantum chip calibration software. With the continuous deepening of the development of superconducting quantum computers, the number of quantum bits of quantum chips is increasing, and the number of quantum chip parameters is also increasing. In addition to the dependent relationship between parameters, the time cost for calibrating quantum chips also increases exponentially.

[0004] The invention patent with publication number CN115061974A discloses a large-scale superconducting quantum computing measurement and control system and implementation method, which includes multiple cabinets interconnected through an interaction module. Each cabinet includes an arbitrary waveform generation module, a data reading module, and a cabinet interconnection module based on FPGA design. One of the cabinets has an X86 host computer. The cabinet interconnection module communicates with the X86 host computer through PCIE. The cabinet interconnection module communicates with the arbitrary waveform generation module and the data reading module through a high-speed bus. The cabinet interconnection modules of the other cabinets communicate with external RapidIO exchange modules through high-speed cables. The implementation method includes the following steps: providing multiple cabinets with arbitrary waveform generation channels and data reading channels; designing an independent RapidIO exchange module to provide a RapidIO communication interface; and building a large-scale superconducting quantum computing measurement and control system using multiple cabinets and a RapidIO exchange module. This patent only considers the basic implementation of quantum chip measurement and control and data reading, and does not consider the dependent relationship between parameters to be calibrated and the calibration time efficiency.

[0005] The utility model discloses a practical new type patent with the publication number CN217085560U, discloses a feedback measurement and control device and system of superconducting quantum computing, and the feedback measurement and control device of superconducting quantum computing includes: feedback measurement and control device sets up in PXIE bus case and is connected superconducting quantum chip. Feedback measurement and control device includes: chip control module, feedback control reading module. Chip control module connects superconducting quantum chip, so as to send quantum gate control waveform to superconducting quantum chip after receiving external waveform generation instruction or feedback control reading module's feedback instruction. Feedback control reading module is connected superconducting quantum chip, chip control module respectively, to generate the feedback instruction for controlling chip control module according to the calculation result of superconducting quantum chip to quantum gate control waveform. The patent only realizes the waveform transmission of quantum chip and data feedback, and does not consider the calibration of the related parameters of each quantum bit in the chip. SUMMARY

[0006] In view of the defects in the prior art, the present application provides an asynchronous parallel quantum chip automatic calibration software design method and system.

[0007] According to the asynchronous parallel quantum chip automatic calibration software design method and system provided by the present application, the scheme is as follows:

[0008] In the first aspect, an asynchronous parallel quantum chip automatic calibration software design method is provided, which comprises the following steps:

[0009] Step S1: In the process of quantum chip automatic calibration software calibration, the execution is scheduled by a scheduler, and the scheduler always maintains a running state;

[0010] Step S2: Two task queues are set in the scheduler: a ready task queue and a waiting task queue;

[0011] Step S3: When the tasks in the waiting task queue meet the conditions that can be executed, the tasks are added to the ready task queue;

[0012] Step S4: The scheduler schedules the tasks in the ready task queue and the waiting task queue in a non-blocking manner;

[0013] Step S5: Define the task as a single loop scanning process of the quantum chip calibration process, which includes four operations: calculating scanning values, sending scanning values, reading scanning results, and processing result data;

[0014] Step S6: For different parameter calibration of a single quantum bit in the quantum chip, a directed acyclic graph is formed according to the calibration strategy, and the calibration process with no predecessor node in the graph is added to the ready task queue, and the calibration tasks of the remaining nodes are put into the waiting task queue;

[0015] Step S7: calibrating a certain parameter of multiple qubits in the quantum chip, and the scanning value of each qubit is calculated separately;

[0016] Step S8: calibrating different parameters of multiple qubits in the quantum chip, and combining the above two scheduling modes, the calibration strategy is customized according to the structure of the quantum chip.

[0017] Preferably, the step S2 comprises: the ready task queue is used to store tasks that can be executed immediately, and the waiting task queue is used to store suspended tasks; wherein the suspended tasks include tasks that can continue to be executed after waiting for the execution of other tasks to end, and tasks that are executed at a certain time in the future.

[0018] Preferably, the step S4 comprises: the scheduler contains an end flag bit, and the default initial state is False, indicating that it will never end; once the state of the flag bit becomes True, the remaining tasks in the queue will not be executed after completing the execution of the tasks in the ready task queue, and all suspended tasks in the waiting task queue will be stopped.

[0019] Preferably, the step S5 comprises:

[0020] Step S5.1: for the ready task queue in the scheduler, the four operations in step S5 are regarded as atomic operations of a single loop scanning process;

[0021] Step S5.2: in the quantum chip calibration loop scanning process, if the scanning result reading channel is shared by multiple qubits, or sending the scanning value causes crosstalk between multiple qubits, then sending the scanning value and reading the scanning result are merged into an indivisible whole operation.

[0022] Preferably, the step S6 comprises: after the execution of the task in the ready task queue is completed, the execution result and the callback function wake up the corresponding task in the waiting task queue, and move the task to the ready task queue for continuous execution, until there are no tasks in the ready task queue and the waiting task queue, and the calibration process ends.

[0023] Preferably, the step S7 comprises: without considering crosstalk between multiple qubits and without reading channel multiplexing, calibrating the same type of parameters of multiple qubits in the quantum chip, and the calibration task can be added to the ready task queue for multi-thread parallel processing; if it needs to be considered, it is processed according to the different parameter calibration mode of a single qubit.

[0024] Preferably, the step S8 comprises: the non-blocking scheduler satisfies the initialization phase and result processing phase of the multi-parameter calibration of the quantum chip, and is asynchronously processed in parallel with the execution phase of the multi-parameter calibration.

[0025] In a second aspect, there is provided an asynchronous parallel quantum chip automated calibration software design system, comprising:

[0026] Module M1: In the process of quantum chip automated calibration software calibration, execution is scheduled by a scheduler, and the scheduler is always kept in a running state;

[0027] Module M2: Two task queues are set in the scheduler: a ready task queue and a waiting task queue;

[0028] Module M3: When the tasks in the waiting task queue meet the conditions that can be executed, the tasks are added to the ready task queue;

[0029] Module M4: The scheduler schedules the tasks in the ready task queue and the waiting task queue in a non-blocking manner;

[0030] Module M5: A task is defined as a single loop scanning process of a quantum chip calibration process, which includes four operations: calculating a scanning value, sending the scanning value, reading a scanning result, and processing the result data;

[0031] Module M6: For different parameter calibration of a single quantum bit in a quantum chip, a directed acyclic graph formed according to a calibration strategy is used, and the calibration process of a node without a predecessor in the graph is added to the ready task queue, and the calibration tasks of the remaining nodes are put into the waiting task queue;

[0032] Module M7: For calibration of a parameter of multiple quantum bits in a quantum chip, the scanning value of each quantum bit needs to be calculated separately;

[0033] Module M8: For calibration of different parameters of multiple quantum bits in a quantum chip, the calibration strategy is customized according to the structure of the quantum chip in combination with the two aforementioned scheduling modes.

[0034] Preferably, the module M2 comprises: the ready task queue is used to store tasks that can be executed immediately, and the waiting task queue is used to store suspended tasks; wherein the suspended tasks include tasks that can continue to be executed after waiting for the execution of other tasks to end, and tasks that are executed at a certain time in the future;

[0035] The module M4 comprises: the scheduler includes an end flag bit, and the default initial state is False, indicating that it never ends; once the state of the flag bit becomes True, the remaining tasks in the queue are no longer executed after the execution of the current ready task queue is completed, and all suspended tasks in the waiting task queue are stopped;

[0036] The module M5 comprises:

[0037] Module M5.1: for the task queue in the ready state in the scheduler, the four operations in step S5 are regarded as atomic operations of a single loop scanning process;

[0038] Module M5.2: in the quantum chip calibration loop scanning process, if the scanning result reading channel is shared by multiple quantum bits, or sending a scanning value causes crosstalk between multiple quantum bits, then sending the scanning value and reading the scanning result are merged into an indivisible whole operation;

[0039] The module M6 includes: after the task in the ready task queue is executed, the execution result and the callback function wake up the corresponding task in the waiting task queue, and move the task to the ready task queue for continuous execution, until there is no task in the ready task queue and the waiting task queue, and the calibration process ends;

[0040] The module M7 includes: without considering crosstalk between multiple quantum bits and without reading channel multiplexing, the same type parameters of multiple quantum bits of the quantum chip are calibrated, and the calibration task can be added to the multi-thread parallel processing in the ready task queue; if it needs to be considered, it is processed according to the different parameter calibration mode of a single quantum bit;

[0041] The module M8 includes: the non-blocking scheduler satisfies the initialization phase and the result processing phase of the quantum chip multi-parameter calibration, which is asynchronous and parallel with the execution phase of the multi-parameter calibration.

[0042] In a third aspect, a computer readable storage medium storing a computer program is provided, and the computer program is executed by a processor to implement the steps in the asynchronous parallel quantum chip automatic calibration software design method.

[0043] Compared with the prior art, the present application has the following beneficial effects:

[0044] 1、The present application realizes the asynchronous calibration of the same (different) parameters of single (multiple) bits, and optimizes the process of multi-parameter calibration of the quantum chip on the existing hardware device;

[0045] 2、The present application can automatically schedule and calibrate each parameter of the quantum chip;

[0046] 3、The present application greatly improves the efficiency of calibrating the quantum chip;

[0047] 4、The present application focuses on the calibration of the parameters of each quantum bit in the quantum chip and its automatic implementation, and is easy for quantum chip calibration personnel to program and use.

[0048] Other beneficial effects of the present application will be illustrated in the specific embodiments by the introduction of specific technical features and technical solutions, which should be understood by the skilled in the art to bring about the beneficial technical effects. BRIEF DESCRIPTION OF DRAWINGS

[0049] Other features, objects, and advantages of the present application will become more apparent from the following detailed description of non-limiting embodiments thereof as taken in conjunction with the accompanying drawings:

[0050] Figure 1 Parametrize a series of parameter scheduler state diagrams for a single qubit;

[0051] Figure 2 Parametrize a bit frequency scheduler state diagram a for a multi-qubit;

[0052] Figure 3 Parametrize a bit frequency scheduler state diagram b for a multi-qubit. DETAILED DESCRIPTION

[0053] The present application will be described in detail below with specific embodiments. The following examples will help those skilled in the art to further understand the present application, but in no way limit the present application. It should be noted that for those skilled in the art, without departing from the concept of the present application, a number of changes and improvements can be made. These all belong to the protection scope of the present application.

[0054] The embodiment of the present application provides a kind of asynchronous parallel quantum chip automation calibration software design method, as shown in figure Figure 1 The method specifically comprises the following steps:

[0055] Step S1: quantum chip calibration flow scheduler (hereinafter referred to as scheduler) is a kind of "event loop" (EventLoop) functional components, in the process of running the calibration software, the scheduler always keeps execution state.

[0056] Step S2: two task queues are set in the scheduler: ready task queue and waiting task queue. Ready task queue is used to store tasks that can be executed immediately, and waiting task queue is used to store suspended tasks. Among them, suspended tasks include tasks that can be executed after waiting for other tasks to end (currently paused), and tasks that are executed at a certain time in the future (wakeup).

[0057] Step S3: when the task in the waiting task queue meets the condition that can be executed, the task is added to the ready task queue.

[0058] Step S4: The scheduler schedules the tasks in the ready task queue and the waiting task queue in a non-blocking manner. The scheduler contains an end flag, which is False by default, indicating that the end will never come. Once the flag becomes True, the scheduler will not execute the remaining tasks in the ready task queue after completing the execution of the current task in the ready task queue, and all the pending tasks in the waiting task queue will be stopped.

[0059] Step S5: The task in the present application is defined as a single-cycle scanning process of the quantum chip calibration flow, which includes four operations: calculating the scanning value (pulse), sending the scanning value (pulse), reading the scanning (pulse) result, and processing the result data.

[0060] This step S5 includes:

[0061] Step S5.1: For the ready task queue in the scheduler, the four operations in step S5 are regarded as atomic operations of a single-cycle scanning process.

[0062] Step S5.2: In the quantum chip calibration cycle scanning process, if the scanning result reading channel is shared by multiple qubits, or the sending scanning value (pulse) causes crosstalk between multiple qubits, the sending scanning value (pulse) and reading scanning (pulse) result are merged into an indivisible whole operation. The above-mentioned situation is determined by the design structure of the quantum chip and is irrelevant to the software.

[0063] Step S6: For different parameter calibration of a single qubit in the quantum chip, a directed acyclic graph is formed according to the calibration strategy, and the calibration flow with no predecessor node in the graph is added to the ready task queue, and the remaining nodes are placed in the waiting task queue. After the execution of the task in the ready task queue is completed, the execution result and the callback function are used to wake up the corresponding task in the waiting task queue, and the task is moved to the ready task queue for continuous execution, until there is no task in the ready task queue and the waiting task queue, and the calibration flow ends.

[0064] Step S7: For the calibration of a certain parameter of multiple qubits in the quantum chip, the parameter types are the same, so the operation steps of the calibration flow are also the same, except that the scanning value (pulse) of each qubit needs to be calculated separately. In the case of not considering crosstalk between multiple qubits and without reading channel multiplexing, the calibration of the same type of parameters of multiple qubits of the quantum chip can be added to the ready task queue for multi-thread parallel processing; if it needs to be considered, it can be processed in the same way as the calibration of different parameters of a single qubit.

[0065] Step S8: Different parameter calibration of multiple quantum bits in the quantum chip, combined with the above two scheduling modes, the calibration strategy is customized according to the quantum chip structure. The non-blocking scheduler satisfies the initialization phase and result processing phase of the multi-parameter calibration of the quantum chip, and the execution phase of the multi-parameter calibration is asynchronous and parallel processing.

[0066] Each quantum bit of the quantum chip has a series of parameters of different categories, and the calibration of a parameter of multiple quantum bits in the quantum chip in step S7, wherein the "a parameter" is the calibration of the same category of parameters of multiple quantum bits; the calibration of different parameters of multiple quantum bits in the quantum chip in step S8, wherein "different" is the calibration of different categories of parameters of multiple quantum bits.

[0067] The application also provides an asynchronous parallel quantum chip automatic calibration software design system, which can be realized by executing the flow steps of the asynchronous parallel quantum chip automatic calibration software design method, that is, the asynchronous parallel quantum chip automatic calibration software design method can be understood as the preferred embodiment of the asynchronous parallel quantum chip automatic calibration software design system by those skilled in the art. The system specifically includes the following contents:

[0068] Module M1: Quantum chip calibration flow scheduler (hereinafter referred to as scheduler) is an "event loop" (EventLoop) functional component, which always maintains an execution state during the running of the calibration software.

[0069] Module M2: Two task queues are set in the scheduler: a ready task queue and a waiting task queue. The ready task queue is used to store tasks that can be executed immediately, and the waiting task queue is used to store suspended tasks. Among them, the suspended tasks include tasks that can be executed after waiting for the execution of other tasks to end (currently paused), and tasks that are executed at a certain time in the future (wakeup).

[0070] Module M3: When the task in the waiting task queue meets the condition that it can be executed, the task is added to the ready task queue.

[0071] Module M4: The scheduler schedules the tasks in the ready task queue and the waiting task queue in a non-blocking manner. The scheduler contains an end flag bit, which is initially set to False by default, indicating that it will never end. Once the state of the flag bit changes to True, the remaining tasks in the queue will not be executed after completing the execution of the current ready task queue, and all suspended tasks in the waiting task queue will be stopped.

[0072] Module M5: define the task in the present application as a single loop scanning process of the quantum chip calibration flow, which includes four operations: calculating the scanning value (pulse), sending the scanning value (pulse), reading the scanning (pulse) result, and processing the result data.

[0073] The module M5 includes:

[0074] Module M5.1: for the task queue in the scheduler, the four operations in module M5 are regarded as atomic operations of a single loop scanning process.

[0075] Module M5.2: in the quantum chip calibration loop scanning process, if the scanning result reading channel is shared by multiple qubits, or the sending scanning value (pulse) causes crosstalk between multiple qubits, the sending scanning value (pulse) and reading scanning (pulse) result are merged into an indivisible whole operation. The above-mentioned situation is determined by the quantum chip design structure and is irrelevant to software.

[0076] Module M6: for different parameter calibration of a single qubit in a quantum chip, a directed acyclic graph is formed according to the calibration strategy, the calibration flow with no predecessor node in the graph is added to the ready task queue, and the remaining nodes are placed in the waiting task queue. After the tasks in the ready task queue are executed, the execution result and the callback function wake up the corresponding task in the waiting task queue, and the task is moved to the ready task queue for continuous execution until there is no task in the ready task queue and the waiting task queue, and the calibration flow ends.

[0077] Module M7: for calibration of a certain parameter of multiple qubits in a quantum chip, the parameter types are the same, so the operation steps of the calibration flow are also the same, except that the scanning value (pulse) of each qubit needs to be calculated separately. In the case of not considering crosstalk between multiple qubits and without reading channel multiplexing, calibration of the same type of parameters of multiple qubits of a quantum chip can be added to the ready task queue for multi-thread parallel processing; if it needs to be considered, it is processed according to the different parameter calibration mode of a single qubit.

[0078] Module M8: for calibration of different parameters of multiple qubits in a quantum chip, combine the above two scheduling methods, and customize the calibration strategy according to the quantum chip structure. The non-blocking scheduler satisfies the initialization phase and result processing phase of the multi-parameter calibration of the quantum chip, which is asynchronous and parallel with the execution phase of the multi-parameter calibration.

[0079] Next, the present application will be described in more detail.

[0080] According to the calibration strategy: cavity frequency -> modified state -> bit frequency -> S curve -> Rabi oscillation -> T1 time -> T2 time, the previous calibration task is the dependence of the arrow pointing to the next calibration task.

[0081] Embodiment 1: Calibrate the above series of parameters for a single qubit, such as Figure 1 As shown in the figure, at the beginning of the calibration process, the cavity frequency calibration task is added to the ready task queue of the scheduler, the scan value of this task is initialized by the user and executed immediately, and the remaining tasks are added to the waiting task queue and suspended. When the cavity frequency task is executed, return and process the results, add the modified state calibration task to the ready task queue, and so on until there are no suspended tasks in the waiting task queue.

[0082] How to wake up suspended tasks with results requires certain programming skills, generally in two ways: call a callback function during the result transmission process after processing, find the next calibration task and execute it; or treat each calibration task as a coroutine (Future), which can save the task state when suspended, wait for the transmission of the processed result and trigger the continue execution. In Python, due to language characteristics, the invention is more inclined to the second method, making software programming more concise and convenient.

[0083] Embodiment 2: Calibrate the above certain parameter for multiple qubits, without loss of generality, such as the bit frequency parameter. As shown in the figure, Figure 2 If the read channel is independent and not shared by multiple qubits and does not consider crosstalk between multiple qubits, at the beginning of the calibration process, multiple bit frequency calibration tasks can be added to the ready task queue of the scheduler, the calibration processes of these tasks are the same, except for the scan value and pulse channel of each task. These data independent of the calibration process are generated by the pre-calibration task, the tasks in the ready task queue can be executed in parallel using multi-threading technology, improving execution efficiency. As shown in the figure, Figure 3 If the read channel is shared by multiple qubits or crosstalk between multiple qubits is considered, the qubit frequency calibration task corresponding to the shared or crosstalk channel needs to be separated, the pre-task is added to the ready task queue, the remaining tasks are added to the waiting task queue, according to the dependence relationship, the suspended tasks in the waiting queue are awakened by the end signal of the pre-task, and the suspended tasks are added to the ready task queue for execution until there are no suspended tasks in the waiting task queue.

[0084] In the embodiment 3, a series of parameters of multiple qubits are calibrated, and the pre-task, the wake-up flag and the end flag are determined according to whether the read channel is shared by multiple qubits and crosstalk between qubits, in combination with the calibration of the series of parameters of a single qubit and the calibration of a certain parameter of multiple qubits. Since the scheduler is non-blocking and asynchronous, and its ready queue is parallel, the present application can fully utilize the computer hardware resources in the calibration process of the super-multiple qubit chip, and has very high execution efficiency.

[0085] The embodiment of the present application provides an asynchronous parallel quantum chip automatic calibration software design method and system, realizes asynchronous calibration of the same (different) parameters of single (multiple) bits, optimizes the calibration process on the existing hardware equipment, and effectively improves the time and space efficiency. The present application focuses on the calibration of the parameters of each qubit in the quantum chip and the automatic implementation thereof, and is easy for calibration operators to complete through programming.

[0086] Those skilled in the art know that, in addition to implementing the system and each device, module and unit thereof provided by the present application in the form of pure computer readable program code, the system and each device, module and unit thereof provided by the present application can also be implemented in the form of logic gates, switches, application specific integrated circuits, programmable logic controllers and embedded microcontrollers to achieve the same function by logically programming the method steps. Therefore, the system and each device, module and unit thereof provided by the present application can be considered as a hardware component, and the devices, modules and units included therein for implementing various functions can also be considered as structures in the hardware component; the devices, modules and units for implementing various functions can also be considered as both software modules implementing the method and structures in the hardware component.

[0087] The specific embodiments of the present application are described above. It should be understood that the present application is not limited to the above specific embodiments, and those skilled in the art can make various changes or modifications within the scope of the claims, which does not affect the essential content of the present application. The embodiments of the present application and the features in the embodiments can be combined with each other in any way without conflict.

Claims

1. A method for designing asynchronous parallel quantum chip automated calibration software, characterized in that, include: Step S1: During the calibration process of the quantum chip automated calibration software, the process is scheduled by a scheduler, and the scheduler always remains running. Step S2: Set up two task queues in the scheduler: a ready task queue and a waiting task queue; Step S3: When a task in the waiting task queue meets the conditions for execution, add the task to the ready task queue. Step S4: The scheduler schedules the tasks in the ready task queue and the waiting task queue to be executed in a non-blocking manner; Step S5: Define the task as a single-cycle scanning process in the quantum chip calibration process. The single-cycle scanning process includes four operations: calculating the scan value, sending the scan value, reading the scan result, and processing the result data. Step S6: For the calibration of different parameters of a single qubit in the quantum chip, according to the directed acyclic graph, add the calibration process without a predecessor node in the graph to the ready task queue, and put the calibration tasks of the remaining nodes into the waiting task queue. Step S7: Calibrate a certain parameter of multiple qubits in the quantum chip. The scan value of each qubit needs to be calculated separately. Step S8: Calibrate different parameters of multiple qubits in the quantum chip, and combine the two scheduling methods mentioned above to customize the calibration strategy according to the structure of the quantum chip.

2. The asynchronous parallel quantum chip automated calibration software design method according to claim 1, characterized in that, Step S2 includes: a ready task queue is used to store tasks that can be executed immediately, and a waiting task queue is used to store suspended tasks; wherein, suspended tasks include tasks that can only continue to be executed after waiting for other tasks to finish, and tasks that will be executed at a scheduled time in the future.

3. The asynchronous parallel quantum chip automated calibration software design method according to claim 1, characterized in that, Step S4 includes: The scheduler contains an end flag, which is initially set to False by default, indicating that the task will never end. Once the flag is set to True, the remaining tasks in the queue will not be executed after the tasks in the currently ready task queue are completed, and all pending tasks in the waiting task queue will be stopped.

4. The asynchronous parallel quantum chip automated calibration software design method according to claim 1, characterized in that, Step S5 includes: Step S5.1: For the ready task queue in the scheduler, the four operations in step S5 are regarded as atomic operations of a single loop scan process; Step S5.2: During the quantum chip calibration cycle scan, if the scan result reading channel is shared by multiple qubits, or if crosstalk occurs between multiple qubits when sending scan values, then sending scan values ​​and reading scan results are merged into an inseparable whole operation.

5. The asynchronous parallel quantum chip automated calibration software design method according to claim 1, characterized in that, Step S6 includes: after the tasks in the ready task queue are completed, the execution result and callback function are used to wake up the corresponding tasks in the waiting task queue, and the tasks are moved to the ready task queue to continue execution until there are no tasks in the ready task queue and the waiting task queue, and the calibration process ends.

6. The asynchronous parallel quantum chip automated calibration software design method according to claim 1, characterized in that, Step S7 includes: calibrating the same type of parameters of multiple qubits of the quantum chip without considering crosstalk between multiple qubits and without read channel multiplexing. This calibration task can be added to the ready task queue for multi-threaded parallel processing; if it needs to be considered, it is processed according to the different parameter calibration methods of a single qubit.

7. The asynchronous parallel quantum chip automated calibration software design method according to claim 1, characterized in that, Step S8 includes: a non-blocking scheduler satisfies the asynchronous parallel processing of the initialization phase and result processing phase of the multi-parameter calibration of the quantum chip with the execution phase of the multi-parameter calibration.

8. An asynchronous parallel quantum chip automated calibration software design system, characterized in that, include: Module M1: During the calibration process of the quantum chip automated calibration software, it is scheduled and executed by a scheduler, and the scheduler always remains running; Module M2: Sets up two task queues in the scheduler: a ready task queue and a waiting task queue; Module M3: When a task in the waiting task queue meets the conditions for execution, the task is added to the ready task queue. Module M4: The scheduler schedules and executes tasks in the ready task queue and the waiting task queue in a non-blocking manner; Module M5: Defines the task as a single-cycle scanning process in the quantum chip calibration procedure. The single-cycle scanning process includes four operations: calculating the scan value, sending the scan value, reading the scan result, and processing the result data. Module M6: For the calibration of different parameters of a single qubit in a quantum chip, according to the directed acyclic graph, the calibration process without a predecessor node in the graph is added to the ready task queue, and the calibration tasks of the remaining nodes are placed in the waiting task queue. Module M7: calibrates a parameter of multiple qubits in a quantum chip; the scan value for each qubit needs to be calculated separately. Module M8: calibrates different parameters of multiple qubits in the quantum chip, combining the two scheduling methods mentioned above, and customizes the calibration strategy according to the quantum chip structure.

9. The asynchronous parallel quantum chip automated calibration software design system according to claim 8, characterized in that, The module M2 includes: a ready task queue for storing tasks that can be executed immediately, and a waiting task queue for storing suspended tasks; wherein, suspended tasks include tasks that can only continue to be executed while waiting for other tasks to finish, and tasks that will be executed at a scheduled time in the future. The module M4 includes: the scheduler contains an end flag, which is initially set to False by default, indicating that it will never end. Once the flag is set to True, the remaining tasks in the queue will not be executed after the tasks in the currently ready task queue are completed, and all pending tasks in the waiting task queue will be stopped. The module M5 includes: Module M5.1: For the ready task queue in the scheduler, the four operations in step S5 are regarded as atomic operations of a single loop scan process; Module M5.2: During the quantum chip calibration cycle scan, if the scan result reading channel is shared by multiple qubits, or if crosstalk occurs between multiple qubits when sending scan values, the sending scan value and reading scan result are merged into an inseparable whole operation; The module M6 includes: after the tasks in the ready task queue are completed, the execution result and callback function are used to wake up the corresponding tasks in the waiting task queue, and the tasks are moved to the ready task queue to continue execution until there are no tasks in the ready task queue and the waiting task queue, and the calibration process ends. The module M7 includes: calibrating the same type of parameters of multiple qubits of a quantum chip without considering crosstalk between multiple qubits and without read channel multiplexing. This calibration task can be added to the ready task queue for multi-threaded parallel processing; if crosstalk between multiple qubits is required, it can be processed according to the different parameter calibration methods of a single qubit. The module M8 includes: a non-blocking scheduler that enables asynchronous parallel processing of the initialization and result processing phases of multi-parameter calibration in the quantum chip, and the execution phase of multi-parameter calibration.

10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of the asynchronous parallel quantum chip automated calibration software design method according to any one of claims 1 to 7.

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