Power circuit and driving circuit thereof, and driving method of driving circuit

Abstract

The application discloses a power circuit and a driving circuit and a driving method of the driving circuit, the power circuit comprising a first power tube MHS and a second power tube MLS; the driving circuit comprising a high-end power tube driving module and a low-end power tube driving module; the high-end power tube driving module comprising a charge pump, a first current mirror encoder module, a first gate current pre-driver tube and a high-end driving protection circuit; and the low-end power tube driving module comprising a second current mirror encoder module and a second gate current pre-driver tube. The power circuit, the driving circuit and the driving method of the driving circuit can improve the driving capability of the circuit, do not need external capacitors and reduce hardware overhead.

Description

Technical Field

[0001] This invention belongs to the field of driving circuit technology, and relates to a driving circuit, and more particularly to a power circuit and its driving circuit and driving method. Background Technology

[0002] Pre-drive circuits are widely used in the control of power transistor circuits to ensure reliable switching on and off of power transistors and reduce the impact of electromagnetic interference on the circuit; commonly used drive circuits are mostly half-bridge structures.

[0003] like Figure 1 As shown, MHS is the high-side NMOS power transistor, and MLS is the low-side NMOS power transistor; together, they form a common half-bridge driver circuit. VM is its operating voltage, which is high, such as 24V, 36V, or 40V. I1 is a buffer, and I3 and I5 are inverters; these three form the pre-drive circuit for MLS, operating between 0 and VDDL, where VDDL is a low voltage, such as 3.3V or 5V. I2 is a low-to-high voltage level converter, and I4 and I6 are inverters; these three form the pre-drive circuit for MHS, operating under a floating power supply VOUT-VBST, where VBST = VOUT + VDDL - Vdio. The load is typically a speaker, motor, etc. R, L, and C are the equivalent circuit models of the load.

[0004] PWM_LS and PWM_HS are enable signals that control the on / off state of MHS and MLS, respectively. They cannot be enabled simultaneously, which would cause feedthrough between MHS and MLS, resulting in a large current. When PWM_LS = 1 and PWM_HS = 0, VGL = VDDL, VGH = VOUT, MLS VGS = VDDL, MHS VGS = 0, MLS is on, MHS is off, and VOUT ≈ 0. When PWM_LS = 0 and PWM_HS = 1, VGL = 0, VGH = VBST, MLS VGS = 0, MHS VGS = VDDL - Vdio, MLS is off, MHS is on, and VOUT ≈ VM. When PWM_LS = 0 and PWM_HS = 0, VGL = 0, VGH = VOUT, MLS VGS = 0, MHS VGS = 0, both MLS and MHS are off, and VOUT is in a high-impedance state. By coordinating the PWM_HS and PWM_LS signals, VOUT can be pulled low or high to drive the load.

[0005] In this circuit, capacitor Cb and diode Dio form a voltage boost structure to generate VBST voltage and turn on the MHS transistor. When PWM_LS = 1 and PWM_HS = 0, VOUT = 0, diode Dio is turned on, and VDDL charges Cb through Dio. The turn-on voltage of Dio is Vd io, so the voltage across Cb is VDDL - Vd io, and VBST = VDDL - Vd io + VOUT. The pre-drive circuit of the high-side MHS operates between VBST and VOUT, and both are floating power supplies with a power-to-ground difference of VDDL - Vd io.

[0006] Because a power transistor has on-resistance after it is turned on, a certain amount of energy is consumed when a large current flows through it, which is called conduction loss. Therefore, in the design of a power transistor, the smaller the on-resistance, the smaller the conduction loss and the less heat generated. The formula for calculating the on-resistance of a power MOSFET is as follows.

[0007]

[0008] Where μ N C OX These are process parameters, which are fixed values. W / L represents the length and width of the power transistor; for a given area, W / L is also fixed. VGS is the voltage difference between the gate and source of the power transistor, and VTH is the threshold voltage of the power transistor.

[0009] For MHS, on-resistance For MLS, on-resistance

[0010] The rise and fall times of VOUT are related to the parasitic capacitance of the power transistor's gate and drain and the equivalent resistance Rup_pmos & Rdn_nmos of the last stage inverter PMOS / NMOS in the pre-drive circuit. That is, the rise and fall times Trisng & Tfalling = Cgd * Rup_pmos & Cgd * Rdn_nmos. Moreover, the equivalent resistance Rup_pmos & Rdn_nmos is easily affected by factors such as process, voltage and temperature, which can cause large variations in the rise and fall times of Vout. This can easily lead to extreme situations, such as Vout rising too fast or too slow. If it rises too fast, it can cause electromagnetic interference, and if it rises too slow, it can affect the system response speed.

[0011] It can be seen that the current structure has the following problems: (1) In order to generate VBST, an external capacitor Cb must be added, which increases the system hardware overhead. When the upper drive VGS = VDDL - Vdio, the on-resistance of the upper drive is large when the power drive high-side NMOS transistor and the power drive low-side NMOS transistor are the same size, and the driving capability is weakened; (2) The pre-drive is an inverter. The rise and fall time of VOUT fluctuates greatly with the process, power supply voltage and temperature. That is, dVout / dt is likely to be too large or too small under certain harsh conditions, which leads to electromagnetic interference and system response speed problems.

[0012] In view of this, there is an urgent need to design a new drive circuit in order to overcome at least some of the aforementioned defects of existing drive circuits. Summary of the Invention

[0013] This invention provides a power circuit, its driving circuit, and a driving method for the driving circuit, which can improve driving capability, eliminate the need for external capacitors, and reduce hardware overhead.

[0014] To solve the above-mentioned technical problems, according to one aspect of the present invention, the following technical solution is adopted:

[0015] A driving circuit for a power circuit, the power circuit including a first power transistor MHS and a second power transistor MLS; the first power transistor MHS is a high-side power driving transistor, and the second power transistor MLS is a low-side power driving transistor.

[0016] The driving circuit includes: a high-side power transistor driving module and a low-side power transistor driving module; the high-side power transistor driving module is connected to a first power transistor MHS and is used to drive the first power transistor MHS; the low-side power transistor driving module is connected to a second power transistor MLS and is used to drive the second power transistor MLS.

[0017] The high-side power transistor drive module includes a charge pump, a first current mirror encoder module, a first gate current pre-drive transistor, and a high-side drive protection circuit; the charge pump is connected to the high-side drive protection circuit, and the first gate current pre-drive transistor is connected to the first current mirror encoder module, the high-side drive protection circuit, and the first power transistor MHS.

[0018] The charge pump provides the operating voltage of the high-side power transistor drive module; the first current mirror encoder module is used to adjust the current flowing through the first gate current pre-drive transistor; the first gate current pre-drive transistor is used to drive the high-side power transistor, and its current magnitude controls the turn-on and turn-off speed of the high-side power transistor, thereby affecting the rise and fall time of OUT; the high-side drive protection circuit ensures that the device of the high-side power transistor pre-drive module operates in the safe area during normal or abnormal drive processes.

[0019] The low-end power transistor drive module includes a second current mirror encoder module and a second gate current pre-drive transistor; the second current mirror encoder module is connected to the second gate current pre-drive transistor, and the second gate current pre-drive transistor is connected to the second power transistor MLS.

[0020] The second current mirror encoder module is used to adjust the magnitude of the current flowing through the second gate current pre-drive transistor; the second gate current pre-drive transistor is used to drive the low-side power transistor, and its current magnitude controls the turn-on and turn-off speed of the low-side power transistor, thereby affecting the rise and fall time of OUT.

[0021] In one embodiment of the present invention, the first gate current pre-drive transistor includes a first MOS transistor MHP0, a second MOS transistor MHP1, a third MOS transistor MHN0, and a fourth MOS transistor MHN1.

[0022] The high-end drive protection circuit includes a first diode Z1, a second diode Z2, a third diode Z3, a first resistor R1, a second resistor R2, and a third resistor R3;

[0023] The high-end power transistor drive module further includes: a first switch and a second switch;

[0024] The output terminal of the charge pump outputs a first power supply voltage VBST, which is connected to the negative terminal of the third diode Z3, the source of the first MOSFET MHP0, the source of the second MOSFET MHP1, and the negative terminal of the second diode Z2.

[0025] The gate of the first MOSFET MHP0 is connected to the drain of the first MOSFET MHP0, the gate of the second MOSFET MHP1, the anode of the third diode Z3, and the first terminal of the third resistor R3, respectively; the drain of the second MOSFET MHP1 is connected to the anode of the second diode Z2 and the first terminal of the second resistor R2, respectively.

[0026] The second end of the third resistor R3 is connected to the first end of the first switch, and the output end of the first current mirror encoder module is connected to the second end of the first switch and the first end of the second switch, respectively.

[0027] The second terminal of the second switch is connected to the drain of the third MOSFET MHN0, the gate of the third MOSFET MHN0, and the gate of the fourth MOSFET MHN1, respectively; the source of the third MOSFET MHN0 is grounded.

[0028] The second end of the second resistor R2 is connected to the first power transistor MHS and the first end of the first resistor R1, respectively; the second end of the first resistor R1 is connected to the negative terminal of the first diode Z1 and the gate of the fourth MOSFET MHN1, respectively; the source of the fourth MOSFET MHN1 and the positive terminal of the first diode Z1 are grounded, respectively.

[0029] In one embodiment of the present invention, the second gate current pre-drive transistor includes a fifth MOSFET MLP0, a sixth MOSFET MLP1, a seventh MOSFET MLH0, and an eighth MOSFET MLH1; the low-side power transistor drive module further includes a third switch and a fourth switch;

[0030] The second power supply voltage VDDL is connected to the source of the fifth MOSFET MLP0 and the source of the sixth MOSFET MLP1, respectively; the drain of the fifth MOSFET MLP0 is connected to the gate of the fifth MOSFET MLP0, the gate of the sixth MOSFET MLP1, and the first terminal of the third switch, respectively.

[0031] The output terminal of the second current mirror encoder module is connected to the second terminal of the third switch and the first terminal of the fourth switch respectively; the second terminal of the fourth switch is connected to the drain of the seventh MOS transistor MLH0, the gate of the seventh MOS transistor MLH0, and the gate of the eighth MOS transistor MLH1 respectively.

[0032] The drain of the sixth MOSFET MLP1 is connected to the drain of the second power transistor MLS and the drain of the eighth MOSFET MLH1, respectively, while the source of the seventh MOSFET MLH0 and the source of the eighth MOSFET MLH1 are grounded.

[0033] In one embodiment of the present invention, the voltage of the first power supply voltage VBST is higher than the voltage of the second power supply voltage VDDL.

[0034] According to another aspect of the present invention, the following technical solution is adopted: a power circuit, the power circuit including a first power transistor MHS, a second power transistor MLS, and a driving circuit of the power circuit; the driving circuit is respectively connected to the first power transistor MHS and the second power transistor MLS.

[0035] According to another aspect of the present invention, a driving method for the above-mentioned driving circuit is adopted, the driving method comprising:

[0036] The charge pump is used to generate a high voltage VBST, where VBST > VM + VDDL. VBST directly powers the high-side pre-drive transistor MHP1.

[0037] To protect the device under high voltage, the MHP1 transistor is connected in parallel with the Zener diode Z2 and in series with a small resistor R2 to point VGH. When VGH is pulled to ground by MHN1, the voltage across MHP1 and R2 is the high voltage VBST. At this time, Z2 can protect the MHP1 transistor, and R2 is used to withstand the high voltage VBST minus the breakdown voltage of the Zener diode Z2.

[0038] The MHN1 transistor is connected in parallel with the Zener diode Z1 and in series with a small resistor R1 to point VGH. When VGH is pulled to VBST by MHP1, the voltage across MHP1 and R1 is the high voltage VBST. At this time, Z1 can protect the MHN1 transistor, and R1 is used to withstand the high voltage of VBST minus the breakdown voltage of the Zener diode Z2.

[0039] The beneficial effects of this invention are as follows: The power circuit, its driving circuit, and the driving method proposed in this invention, with the addition of a Charge Pump circuit to the internal circuit, can directly generate a high voltage VBST>VDDL+VM, and the upper transistor's drive VGS≈VDDL. Compared to the original structure, with the same area, the VGS of the upper power transistor will increase, thereby reducing the on-resistance and increasing the driving capability. Furthermore, no external capacitor Cb is required, reducing hardware overhead.

[0040] This invention can be driven by a current source control mode. Under changes in process, power supply voltage, and temperature, the current source fluctuates less than the inverter. Furthermore, by adjusting the current mirror current, the rise and fall time of Vout can be dynamically adjusted, reducing the possibility of Vout rising or falling too fast or too slow, thereby obtaining a stable response speed and avoiding problems such as electromagnetic interference. Attached Figure Description

[0041] Figure 1 This is a circuit diagram of a half-bridge pre-drive circuit.

[0042] Figure 2 This is a circuit diagram of the driving circuit in one embodiment of the present invention. Detailed Implementation

[0043] The preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0044] To further understand the present invention, preferred embodiments of the present invention are described below in conjunction with examples. However, it should be understood that these descriptions are only for further illustrating the features and advantages of the present invention, and not for limiting the scope of the claims of the present invention.

[0045] The description in this section pertains to only a few typical embodiments, and the present invention is not limited to the scope of the embodiments described. Substitution of identical or similar prior art methods with some technical features in the embodiments is also within the scope of the description and protection of this invention.

[0046] The steps described in the various embodiments in the specification are for illustrative purposes only, and the implementation of this application is not limited by the order of the steps.

[0047] The term "connection" in the specification includes both direct and indirect connections, such as connections made through active devices, passive devices, or electrical conduction media; it may also include connections made by other active or passive devices that are known to those skilled in the art and can achieve the same or similar functional purpose, such as connections made through circuits or components such as switches or follower circuits.

[0048] This invention discloses a driving circuit for a power circuit (which can also be used as a pre-driving circuit). Figure 2 This is a circuit diagram of the driving circuit in one embodiment of the present invention; please refer to [link / reference]. Figure 2 The power circuit includes a first power transistor MHS and a second power transistor MLS; the first power transistor MHS is a high-side power drive transistor, and the second power transistor MLS is a low-side power drive transistor.

[0049] The driving circuit includes a high-side power transistor driving module and a low-side power transistor driving module; the high-side power transistor driving module is connected to a first power transistor MHS and is used to drive the first power transistor MHS; the low-side power transistor driving module is connected to a second power transistor MLS and is used to drive the second power transistor MLS.

[0050] The high-side power transistor drive module includes a charge pump, a first current mirror encoder module, a first gate current pre-drive transistor, and a high-side drive protection circuit. The charge pump is connected to the high-side drive protection circuit, and the first gate current pre-drive transistor is connected to the first current mirror encoder module, the high-side drive protection circuit, and the first power transistor MHS. The charge pump provides the operating voltage for the high-side power transistor drive module. The first current mirror encoder module is used to adjust the current flowing through the first gate current pre-drive transistor. The first gate current pre-drive transistor drives the high-side power transistor, and its current magnitude controls the turn-on and turn-off speed of the high-side power transistor, thereby affecting the rise and fall times of OUT. The high-side drive protection circuit ensures that the device operates in the safe region during normal or abnormal drive processes.

[0051] The low-side power transistor drive module includes a second current mirror encoder module and a second gate current pre-drive transistor. The second current mirror encoder module is connected to the second gate current pre-drive transistor, and the second gate current pre-drive transistor is connected to the second power transistor MLS. The second current mirror encoder module is used to adjust the magnitude of the current flowing through the second gate current pre-drive transistor. The second gate current pre-drive transistor is used to drive the low-side power transistor, and its current magnitude controls the turn-on and turn-off speed of the low-side power transistor, thereby affecting the rise and fall time of OUT.

[0052] In one embodiment of the present invention, the first gate current pre-drive transistor includes a first MOSFET MHP0, a second MOSFET MHP1, a third MOSFET MHN0, and a fourth MOSFET MHN1; the high-side drive protection circuit includes a first diode Z1, a second diode Z2, a third diode Z3, a first resistor R1, a second resistor R2, and a third resistor R3; the high-side power transistor drive module further includes a first switch and a second switch.

[0053] The charge pump outputs a first power supply voltage VBST, which is connected to the cathode of the third diode Z3, the source of the first MOSFET MHP0, the source of the second MOSFET MHP1, and the cathode of the second diode Z2. The gate of the first MOSFET MHP0 is connected to the drain of the first MOSFET MHP0, the gate of the second MOSFET MHP1, the anode of the third diode Z3, and the first terminal of the third resistor R3. The drain of the second MOSFET MHP1 is connected to the anode of the second diode Z2 and the first terminal of the second resistor R2. The second terminal of the third resistor R3 is connected to the first terminal of the first switch. The output of the first current mirror encoder module is connected to the second terminal of the first switch and the first terminal of the second switch. The second terminal of the second switch is connected to the drain of the third MOSFET MHN0, the gate of the third MOSFET MHN0, and the gate of the fourth MOSFET MHN1. The source of the third MOSFET MHN0 is grounded. The second end of the second resistor R2 is connected to the first power transistor MHS and the first end of the first resistor R1, respectively; the second end of the first resistor R1 is connected to the negative terminal of the first diode Z1 and the gate of the fourth MOSFET MHN1, respectively; the source of the fourth MOSFET MHN1 and the positive terminal of the first diode Z1 are grounded, respectively.

[0054] In one embodiment of the present invention, the second gate current pre-drive transistor includes a fifth MOSFET MLP0, a sixth MOSFET MLP1, a seventh MOSFET MLH0, and an eighth MOSFET MLH1; the low-side power transistor drive module further includes a third switch and a fourth switch.

[0055] The second power supply voltage VDDL is connected to the source of the fifth MOSFET MLP0 and the source of the sixth MOSFET MLP1, respectively. The drain of the fifth MOSFET MLP0 is connected to the gate of the fifth MOSFET MLP0, the gate of the sixth MOSFET MLP1, and the first terminal of the third switch, respectively. The output terminal of the second current mirror encoder module is connected to the second terminal of the third switch and the first terminal of the fourth switch, respectively. The second terminal of the fourth switch is connected to the drain of the seventh MOSFET MLH0, the gate of the seventh MOSFET MLH0, and the gate of the eighth MOSFET MLH1, respectively. The drain of the sixth MOSFET MLP1 is connected to the drain of the second power transistor MLS and the eighth MOSFET MLH1, respectively. The sources of the seventh MOSFET MLH0 and the eighth MOSFET MLH1 are grounded, respectively.

[0056] In one embodiment of the present invention, the voltage of the first power supply voltage VBST is higher than the voltage of the second power supply voltage VDDL.

[0057] The present invention also discloses a power circuit, the power circuit including a first power transistor MHS, a second power transistor MLS, and a driving circuit of the power circuit described above; the driving circuit is respectively connected to the first power transistor MHS and the second power transistor MLS.

[0058] The present invention further discloses a driving method for the above-mentioned driving circuit, the driving method comprising:

[0059] The charge pump is used to generate a high voltage VBST, where VBST > VM + VDDL. VBST directly powers the high-side pre-drive transistor MHP1.

[0060] To protect the device under high voltage, the MHP1 transistor is connected in parallel with the Zener diode Z2 and in series with a small resistor R2 to point VGH. When VGH is pulled to ground by MHN1, the voltage across MHP1 and R2 is the high voltage VBST. At this time, Z2 can protect the MHP1 transistor, and R2 is used to withstand the high voltage VBST minus the breakdown voltage of the Zener diode Z2.

[0061] The MHN1 transistor is connected in parallel with the Zener diode Z1 and in series with a small resistor R1 to point VGH. When VGH is pulled to VBST by MHP1, the voltage across MHP1 and R1 is the high voltage VBST. At this time, Z1 can protect the MHN1 transistor, and R1 is used to withstand the high voltage of VBST minus the breakdown voltage of the Zener diode Z2.

[0062] The high-end pre-drive of this structure is protected by a Zener diode, which eliminates the floating power supply method used in the original high-end pre-drive structure. This avoids the interference that may occur when VBST rises during VOUT, and also reduces the external hardware overhead of the chip.

[0063] exist Figure 2In this circuit, the power transistors MHS and MLS are switched on and off via current sources. MHS is switched on by current source MHP1, and MHS is switched off by current source MHN1. MLS is switched on by current source MLP1, and MLS is switched off by current source MLN1.

[0064] It can be derived that the rise and fall times of VOUT are determined by the current source magnitude I and the gate-drain capacitance Cgd of the driving transistor, as follows:

[0065]

[0066] CS1-CS4 are adjustable current sources. The current magnitude can be selected by an N-bit encoder. The generated current is mirrored to MHP1, MHN1, MLP1 and MLN1 via MHP0, MHN0, MLP0 and MLN0. MHP1, MHN1, MLP1 and MLN1 then control the rise and fall times of VOUT.

[0067] In summary, the power circuit, its driving circuit, and the driving method proposed in this invention, by adding a Charge Pump circuit to the internal circuitry, can directly generate a high voltage VBST > VDDL + VM, and the upper transistor's drive VGS ≈ VDDL. Compared to the original structure, with the same area, the VGS of the upper power transistor will increase, thereby reducing the on-resistance and increasing the driving capability. Furthermore, it eliminates the need for an external capacitor Cb, reducing hardware overhead.

[0068] This invention can be driven by a current source control mode. Under changes in process, power supply voltage, and temperature, the current source fluctuates less than the inverter. Furthermore, by adjusting the current mirror current, the rise and fall time of Vout can be dynamically adjusted, reducing the possibility of Vout rising or falling too fast or too slow, thereby obtaining a stable response speed and avoiding problems such as electromagnetic interference.

[0069] It should be noted that this application can be implemented in software and / or a combination of software and hardware; for example, it can be implemented using an application-specific integrated circuit (ASIC), a general-purpose computer, or any other similar hardware device. In some embodiments, the software program of this application can be executed by a processor to implement the steps or functions described above. Similarly, the software program of this application (including related data structures) can be stored in a computer-readable recording medium; for example, RAM memory, magnetic or optical drives, floppy disks, and similar devices. In addition, some steps or functions of this application can be implemented in hardware; for example, as circuitry that cooperates with a processor to perform the various steps or functions.

[0070] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0071] The description and application of the present invention herein are illustrative and not intended to limit the scope of the invention to the embodiments described above. Effects or advantages involved in the embodiments may not be apparent due to various factors, and the description of effects or advantages is not intended to limit the embodiments. Variations and modifications of the embodiments disclosed herein are possible, and various substitutions and equivalents of the components in the embodiments are well known to those skilled in the art. It should be apparent to those skilled in the art that the invention can be implemented in other forms, structures, arrangements, proportions, and with other components, materials, and parts without departing from the spirit or essential characteristics of the invention. Other variations and modifications can be made to the embodiments disclosed herein without departing from the scope and spirit of the invention.

Claims

1. A driving circuit for a power circuit, characterized in that, The power circuit includes a first power transistor MHS and a second power transistor MLS; the first power transistor MHS is a high-side power drive transistor, and the second power transistor MLS is a low-side power drive transistor. The driving circuit includes: a high-side power transistor driving module and a low-side power transistor driving module; the high-side power transistor driving module is connected to a first power transistor MHS and is used to drive the first power transistor MHS; the low-side power transistor driving module is connected to a second power transistor MLS and is used to drive the second power transistor MLS. The high-side power transistor drive module includes a charge pump, a first current mirror encoder module, a first gate current pre-drive transistor, and a high-side drive protection circuit; the charge pump is connected to the high-side drive protection circuit, and the first gate current pre-drive transistor is connected to the first current mirror encoder module, the high-side drive protection circuit, and the first power transistor MHS. The charge pump provides the operating voltage for the high-side power transistor drive module; the first current mirror encoder module is used to adjust the current flowing through the first gate current pre-drive transistor; the first gate current pre-drive transistor is used to drive the high-side power transistor, and its current magnitude controls the turn-on and turn-off speed of the high-side power transistor, thereby affecting the rise and fall time of OUT; the high-side drive protection circuit ensures that the device operates in the safe area during normal or abnormal drive of the high-side power transistor pre-drive module. The low-end power transistor drive module includes a second current mirror encoder module and a second gate current pre-drive transistor; the second current mirror encoder module is connected to the second gate current pre-drive transistor, and the second gate current pre-drive transistor is connected to the second power transistor MLS. The second current mirror encoder module is used to adjust the magnitude of the current flowing through the second gate current pre-drive transistor; the second gate current pre-drive transistor is used to drive the low-side power transistor, and its current magnitude controls the turn-on and turn-off speed of the low-side power transistor, thereby affecting the rise and fall time of OUT. The second gate current pre-drive transistor includes a fifth MOSFET MLP0, a sixth MOSFET MLP1, a seventh MOSFET MLH0, and an eighth MOSFET MLH1; the low-side power transistor drive module further includes a third switch and a fourth switch; The second power supply voltage VDDL is connected to the source of the fifth MOSFET MLP0 and the source of the sixth MOSFET MLP1, respectively; the drain of the fifth MOSFET MLP0 is connected to the gate of the fifth MOSFET MLP0, the gate of the sixth MOSFET MLP1, and the first terminal of the third switch, respectively. The output terminal of the second current mirror encoder module is connected to the second terminal of the third switch and the first terminal of the fourth switch respectively; the second terminal of the fourth switch is connected to the drain of the seventh MOS transistor MLH0, the gate of the seventh MOS transistor MLH0, and the gate of the eighth MOS transistor MLH1 respectively. The drain of the sixth MOSFET MLP1 is connected to the drain of the second power transistor MLS and the drain of the eighth MOSFET MLH1, respectively, while the source of the seventh MOSFET MLH0 and the source of the eighth MOSFET MLH1 are grounded.

2. The driving circuit of the power circuit according to claim 1, characterized in that: The first gate current pre-drive transistor includes a first MOSFET MHP0, a second MOSFET MHP1, a third MOSFET MHN0, and a fourth MOSFET MHN1; The high-end drive protection circuit includes a first diode Z1, a second diode Z2, a third diode Z3, a first resistor R1, a second resistor R2, and a third resistor R3; The high-end power transistor drive module further includes: a first switch and a second switch; The output terminal of the charge pump outputs a first power supply voltage VBST, which is connected to the negative terminal of the third diode Z3, the source of the first MOSFET MHP0, the source of the second MOSFET MHP1, and the negative terminal of the second diode Z2. The gate of the first MOSFET MHP0 is connected to the drain of the first MOSFET MHP0, the gate of the second MOSFET MHP1, the anode of the third diode Z3, and the first terminal of the third resistor R3, respectively; the drain of the second MOSFET MHP1 is connected to the anode of the second diode Z2 and the first terminal of the second resistor R2, respectively. The second end of the third resistor R3 is connected to the first end of the first switch, and the output end of the first current mirror encoder module is connected to the second end of the first switch and the first end of the second switch, respectively. The second terminal of the second switch is connected to the drain of the third MOSFET MHN0, the gate of the third MOSFET MHN0, and the gate of the fourth MOSFET MHN1, respectively; the source of the third MOSFET MHN0 is grounded. The second end of the second resistor R2 is connected to the first power transistor MHS and the first end of the first resistor R1 respectively; the second end of the first resistor R1 is connected to the negative terminal of the first diode Z1 and the drain of the fourth MOSFET MHN1 respectively; the source of the fourth MOSFET MHN1 and the positive terminal of the first diode Z1 are grounded respectively.

3. The driving circuit of the power circuit according to claim 2, characterized in that: The voltage of the first power supply voltage VBST is higher than the voltage of the second power supply voltage VDDL.

4. A power circuit, characterized in that: The power circuit includes a first power transistor MHS, a second power transistor MLS, and a driving circuit for the power circuit according to any one of claims 1 to 3; the driving circuit is connected to the first power transistor MHS and the second power transistor MLS respectively.

5. A driving method for the driving circuit according to any one of claims 1 to 3, characterized in that, The driving method includes: The charge pump is used to generate a high voltage VBST, where VBST > VM + VDDL. VBST directly powers the high-side pre-drive transistor MHP1; where VM is the operating voltage of the drive circuit. To protect the device under high voltage, the MHP1 transistor is connected in parallel with the second Zener transistor Z2 and in series with the second resistor R2 to point VGH. When VGH is pulled to ground by MHN1, the voltage across MHP1 and R2 is the high voltage VBST. At this time, Z2 protects the MHP1 transistor, and R2 is used to withstand the high voltage VBST minus the breakdown voltage of the second Zener transistor Z2. The first Zener diode Z1 is connected in parallel with the MHN1 transistor and in series with the first resistor R1 to point VGH. When VGH is pulled to VBST by MHP1, the voltage across MHP1 and R1 is the high voltage VBST. At this time, Z1 protects the MHN1 transistor, and R1 is used to withstand the high voltage VBST minus the breakdown voltage of the Zener diode Z2.

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