Circuit board and method for manufacturing the same

Abstract

A circuit board includes a dielectric substrate, a signal line, and a ground line pair. The dielectric substrate has a base and a protruding platform, wherein the protruding platform protrudes from the upper surface of the base. The signal line is conformally arranged on the dielectric substrate and includes a first section, a second section, and a third section. The first section is arranged on the upper surface of the protruding platform. The second section extends on the upper surface of the base. The third section is arranged on the side wall of the protruding platform and connects the first section and the second section. The ground line pair is arranged on the dielectric substrate. The ground line pair is located on both sides of the first section and is spaced apart from the first section. The orthographic projection of the second section on the upper surface of the base partially overlaps the orthographic projection of the ground line pair on the upper surface of the base. This improves the signal transmission performance of the circuit board. The present application also provides a method for manufacturing a circuit board.

Description

Technical Field

[0001] The present application relates to a circuit board and a manufacturing method thereof, and in particular to a circuit board with a transmission line and a manufacturing method thereof. Background Art

[0002] With the rapid development of communication technology, frequencies are increasing. Transmission lines formed within circuit boards struggle to meet these high-frequency signal transmission requirements due to factors such as loss, radiation, and coupling. Consequently, various industry players are striving to optimize transmission line structures within circuit boards to provide superior signal transmission performance. Summary of the Invention

[0003] According to some embodiments of the present application, a circuit board includes a first dielectric substrate, a signal line, and a ground line pair. The first dielectric substrate has a base and a protruding platform, wherein the protruding platform protrudes from the upper surface of the base. The signal line is conformally configured on the first dielectric substrate and includes a first segment, a second segment, and a third segment. The first segment is configured on the upper surface of the protruding platform. The second segment extends on the upper surface of the base. The third segment is configured on the side wall of the protruding platform and connects the first segment and the second segment. The ground line pair is configured on the first dielectric substrate. The ground line pair is located on both sides of the first segment of the signal line and is spaced apart from the first segment of the signal line. The orthographic projection of the second segment of the signal line on the upper surface of the base partially overlaps the orthographic projection of the ground line pair on the upper surface of the base.

[0004] In some embodiments, the ratio of the total overlapping length of the orthographic projection of the second segment of the signal line and the ground line pair to the total length of the first segment, the second segment, and the third segment of the signal line is less than 30%.

[0005] In some embodiments, air exists between the signal line and the ground line pair.

[0006] In some embodiments, the circuit board further includes a second dielectric substrate disposed above the signal line and opposite to the first dielectric substrate, wherein the signal line is interposed between the first dielectric substrate and the second dielectric substrate.

[0007] In some embodiments, air exists between the signal line and the second dielectric substrate.

[0008] In some embodiments, the circuit board further includes a first ground plane and a second ground plane. The first ground plane is disposed below the first dielectric substrate. The second ground plane is disposed above the second dielectric substrate and opposite the first ground plane. The signal line and the ground line pair are interposed between the first and second ground planes, and the signal line is not electrically connected to the ground line pair, the first and second ground planes.

[0009] In some embodiments, the circuit board further includes a plurality of conductive vias connecting the ground line pair, the first ground plane, and the second ground plane.

[0010] In some embodiments, the conductive via, the first ground plane, and the second ground plane surround the signal line.

[0011] In some embodiments, the signal line directly contacts the first dielectric substrate.

[0012] According to some embodiments of the present application, a method for manufacturing a circuit board includes providing a first dielectric substrate and forming a plurality of first grooves on the first dielectric substrate so that the first dielectric substrate has a base, a first protruding platform, and a plurality of second protruding platforms. The first protruding platform and the second protruding platform protrude from the base, the first groove separates the first protruding platform and the second protruding platform, and the base is partially exposed within the first groove. The method for manufacturing a circuit board also includes forming a signal line on the base and the first protruding platform, providing a second dielectric substrate, forming a second groove on the second dielectric substrate, and pressing the first dielectric substrate and the second dielectric substrate together so that the first groove and the second groove form a space, wherein the signal line is located in the space. The method for manufacturing a circuit board also includes configuring a ground line pair between the first dielectric substrate and the second dielectric substrate so that the signal line located on the first protruding platform is coplanar with the ground line pair, and so that the orthographic projection of the signal line located at the base on the first dielectric substrate partially overlaps with the orthographic projection of the ground line pair on the first dielectric substrate.

[0013] In some embodiments, forming the signal line includes forming a photoresist on the first dielectric substrate, patterning the photoresist to expose a portion of the first protruding platform and the base, and depositing a material for the signal line.

[0014] In some embodiments, configuring the ground line pair includes forming the ground line pair on the second protruding platform of the first dielectric substrate before laminating the first dielectric substrate and the second dielectric substrate.

[0015] In some embodiments, configuring the ground line pair includes forming the ground line pair on the second dielectric substrate before laminating the first dielectric substrate and the second dielectric substrate.

[0016] In some embodiments, forming the ground trace pair on the second dielectric substrate includes filling the second recess with a first photoresist, wherein the upper surface of the first photoresist is flush with the upper surface of the second dielectric substrate. Forming the ground trace pair on the second dielectric substrate also includes forming a metal layer on the first photoresist and the second dielectric substrate, forming a second photoresist on the metal layer, and patterning the second photoresist to expose a portion of the metal layer, wherein the area of ​​the portion is smaller than the area of ​​the second recess. Forming the ground trace pair on the second dielectric substrate also includes removing the portion of the metal layer, and removing the first photoresist and the remaining second photoresist after removing the portion of the metal layer.

[0017] In some embodiments, the method for manufacturing a circuit board further includes forming a plurality of conductive vias on opposite sides of the ground line pair after laminating the first dielectric substrate and the second dielectric substrate.

[0018] Embodiments of the present application provide a circuit board and a method for manufacturing the same. By laminating substrates, a space containing an air medium is formed, allowing a signal line to extend within the space, with the orthographic projection of the signal line partially overlapping the orthographic projection of the ground line. This improves the signal transmission performance of the circuit board. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The following embodiments should be read in conjunction with the accompanying drawings to clearly understand the concepts of this application. It should be noted that, in accordance with standard industry practice, various features are not drawn to scale. In fact, the dimensions of various features may be arbitrarily enlarged or reduced for clarity of discussion. Furthermore, like reference numerals denote like elements.

[0020] Figure 1 The following are exemplary cross-sectional views of a circuit board according to some embodiments of the present application.

[0021] Figure 2 、 Figure 3 、 Figure 4 、 Figure 5 、 Figure 6A 、 Figure 6B 、 Figure 6C 、 Figure 7 、 Figure 8 and Figure 9 The following are cross-sectional views illustrating various manufacturing stages of a method for manufacturing a circuit board according to some embodiments of the present application.

[0022] Figure 10A 、 Figure 10B 、 Figure 10C 、 Figure 10D 、 Figure 10E and Figure 10F Cross-sectional views of various manufacturing stages of a method for manufacturing a circuit board are shown according to other embodiments of the present application. DETAILED DESCRIPTION

[0023] When an element, such as a layer, film, region, or substrate, is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element, or intervening elements can also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements. As used herein, "connected" can refer to being physically and / or electrically connected. Furthermore, "electrically connected" or "coupled" can refer to the presence of other elements between two elements.

[0024] In addition, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe the relationship of one element to another element, as shown in the figures. It should be understood that relative terms are intended to include different orientations of the device in addition to the orientation shown in the figures. For example, if the device in one figure is turned over, the element described as being on the "lower" side of the other elements will be oriented on the "upper" side of the other elements. Thus, the exemplary term "lower" can include both "lower" and "upper" orientations, depending on the particular orientation of the figure. Similarly, if the device in one figure is turned over, the element described as being "below" or "beneath" the other elements will be oriented as being "above" the other elements. Thus, the exemplary term "below" or "below" can include both "upper" and "lower" orientations.

[0025] As used herein, "about," "approximately," or "substantially" includes the stated value and the mean within an acceptable deviation range for the particular value as determined by one of ordinary skill in the art, taking into account the measurement in question and the particular amount of error associated with the measurement (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations of the stated value.

[0026] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this application, and will not be interpreted as idealized or overly formal unless explicitly defined as such herein.

[0027] Transmission line loss in a circuit board may be one of the important factors affecting efficiency and performance, and it is even more important for high-frequency signals to be transmitted from one component to another. It is understandable that even if the signal transmission distance is relatively short, the accumulated loss and attenuation may still cause serious problems. Coplanar waveguide (CPW) transmission lines have better transmission performance in the high-frequency field than microstrip lines or striplines. With the continuous development of technology, some improvements to coplanar waveguide structures have emerged, which optimize the signal transmission performance of coplanar waveguide transmission lines to a certain extent. The embodiments of the present application provide a circuit board with a transmission line having a coplanar waveguide structure and a method for manufacturing the same, which improves the performance of signal transmission by optimizing the coplanar waveguide structure.

[0028] Please refer to Figure 1 , Figure 1 FIG1 is an exemplary cross-sectional view of a circuit board 100 according to some embodiments of the present application. In detail, Figure 1The circuit board 100 shown is a circuit board 100 having a coplanar waveguide transmission line.

[0029] The circuit board 100 may include a first dielectric substrate 110 and a second dielectric substrate 120, wherein the second dielectric substrate 120 is disposed on the first dielectric substrate 110 and opposite to the first dielectric substrate 110. The first dielectric substrate 110 may have a base 112 and a protruding platform, such as Figure 1 The first protruding platform 114 is shown, wherein the first protruding platform 114 protrudes from the upper surface 112T of the base 112 and has an upper surface 114T and a sidewall 114W. In some embodiments, a space S exists between the first dielectric substrate 110 and the second dielectric substrate 120 .

[0030] The circuit board 100 may further include a signal line 130 disposed on the first dielectric substrate 110. In some embodiments, the signal line 130 is conformally disposed on the first dielectric substrate 110. Specifically, the signal line 130 may include a first segment 132, a second segment 134, and a third segment 136. The first segment 132 is disposed on the upper surface 114T of the first protruding platform 114. The second segment 134 is disposed on and extends from the upper surface 112T of the base 112. The third segment 136 is disposed on the sidewall 114W of the first protruding platform 114 and connects the first segment 132 and the second segment 134.

[0031] The thicknesses of the first segment 132, the second segment 134, and the third segment 136 are substantially equal, so the signal line 130 can have a substantially uniform thickness and cover the first dielectric substrate 110 along the undulating surfaces of the base 112 and the first protruding platform 114. In this manner, the signal line 130 can be conformally disposed on the first dielectric substrate 110. Furthermore, in some embodiments, the signal line 130 can directly contact the first dielectric substrate 110.

[0032] Generally speaking, increasing the width of the signal line 130 helps reduce the transmission impedance of the circuit board 100, but this increase in width may increase the size of the circuit board 100. Compared to a planar configuration, the signal line 130 provided in the embodiments of the present application is conformally configured on the first dielectric substrate 110 with uneven surfaces. This additional vertical configuration increases the overall width of the signal line 130, reducing conductor loss while avoiding concerns about oversizing. In some embodiments, the width of the first segment 132 of the signal line 130 is between approximately 0.05 millimeters (mm) and 0.1 mm, but the present invention is not limited to this.

[0033] To further describe, the signal line 130 of the circuit board 100 may be interposed between the first dielectric substrate 110 and the second dielectric substrate 120. In embodiments where a space S exists between the first dielectric substrate 110 and the second dielectric substrate 120, the signal line 130 may be disposed in the space S, with air within the space S surrounding a portion of the signal line 130. In other words, air exists between the signal line 130 and the second dielectric substrate 120, and thus the signal line 130 and the second dielectric substrate 120 are not in physical contact with each other. Because air has relatively low dielectric properties, such as a low dielectric constant and dissipation factor, the presence of air as a medium surrounding the signal line 130 can reduce dielectric loss in the signal line 130, thereby improving signal transmission performance.

[0034] The circuit board 100 may further include a ground line pair 140 disposed on the first dielectric substrate 110. In some embodiments, a portion of the ground line pair 140 is suspended above the base 112, for example Figure 1 The ground line pair 140 includes a suspended segment 142. The ground line pair 140 is located on both sides of the first segment 132 of the signal line 130 and is spaced apart from the first segment 132 of the signal line 130. In some embodiments, the ground line pair 140 is symmetrically arranged on both sides of the first segment 132 of the signal line 130. Specifically, as Figure 1 As shown, the ground line pair 140 may include two ground lines. The first ground line (not labeled) located on one side of the first segment 132 of the signal line 130 may be the first ground line of the ground line pair 140, and the second ground line (not labeled) located on the other side of the first segment 132 of the signal line 130 may be the second ground line of the ground line pair 140. In other words, the signal line 130 is disposed between the ground line pair 140. Furthermore, the signal line 130 is not electrically connected to the ground line pair 140.

[0035] When the first segment 132 of the signal line 130 is coplanar with the ground line pair 140 (e.g., the distance from the first segment 132 of the signal line 130 to the base 112 is substantially equal to the distance from the ground line pair 140 to the base 112), the signal line 130 and the ground line pair 140 may together form a coplanar waveguide (CPW) transmission line.

[0036] As previously described, the second segment 134 of the signal line 130 extends above the upper surface 112T of the base 112, while a portion of the ground line pair 140 (e.g., the suspended segment 142) is suspended above the upper surface 112T of the base 112. In some embodiments, the orthographic projection of the second segment 134 on the upper surface 112T of the base 112 partially overlaps the orthographic projection of the ground line pair 140 on the upper surface 112T. In other words, the orthographic projection of the second segment 134 of the signal line 130 on the upper surface 112T is not completely separated from the orthographic projection of the ground line pair 140 on the upper surface 112T. Figure 1As shown, there is an orthographic overlap length L between the second segment 134 of the signal line 130 and one of the ground line pair 140 on the upper surface 112T of the base 112 .

[0037] When the signal line 130 overlaps with the ground line pair 140, during the process of using the circuit board 100 to transmit signals, especially when transmitting high-frequency signals, the magnetic field can be distributed between the signal line 130 and the ground line pair 140, which can avoid the formation of high-density current at the edge of the signal line 130, thereby reducing the conductor loss of the signal line 130 and improving the signal transmission performance. In addition, the impedance can be adjusted by adjusting the overlapping length L between the signal line 130 and the ground line pair 140, thereby obtaining a wider impedance range. In some embodiments, the total overlapping length of the second section 134 of the signal line 130 and the positive projection of the ground line pair 140 may account for less than about 30% of the total length of the signal line 130, wherein the total length of the signal line 130 is the sum of the lengths of the first section 132, the second section 134 and the third section 136. Figure 1 For example, when the signal line 130 and the ground line pair 140 are symmetrically arranged, the total length of the orthographic overlap of the second section 134 of the signal line 130 and the ground line pair 140 can be twice the overlap length L. In the aforementioned embodiment, the impedance (e.g., characteristic impedance) can be between about 45 ohms (Ω) and about 55 Ω, thereby optimizing the signal transmission performance of the circuit board 100. It should be noted that the term "length" mentioned above, such as the total length of the orthographic overlap, the total length of the signal line 130, etc., refers to the length of the circuit board 100. Figure 1 Dimensions in the exemplary illustrative cross-sectional views are depicted.

[0038] Similarly, in embodiments where a space S exists between the first dielectric substrate 110 and the second dielectric substrate 120, the suspended segments 142 of the ground line pair 140 can be disposed within the space S, with the air within the space S surrounding the suspended segments 142 of the ground line pair 140. Therefore, air exists between the signal lines 130 and the ground line pair 140, and the signal lines 130 and the ground line pair 140 are not in physical contact with each other. During signal transmission using the circuit board 100, an electric field is distributed in the air region between the signal lines 130 and the ground line pair 140. Because air has relatively low dielectric properties, such as a relatively low dielectric constant and dissipation factor, the air between the signal lines 130 and the ground line pair 140 can reduce dielectric loss in the signal lines 130, thereby improving signal transmission performance.

[0039] As previously mentioned, increasing the width of the signal line 130 can help reduce impedance, but this may increase the size of the circuit board 100. In addition to the aforementioned additional vertical configuration, the signal line 130 provided in the embodiment of the present application also increases the overall width of the signal line 130 by arranging the signal line 130 and the ground line pair 140 in an overlapping manner. This reduces conductor loss while avoiding concerns about increased size, allowing the embodiment of the present application to help maintain or reduce the size of the circuit board 100.

[0040] The circuit board 100 may further include a first ground plane 150 and a second ground plane 160, wherein the first ground plane 150 and the second ground plane 160 are opposite to each other, and the signal line 130 and the ground line pair 140 are interposed between the first ground plane 150 and the second ground plane 160. In some embodiments, the first ground plane 150 may be disposed below the first dielectric substrate 110 and cover the lower surface of the first dielectric substrate 110. In some embodiments, the second ground plane 160 may be disposed above the second dielectric substrate 120 and cover the upper surface of the second dielectric substrate 120.

[0041] The first and second ground planes 150, 160 can be metal foil layers. When using circuit board 100 to transmit signals, the first and second ground planes 150, 160 can serve as shielding structures to prevent electromagnetic waves generated by signal transmission from radiating outward and leaking, thereby improving signal transmission performance. Because the first and second ground planes 150, 160 are configured to provide shielding, the signal line 130 is not electrically connected to the first and second ground planes 150, 160.

[0042] The circuit board 100 may further include a plurality of conductive vias 170 located on both sides of the signal line 130. In some embodiments, the conductive vias 170 connect the ground line pair 140, the first ground plane 150, and the second ground plane 160. When the circuit board 100 is used to transmit signals, the first ground plane 150, the second ground plane 160, and the conductive vias 170 can collectively form a shielding structure around the signal line 130 to prevent electromagnetic waves generated by signal transmission from radiating outward and leaking, thereby improving signal transmission performance. Because the first ground plane 150, the second ground plane 160, and the conductive vias 170 are configured to provide shielding, the signal line 130 is not electrically connected to the first ground plane 150, the second ground plane 160, and the conductive vias 170.

[0043] Figure 2 、 Figure 3 、 Figure 4 、 Figure 5 、 Figure 6A 、 Figure 6B 、 Figure 6C 、 Figure 7 、 Figure 8 and Figure 9 The following are cross-sectional views of various manufacturing stages of a method for manufacturing a circuit board according to some embodiments of the present application. It should be noted that, unless otherwise specified, when the following embodiments are illustrated or described as a series of operations or events, the order in which these operations or events are described should not be limited. For example, some operations or events may be performed in a different order than in the present application, some operations or events may occur simultaneously, some operations or events may not need to be performed, and / or some operations or events may be repeated. Furthermore, the actual process may require additional operations before, during, or after each step to fully manufacture the circuit board. Therefore, the present application may briefly describe some of these additional operations.

[0044] Please refer to Figure 2 , Figure 2 A cross-sectional view of a circuit board at one of the manufacturing stages is shown in accordance with some embodiments of the present application. First, a first dielectric substrate 110 is provided. A first metal foil layer 150 may be pre-disposed on the first dielectric substrate 110. Next, a plurality of first grooves 200 are formed on the first dielectric substrate 110. Specifically, the first grooves 200 are formed on the side of the first dielectric substrate 110 where the first metal foil layer 150 is not disposed, so that the first dielectric substrate 110 has a base 112 and a protruding platform, wherein the protruding platform may include a first protruding platform 114 and a plurality of second protruding platforms 116, and Figure 2 In the embodiment, the first protruding platform 114 is located between the two second protruding platforms 116. The protruding platforms (eg, the first protruding platform 114 and the second protruding platform 116) may protrude from the upper surface 112T of the base 112.

[0045] The first groove 200 can separate the first protruding platform 114 and the second protruding platform 116, and a portion (eg, exposed area A1) of the upper surface 112T of the base 112 is exposed in the first groove 200. In other words, the first groove 200 can determine the configuration positions of the first protruding platform 114 and the second protruding platform 116.

[0046] The material of the first dielectric substrate 110 may include polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyurethane (PU), polyethylene (PE), polytetrafluoroethylene (PTFE), liquid crystal polymer (LCP), polyvinyl chloride polymer (PVC), other suitable materials, or any combination thereof. For example, the material of the first dielectric substrate 110 may include liquid crystal polymer (LCP). In some embodiments, the first dielectric substrate 110 may include a material having a dielectric constant lower than 3.9 to reduce dielectric loss.

[0047] The first metal foil layer 150 may be made of gold, silver, copper, other suitable metals, or combinations thereof. In some embodiments, the first metal foil layer 150 may be a copper foil layer. In some embodiments, the first dielectric substrate 110 may be formed of a flexible copper clad laminate (FCCL). In some embodiments, the thickness of the first metal foil layer 150 may be between approximately 25 microns and approximately 30 microns. The first groove 200 may be formed by laser cutting, mechanical drilling, chemical etching, laser ablation, or other suitable methods, or combinations thereof.

[0048] Please refer to Figure 3 、 Figure 4 and Figure 5 , Figure 3 、 Figure 4 and Figure 5 A cross-sectional view of a circuit board at one of the manufacturing stages is shown according to some embodiments of the present application, particularly with respect to a method for forming a signal line 130 in the circuit board.

[0049] First, in Figure 3 In the embodiment, a first photoresist 300 is formed on the first dielectric substrate 110. The first photoresist 300 covers the base 112, the first protruding platform 114 and the second protruding platform 116. In some embodiments, the first photoresist 300 fills the first groove 200 (see FIG. Figure 2 ).

[0050] Later, in Figure 4In the embodiment, the first photoresist 300 is subjected to a patterning process to form a patterned first photoresist 300A. The patterned first photoresist 300A remains to cover the second protruding platform 116. On the other hand, the patterned first photoresist 300A does not cover a portion of the first protruding platform 114 and the upper surface 112T of the base 112. In other words, after the patterning process, a portion of the first protruding platform 114 and the upper surface 112T of the base 112 are exposed. It should be noted that Figure 4 The exposed area A2 of the middle base portion 112 is smaller than Figure 2 The exposed area A1 of the middle base 112 (see Figure 2 ).

[0051] Next, in Figure 5 In the process, the material of the signal line 130 is deposited on the patterned first photoresist 300A (see Figure 4 ) on the exposed surface to form the signal line 130 on the first dielectric substrate 110. Specifically, the conductive material is deposited on the upper surface 112T of the base 112, the sidewall 114W of the first protruding platform 114 and the upper surface 114T of the first protruding platform 114. Figure 4 ) covers the second protruding platform 116, so that the formed signal line 130 does not contact the second protruding platform 116, reducing the contact between the signal line 130 and the first dielectric substrate 110, thereby reducing dielectric loss.

[0052] The grooves (such as Figure 2 The first groove 200 shown in FIG. 2 can be used to form a space with air medium (eg Figure 1 The space S shown in FIG2 can also define the shape of the signal line 130 , so no additional operation is required to design the shape of the signal line 130 , thereby simplifying the process operation and cost. In addition, the first dielectric substrate 110 also provides support for the signal line 130 .

[0053] The deposition method may include evaporation, sputtering, electroplating, other suitable deposition techniques, or a combination thereof. For example, an electroplating process is used. In some embodiments, the signal line 130 can be conformally deposited on the first dielectric substrate 110 by adjusting the electroplating parameters (such as current density). In some embodiments, the thickness T of the signal line 130 is between about 10 microns and 20 microns. For example, the thickness T of the signal line 130 is about 15 microns. The material of the signal line 130 may include any conductive material. In some embodiments, the material of the signal line 130 may be a metal material, including gold, silver, copper, aluminum, etc. For example, the material of the signal line 130 is copper.

[0054] In some embodiments, Figure 2 and Figure 3Between the operations, a seed layer (not shown) is formed. Figure 2 In terms of structure. Figure 5 When the deposition method is electroplating, the seed layer can help the plated film growth of the electroplating process (for example, the formation quality of the signal line 130). The seed layer material may include a conductive material such as carbon, gold, copper, nickel, silver, aluminum, etc.

[0055] Please refer to Figure 6A 、 Figure 6B and Figure 6C , Figure 6A 、 Figure 6B and Figure 6C A cross-sectional view of a circuit board at one of the manufacturing stages is shown according to some embodiments of the present application, particularly with respect to a method of configuring a ground line pair 140 between a first dielectric substrate 110 and a second dielectric substrate 120 in the circuit board.

[0056] First, in Figure 6A In the embodiment, a third dielectric substrate 600 is provided, wherein the third dielectric substrate 600 has a structure (eg, uniform width) corresponding to the second protruding platform 116 of the first dielectric substrate 110, so that the third dielectric substrate 600 is subsequently Figure 6B It can be pressed onto the second protruding platform 116 of the first dielectric substrate 110. The ground line pair 140 is disposed on the third dielectric substrate 600. It should be noted that the suspended section 142 of the ground line pair 140 extends beyond the edge of the third dielectric substrate 600. Figure 6A shown.

[0057] Later, in Figure 6B In the embodiment, the third dielectric substrate 600 and the first dielectric substrate 110 are laminated together to form the ground line pairs 140 on the respective second protruding platforms 116 of the first dielectric substrate 110. In other words, the third dielectric substrate 600 is integrated into the first dielectric substrate 110. In some embodiments, the material of the third dielectric substrate 600 is the same as that of the first dielectric substrate 110. Therefore, after laminating the third dielectric substrate 600 and the first dielectric substrate 110, the third dielectric substrate 600 and the first dielectric substrate 110 can be integrally formed. To simplify the illustration, the first dielectric substrate 110 is still shown after lamination.

[0058] In some embodiments, before laminating the third dielectric substrate 600 and the first dielectric substrate 110, the height of the second protruding platform 116 of the first dielectric substrate 110 can be adjusted accordingly so that after lamination, the signal line 130 and the ground line pair 140 located on the first protruding platform 114 are coplanar (for example, the distance between the signal line 130 located on the first protruding platform 114 and the base 112 is substantially equal to the distance between the ground line pair 140 and the base 112). In this way, the signal line 130 and the ground line pair 140 can jointly form a coplanar waveguide transmission line.

[0059] After laminating the third dielectric substrate 600 and the first dielectric substrate 110, the signal line 130 and the ground line pair 140 located on the first protruding platform 114 are coplanar. Furthermore, the orthographic projection of the signal line 130 located on the base 112 on the first dielectric substrate 110 partially overlaps (e.g., by an overlap length L) with the orthographic projection of the ground line pair 140 on the first dielectric substrate 110. When the signal line 130 and the ground line pair 140 partially overlap, during signal transmission on the signal line 130, the magnetic field is distributed between the signal line 130 and the ground line pair 140, preventing the formation of high-density currents at the edges of the signal line 130. This reduces conductor loss in the signal line 130 and improves signal transmission performance.

[0060] In some embodiments, the material of the third dielectric substrate 600 and the material of the first dielectric substrate 110 can be selected from thermoplastic dielectric materials. By controlling the temperature of the lamination process, the material of the third dielectric substrate 600 and the material of the first dielectric substrate 110 are bonded together. Therefore, in this embodiment, no adhesive is required for adhesion. For example, the material of the third dielectric substrate 600 and the material of the first dielectric substrate 110 can include liquid crystal polymer (LCP). In addition, in some other embodiments, an adhesive (not shown) can be provided between the first dielectric substrate 110 and the third dielectric substrate 600 to adhere the first dielectric substrate 110 and the third dielectric substrate 600. Therefore, the third dielectric substrate 600 and the first dielectric substrate 110 may not be integrally formed.

[0061] Next, in Figure 6C In the embodiment, a second dielectric substrate 120 is provided and a second groove 610 is formed on the second dielectric substrate 120. A second metal foil layer 160 may be pre-disposed on the second dielectric substrate 120. Next, the second groove 610 is formed on the second dielectric substrate 120. Specifically, the second groove 610 is formed on the side of the second dielectric substrate 120 where the second metal foil layer 160 is not disposed.

[0062] The material of the second dielectric substrate 120 may include polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyurethane (PU), polyethylene (PE), polytetrafluoroethylene (PTFE), liquid crystal polymer (LCP), polyvinyl chloride (PVC), other suitable materials, or any combination thereof. For example, the material of the second dielectric substrate 120 may include liquid crystal polymer (LCP). In some embodiments, the second dielectric substrate 120 may include a material having a dielectric constant lower than 3.9 to reduce dielectric loss.

[0063] The second metal foil layer 160 may be made of gold, silver, copper, other suitable metals, or combinations thereof. In some embodiments, the second metal foil layer 160 may be a copper foil layer. In some embodiments, the second dielectric substrate 120 may be formed of a flexible copper foil substrate (FCCL). In some embodiments, the thickness of the second metal foil layer 160 may be between approximately 25 microns and approximately 30 microns. The second groove 610 may be formed by laser cutting, mechanical drilling, chemical etching, laser ablation, or other suitable methods, or combinations thereof.

[0064] Please refer to Figure 7 , Figure 7 The cross-sectional view of a circuit board at one of the manufacturing stages is shown in accordance with some embodiments of the present application. Figure 7 In the embodiment, the first dielectric substrate 110 and the second dielectric substrate 120 are pressed together, and the first groove 200 (see Figure 2 ) and the second groove 610 (see Figure 6C ) are interconnected, forming a space (or cavity) S. The signal line 130 is located in space S and is surrounded by the air in space S. This is equivalent to placing the signal line 130 in air. Because air has relatively low dielectric properties, such as a low dielectric constant and dissipation factor, the presence of air surrounding the signal line 130 reduces dielectric loss in the signal line 130, thereby improving signal transmission performance.

[0065] After laminating the first dielectric substrate 110 and the second dielectric substrate 120, the signal line 130 is interposed between the first metal foil layer 150 and the second metal foil layer 160, but the signal line 130 is not electrically connected to the first metal foil layer 150 and the second metal foil layer 160. In some embodiments, the first metal foil layer 150 and the second metal foil layer 160 can serve as the first ground plane 150 and the second ground plane 160, respectively, to provide shielding, thereby reducing the amount of electromagnetic waves generated by the signal line 130 during signal transmission and radiating outward, thereby improving signal transmission performance.

[0066] Please refer to Figure 8 , Figure 8The cross-sectional view of a circuit board at one of the manufacturing stages is shown in accordance with some embodiments of the present application. Figure 8 In the embodiment, after laminating the first dielectric substrate 110 and the second dielectric substrate 120, a plurality of through-holes 800 are formed above and below the ground line pair 140. Specifically, the through-holes 800 are located on opposite sides of the ground line pair 140 and penetrate the first dielectric substrate 110, the second dielectric substrate 120, the first metal foil layer 150, and the second metal foil layer 160. The through-holes 800 may be formed by laser drilling, mechanical drilling, chemical etching, or other suitable methods, or a combination thereof.

[0067] Please refer to Figure 9 , Figure 9 The cross-sectional view of a circuit board at one of the manufacturing stages is shown in accordance with some embodiments of the present application. Figure 9 , depositing conductive material into the through hole 800 (see Figure 8 ) to form a plurality of conductive vias 170 above and below the ground line pair 140. Specifically, the conductive vias 170 are formed on opposite sides of the ground line pair 140. The conductive vias 170 extend from the ground line pair 140 through the first dielectric substrate 110 and the second dielectric substrate 120 and reach the first metal foil layer 150 and the second metal foil layer 160. Therefore, the conductive vias 170 can electrically connect the ground line pair 140, the first metal foil layer 150, and the second metal foil layer 160. The method of depositing the conductive material to form the conductive vias 170 may include evaporation, sputtering, electroplating, other suitable deposition techniques, or a combination thereof. For example, an electroplating process is used.

[0068] In some embodiments, the first metal foil layer 150, the second metal foil layer 160, and the conductive vias 170 surround the signal line 130 to provide shielding, thereby reducing the amount of electromagnetic waves generated by the signal line 130 during signal transmission and radiating outward, thereby improving signal transmission performance. In this embodiment, the signal line 130 is not electrically connected to the first metal foil layer 150, the second metal foil layer 160, and the conductive vias 170.

[0069] Please refer to 10A to 10F , 10A to 10F The cross-sectional view of a method for manufacturing a circuit board at one of the manufacturing stages is shown according to other embodiments of the present application, particularly a method for configuring a ground line pair 140 between a first dielectric substrate 110 and a second dielectric substrate 120 in the circuit board. In other words, 10A to 10F To correspond to Figures 6A to 6C For example, in Figure 5 After the operation, you can Figure 10A Operation, in Figure 10F After the operation, you can Figure 7 operation.

[0070] First, in Figure 10A In the embodiment, a second dielectric substrate 120 is provided and a second groove 610 is formed on the second dielectric substrate 120 , wherein the second groove 610 has an opening area A3 . A second metal foil layer 160 may be pre-disposed on the second dielectric substrate 120 .

[0071] Next, in Figure 10B In the process, the second photoresist 1000 is filled with the second groove 610 (see Figure 10A ), wherein the upper surface 1000T of the second photoresist 1000 is flush with the upper surface 120T of the second dielectric substrate 120.

[0072] Next, in Figure 10C In the present invention, a metal layer 140A and a third photoresist 1010 are sequentially formed on the second photoresist 1000 and the second dielectric substrate 120. For example, the metal layer 140A is first formed on the second photoresist 1000 and the second dielectric substrate 120, and then the third photoresist 1010 is formed on the metal layer 140A. In some embodiments, the third photoresist 1010 layer covers the metal layer 140A. The metal layer 140A is substantially the previous stage of the ground line pair 140, and therefore the material of the metal layer 140A is the same as that of the ground line pair 140.

[0073] Next, in Figure 10D In the embodiment, the third photoresist 1010 is patterned to form a patterned third photoresist 1010A. The patterned third photoresist 1010A exposes a portion of the metal layer 140A, such as an exposed area A4, wherein the exposed area A4 is smaller than the opening area A3 of the second groove 610 (see FIG. Figure 10A ).

[0074] Next, in Figure 10E Remove the exposed area A4 (see Figure 10D ) range of the metal layer 140A. The metal layer 140A (see Figure 10D ) is etched to form a ground line pair 140 on the second dielectric substrate 120.

[0075] After removing the metal layer 140A (see Figure 10D ) and forming the ground line pair 140, remove Figure 10D The second photoresist 1000 and the remaining third photoresist (ie, patterned third photoresist 1010A) are shown. After removing the second photoresist 1000, the second groove 610 appears on the second dielectric substrate 120. Figure 10D The exposed area A4 of the middle metal layer 140A is designed to be smaller than the opening area A3 of the second groove 610 (see FIG. Figure 10A), so the subsequently formed ground line pair 140 may have a portion (eg, the suspended section 142) suspended above the second groove 610. In other words, the suspended section 142 of the ground line pair 140 is not supported by the second dielectric substrate 120.

[0076] Next, in Figure 10F Middle, flip up and down Figure 10E The structure is such that the second groove 610 faces the signal line 130. In this way, in the subsequent Figure 7 During the operation, the signal line 130 and the ground line pair 140 may be disposed between the first dielectric substrate 110 and the second dielectric substrate 120 . Figure 10F The structure is similar to Figure 6C The difference is that before the first dielectric substrate 110 and the second dielectric substrate 120 are pressed together (for example, Figure 7 Operation), the formation position of the ground line pair 140. Next, you can continue Figure 7 operation.

[0077] It should be noted that when using 10A to 10F In an embodiment of fabricating the ground line pair 140 on the second dielectric substrate 120 , before laminating the first dielectric substrate 110 and the second dielectric substrate 120 , the first protruding platform 114 and the second protruding platform 116 of the first dielectric substrate 110 are coplanar.

[0078] In summary, the embodiments of the present application provide a circuit board and a method for manufacturing the same. A space with an air medium is formed by laminating the substrate, so that the signal line extends in the space, and the orthographic projection of the signal line partially overlaps with the orthographic projection of the ground line. Therefore, the presence of air medium around the signal line can reduce dielectric loss, the overlap of the projections of the signal line and the ground line can reduce conductor loss, and the length of the overlapped projection can be adjusted to obtain a wider impedance range. Furthermore, the ground plane and the conductive holes arranged around the signal line can jointly form a shielding structure to prevent the electromagnetic waves generated by the signal transmission from radiating outward and leaking. This helps to improve the signal transmission performance of the circuit board.

[0079] The above briefly describes the features of several embodiments of the present application, so that those skilled in the art can more easily understand the present application. Those skilled in the art should understand that this description can easily serve as a basis for changing or designing other structures or processes to achieve the same purpose and / or obtain the same advantages as the embodiments of the present application. Those skilled in the art will also understand that structures equivalent to the above do not depart from the spirit and scope of protection of the present application, and can be changed, replaced, and modified without departing from the spirit and scope of the present application.

[0080]

Explanation of symbols

[0081] 100: Circuit board

[0082] 110: first dielectric substrate

[0083] 112: base

[0084] 112T: Upper surface

[0085] 114: First protruding platform

[0086] 114T: Upper surface

[0087] 114W: Sidewall

[0088] 116: Second protruding platform

[0089] 120: Second dielectric substrate

[0090] 120T: Upper surface

[0091] 130:Signal line

[0092] 132: First paragraph

[0093] 134: Second paragraph

[0094] 136: The third paragraph

[0095] 140: Ground line pair

[0096] 140A: Metal layer

[0097] 142: Suspended segment

[0098] 150: first ground plane / first metal foil layer

[0099] 160: Second ground plane / second metal foil layer

[0100] 170: conductive hole

[0101] 200: First groove

[0102] 300: First photoresist

[0103] 300A: Patterned first photoresist

[0104] 600: Third dielectric substrate

[0105] 610: Second groove

[0106] 800:Through hole

[0107] 1000: Second photoresist

[0108] 1000T: Upper surface

[0109] 1010: third photoresist

[0110] 1010A: Patterning the third photoresist

[0111] A1: Area

[0112] A2: Area

[0113] A3: Area

[0114] A4: Area

[0115] L: Overlap length

[0116] S: Space

[0117] T: thickness.

Claims

1. A circuit board, characterized in that: include: A first dielectric substrate having a base and a protruding platform, wherein the protruding platform protrudes from the upper surface of the base; A signal line is conformally disposed on the first dielectric substrate and comprises: The first section is arranged on the upper surface of the protruding platform; a second section extending on an upper surface of the base; and a third section, disposed on a side wall of the protruding platform, connecting the first section and the second section; and A ground line pair is disposed on the first dielectric substrate, wherein the ground line pair is located on both sides of the first segment of the signal line and is spaced apart from the first segment of the signal line, and an orthographic projection of the second segment of the signal line on the upper surface of the base partially overlaps an orthographic projection of the ground line pair on the upper surface of the base.

2. The circuit board according to claim 1, wherein the total overlapping length of the orthographic projection of the second segment of the signal line and the ground line pair accounts for less than 30% of the total length of the first segment, the second segment and the third segment of the signal line. The circuit board according to claim 1 , wherein air exists between the signal line and the pair of ground lines.

4. The circuit board according to claim 1, further comprising: a second dielectric substrate disposed above the signal line and opposite to the first dielectric substrate, wherein the signal line is interposed between the first dielectric substrate and the second dielectric substrate, and air is present between the signal line and the second dielectric substrate; a first ground plane disposed below the first dielectric substrate; as well as A second ground plane is disposed above the second dielectric substrate and opposite to the first ground plane, wherein the signal line and the ground line pair are located between the first ground plane and the second ground plane, and the signal line is not electrically connected to the ground line pair, the first ground plane, and the second ground plane.

5. The circuit board according to claim 4, further comprising: A plurality of conductive vias connect the ground line pair, the first ground plane, and the second ground plane, wherein the conductive vias, the first ground plane, and the second ground plane surround the signal line. The circuit board according to claim 1 , wherein the signal line directly contacts the first dielectric substrate.

7. A method for manufacturing a circuit board, characterized in that: include: providing a first dielectric substrate; forming a plurality of first grooves on the first dielectric substrate so that the first dielectric substrate has a base, a first protruding platform, and a plurality of second protruding platforms, wherein the first protruding platforms and the second protruding platforms protrude from the base, the first groove separates the first protruding platforms and the second protruding platforms, and the base is partially exposed in the first groove; forming a signal line on the base and the first protruding platform; providing a second dielectric substrate; forming a second groove on the second dielectric substrate; Pressing the first dielectric substrate and the second dielectric substrate together so that the first groove and the second groove form a space, wherein the signal line is located in the space; and A ground line pair is arranged between the first dielectric substrate and the second dielectric substrate such that the signal line on the first protruding platform is coplanar with the ground line pair, and an orthographic projection of the signal line on the base on the first dielectric substrate partially overlaps with an orthographic projection of the ground line pair on the first dielectric substrate.

8. The method for manufacturing a circuit board according to claim 7, wherein forming the signal line comprises: forming a photoresist on the first dielectric substrate; patterning the photoresist to expose the first protruding platform and a portion of the base; as well as The material of the signal line is deposited.

9. The method for manufacturing a circuit board according to claim 7, wherein configuring the ground line pair comprises forming the ground line pair on the second protruding platform of the first dielectric substrate before laminating the first dielectric substrate and the second dielectric substrate.

10. The method of manufacturing a circuit board according to claim 7, wherein configuring the ground line pair comprises forming the ground line pair on the second dielectric substrate before laminating the first dielectric substrate and the second dielectric substrate.

11. The method for manufacturing a circuit board according to claim 10, wherein forming the ground line pair on the second dielectric substrate comprises: Filling the second groove with a first photoresist, wherein the upper surface of the first photoresist is flush with the upper surface of the second dielectric substrate; forming a metal layer on the first photoresist and the second dielectric substrate; forming a second photoresist on the metal layer; patterning the second photoresist to expose a portion of the metal layer, wherein an area of ​​the portion is smaller than an area of ​​the second groove; removing the portion of the metal layer; as well as After removing the portion of the metal layer, the first photoresist and remaining second photoresist are removed.

12. The method for manufacturing a circuit board according to claim 7, further comprising: After laminating the first dielectric substrate and the second dielectric substrate, a plurality of conductive holes are formed on opposite sides of the ground line pair.

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