A high-density integrated chip modularized PCB board

By designing the PCB board as a sub-board and motherboard structure, integrating high-density chips and their circuits on the sub-board, and concentrating blind vias on the sub-board, the problem of increased manufacturing difficulty and cost caused by blind vias in existing technologies is solved, achieving efficient and low-cost PCB board manufacturing.

CN116209145BActive Publication Date: 2026-07-10WUHAN JINGLI ELECTRONICS TECH +2

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
WUHAN JINGLI ELECTRONICS TECH
Filing Date
2023-03-17
Publication Date
2026-07-10

AI Technical Summary

Technical Problem

When using blind via technology, the manufacturing difficulty, cost, and cycle time of existing high-density integrated chip PCBs increase, and the manufacturing cost and processing risk increase due to the dispersion of blind vias.

Method used

The PCB is designed as a daughter board and a mother board structure. The daughter board integrates high-density chips and their circuits, and blind vias are concentrated on the daughter board. The mother board only has pads corresponding to the daughter board. Signal transmission is achieved through modular soldering, avoiding the complex blind via fabrication of the mother board.

Benefits of technology

It reduces the processing risks, manufacturing difficulty, cost and cycle of PCB boards, improves manufacturing efficiency, simplifies the soldering process, reduces soldering costs, and saves on PCB board size.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a high-density integrated chip modularized PCB (Printed Circuit Board), which comprises a daughter board and a mother board. The daughter board is used for arranging high-density integrated chips containing blind holes and comprises a functional module area, a blind hole concentrated area and a daughter board pad area. The functional module area is arranged with a plurality of chips and supporting lines. The blind hole concentrated area is arranged with most or all blind holes corresponding to the plurality of chips at a set interval according to a machining parameter reference. The daughter board pad area comprises a plurality of daughter board pads arranged at intervals on the edges of multiple layers of the daughter board, and is used for connecting with part of the supporting lines and the mother board to transmit chip signals to the mother board. The mother board is connected with at least one daughter board and comprises a mother board pad area corresponding to the position of the daughter board pad area, and is used for welding the daughter board to the corresponding position of the mother board to realize input, output and control of the chip signals of at least one daughter board corresponding to the mother board, and solves the problems of manufacturing difficulty, cost and cycle of the PCB of the high-density integrated chip with blind buried holes.
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Description

Technical Field

[0001] This invention belongs to the field of electronic device technology, and more specifically, relates to a modular PCB board for high-density integrated chips. Background Technology

[0002] Printed circuit boards (PCBs) are crucial electronic components. They serve as the support structure for electronic components and provide the connections between them. Almost all electronic devices require PCBs, which are widely used in smartphones, touch panels, computers, digital cameras, and LCD TVs. Therefore, PCBs hold the largest market share among electronic components globally.

[0003] With the continuous development of PCB boards, their circuitry is gradually moving towards higher integration and higher density. For chips in highly integrated, high-density circuits, the spacing between soldered pins is small, and the PCB board size is limited, leaving insufficient space for through-hole designs. Therefore, blind and buried vias are typically used to save space, reduce PCB size and weight, decrease the number of PCB layers, and improve electromagnetic compatibility. However, the manufacturing process of blind and buried vias is complex, difficult, and costly; buried vias, in particular, are more labor-intensive and expensive than blind vias. Therefore, regardless of the size of the PCB board, if even one high-density chip requires a blind or buried via design, the manufacturing difficulty, cost, and timeline of the entire PCB board will increase significantly due to the blind and buried via process. Furthermore, during PCB fabrication, blind and buried vias are distributed throughout the PCB board according to the chip's location. If even one blind or buried via fails, the entire PCB board must be remade, resulting in waste and increasing manufacturing costs and processing risks. Summary of the Invention

[0004] In view of at least one of the defects or improvement needs of the prior art, the present invention provides a modular PCB board with high-density integrated chips, which not only solves the problem of increased manufacturing difficulty, cost and cycle caused by high-density integrated chips with blind vias, but also solves the problem of increased manufacturing cost and processing risk of PCB board due to the dispersion of blind vias.

[0005] To achieve the above objectives, the present invention provides a high-density integrated chip modular PCB board, the PCB board comprising:

[0006] A sub-board is used to set up high-density integrated chips including blind vias. The sub-board is multi-layered and includes a functional module area, a blind via concentration area, and a sub-board pad area.

[0007] The functional module area is provided with multiple chips and supporting circuits for processing the signals of the chips.

[0008] The blind via concentration area is provided with most or all of the blind vias corresponding to the chips arranged at a set spacing as reference to the processing parameters, in order to realize the connection between the layers of the sub-board;

[0009] The subboard pad area includes multiple spaced subboard pads arranged along the edges of multiple layers of the subboard; these pads are used to connect with some of the associated circuitry and the motherboard, transmitting the chip signals to the motherboard.

[0010] A motherboard is connected to at least one daughterboard. The motherboard includes a motherboard pad area, and the positions of the motherboard pad area and the daughterboard pad area are arranged in a one-to-one correspondence. The daughterboard is used to solder the daughterboard to the corresponding position on the motherboard, so as to realize the input, output and control of the chip signals of the at least one daughterboard corresponding to the motherboard.

[0011] Furthermore, each of the motherboard pad areas includes a plurality of spaced-apart motherboard pads, which correspond one-to-one with the number and relative position of the daughterboard pads in the corresponding daughterboard pad area.

[0012] Furthermore, at least 20% of the area of ​​the subboard pads overlaps with the edge of the subboard.

[0013] Furthermore, the soldering method between the daughterboard pads and the motherboard pads is either reflow soldering or manual soldering.

[0014] Furthermore, the packaging standard of the motherboard pads is either the 1206 packaging standard or the 0805 packaging standard.

[0015] Furthermore, the shapes of the motherboard pads and the daughterboard pads may be the same or different;

[0016] Wherein, the daughterboard pads are one of elliptical, square, rectangular, circular or polygonal shapes; the motherboard pads are one of elliptical, square, rectangular, circular or polygonal shapes.

[0017] Furthermore, the number of subboard pads is at most ten.

[0018] Furthermore, the sub-board has a maximum of four layers.

[0019] Furthermore, the area of ​​the blind hole concentration area does not exceed 30% of the area of ​​the sub-plate.

[0020] Furthermore, the blind holes are distributed in an array of N×M, where N and M are both positive integers.

[0021] In general, the technical solution conceived in this invention can achieve the following beneficial effects compared with the prior art:

[0022] (1) The present invention provides a modular PCB board for high-density integrated chips, which is designed as a sub-board and a motherboard connected to at least one sub-board. Multiple chips containing blind vias and their supporting circuits are individually integrated onto a sub-board, and at least one sub-board is soldered onto the motherboard to complete the PCB board fabrication. This allows the motherboard and sub-board to be fabricated simultaneously, and complex modules are set on multiple sub-boards. Multiple sub-boards can be batch-produced simultaneously, which greatly improves efficiency. In addition, during the fabrication process, only the motherboard pads corresponding to the sub-boards need to be set on the motherboard. There is no need to fabricate complex blind vias on the motherboard, which avoids the waste of the entire PCB board due to errors in the fabrication of blind vias. The present invention modularizes and standardizes high-density integrated chips, which to a certain extent reduces the processing risk, manufacturing difficulty, manufacturing cost and manufacturing cycle of PCB boards.

[0023] (2) The present invention provides a modular PCB board for high-density integrated chips. After modularizing the sub-board, it is soldered to the motherboard. Signal conversion can be directly realized without adding additional peripheral circuits. The input, output and control signals of the sub-board are directly brought out by the motherboard through the motherboard pads. Modularizing the sub-board not only reduces the number of pins on the sub-board and the motherboard, but also makes it easier and simpler to solder the sub-board to the motherboard. In addition, modularizing the sub-boards one by one, the sub-boards can solve the problem of high integration and high density of chips with a maximum of four layers, avoiding the use of buried vias with more complex processes, reducing process difficulty, manufacturing cost and manufacturing cycle.

[0024] (3) The high-density integrated chip modular PCB board provided by this invention has fewer pins on the sub-board and motherboard due to the modularity of the sub-board. Therefore, the sub-board pads can be set at the edge of the sub-board, which not only saves space on the sub-board, but also allows for direct reflow soldering or manual soldering. The pads are clearly visible, making maintenance convenient, the soldering is more robust, and the soldering requirements are lower, thereby reducing the difficulty and cost of the soldering process. In addition, the motherboard pad area is set according to the sub-board pad area. The number and relative position of the motherboard pads and the sub-board pads correspond one-to-one, thereby inputting, outputting, and controlling the chip signals of the sub-board. Since there are fewer and more visible pads, the alignment between the motherboard pads and the sub-board pads does not need to be very precise when soldering, which also reduces the difficulty and cost of the process to a certain extent and improves the production efficiency.

[0025] (4) The present invention provides a modular PCB board for high-density integrated chips, which modularizes the sub-board and sets a blind via concentration area on the sub-board. Blind vias are directly set on the sub-board, and the blind vias of multiple chips are arranged with a set spacing based on the processing parameters. This not only saves the size of the sub-board, but also minimizes the size of the PCB with blind vias. In addition, the blind vias are concentrated on the sub-board for processing, eliminating the need for complex blind via fabrication on the motherboard, thus avoiding the waste of the entire PCB board due to errors in the fabrication of blind vias. This reduces the manufacturing cost and difficulty of the motherboard, thereby shortening the PCB board manufacturing cycle and cost. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is a schematic diagram of a high-density integrated chip modular PCB board according to the present invention.

[0028] Figure 2 This is a schematic diagram of the sub-board layout of a high-density integrated chip modular PCB board according to the present invention.

[0029] Figure 3 This is a schematic diagram of the sub-board structure of a high-density integrated chip modular PCB board according to the present invention;

[0030] Figure 4 This is a schematic diagram of the motherboard layout of a high-density integrated chip modular PCB board according to the present invention.

[0031] Figure 5 This is a schematic diagram of the motherboard structure of a high-density integrated chip modular PCB board according to the present invention;

[0032] Figure 6 This is a schematic diagram of the layer structure of a sub-board of a high-density integrated chip modular PCB board according to the present invention.

[0033] Figure 7 This is a schematic diagram of the blind via concentration area of ​​a high-density integrated chip modular PCB board according to the present invention;

[0034] 1-Subboard; 11-Functional module area; 12-Blind via concentration area; 13-Subboard pad area; 111-Chip; 112-Supporting circuit; 121-Blind via; 131-Subboard pad; 141-First layer subboard; 142-Second layer subboard; 143-Third layer subboard; 144-Fourth layer subboard;

[0035] 2-Motherboard; 21-Motherboard pad area; 211-Motherboard pad. Detailed Implementation

[0036] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.

[0037] The terms "first," "second," "third," and "fourth" in the specification, claims, and accompanying drawings of this invention are used to distinguish different objects, not to describe a particular order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion.

[0038] Figure 1 This is a schematic diagram of a high-density integrated chip modular PCB board according to the present invention. The PCB board includes a sub-board 1 and a mother board 2 connected to at least one sub-board 1.

[0039] Sub-board 1 is used to house high-density integrated chips containing blind vias, integrating multiple chips with blind vias and only exposing the input, output, and control signals. Figures 2-3 The diagram shows a sub-board layout diagram and a sub-board structure diagram of a high-density integrated chip modular PCB board according to the present invention. The sub-board layout diagram is a top perspective view of the sub-board with all components arranged on a sub-board according to set requirements, and the sub-board structure diagram is a top view of the sub-board surface generated according to the sub-board layout diagram.

[0040] Sub-board 1 is multi-layered, including functional module area 11, blind via concentration area 12 and sub-board pad area 13.

[0041] The functional module area 11 is equipped with multiple chips 111 and corresponding circuits 112 for processing chip signals. The blind via concentration area 12 is equipped with most or all of the blind vias 121 corresponding to the multiple chips 111 at a set spacing referenced by processing parameters, for connecting layers of the sub-board 1. The sub-board pad area 13 includes multiple spaced sub-board pads 131 arranged at the edges of multiple layers of the sub-board 1; these pads connect to some of the corresponding circuits 112 and the motherboard 2, transmitting chip signals to the motherboard 2.

[0042] Depend on Figures 4-5The diagram shows a motherboard layout and a daughterboard structure of a high-density integrated chip modular PCB board according to the present invention. The motherboard layout diagram is a top perspective view of the motherboard arranged on the daughterboard according to the requirements of the daughterboard pad area, and the motherboard structure diagram is a top view of the motherboard surface generated according to the motherboard layout diagram.

[0043] The motherboard 2 is connected to at least one daughterboard 1. The motherboard 2 includes a motherboard pad area 21. The positions of the motherboard pad area 21 and the daughterboard pad area 13 are set in a one-to-one correspondence. This is used to solder the daughterboard 1 to the corresponding position on the motherboard 2, so as to realize the input, output and control of chip signals of at least one daughterboard 1 corresponding to the motherboard 2.

[0044] It is worth noting that multiple chips 111 and their associated circuits 112 are housed on a single daughterboard 1, making daughterboard 1 modular and component-based. Daughterboard 1 is directly soldered to motherboard 2 via daughterboard pads 131 and motherboard pads 211, thereby enabling the input, output, and control of chip signals on daughterboard 1. This modularization of the daughterboard reduces the number of pins, which to some extent reduces the processing risk, manufacturing cost, and production cycle of the PCB.

[0045] Each motherboard pad area 21 includes multiple motherboard pads 211 arranged at intervals. The number and relative positions of the motherboard pads 211 are set according to the number and relative positions of the daughterboard pads 131 in the daughterboard pad area 13 corresponding to the motherboard pad area 21. In this invention, chip signals are transmitted to the motherboard 2 through the pins of the daughterboard pads 131. Since the daughterboard 1 and the motherboard 2 are soldered to the motherboard pads 211 through the corresponding daughterboard pads 131, the input, output, and control of the chip signals of the corresponding daughterboard 1 are realized through the pins on the motherboard pads 211.

[0046] More specifically, there are at most ten daughterboard pads 131. In one embodiment of the invention, the daughterboard pad area 13 includes eight daughterboard pads 131 that transmit chip signals to the motherboard 2. Preferably, there are eight daughterboard pads 131, which allows for the use of the fewest pins while ensuring the functionality of the daughterboard, thus minimizing the area of ​​the daughterboard. Specifically, the daughterboard pads 131 are ground 1 (GND1), ground 2 (GND2), voltage input (VIN), voltage output (VOUT), signal control 1 (CTRL1), signal control 2 (CTRL2), signal control 3 (CTRL3), and power supply (PGOOD). The eight daughterboard pads 131 are arranged at intervals along the edge of the daughterboard 1, with the intervals set according to the arrangement of the functional module area 11.

[0047] Since the positions of the motherboard pad areas 21 correspond one-to-one with those of the daughterboard pad areas 13, each motherboard pad area 21 includes multiple motherboard pads 211 arranged at intervals, and each daughterboard pad area 13 includes multiple daughterboard pads 131 arranged at intervals, the motherboard pads 211 correspond one-to-one with the number and relative positions of the daughterboard pads 131 in the corresponding daughterboard pad area 13. Therefore, the motherboard pad area 21 also includes eight motherboard pads 211, used to implement the input, output, and control of the chip signals of the corresponding daughterboard 1. The motherboard pads 211 are ground 1 (GND1), ground 2 (GND2), voltage input (VIN), voltage output (VOUT), signal control 1 (CTRL1), signal control 2 (CTRL2), signal control 3 (CTRL3), and power supply (PGOOD). The relative positions of the eight motherboard pads 211 are also arranged according to the relative positions of the daughterboard pads 131.

[0048] In one embodiment of the present invention, the daughter board pads 131 are arranged along the edges of multiple layers of the daughter board 1, with at least 20% of their area overlapping the edges of the daughter board 1. Preferably, 50% of the area of ​​the daughter board pads 131 overlaps with the edges of the daughter board 1, that is, the center point of the daughter board pads 131 coincides with the edge of the daughter board 1. This not only ensures the reliability of the soldering but also ensures that the area of ​​the daughter board is small.

[0049] The daughterboard pads 131 are directly located on the edge of the daughterboard 1, which not only occupies a small area of ​​the daughterboard but also has lower welding requirements, resulting in greater strength, easier maintenance, and reduced welding process difficulty and cost. Preferably, reflow soldering or manual soldering can be used directly, and production can be carried out according to ordinary production processes without incurring additional costs, thus reducing costs; of course, any welding method with higher welding process requirements than reflow soldering or manual soldering can also be used. Preferably, the packaging standard of the motherboard pads 211 can adopt either the 1206 package standard or the 0805 package standard to ensure the universality of the daughterboard and achieve modular and standardized manufacturing; similarly, any packaging standard with higher requirements than the 1206 package standard or the 0805 package standard can also be used.

[0050] It is worth noting that the shapes of the motherboard pad 211 and the daughterboard pad 131 may be the same or different.

[0051] When the motherboard pad 211 and the daughterboard pad 131 have the same shape, they can be any of various shapes such as ellipse, square, rectangle, circle or polygon. For example, both the daughterboard pad 131 and the motherboard pad 211 are ellipse.

[0052] When the shapes of the motherboard pad 211 and the daughterboard pad 131 are not identical, the motherboard pad 211 and the daughterboard pad 131 can be any two of various shapes such as ellipse, square, rectangle, circle, or polygon. For example, the daughterboard pad 131 is elliptical, with a hole diameter of 0.75×0.6mm and a pad size of 1.4×1mm; the motherboard pad 211 is a rectangular pad with dimensions of 1.78×2.8mm and 1.3×1.4mm.

[0053] Since the shapes of the motherboard pads 211 and the daughterboard pads 131 may be the same or different, the dimensions of the motherboard pads 211 and the daughterboard pads 131 may also be different. Therefore, the gaps between the spaced motherboard pads 211 and the gaps between the spaced daughterboard pads 131 are also allowed to have a certain degree of error.

[0054] In one embodiment of the present invention, daughter board pads 131 are arranged at intervals on both sides of the daughter board 1. The minimum center-to-center gap between two daughter board pads 131 located on each side is equal to the length or width of the daughter board 1. The center-to-center gap between two daughter board pads 131 located on the same side is 0-20 mm, and can be selected from one or more of 3.5560 mm, 2.5400 mm, 3.5560 mm, 2.2860 mm, or 3.0480 mm. Corresponding mother board pads 211 are set according to the daughter board pads 131. The edge gap between two mother board pads 211 located on each side is less than or equal to the length or width of the daughter board 1, and can be selected from one or more of 8.8720 mm or 8.1220 mm. The edge gap between two mother board pads 211 located on the same side is 0-20 mm, and can be selected from one or more of 1.9280 mm, 0.6080 mm, 1.0130 mm, or 1.9280 mm.

[0055] Since blind vias scattered throughout the PCB board increase the manufacturing cost and processing risk of the PCB board, the present invention modularizes the sub-board 1 and sets a blind via concentration area 12 on the sub-board 1. Blind vias 121 are designed directly on the sub-board 1, and the blind vias 121 of multiple chips 111 are arranged in a concentrated manner with the set spacing referenced by the processing parameters. This minimizes the size of the PCB board with blind vias 121, thereby reducing the manufacturing cost, board manufacturing cycle and manufacturing difficulty.

[0056] Sub-board 1 has up to four layers. As a preferred embodiment of the present invention, such as... Figure 6The diagram shows the layer structure of a sub-board of a high-density integrated chip modular PCB. Sub-board 1 has a four-layer structure to control costs, consisting of a first sub-board 141, a second sub-board 142, a third sub-board 143, and a fourth sub-board 144. Sub-board pad areas 13 are located on both sides of sub-board 1. Each sub-board pad 131 connects to each layer of the sub-board. Each sub-board includes a functional module area 11 and a blind via concentration area 12. The connections between layers of sub-board 1 are achieved through blind vias 121 in the blind via concentration area 12. The area of ​​the blind via concentration area 12 does not exceed 30% of the area of ​​sub-board 1.

[0057] Preferably, the blind vias 121 are arranged in an N×M array, where N and M are both positive integers, allowing direct drilling on the chip pins and resulting in better signal transmission quality. As one embodiment of the present invention, such as... Figure 7 The diagram shows a blind via concentration area of ​​a high-density integrated chip modular PCB board. Preferably, the blind via concentration area 12 includes twelve blind vias 121, which are circular with a diameter of 0.1 mm and an outer ring diameter of 0.25 mm. The edge spacing of each blind via 121 is 0.2 mm.

[0058] As an embodiment of the present invention, the chip 111 and its supporting circuit 112 are separately mounted on a PCB sub-board 1 with a length of 11mm x 13mm, and eight elliptical sub-board pads 131 are arranged around it to solder the sub-board to the motherboard 2.

[0059] The specific welding steps are as follows: First, four elliptical pads 131 with an elliptical hole diameter of 0.75mm × 0.6mm and an elliptical pad size of 1.4mm × 1mm are set on both sides of the sub-board 1. The center point of each pad is located on the edge of the sub-board 1. The specific spacing dimensions are as follows. Figure 3 As shown; then, make corresponding electrical connections between the elliptical subboard pads 131 on subboard 1 and the corresponding circuits 112 on subboard 1; next, set a board frame of the same size as subboard 1 on motherboard 2, and set corresponding rectangular motherboard pads 211 at the positions of the corresponding elliptical subboard pads 131. The dimensions of the motherboard pads 211 are 1.78X2.8mm and 1.3X1.4mm, and the specific spacing dimensions are as follows. Figure 5 As shown; finally, according to the corresponding daughter board pad 131 and mother board pad 211, the daughter board 1 is directly soldered to the mother board 2.

[0060] In summary, this invention minimizes the size of PCBs with blind vias, reduces manufacturing costs, achieves module standardization, shortens the PCB motherboard manufacturing cycle and cost, and reduces the difficulty of PCB motherboard manufacturing.

[0061] It should be noted that, for the sake of simplicity, the foregoing embodiments are all described as a series of actions. However, those skilled in the art should understand that the present invention is not limited to the described order of actions, as some steps can be performed in other orders or simultaneously according to the present invention. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to the present invention.

[0062] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0063] In the several embodiments provided by this invention, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some service interface; the indirect coupling or communication connection between devices or units may be electrical or other forms.

[0064] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0065] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0066] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this invention. The aforementioned memory includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0067] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, which may include: a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc.

[0068] The foregoing description is merely an exemplary embodiment of this disclosure and should not be construed as limiting the scope of this disclosure. Any equivalent changes and modifications made in accordance with the teachings of this disclosure shall still fall within the scope of this disclosure. Those skilled in the art will readily conceive of other embodiments of this disclosure upon considering the specification and practicing the disclosure herein. This invention is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not described herein. The specification and embodiments are to be considered exemplary only, and the scope and spirit of this disclosure are defined by the claims.

[0069] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0070] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A modular PCB board with high-density integrated chips, characterized in that, The PCB board includes: A daughterboard is used to set up high-density integrated chips including blind vias. The daughterboard is multi-layered and includes a functional module area, a blind via concentration area, and a daughterboard pad area. Each daughterboard pad is connected to each layer of the daughterboard. Each layer of the daughterboard includes a functional module area and a blind via concentration area. The functional module area is provided with multiple chips and supporting circuits for processing the signals of the chips. The blind via concentration area is a sub-board in which most or all of the blind vias corresponding to the design of the chips are arranged in a concentrated manner at a set spacing as reference to the processing parameters, in order to realize the connection between the layers of the sub-board. The subboard pad area includes multiple spaced subboard pads arranged along the edges of multiple layers of the subboard; these pads are used to connect with some of the associated circuitry and the motherboard, transmitting the chip signals to the motherboard. A motherboard is connected to at least one daughterboard. The motherboard includes a motherboard pad area, and the positions of the motherboard pad area and the daughterboard pad area are arranged in a one-to-one correspondence. The daughterboard is used to solder the daughterboard to the corresponding position on the motherboard, so as to realize the input, output and control of the chip signals of the at least one daughterboard corresponding to the motherboard.

2. The high-density integrated chip modular PCB board as described in claim 1, characterized in that, Each of the motherboard pad areas includes multiple motherboard pads arranged at intervals, and the number and relative position of the daughterboard pads in the corresponding daughterboard pad area correspond one-to-one.

3. A modular PCB board for high-density integrated chips as described in any one of claims 1 to 2, characterized in that, At least 20% of the area of ​​the subboard pads overlaps with the edge of the subboard.

4. The high-density integrated chip modular PCB board as described in claim 3, characterized in that, The soldering method between the daughterboard pads and the motherboard pads is either reflow soldering or manual soldering.

5. A high-density integrated chip modular PCB board as described in any one of claims 1 to 2, characterized in that, The motherboard pads are packaged according to either the 1206 package standard or the 0805 package standard.

6. The high-density integrated chip modular PCB board as described in claim 2, characterized in that, The shapes of the motherboard pads and the daughterboard pads may be the same or different. Wherein, the daughterboard pads are one of elliptical, square, rectangular, circular or polygonal shapes; the motherboard pads are one of elliptical, square, rectangular, circular or polygonal shapes.

7. A modular PCB board for high-density integrated chips as described in claim 3, characterized in that, The number of pads on the subboard is up to ten.

8. A modular PCB board for high-density integrated chips as described in claim 1, characterized in that, The sub-board has a maximum of four layers.

9. A modular PCB board for high-density integrated chips as described in claim 1, characterized in that, The area of ​​the blind hole concentration area shall not exceed 30% of the area of ​​the sub-plate.

10. A modular PCB board for high-density integrated chips as described in claim 9, characterized in that, The blind holes are distributed in an array of N×M, where N and M are both positive integers.