Display substrate and display device

Abstract

A display substrate and a display device are provided. The display substrate includes: a substrate substrate; a plurality of sub-pixels, the sub-pixel including a light emitting element, the light emitting element including a first electrode, a light emitting functional layer, and a second electrode, the light emitting functional layer including a plurality of sub-functional layers; a first partition structure located in a display area and including a first partition portion and a second partition portion stacked, the first partition portion being located on a side of the second partition portion close to the substrate substrate; and a second partition structure located in a frame area and including a third partition portion and a fourth partition portion stacked, the third partition portion being located on a side of the fourth partition portion close to the substrate substrate; the second partition portion has a first protruding portion protruding relative to the first partition portion, at least one sub-functional layer of the light emitting functional layer being disconnected at the first protruding portion, the fourth partition portion has a second protruding portion protruding relative to the third partition portion, at least one sub-functional layer of the light emitting functional layer being disconnected at the second protruding portion.

Description

TECHNICAL FIELD

[0001] Embodiments of the present disclosure relate to a display substrate and a display device. BACKGROUND

[0002] With the continuous development of display technology, organic light-emitting diode (OLED) display devices have become the research focus and the direction of technological development of current major manufacturers due to their wide color gamut, high contrast, thin design, self-luminous, and wide viewing angle, and other advantages.

[0003] At present, organic light-emitting diode display devices have been widely applied to various electronic products, from small electronic products such as smart bracelets, smart watches, smart phones, tablet computers, to large electronic products such as notebook computers, desktop computers, and televisions. Therefore, the market demand for active matrix organic light-emitting diode display devices is also increasingly strong. SUMMARY

[0004] Embodiments of the present disclosure provide a display substrate and a display device.

[0005] Embodiments of the present disclosure provide a display substrate, comprising: a substrate substrate comprising a hole region, a display region, and a frame region between the hole region and the display region; a plurality of sub-pixels in the display region, the sub-pixels comprising a light-emitting element, the light-emitting element having a light-emitting region, the light-emitting element comprising a first electrode, a light-emitting functional layer, and a second electrode, the second electrode being on a side of the light-emitting functional layer facing away from the substrate substrate, the first electrode being on a side of the light-emitting functional layer close to the substrate substrate, the light-emitting functional layer comprising a plurality of sub-functional layers; a first partition structure in the display region and comprising a first partition portion and a second partition portion stacked, the first partition portion being on a side of the second partition portion close to the substrate substrate; and a second partition structure in the frame region and comprising a third partition portion and a fourth partition portion stacked, the third partition portion being on a side of the fourth partition portion close to the substrate substrate; the second partition portion has a first protruding portion protruding relative to the first partition portion, at least one sub-functional layer of the light-emitting functional layer is disconnected at the first protruding portion, the fourth partition portion has a second protruding portion protruding relative to the third partition portion, at least one sub-functional layer of the light-emitting functional layer is disconnected at the second protruding portion; the first partition structure surrounds the light-emitting region; the second partition structure is annular to surround the hole region.

[0006] The display substrate provided by the embodiments of the present disclosure, the second electrode is continuous at the first protruding portion, and the first partition structure is annularly arranged.

[0007] The display substrate provided by the embodiment of the present disclosure, the first partition structure is annular and continuously arranged.

[0008] The display substrate provided by the embodiment of the present disclosure, the first partition structure has a notch, the first electrode has a main body part and a connecting part, the main body part is overlapped with the orthographic projection of the light-emitting area on the substrate substrate, and the connecting part is located at the notch.

[0009] The display substrate provided by the embodiment of the present disclosure, the display substrate further comprises an encapsulation layer, the encapsulation layer comprises a first encapsulation layer, a second encapsulation layer and a third encapsulation layer, the first encapsulation layer, the second encapsulation layer and the third encapsulation layer are arranged in sequence, the first encapsulation layer is closer to the substrate substrate than the third encapsulation layer, the first encapsulation layer and the third encapsulation layer have a laminated contact part, the second partition structure is arranged in multiple, the orthographic projection of one of the multiple second partition structures on the substrate substrate is overlapped with the orthographic projection of the second encapsulation layer on the substrate substrate, and the orthographic projection of another of the multiple second partition structures on the substrate substrate is overlapped with the orthographic projection of the laminated contact part on the substrate substrate.

[0010] The display substrate provided by the embodiment of the present disclosure, the display substrate further comprises a blocking dam, the blocking dam is located in the frame area, and the second partition structure comprises two second partition structures located on both sides of the blocking dam.

[0011] The display substrate provided by the embodiment of the present disclosure, the thickness of the second partition part is greater than the thickness of the first partition part.

[0012] The display substrate provided by the embodiment of the present disclosure, the ratio of the thickness of the first partition part to the thickness of the second partition part is greater than or equal to 0.25 and less than or equal to 1.

[0013] The display substrate provided by the embodiment of the present disclosure, the size of the first partition part in the direction perpendicular to the substrate substrate is less than the size of the third partition part in the direction perpendicular to the substrate substrate.

[0014] The display substrate provided by the embodiment of the present disclosure, the second partition part and the fourth partition part are located in the same layer.

[0015] The display substrate provided by the embodiment of the present disclosure, the first partition structure and the second partition structure have the same layer structure.

[0016] The display substrate provided by the embodiment of the present disclosure, the number of film layers included in the first partition part is less than or equal to the number of film layers included in the third partition part.

[0017] The display substrate provided by the embodiment of the present disclosure, the material of the first partition structure comprises a conductive material, and the material of the second partition structure comprises a conductive material.

[0018] The display substrate provided by the embodiment of the present disclosure, the conductive material comprises a metal and a conductive metal oxide.

[0019] The display substrate provided by the embodiment of the present disclosure, the second partition part and the fourth partition part are located in the same layer, and the third partition part comprises a part located in the same layer as the first partition part.

[0020] The display substrate provided by the embodiment of the present disclosure, the material of the first partition structure comprises an inorganic insulating material, and the material of the second partition structure comprises an inorganic insulating material.

[0021] The display substrate provided by the embodiment of the present disclosure, the materials of the first partition part and the second partition part are different, the materials of the third partition part and the fourth partition part are different, the materials of the first partition part and the third partition part are the same, and the materials of the second partition part and the fourth partition part are the same.

[0022] The display substrate provided by the embodiment of the present disclosure, the materials of the first partition part and the third partition part comprise an organic material, and the materials of the second partition part and the fourth partition part comprise an inorganic insulating material.

[0023] The display substrate provided by the embodiment of the present disclosure, the materials of the first partition part and the third partition part comprise an organic insulating material, and the materials of the second partition part and the fourth partition part comprise a conductive material.

[0024] The display substrate provided by the embodiment of the present disclosure, the material of the first partition part comprises an organic insulating material, the material of the second partition part comprises an organic insulating material, the material of the third partition part comprises an inorganic insulating material, and the material of the fourth partition part comprises a conductive material.

[0025] The display substrate provided by the embodiment of the present disclosure, the first partition part and the second partition part are an integral structure.

[0026] The display substrate provided by the embodiment of the present disclosure, the second partition structure comprises two sub-partition structures, and the second protruding parts of the two sub-partition structures are oppositely arranged.

[0027] The display substrate provided by the embodiment of the present disclosure, the second partition structure is provided in plurality, the second partition structure further comprises a fifth partition part, the material of the fifth partition part comprises a conductive material, the fifth partition parts of the plurality of second partition structures are an integral structure, and the plurality of fourth partition parts are sequentially arranged around the hole region.

[0028] According to the embodiments of the present disclosure, the display substrate further includes a conductive structure, the orthographic projection of the conductive structure on the substrate overlaps with the orthographic projection of the first partition structure on the substrate.

[0029] According to the embodiments of the present disclosure, the conductive structure of the display substrate includes data lines or power lines.

[0030] According to the display substrate provided in the embodiments of this disclosure, the first partition structure is T-shaped.

[0031] According to an embodiment of the present disclosure, the display substrate provided with the partition structure includes at least one partition substructure, wherein the orthographic projection of the at least one partition substructure on the substrate surrounds at least half of the orthographic projection of the light-emitting area on the substrate.

[0032] Embodiments of this disclosure also provide a display device including any of the above-described display substrates. Attached Figure Description

[0033] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments will be briefly described below. Obviously, the drawings described below only relate to some embodiments of this disclosure and are not intended to limit this disclosure.

[0034] FIG. 1 This is a schematic diagram of a light-emitting element.

[0035] FIG. 2 This is a schematic diagram of a display substrate.

[0036] FIG. 3 This is a schematic diagram of a display substrate.

[0037] FIG. 4 This is a cross-sectional schematic diagram of a display substrate provided for an embodiment of this disclosure.

[0038] FIG. 5A yes FIG. 4 An enlarged view of the first partition structure in the image.

[0039] FIG. 5B yes FIG. 4 Enlarged view of the second partition structure.

[0040] FIG. 6A to FIG. 6D for FIG. 4 The flowchart shown illustrates the manufacturing method of the display substrate.

[0041] FIG. 7 This is a cross-sectional schematic diagram of a display substrate provided for an embodiment of this disclosure.

[0042] FIG. 8A is FIG. 7 is a close-up view of the first partition structure in

[0043] FIG. 8B is FIG. 7 is a close-up view of the second partition structure in

[0044] FIG. 9A to FIG. 9C is FIG. 7 a flowchart of a manufacturing method of the display substrate shown in

[0045] FIG. 10 is a cross-sectional schematic view of a display substrate provided by an embodiment of the present disclosure.

[0046] FIG. 11A is a cross-sectional schematic view of another display substrate provided by an embodiment of the present disclosure.

[0047] FIG. 11B is a cross-sectional schematic view of another display substrate provided by an embodiment of the present disclosure.

[0048] FIG. 11C is a cross-sectional schematic view of another display substrate provided by an embodiment of the present disclosure.

[0049] FIG. 12A is a flowchart of a manufacturing process of the display substrate provided by an embodiment of the present disclosure.

[0050] FIG. 12B is a flowchart of a manufacturing process of the display substrate provided by an embodiment of the present disclosure.

[0051] FIG. 13 is a planar schematic view of a plurality of second partition structures in a display substrate provided by an embodiment of the present disclosure.

[0052] FIG. 14 is FIG. 10 is a planar schematic view of a first partition structure and a first electrode in a display substrate shown in

[0053] FIG. 15 is FIG. 11A or FIG. 11B is a planar schematic view of a first partition structure and a conductive structure in a display substrate shown in

[0054] FIG. 16 is FIG. 10 is a planar schematic view of a first partition structure in a display substrate shown in

[0055] FIG. 17 is a cross-sectional schematic view of a display substrate provided by an embodiment of the present disclosure.

[0056] FIG. 18A is a cross-sectional schematic view of another display substrate provided by an embodiment of the present disclosure.

[0057] FIG. 18B Another cross-sectional schematic view of a display substrate provided for an embodiment of the present disclosure.

[0058] FIG. 18C Another cross-sectional schematic view of a display substrate provided for an embodiment of the present disclosure.

[0059] FIG. 19A A flowchart of a manufacturing process of a display substrate provided for an embodiment of the present disclosure.

[0060] FIG. 19B A flowchart of a manufacturing process of a display substrate provided for an embodiment of the present disclosure.

[0061] FIG. 20 A cross-sectional schematic view of a display substrate provided for an embodiment of the present disclosure.

[0062] FIG. 21 A flowchart of a manufacturing process of a display substrate provided for an embodiment of the present disclosure. FIG. 20 A flowchart of a manufacturing process of a display substrate provided for an embodiment of the present disclosure.

[0063] FIG. 22 A plan view of a second partition structure in a frame area of a display substrate provided for an embodiment of the present disclosure. FIG. 20 A plan view of a second partition structure in a frame area of a display substrate provided for an embodiment of the present disclosure.

[0064] FIG. 23 A plan view of a first partition structure in a display area of a display substrate provided for an embodiment of the present disclosure.

[0065] FIG. 24 A plan view of a first partition structure in a display area of a display substrate provided for an embodiment of the present disclosure.

[0066] FIG. 25A A plan view of another display substrate provided for an embodiment of the present disclosure.

[0067] FIG. 25B A plan view of another display substrate provided for an embodiment of the present disclosure.

[0068] FIG. 26 A schematic view of a light emitting element in a display substrate provided for an embodiment of the present disclosure.

[0069] FIG. 27 A schematic view of a pixel circuit and a light emitting element in a display substrate provided for an embodiment of the present disclosure.

[0070] FIG. 28 A schematic view of a display device provided for an embodiment of the present disclosure. DETAILED DESCRIPTION

[0071] In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure clearer, the following will be combined with the drawings of the embodiments of the present disclosure to make a clear and complete description of the technical solutions of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by a person of ordinary skill in the art without any inventive effort fall within the protection scope of the present disclosure.

[0072] Unless otherwise defined, technical terms or scientific terms used in the present disclosure shall have the ordinary meaning understood by a person of ordinary skill in the art to which the present disclosure pertains. The terms "first", "second" and similar terms used in the present disclosure do not denote any order, quantity or importance, but are used to distinguish different components. Similarly, the terms "comprise", "comprise" and similar terms mean that the elements or objects before the terms encompass the elements or objects listed after the terms and their equivalents, without excluding other elements or objects. The terms "connected" or "connected" and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms "up", "down", "left", "right" and the like are only used to represent relative positional relationships, and when the absolute positions of the described objects change, the relative positional relationships may also change accordingly.

[0073] With the continuous development of display technology, people's pursuit of display quality is also getting higher and higher. In order to further reduce power consumption and achieve high brightness, one light-emitting layer in the light-emitting element in the OLED display substrate can be replaced by two light-emitting layers, and a charge generation layer (CGL) is added between the two light-emitting layers. N / P-CGL is used as a heterojunction, two light-emitting device structures are connected in series, a double-layer design is formed, a Tandem structure is formed, and the display substrate of the Tandem structure realizes the series connection of the double light-emitting devices. Under the same luminous intensity, the luminous current of the light-emitting element is greatly reduced, the service life of the light-emitting element is improved, and it is beneficial to the development and production of high-service-life new technologies such as vehicle-mounted. The display device with Tandem structure has the advantages of long service life, low power consumption, high brightness, etc.

[0074] FIG. 1 FIG. 1 is a schematic diagram of a light-emitting element. FIG. 1 (a) is a schematic diagram of a general light-emitting element. FIG. 1 (b) is a schematic diagram of a light-emitting element with a Tandem structure. FIG. 1 As shown in (b), the charge generation layers (CGLs) between different light-emitting elements of the Tandem structure are connected.

[0075] FIG. 1The first electrode E1, the second electrode E2, the hole transport layer HTL, the electron transport layer ETL, the light coupling layer CPL, the anti-reflection layer ARL, the P-doped charge generation layer P-CGL, the N-doped charge generation layer N-CGL, the light emitting layer R, the light emitting layer G, and the light emitting layer B are shown. The light emitting layer R includes two sub-layers respectively containing a light emitting material r1 and a light emitting material r2, the light emitting layer G includes two sub-layers respectively containing a light emitting material g1 and a light emitting material g2, and the light emitting layer B contains a light emitting material b1 and a light emitting material b2. The light emitting material r1 and the light emitting material r2 are two different materials emitting red light, the light emitting material g1 and the light emitting material g2 are two different materials emitting green light, and the light emitting material b1 and the light emitting material b2 are two different materials emitting blue light.

[0076] FIG. 2 It is a schematic diagram of a display substrate. As shown in the figure, FIG. 2 The display substrate includes a planarization layer PLN1, a planarization layer PLN2, a pixel definition layer PDL, an electrode E1, a light emitting functional layer FL, an electrode E2, and an encapsulation layer EPS. FIG. 1 The light emitting element EM01 and the light emitting element EM02 are shown, and the charge generation layer (CGL) of the light emitting element EM01 and the light emitting element EM02 can be an integrated structure and is made by using an opening mask.

[0077] However, the inventors noticed that for high-resolution products, since the charge generation layer has strong conductivity, and the light emitting functional layer (here referring to the film layer including two light emitting layers and a charge generation layer) of adjacent sub-pixels is connected, the charge generation layer (sub-functional layer) is easy to cause crosstalk between adjacent sub-pixels, affecting the product image quality, and thus seriously affecting the display quality.

[0078] For example, the crosstalk between adjacent sub-pixels refers to the case that the light emitting element that should not emit light emits light. As shown in the figure, FIG. 2 If the desired condition is that the light emitting element EM01 emits light and the light emitting element EM02 does not emit light, but due to the conductivity of the charge generation layer, the light emitting element EM02 also emits light, thereby forming crosstalk.

[0079] FIG. 3 It is a schematic diagram of a display substrate. As shown in the figure, FIG. 3 The display substrate includes a hole area R2, a display area R1, and a frame area R3 located between the hole area R2 and the display area R1. As shown in the figure, FIG. 3 The hole area R2 is circular. It should be noted that the embodiments of the present disclosure take the shape of the hole area R2 as an example for illustration, but the hole area R2 can also adopt other suitable shapes, not limited to a circular shape. Moreover, the setting position of the hole area R2 is not limited to that shown in the figure, and can be set as needed. For example, part of the gate lines, part of the data lines, and other conductive lines are wound around the hole area R2 to form the frame area R3.

[0080] For example, when using an in-display aperture design, at least a portion of the structure within the aperture region R2 is removed; that is, the in-display aperture design requires sacrificing a portion of the display area to form the aperture region. For example, all the structures within the aperture region R2 of the display substrate may be removed. For example, after forming the encapsulation layer, the portion of the display substrate located in the aperture region R2 is removed by drilling. A sensor may be partially or entirely disposed within the aperture region R2. For example, the sensor may include a camera.

[0081] On the one hand, in order to prevent water and oxygen from damaging the light-emitting element, a partition structure can be set in the frame area R3 to isolate the light-emitting functional layer of the light-emitting element and prevent water and oxygen from entering the display area R1 along the light-emitting functional layer around the hole area R2.

[0082] On the other hand, in order to reduce or avoid crosstalk caused by highly conductive sub-functional layers in the light-emitting functional layer, an isolation structure can be set in the display area.

[0083] The display substrate provided in the embodiments of this disclosure has a first isolation structure in the display area R2 to improve the reliability of the display substrate, and a second isolation structure in the border area R3 to reduce or avoid crosstalk.

[0084] FIG. 4 This is a cross-sectional schematic diagram of a display substrate provided for an embodiment of this disclosure. FIG. 5A yes FIG. 4 An enlarged view of the first partition structure in the image. FIG. 5B yes FIG. 4 Enlarged view of the second partition structure. FIG. 6A to FIG. 6D for FIG. 4 The flowchart shown illustrates the manufacturing method of the display substrate.

[0085] like FIG. 4 As shown, the display substrate DP1 includes: a substrate BS, multiple sub-pixels SP, a first partition structure 11, and a second partition structure 12. FIG. 4 As shown, the substrate BS includes a hole area R2, a display area R1, and a border area R3 located between the hole area R2 and the display area R1.

[0086] like FIG. 4 As shown, multiple sub-pixels SP are located on the main surface SF0 of the substrate BS. Each sub-pixel SP includes a light-emitting element EMC, which has a light-emitting area R0.

[0087] like FIG. 4As shown, the light emitting element EMC includes a first electrode E1, a light emitting functional layer FL, and a second electrode E2, the second electrode E2 is located on a side of the light emitting functional layer FL away from the substrate base BS, the first electrode E1 is located on a side of the light emitting functional layer FL close to the substrate base BS, and the light emitting functional layer FL includes a plurality of sub-functional layers.

[0088] For example, the first electrode E1 is made of a conductive material. For example, the material of the first electrode E1 includes metal and conductive metal oxide. For example, the first electrode E1 is made of indium tin oxide (ITO), silver (Ag), or a structure in which indium tin oxide (ITO) is laminated. The material and structure of the first electrode E1 can be set as needed.

[0089] For example, the second electrode E2 is made of a conductive material. For example, the material of the second electrode E2 includes metal or alloy. For example, the material of the second electrode E2 includes Mg / Ag alloy. The material and structure of the second electrode E2 can be set as needed.

[0090] For example, the second electrodes E2 of different sub-pixels are electrically connected to facilitate the provision of the same voltage signal.

[0091] As shown in FIG. 4 and FIG. 5A As shown, the first partition structure 11 is located in the display area R1, the first partition structure 11 is located between the light emitting areas R0 of adjacent sub-pixels SP, and includes a first partition part 11a and a second partition part 11b which are laminated, the first partition part 11a is located on a side of the second partition part 11b close to the substrate base BS; the second partition part 11b has a protruding part PR1 which protrudes relative to the first partition part 11a. For example, the protruding part PR1 protrudes relative to at least part of the first partition part 11a. For example, the protruding part PR1 protrudes relative to a side of the first partition part 11a close to the second partition part 11b, and at least one sub-functional layer of the light emitting functional layer FL is disconnected at the protruding part PR1. For example, the direction from the first electrode E1 to the second electrode E2 is the direction Z. The first partition structure 11 has the protruding part PR1 to facilitate the disconnection of at least one sub-functional layer of the light emitting functional layer FL.

[0092] For example, the disconnection of one element at the protruding part PR1 includes disconnection at a side of the protruding part PR1.

[0093] As shown in FIG. 4 and FIG. 5B As shown, the second partition structure 12 is located in the frame area R3, and includes a third partition part 13 and a fourth partition part 14 which are laminated, the third partition part 13 is located on a side of the fourth partition part 14 close to the substrate base BS.

[0094] As shown in FIG. 4As shown, the fourth partition 14 has a protrusion PR2 that protrudes relative to the third partition 13, and at least one sub-functional layer of the light-emitting functional layer FL is disconnected at the protrusion PR2. For example, the protrusion PR2 protrudes relative to the side of the third partition 13 closest to the fourth partition 14.

[0095] like FIG. 4 As shown, the display substrate includes a buffer layer BF, insulating layers GI1 and GI2, insulating layer ILD, planarization layer PLN, pixel definition pattern PDL, and spacers PS. The spacers PS are configured to support a fine metal mask during the fabrication of the light-emitting layer. For example, as... FIG. 4 As shown, the pixel-defined pattern PDL includes a plurality of openings OPN, which are configured to define the light-emitting area R0 of the sub-pixel SP and are configured to expose at least a portion of the first electrode E1.

[0096] FIG. 4 A thin-film transistor T0 is also shown. T0 includes a gate GE, an active layer CV, a source Ea, and a drain Eb, with a first electrode E1 connected to the drain Eb. The source Ea and drain Eb of the thin-film transistor can be structurally identical and interchangeable in name.

[0097] FIG. 4 The first plate Ca and the second plate Cb of capacitor C0 are also shown. For example, capacitor C0 may be the storage capacitor Cst mentioned later, but is not limited thereto.

[0098] FIG. 4 The encapsulation layer EPS is also shown. For example, the encapsulation layer EPS includes a first encapsulation layer EPS1, a second encapsulation layer EPS2, and a third encapsulation layer EPS3. For example, the first encapsulation layer EPS1 and the third encapsulation layer EPS3 are inorganic layers and can be formed using a chemical vapor deposition (CVD) process. The second encapsulation layer EPS2 is an organic layer and can be formed using an inkjet printing process. FIG. 4 As shown, the thickness of the second encapsulation layer EPS2 is greater than the thickness of the first encapsulation layer EPS1. FIG. 4 As shown, the thickness of the second encapsulation layer EPS2 is greater than the thickness of the third encapsulation layer EPS3.

[0099] like FIG. 4 As shown, in the border area R3, the first encapsulation layer EPS1 and the third encapsulation layer EPS3 come into contact to form a stacked contact portion CP.

[0100] For example, if the thickness of the second partition 11b is greater than the thickness of the first partition 11a, it is more conducive to the encapsulation of the EPS encapsulation layer.

[0101] For example, in a case where the thickness difference between the two partition portions of the partition structure is small, the encapsulation of the encapsulation layer EPS is more facilitated, and the encapsulation effect is improved.

[0102] For example, in a case where the ratio of the thickness of the first partition portion 11a to the thickness of the second partition portion 11b is greater than or equal to 0.25 and less than or equal to 1, the encapsulation of the encapsulation layer EPS is more facilitated.

[0103] FIG. 5B and FIG. 4 The barrier dam 17 is also shown. The barrier dam 17 includes a sub-dam 171 and a sub-dam 172. For example, the sub-dam 171 and the planarization layer PLN are located in the same layer and are formed by the same film layer using the same patterning process. For example, the sub-dam 172 and the pixel definition pattern PDL are located in the same layer and are formed by the same film layer using the same patterning process.

[0104] As shown in FIG. 5B and FIG. 4 The display substrate includes two second partition structures 12: a partition structure 121 and a partition structure 122, which are arranged on opposite sides of the barrier dam 17. The size of the barrier dam 17 in the direction perpendicular to the substrate base plate BS (direction Z) is greater than the size of the second partition structure 12 in the direction perpendicular to the substrate base plate BS. FIG. 5B and FIG. 4 Only two second partition structures 12 are shown, and it should be noted that three or more second partition structures 12 can also be provided.

[0105] As shown in FIG. 5B and FIG. 4 The orthogonal projection of the partition structure 121 on the substrate base plate BS overlaps the orthogonal projection of the second encapsulation layer EPS2 on the substrate base plate BS, and the orthogonal projection of the partition structure 121 on the substrate base plate BS overlaps the orthogonal projection of the lamination contact portion CP on the substrate base plate BS.

[0106] FIG. 5B and FIG. 4 The orthogonal projection of one second partition structure 12 on the substrate base plate BS overlaps the orthogonal projection of the second encapsulation layer EPS2 on the substrate base plate BS is taken as an example for illustration, but is not limited thereto. For example, in other embodiments, the orthogonal projections of multiple second partition structures 12 on the substrate base plate BS overlap the orthogonal projection of the second encapsulation layer EPS2 on the substrate base plate BS.

[0107] FIG. 5B and FIG. 4The description takes the overlapping of the orthographic projection of a second partition structure 12 on the substrate BS and the orthographic projection of the stacked contact portion CP on the substrate BS as an example, but is not limited thereto. For example, in some other embodiments, the orthographic projections of multiple second partition structures 12 on the substrate BS and the orthographic projections of the stacked contact portion CP on the substrate BS overlap.

[0108] For example, such as FIG. 5B and FIG. 4 As shown, at least one second partition structure 12 is provided on the left side of the barrier dam 17. In some embodiments of this disclosure, 3-7 second partition structures 12 are provided on the left side of the barrier dam 17. For example, as... FIG. 5B and FIG. 4 As shown, at least one second partition structure 12 is provided on the right side of the barrier dam 17. In some embodiments of this disclosure, 3 to 7 second partition structures 12 are provided on the right side of the barrier dam 17.

[0109] like FIG. 4 and FIG. 4 As shown, the orthographic projection of the partition structure 122 on the substrate BS does not overlap with the orthographic projection of the second encapsulation layer EPS2 on the substrate BS.

[0110] like FIG. 4 As shown, the first conductive pattern layer LY1 includes a gate GE and a first electrode Ca, the second conductive pattern layer LY2 includes a second electrode Cb, and the third conductive pattern layer LY3 includes a source Ea and a drain Eb. For example, the third conductive pattern layer LY3 may include multiple sublayers stacked together, such as a stacked structure of three sublayers: Ti / Al / Ti.

[0111] For example, such as FIG. 4 As shown, the first partition 11a can be a metal layer, for example, a Mo layer. For example, as... FIG. 4 As shown, the thickness of the first partition portion 11a is Since the material of the first partition 11a is a metal material, such as metal Mo, the thickness is small, which is beneficial for the first partition structure 11 to block the light-emitting functional layer FL and not to block the second electrode E2. This is beneficial for the second electrode E2 to remain continuous and for improving the uniformity of light emission from the display substrate.

[0112] For example, such as FIG. 4 As shown, the thickness of the first partition 11a is less than the thickness of the second partition 11b.

[0113] For example, such as FIG. 4 As shown, the third partition 13 includes a sublayer 131 and a sublayer 132. For example, sublayer 131 may be located on the same layer as the source Ea and drain Eb of the thin-film transistor. For example, sublayer 132 may be located on the same layer as the first partition 11a.

[0114] For example, as shown in FIG. 1, the material of the first partition portion 11a includes Mo, and the material of the third partition portion 13 includes Mo, Al and Ti. The third partition portion 13 includes a portion located in the same layer as the first partition portion 11a. That is, the third partition portion 13 includes a sub-layer 132 located in the same layer as the first partition portion 11a. FIG. 4

[0115] For example, as shown in FIG. 1, the second partition portion 11b and the fourth partition portion 14 are located in the same layer. The second partition portion 11b and the fourth partition portion 14 can both be located in the same layer as the first electrode E1. FIG. 4

[0116] As shown in FIG. 1, the thickness of the third partition portion 13 of the second partition structure 12 is greater than the thickness of the first partition portion 11a of the first partition structure 11, so that in the frame area R3 near the hole area R2, the light-emitting functional layer FL and the second electrode E2 are both partitioned, thereby partitioning the light-emitting material between the display area and the hole, preventing water and oxygen around the hole from entering the display area R1 along the light-emitting material, and improving the service life of the light-emitting element. FIG. 6A to FIG. 6D

[0117] As shown in FIG. 1, the display substrate provided by the embodiments of the present disclosure further includes a pixel circuit PXC configured to drive the light-emitting element EMC to emit light, and the first electrode E1 is connected to the pixel circuit PXC through a via hole V0 penetrating the planarization layer PLN. FIG. 6A

[0118] For example, as shown in FIG. 1, the plurality of sub-pixels SP includes a sub-pixel SP1 and a sub-pixel SP2. The sub-pixel SP1 and the sub-pixel SP2 are two adjacent sub-pixels. The number of sub-pixels provided on the display substrate is not limited to that shown in the figure, and can be determined as needed. FIG. 6B In the embodiments of the present disclosure, the number of sub-functional layers included in the light-emitting functional layer FL can be set as needed.

[0119] In the display substrate provided by the embodiments of the present disclosure, by providing the first partition structure between adjacent sub-pixels and causing at least one of the plurality of sub-functional layers in the light-emitting functional layer to be disconnected at the position of the partition structure, the resistance of the sub-functional layer with relatively high conductivity in the light-emitting functional layer FL is increased, thereby reducing or avoiding the crosstalk between adjacent sub-pixels caused by the film layer with relatively high conductivity in the plurality of sub-functional layers, and reducing or preventing the crosstalk of the light-emitting element when emitting light.

[0120]

[0121] ​​​​​The display substrate provided by the embodiments of the present disclosure is formed with the first partition structure 11 after the first electrode E1 is formed, without changing the backplane structure of the display substrate. Moreover, the first partition structure 11 is arranged between the first electrodes E1 of the light-emitting elements, so that the first partition structure 11 has a larger arrangement space, which is conducive to arranging the first partition structure 11 with different structures.

[0122] FIG. 6C The material of the first partition structure 11 and the material of the second partition structure 12 are both conductive materials. The first partition structure 11 can partition the organic light-emitting material and can be arranged between adjacent sub-pixels in the display area.

[0123] FIG. 6D A manufacturing method of the display substrate DP1 is shown. The manufacturing method of the display substrate DP1 includes the following steps.

[0124] As shown in FIG. 7 , the manufacturing method of the display substrate includes: forming a buffer layer BF on a substrate, then forming an active layer CV on the buffer layer BF, and forming an insulating layer G11 on the active layer CV. A gate electrode GE and a first plate Ca are formed on the insulating layer G11, an insulating layer G12 is formed on the gate electrode GE and the first plate Ca, a second plate Cb is formed on the insulating layer G12, an insulating layer ILD is formed on the second plate Cb, and a source electrode Ea, a drain electrode Eb, and an intermediate sub-layer 1310 are formed on the insulating layer ILD.

[0125] As shown in FIG. 8A , a planarization layer PLN is formed on the source electrode Ea and the drain electrode Eb, a sub-dam 171 is formed in the frame area, an intermediate layer 11aa is formed in the display area, and an intermediate sub-layer 1320 is formed in the frame area.

[0126] As shown in FIG. 7 , a first electrode E1 and a second partition portion 11b are formed in the display area, and a fourth partition portion 14 is formed in the frame area; a pixel definition pattern PDL and a spacer PS are formed in the display area, and a sub-dam 172 is formed in the frame area.

[0127] As shown in FIG. 8B , the intermediate layer 11aa, the intermediate sub-layer 1310, and the intermediate sub-layer 1320 are etched to form a first partition portion 11a and a third partition portion 13.

[0128] FIG. 7 A cross-sectional schematic view of the display substrate provided by the embodiments of the present disclosure is shown. FIG. 9A to FIG. 9C is FIG. 7 an enlarged view of the first partition structure in FIG. 7 is FIG. 4 an enlarged view of the second partition structure in FIG. 7 is FIG. 7A flowchart of a manufacturing method of the display substrate is shown.

[0129] FIG. 7 The display substrate DP2 shown is different from the display substrate DP1 shown in that: FIG. 7 The display substrate DP1 shown is different from the display substrate DP2 shown in that: FIG. 7 The first partition structure 11 and the second partition structure 12 shown are both inorganic insulating structures.

[0130] As shown in FIG. 8A The first partition structure 11 includes a first partition part 11a and a second partition part 11b. The first partition part 11a and the second partition part 11b are both made of inorganic insulating material.

[0131] As shown in FIG. 8B The second partition structure 12 includes a third partition part 13 and a fourth partition part 14. The third partition part 13 includes a sub-layer 131 and a sub-layer 132. The third partition part 13 (the sub-layer 131 and the sub-layer 132) and the fourth partition part 14 are both made of inorganic insulating material.

[0132] For example, as shown in FIG. 9A to FIG. 9C The inorganic insulating material used by the first partition part 11a, the second partition part 11b, the third partition part 13 and the fourth partition part 14 includes at least one of SiOx, SiNy, SiOxNy.

[0133] As shown in FIG. 9A , FIG. 9B , FIG. 9C The first partition structure 11 is in T shape, and the second partition structure 12 includes a part in T shape.

[0134] Of course, the first partition structure 11 is not limited to T shape, and in other embodiments, the first partition structure 11 can also be in H shape, or other suitable shapes. The second partition structure 12 can be in T shape, or in H shape, of course, other suitable shapes can also be adopted.

[0135] FIG. 7 A manufacturing method of the display substrate DP2 is shown. The manufacturing method of the display substrate includes the following steps.

[0136] As shown in FIG. 7 A buffer layer BF is formed on the substrate, then an active layer CV is formed on the buffer layer BF, and an insulating layer GIl is formed on the active layer CV. A gate electrode GE and a first plate Ca are formed on the insulating layer GIl, an insulating layer GI2 is formed on the gate electrode GE and the first plate Ca, a second plate Cb is formed on the insulating layer GI2, an insulating layer ILD and an intermediate sub-layer 1310 are formed on the second plate Cb, and a source electrode Ea and a drain electrode Eb are formed on the insulating layer ILD.

[0137] AsFIG. 7 As shown, a planarization layer PLN is formed on the source electrode Ea and the drain electrode Eb, and a sub-dam 171 is formed in the border area; an intermediate layer 11aa is formed in the display area, and an intermediate sub-layer 1320 is formed in the border area; a second partition portion 11b is formed in the display area, and a fourth partition portion 14 is formed in the border area; a first electrode E1 is formed in the display area; a pixel-defined pattern PDL is formed in the display area, and a sub-dam 172 is formed in the border area; and a spacer PS is formed.

[0138] like FIG. 7 As shown, the intermediate layer 11aa, the intermediate sublayer 1310 and the intermediate sublayer 1320 are etched to form the first partition portion 11a and the third partition portion 13.

[0139] For example, such as FIG. 7 As shown, the first partition portion 11a and the second partition portion 11b are made of different inorganic insulating materials to facilitate the formation of the first partition structure 11 with protrusions. For example, as FIG. 9A As shown, the third partition 13 and the fourth partition 14 are made of different inorganic insulating materials to facilitate the formation of the second partition structure 12 with protrusions.

[0140] For example, such as FIG. 7 As shown, the sub-layers 132 of the first partition 11a and the third partition 13 are located on the same layer, and the second partition 11b and the fourth partition 14 are located on the same layer.

[0141] For example, such as FIG. 9C As shown, the thickness of the first partition portion 11a, which uses inorganic insulating material, is... The thickness of the sublayer 132 of the third partition 13, which uses inorganic insulating material, is...

[0142] like FIG. 7 and FIG. 7 As shown, sublayer 131 and insulating layer ILD are located in the same layer.

[0143] like FIG. 4 and FIG. 7 As shown, sublayer 132 is recessed relative to sublayer 131 and the fourth partition 14 to facilitate the isolation of the light-emitting functional layer FL and the second electrode E2.

[0144] like FIG. 4 As shown, the barrier dam 17 is set on the insulating layer ILD.

[0145] FIG. 7 Other structures of the display substrate DP2 shown can be referenced. FIG. 4 The description of the display substrate DP1 shown is as follows: FIG. 10 The beneficial effects of the DP2 display substrate shown can also be referred to FIG. 11AThe beneficial effects of the display substrate DP1 shown will not be elaborated further here. For example, regarding the thickness comparison of the first partition structure 11 and the first partition structure 12, and the arrangement of the two second partition structures 12 relative to the encapsulation layer EPS, FIG. 11B The DP2 display substrate shown can be referenced. FIG. 11C Description of the display substrate DP1 shown.

[0146] FIG. 12A This is a cross-sectional schematic diagram of a display substrate provided for an embodiment of this disclosure. FIG. 12B A cross-sectional schematic diagram of another display substrate provided for an embodiment of this disclosure. FIG. 13 A cross-sectional schematic diagram of another display substrate provided for an embodiment of this disclosure. FIG. 14 A cross-sectional schematic diagram of another display substrate provided for an embodiment of this disclosure. FIG. 10 A flowchart illustrating the fabrication process of a display substrate provided in an embodiment of this disclosure. FIG. 15 A flowchart illustrating the fabrication process of a display substrate provided in an embodiment of this disclosure. FIG. 11A A plan view of a plurality of second partition structures in a display substrate provided for an embodiment of the present disclosure. FIG. 11B for FIG. 16 The diagram shows a planar schematic of the first partition structure and the first electrode in the display substrate. FIG. 10 for FIG. 10 or FIG. 11A A planar schematic diagram of the first partition structure and conductive structure in the display substrate shown. FIG. 11B for FIG. 10 A plan view of the first partition structure in the display substrate shown.

[0147] like FIG. 11A , FIG. 11B ,as well as FIG. 10 As shown, the display substrate DP3 includes a first partition structure 11 and a second partition structure 12. The first partition structure 11 is located in the display area R1 and between adjacent sub-pixels SP, and the second partition structure 12 is located in the border area R3.

[0148] like FIG. 11A , FIG. 11B ,as well as FIG. 10 As shown, the first partition structure 11 includes a first partition portion 11a and a second partition portion 11b. The first partition portion 11a is located on the same layer as the planarization layer PLN and is made of organic material. The second partition portion 11b is located on the same layer as the first electrode E1 and is made of conductive material.

[0149] like FIG. 11A , FIG. 11B ,as well as FIG. 10As shown, the second partition structure 12 includes a third partition part 13 and a fourth partition part 14, the third partition part 13 is located at the same layer as the planarization layer PLN and is made of an organic material, and the fourth partition part 14 is located at the same layer as the first electrode E1 and is made of a conductive material.

[0150] As shown in FIG. 11A , FIG. 11B , and FIG. 11C , the thickness of the first partition part 11a is greater than the thickness of the second partition part 11b, and the thickness of the third partition part 13 is greater than the thickness of the fourth partition part 14.

[0151] As shown in FIG. 12A , FIG. 12A , and FIG. 12B , the light-emitting functional layer FL is partitioned at the first partition structure 11 to avoid or reduce crosstalk during light emission; the light-emitting functional layer FL is disconnected at the second partition structure 12 to prevent water and oxygen around the hole from entering the display area R1 along the light-emitting material, thereby improving the service life of the light-emitting element.

[0152] As shown in FIG. 13 , FIG. 13 , and FIG. 15 , the second electrode E2 is continuous everywhere and is not partitioned, so that the second electrode E2 has a small resistance, which is beneficial to improve the uniformity of light emission of the display substrate.

[0153] For example, the patterning process can also be adjusted so that the second electrode E2 is partitioned at the second partition structure 12 to further improve the packaging effect. In this case, the second electrode E2 is disconnected at the second partition structure 12 and is not disconnected at the first partition structure 11, i.e., it is continuous at the first partition structure 11.

[0154] For example, the shape or size of the first partition part 11a can also be adjusted so that the second electrode E2 is disconnected at the first partition structure 11, and the shape or size of the third partition part 13 is adjusted so that the second electrode E2 is disconnected at the second partition structure 12. In the case where the second electrode E2 is disconnected at the first partition structure 11, the first partition structure 11 can be provided with a notch, and the second electrodes E2 of adjacent sub-pixels can be connected to each other at the notch to facilitate the application of the same signal.

[0155] Of course, other ways can also be used to improve the packaging effect. For example, in order to reduce the risk of disconnection of the second electrode E2 (e.g., cathode) and improve the continuity of the inorganic layer in the packaging layer. At the partition structure, a secondary mask can also be used to add an auxiliary connection electrode to connect the second electrodes E2 of different sub-pixels, or the light coupling layer CPL (e.g., FIG. 16The second electrode E2 of different sub-pixels are connected through the conductive light coupling layer CPL. For example, the inorganic layer in the encapsulation layer is made by chemical vapor deposition (CVD) method.

[0156] For example, as shown in FIG. 14 to FIG. 16 and FIG. 14 Compared with the display substrate DP31 as shown in FIG. 17 , the display substrate DP32 or the display substrate DP33 further comprises a conductive structure 50, a normal projection of the conductive structure 50 on the substrate BS overlaps with a normal projection of the first partition structure 11 on the substrate BS.

[0157] As shown in FIG. 18A , the protective layer 55 covers the conductive structure 50 to avoid the conductive structure 50 being exposed to cause signal short. For example, the protective layer 55 can be made of inorganic insulating material. For example, the material of the protective layer 55 can be the same as the material of the passivation layer.

[0158] As shown in FIG. 18B , FIG. 18C , and FIG. 19A , for the first partition structure 11, the second partition part 11b has a protruding part PR1 protruding relative to the first partition part 11a, so that the light emitting functional layer FL is disconnected at the protruding part PR1. For example, the protruding part PR1 protrudes relative to the middle narrowed part of the first partition part 11a.

[0159] As shown in FIG. 19B , FIG. 17 , and FIG. 18A to FIG. 18C , the normal projection of the first partition part 11a on the substrate BS gradually decreases and then gradually increases in area.

[0160] As shown in FIG. 17 , FIG. 18A , and FIG. 18B , for the second partition structure 12, the fourth partition part 14 has a protruding part PR2 protruding relative to the third partition part 13, so that the light emitting functional layer FL is disconnected at the protruding part PR2. For example, the protruding part PR2 protrudes relative to the middle narrowed part of the first partition part 11a.

[0161] As shown in FIG. 18C , FIG. 17 , and FIG. 10 , the normal projection of the third partition part 13 on the substrate BS gradually decreases and then gradually increases in area.

[0162] As shown in FIG. 18AAs shown, in the display substrate DP34, a connection portion 61 is provided between the first partition portion 11a and the planarization layer PLN in the display area, and the planarization layer PLN and the first partition portion 11a are connected by the connection portion 61. The thickness of the connection portion 61 is less than the thickness of the planarization layer PLN, and the thickness of the connection portion 61 is less than the thickness of the first partition portion 11a. In some embodiments, the thickness of the planarization layer PLN is equal to the thickness of the first partition portion 11a. For example, the planarization layer PLN, the first partition portion 11a, and the connection portion 61 are an integral structure. Thus, the top of the conductive structure 50 can be covered by a larger amount of planarization material, preventing signal short circuits.

[0163] like FIG. 11A As shown, the method for manufacturing a display substrate includes the following steps.

[0164] Step S11: A planarization film PLF is formed on the insulating layer ILD; a first electrode E1, a second partition 11b, and a fourth partition 14 are formed on the planarization film PLF; and a pixel-defined pattern PDL is formed.

[0165] Step S12: Form the photoresist pattern PT1.

[0166] Step S13: Using the photoresist pattern PT1 as a mask, pattern the planarized thin film PLF.

[0167] Step S14: Peel off the photoresist pattern PT1 to form the first partition structure 11 and the second partition structure 12.

[0168] In step S13, patterning the planarized thin film PLF includes a dry etching process.

[0169] and FIG. 18B Compared to the method of manufacturing the display substrate shown, in FIG. 11B In the manufacturing method of the display substrate shown, the area where the first partition structure 11 is located is covered with a pixel definition intermediate pattern PDL0. During dry etching, the area where the first partition structure 11 is located is first etched with the pixel definition intermediate pattern PDL0, and then the planarization film PLF is etched. This allows the planarization layer PLN to remain above the conductive structure 50 when the etching process is completed, thus avoiding the conductive structure 50 from being exposed to avoid signal short circuits.

[0170] like FIG. 18C As shown, the display substrate includes four second partition structures 12. FIG. 11C Second partition structures 121, 122, 123, and 124 are shown. The number of second partition structures 12 included in the display substrate is not limited to those shown in the figures.

[0171] For example, such as FIG. 19AAs shown, the conductive structure 50 includes a data line DT or a power line PL1. The data line DT extends along the direction Y, and the power line PL1 extends along the direction Y. The data line DT or the power line PL1 is arranged along the direction X.

[0172] FIG. 12A The first electrode E1 and the first partition structure 11 are shown. As shown, the first partition structure 11 is in a mesh shape, and includes a plurality of openings 110, and the first electrode E1 is located in the openings 110. Each of the openings 110 can correspond to a sub-pixel. As shown, the first partition structure 11 surrounds the light-emitting region R0. In a plan view, the first partition structure 11 is located outside the light-emitting region R0, and has a spacing with the light-emitting region R0. FIG. 19B FIG. 12B

[0173] FIG. 17 A cross-sectional view of a display substrate provided for an embodiment of the present disclosure is shown. FIG. 18A to FIG. 18C A cross-sectional view of another display substrate provided for an embodiment of the present disclosure is shown. FIG. 13 A cross-sectional view of another display substrate provided for an embodiment of the present disclosure is shown. FIG. 14 to FIG. 16 A cross-sectional view of another display substrate provided for an embodiment of the present disclosure is shown. FIG. 17 A flowchart of a manufacturing process of a display substrate provided for an embodiment of the present disclosure is shown. FIG. 18A to FIG. 18C A flowchart of a manufacturing process of a display substrate provided for an embodiment of the present disclosure is shown.

[0174] FIG. 20 、 FIG. 21 A display substrate DP4 is shown, FIG. 20 A display substrate DP41 is shown, FIG. 22 A display substrate DP42 is shown, FIG. 20 A display substrate DP43 is shown, FIG. 23 A display substrate DP44 is shown.

[0175] FIG. 24 The display substrate DP41 shown is different from the display substrate DP31 shown in that the second partition portion 11b of the first partition structure 11 is an inorganic insulating material, and the fourth partition portion 14 of the second partition structure 12 is an inorganic insulating material, and the second partition portion 11b and the fourth partition portion 14 are both located in the passivation layer PVX. FIG. 23

[0176] The display substrate DP42 shown is different from the display substrate DP32 shown in that the second partition portion 11b of the first partition structure 11 is an inorganic insulating material, and the fourth partition portion 14 of the second partition structure 12 is an inorganic insulating material, and the second partition portion 11b and the fourth partition portion 14 are both located in the passivation layer PVX. FIG. 24 FIG. 20 The display substrate DP42 shown is different from the display substrate DP32 shown in that the second partition portion 11b of the first partition structure 11 is an inorganic insulating material, and the fourth partition portion 14 of the second partition structure 12 is an inorganic insulating material, and the second partition portion 11b and the fourth partition portion 14 are both located in the passivation layer PVX.​​​

[0177] FIG. 20 The display substrate DP43 shown is the same as the display substrate DP33 shown in FIG. 20 The second partition portion 11b of the first partition structure 11 and the fourth partition portion 14 of the second partition structure 12 are both inorganic insulating materials, and are both located in the passivation layer PVX, compared with the display substrate DP33 shown in

[0178] FIG. 20 The display substrate DP44 shown is the same as the display substrate DP34 shown in FIG. 20 The second partition portion 11b of the first partition structure 11 and the fourth partition portion 14 of the second partition structure 12 are both inorganic insulating materials, and are both located in the passivation layer PVX, compared with the display substrate DP34 shown in

[0179] In FIG. 20 , the passivation layer PVX, the first electrode E1, and the pixel definition pattern PDL are sequentially formed on the planarization film PLF, and the passivation layer PVX includes the second partition portion 11b and the fourth partition portion 14. The remaining steps can refer to the description of FIG. 20 .

[0180] In FIG. 20 , the passivation layer PVX, the first electrode E1, and the pixel definition pattern PDL are sequentially formed on the planarization film PLF, and the passivation layer PVX includes the second partition portion 11b and the fourth partition portion 14. The remaining steps can refer to the description of FIG. 21 .

[0181] For example, FIG. 20 , FIG. 20 The plan view of the second partition structure 12 in the display substrate DP4 shown can refer to FIG. 20 , the plan view of the first partition structure 11 in the display substrate DP4 can also refer to FIG. 22 .

[0182] For example, in FIG. 20 , FIG. 22In the illustrated display substrate DP4, the first partition structure 11 is made of an insulating material, the second partition structure 12 is made of an insulating material, the first partition portion 11a and the third partition portion 13 are made of an organic insulating material, and the second partition portion 11b and the fourth partition portion 14 are made of an inorganic insulating material. For example, the inorganic insulating material includes SiOx, SiNy, or SiOxNy. For example, the organic insulating material includes resin, but is not limited thereto. For example, the organic insulating material includes one or a combination of acrylic, polyethylene terephthalate, polyimide, polyamide, polycarbonate, epoxy resin, and the like. Of course, in other embodiments, the second partition portion 11b and the fourth partition portion 14 can also be made of a metal material or a conductive metal oxide.

[0183] FIG. 23 A cross-sectional view of a display substrate provided for an embodiment of the present disclosure. FIG. 23 For FIG. 4 A flowchart of manufacturing a display substrate. FIG. 23 For FIG. 23 A plan view of the second partition structure in the frame area of the illustrated display substrate. FIG. 23 A plan view of the first partition structure in the display area of the display substrate provided for an embodiment of the present disclosure. FIG. 23 A plan view of the first partition structure in the display area of the display substrate provided for an embodiment of the present disclosure. FIG. 23 And FIG. 23 May be FIG. 23 A plan view of the first partition structure in the illustrated display substrate.

[0184] As FIG. 23 Illustrated, the first partition structure 11 and the second partition structure 12 are different. The first partition structure 11 and the second partition structure 12 are different in material and structure.

[0185] As FIG. 24 Illustrated, in the first partition structure 11, the first partition portion 11a and the second partition portion 11b are both made of an organic insulating material, and the first partition portion 11a and the second partition portion 11b are an integral structure. The first partition portion 11a and the second partition portion 11b are located in the same layer as the pixel definition pattern PDL.

[0186] As FIG. 25A Illustrated, in the second partition structure 12, the third partition portion 13 is located in the same layer as the insulating layer ILD and is made of an inorganic insulating material, and the fourth partition portion 14 is located in the same layer as the first electrode E1 and is made of a conductive material.

[0187] For example, as FIG. 25AAs shown, the light-emitting functional layer FL is partitioned by the first partition structure 11, including a portion on the first partition structure 11 and another portion having a space from the portion. Because the light-emitting functional layer FL is partitioned by the first partition structure 11, crosstalk is avoided when the display substrate emits light.

[0188] For example, as shown in FIG. 1, the first electrode E1 is partitioned by the first partition structure 11, forming a portion on the first partition structure 11 and another portion having a space from the portion. FIG. 25A

[0189] For example, as shown in FIG. 1, the second electrode E2 is partitioned by the first partition structure 11, forming a portion on the first partition structure 11 and another portion having a space from the portion. FIG. 25B

[0190] For example, as shown in FIG. 1, the second electrode E2 is partitioned by the first partition structure 11, forming a portion on the first partition structure 11 and another portion having a space from the portion. FIG. 25B

[0191] As shown in FIG. 1, the display substrate DP5 is manufactured by the following steps. FIG. 25B

[0192] Step 101, sequentially forming the conductive part 61, the insulating film ILL and the planarization layer PLN.

[0193] Step 102, forming the passivation layer PVX.

[0194] Step 103, forming the first electrode E1 and the fourth partition part 14.

[0195] Step 104, forming the pixel definition pattern PDL.

[0196] Step 105, dry etching the passivation layer PVX and the insulating film ILL respectively with the pixel definition pattern PDL and the fourth partition part 14 as masks, forming the intermediate passivation layer PVX0 and the intermediate insulating layer ILL0.

[0197] Step 106, wet etching the intermediate passivation layer PVX0 and the intermediate insulating layer ILL0, forming the first partition structure 11 and the second partition structure 12.

[0198] For example, the conductive part 61 can be in the same layer as the gate of the thin film transistor.

[0199] For example, as shown in FIG. 1, the second partition structure 12 includes two sub-partition structures 12S, and the protruding parts PR2 of the two sub-partition structures 12S are oppositely arranged. FIG. 25A 21 For example, as shown in FIG. 1, the second partition structure 12 includes two sub-partition structures 12S, and the protruding parts PR2 of the two sub-partition structures 12S are oppositely arranged.​​​​​

[0200] FIG. 25B The display substrate shown can effectively realize compatibility of the first partition structure, the second partition structure, and the Tandem process.

[0201] FIG. 25A The first partition structure 11 and the second partition structure 12 in the display substrate DP5 shown include parts formed by synchronous etching, and have good process compatibility.

[0202] FIG. 25B Four second partition structures 12 are shown. The second partition structures 12 are annularly arranged around the hole region R2.

[0203] As shown in FIG. 25A and FIG. 25B , the orthogonal projection of the second partition structure 12 on the substrate substrate overlaps the orthogonal projection of the conductive part 61 on the substrate substrate. Further, for example, the orthogonal projection of the second partition structure 12 on the substrate substrate falls completely within the orthogonal projection of the conductive part 61 on the substrate substrate.

[0204] As shown in FIG. 25B , the first partition structure 11 is arranged outside the light-emitting region R0 of the light-emitting element, and the first partition structure 11 has a gap 1101, so that the first partition structure 11 is an annular structure with the gap 1101.

[0205] For example, due to the arrangement of the gap 1101, the light-emitting functional layer of the adjacent sub-pixel is continuous at the gap 1101, and the second electrode of the light-emitting element is continuous at the gap 1101.

[0206] As shown in FIG. 14 to FIG. 16 , the first electrode E1 has a main body part E11 and a connecting part E12, the orthogonal projection of the main body part E11 on the substrate substrate overlaps the orthogonal projection of the light-emitting region R0 on the substrate substrate, and the connecting part E12 is configured to be connected to other components. For example, the connecting part E12 is connected to the thin film transistor T0. Referring to FIG. 23 and FIG. 24 , the orthogonal projection of the connecting part E12 on the substrate substrate overlaps the orthogonal projection of the via V0 on the substrate substrate. As shown in FIG. 25A , the connecting part E12 is located at the gap 1101.

[0207] As shown in FIG. 25BAs shown, the display substrate includes a first sub-pixel 201, a second sub-pixel 202, a third sub-pixel 203, and a fourth sub-pixel 204. For example, one of the first sub-pixel 201 and the third sub-pixel 203 may be a blue sub-pixel, and the other may be a red sub-pixel. The second sub-pixel 202 and the fourth sub-pixel 204 may be sub-pixels of the same color, for example, both may be green sub-pixels. The emission colors of the first sub-pixel 201, the second sub-pixel 202, the third sub-pixel 203, and the fourth sub-pixel 204 can be determined as needed.

[0208] like FIG. 26 As shown, the first sub-pixel 201, the second sub-pixel 202, the third sub-pixel 203, and the fourth sub-pixel 204 constitute a repeating unit. The second sub-pixel 202 and the fourth sub-pixel 204 are located on both sides of the center line connecting the first sub-pixel 201 and the third sub-pixel 203. The openings of the first partition structure 11 outside the second sub-pixel 202 and the first partition structure 11 outside the fourth sub-pixel 204 have the same orientation. The openings of the first partition structure 11 outside the first sub-pixel 201 and the first partition structure 11 outside the third sub-pixel 203 also have the same orientation.

[0209] like FIG. 26 As shown, the opening orientations of the first partition structure 11 outside the second sub-pixel 202 and the first partition structure 11 outside the fourth sub-pixel 204 are different from the opening orientations of the first partition structure 11 outside the first sub-pixel 201 and the first partition structure 11 outside the third sub-pixel 203. FIG. 26 As shown, the opening orientations of the first partition structure 11 outside the second sub-pixel 202 and the first partition structure 11 outside the fourth sub-pixel 204 are opposite to the opening orientations of the first partition structure 11 outside the first sub-pixel 201 and the first partition structure 11 outside the third sub-pixel 203.

[0210] like FIG. 26 As shown, the openings of the first partition structure 11 outside the second sub-pixel 202 and the first partition structure 11 outside the fourth sub-pixel 204 both face upwards, while the openings of the first partition structure 11 outside the first sub-pixel 201 and the first partition structure 11 outside the third sub-pixel 203 both face downwards.

[0211] For example, such as FIG. 1 As shown, the first partition structure 11 is located at one corner of the light-emitting area R0. For example, the light-emitting area R0 includes four corners, and the first partition structure 11 is provided at each of the three corners of the light-emitting area R0. For example, the orthographic projection of the first partition structure 11 on the substrate BS surrounds at least half of the orthographic projection of the light-emitting area R0 on the substrate BS. For example, the orthographic projection of the first partition structure 11 on the substrate BS surrounds at least three-quarters of the orthographic projection of the light-emitting area R0 on the substrate BS.

[0212] For example, such as FIG. 27 As shown, the orthographic projection of the conductive structure 50 on the substrate BS overlaps with the orthographic projection of the first partition structure 11 on the substrate BS. The conductive structure 50 includes a data line DT or a power line PL1. The data line DT extends along the Y direction, and the power line PL1 extends along the Y direction. The data line DT or the power line PL1 are arranged along the X direction.

[0213] In embodiments of this disclosure, a conductive structure 50 may also be provided below the first partition structure 11 of other display substrates, and is not limited to the figure showing the conductive structure 50. The conductive structure 50 may be a power line, data line, or other wire, or a structure such as the electrode plate of a capacitor.

[0214] FIG. 27 This is a plan view of another display substrate provided according to an embodiment of the present disclosure. The display substrate provided according to an embodiment of the present disclosure, such as... FIG. 27 As shown, the first partition structure 11 is annular and is arranged in a ring around the light-emitting area R0. The second electrode E2 is continuous at the protrusion of the first partition structure 11 to facilitate signal transmission on the second electrodes E2 of different sub-pixels. The cross-sectional view of the first partition structure 11 is shown previously.

[0215] like FIG. 27 As shown, the light-emitting area R0 of each sub-pixel SP is surrounded by a first partition structure 11.

[0216] FIG. 27 This is a plan view of another display substrate provided according to an embodiment of the present disclosure. The display substrate provided according to an embodiment of the present disclosure, such as... FIG. 27 As shown, the first partition structure 11 includes at least one partition substructure 01, and the orthographic projection of the at least one partition substructure 01 on the substrate BS surrounds at least half of the orthographic projection of the light-emitting region R0 on the substrate BS.

[0217] like FIG. 13 As shown, the light-emitting area R0 of each sub-pixel SP is surrounded by three or four partition substructures 01. The number of partition substructures 01 can be determined as needed.

[0218] like FIG. 22 and FIG. 4As shown, the display substrate includes a first sub-pixel 201, a second sub-pixel 202, a third sub-pixel 203, and a fourth sub-pixel 204. For example, one of the first sub-pixel 201 and the third sub-pixel 203 may be a blue sub-pixel, and the other may be a red sub-pixel. The second sub-pixel 202 and the fourth sub-pixel 204 may be sub-pixels of the same color, for example, both may be green sub-pixels. The emission colors of the first sub-pixel 201, the second sub-pixel 202, the third sub-pixel 203, and the fourth sub-pixel 204 can be determined as needed.

[0219] For example, such as FIG. 5B and FIG. 7 As shown, a first sub-pixel 201, a second sub-pixel 202, a third sub-pixel 203, and a fourth sub-pixel 204 constitute a repeating unit RP. In a repeating unit RP, the second sub-pixel 202 and the fourth sub-pixel 204 are respectively located on both sides of the center line CL connecting the first sub-pixel 201 and the third sub-pixel 203. FIG. 20 and FIG. 4 The center C1 of the first sub-pixel 201 and the center C2 of the third sub-pixel 203 are shown. Correspondingly, the first sub-pixel 201 and the third sub-pixel 203 are also located on both sides of the line connecting the centers of the second sub-pixel 202 and the fourth sub-pixel 204.

[0220] For example, in other embodiments, only one partition structure is provided between two adjacent sub-pixels, thereby reducing the width of the gap between two adjacent sub-pixels to increase pixel density.

[0221] FIG. 5A and ​ Spacer 58 is also shown. Spacer 58 is configured to support a fine metal mask during the fabrication of the light-emitting layer.

[0222] As shown, the spacer 58 is located in the area enclosed by the first sub-pixel 201, the second sub-pixel 202, the third sub-pixel 203, and the fourth sub-pixel 204.

[0223] like ​ As shown, a spacer 58 is provided between the first sub-pixel 201 and the third sub-pixel 203 arranged in the second direction Y.

[0224] Some of the accompanying figures illustrate directions X and Y. Direction X intersects direction Y. For example, direction X is perpendicular to direction Y. Both direction X and direction Y are parallel to the main surface of the substrate. For example, direction Z is perpendicular to direction X and perpendicular to direction Y.

[0225] Apart from ​ , ​ , ​ , ​、 ​ The first partition structure 11 can also adopt other suitable forms.

[0226] ​ A schematic diagram of a light emitting element in a display substrate provided by an embodiment of the present disclosure is shown. ​ As shown, the display substrate provided by an embodiment of the present disclosure includes a light emitting functional layer FL, which includes a charge generation layer 40, a first light emitting layer 41 and a second light emitting layer 42 arranged in a stack, the first light emitting layer 41 is located between the first electrode E1 and the charge generation layer 40, the second light emitting layer 42 is located between the second electrode E2 and the charge generation layer 40, and the charge generation layer 40 is disconnected at the first partition structure 11. Since the charge generation layer 40 is disconnected at the first partition structure 11, the propagation path of the charges is longer, and the resistance of the charge generation layer in the light emitting functional layer is larger, which can effectively avoid the crosstalk between adjacent sub-pixels.

[0227] For example, in some embodiments, in addition to the charge generation layer 40 being disconnected at the protruding portion PR1, the sub-functional layer between the charge generation layer 40 and the first electrode E1 is also disconnected at the protruding portion PR1, while the sub-functional layer between the charge generation layer 40 and the second electrode E2 is not disconnected at the protruding portion PR1. In other embodiments, in addition to the charge generation layer 40 being disconnected at the protruding portion PR1, the sub-functional layer between the charge generation layer 40 and the first electrode E1 is also disconnected at the protruding portion PR1, while the sub-functional layer between the charge generation layer 40 and the second electrode E2 is also disconnected at the protruding portion PR1, in which case, each sub-functional layer of the light emitting functional layer FL is disconnected at the protruding portion PR1.

[0228] As shown, the display substrate provided by an embodiment of the present disclosure includes a light emitting functional layer FL, which includes a charge generation layer 40, a first light emitting layer 41 and a second light emitting layer 42 arranged in a stack, the first light emitting layer 41 is located between the first electrode E1 and the charge generation layer 40, the second light emitting layer 42 is located between the second electrode E2 and the charge generation layer 40, and the charge generation layer 40 is disconnected at the first partition structure 11. Since the charge generation layer 40 is disconnected at the first partition structure 11, the propagation path of the charges is longer, and the resistance of the charge generation layer in the light emitting functional layer is larger, which can effectively avoid the crosstalk between adjacent sub-pixels. ​ As shown, the display substrate provided by an embodiment of the present disclosure includes a light emitting functional layer FL, which includes a charge generation layer 40, a first light emitting layer 41 and a second light emitting layer 42 arranged in a stack, the first light emitting layer 41 is located between the first electrode E1 and the charge generation layer 40, the second light emitting layer 42 is located between the second electrode E2 and the charge generation layer 40, and the charge generation layer 40 is disconnected at the first partition structure 11. Since the charge generation layer 40 is disconnected at the first partition structure 11, the propagation path of the charges is longer, and the resistance of the charge generation layer in the light emitting functional layer is larger, which can effectively avoid the crosstalk between adjacent sub-pixels.

[0229] ​ As shown, the first charge transport layer 51 is a hole transport layer HTL, and the second charge transport layer 52 is an electron transport layer ETL. The remaining structures can be referred to the description of ​ .

[0230] ​ A schematic diagram of a pixel circuit and a light emitting element in a display substrate. ​ For example, a 7T1C pixel circuit is described. It should be noted that the pixel circuit is not limited to ​ the one shown, and can be set as needed. For example, ​ ​As shown, the display substrate includes sub-pixels SP, and each sub-pixel includes a pixel circuit PXC and a light-emitting element EMC. The light-emitting element EMC includes a first electrode E1, a second electrode E2, and a light-emitting functional layer located between the first electrode E1 and the second electrode E2. The pixel circuit PXC includes transistors and a storage capacitor Cst. For example, the transistors include transistors T1-T7, and the storage capacitor Cst includes plates Ca1 and Cb1. ​ It also shows the gate line GT providing the scan signal SCAN, the data line DT providing the data signal DATA, the light emission control signal line EML providing the light emission control signal EM, the power supply line PL1 providing the power supply voltage VDD, the power supply line PL2 providing the power supply voltage VSS, the reset control signal line RST1 providing the reset signal RESET, the reset control signal line RST2 providing the scan signal SCAN, the initialization signal line INT1 providing the initialization signal Vinit1, and the initialization signal line INT2 providing the initialization signal Vinit2.

[0231] For example, such as ​ As shown, transistor T1 is the driving transistor, transistor T2 is the data writing transistor, transistor T3 is the threshold compensation transistor, transistor T4 is the light-emitting control transistor, transistor T5 is the light-emitting control transistor, transistor T6 is the reset control transistor, and transistor T7 is the reset control transistor.

[0232] For example, such as ​ and ​ As shown, the second partition structure 12 is annular to surround the hole area R2.

[0233] For example, such as ​ , ​ , ​ ,and ​ As shown, the second electrode E2 is disconnected at the protrusion PR2 of the second partition structure 12.

[0234] For example, such as ​ , ​ , FIG. 10 , FIG. 11 A , FIG. 11 B , FIG. 17 , FIG. 18A , FIG. 18B and FIG. 20 As shown, the second electrode E2 is continuous at the protrusion PR1.

[0235] For example, such as FIG. 14 As shown, the first partition structure 11 is ring-shaped and continuously arranged around the light-emitting area.

[0236] For example, such as FIG. 24 As shown, the first partition structure 11 has a notch 1101.

[0237] For example, as shown in FIG. 4 and FIG. 7 , the size of the first partition portion 11a in the direction perpendicular to the substrate base plate BS is smaller than the size of the second partition portion 11b in the direction perpendicular to the substrate base plate BS.

[0238] For example, as shown in FIG. 10 , FIG. 11 A to FIG. 11 C , FIG. 17 , FIG. 18A to FIG. 18C , and FIG. 20 , the size of the first partition portion 11a in the direction perpendicular to the substrate base plate BS is larger than the size of the second partition portion 11b in the direction perpendicular to the substrate base plate BS.

[0239] For example, as shown in FIG. 4 and FIG. 7 , the size of the first partition portion 11a in the direction perpendicular to the substrate base plate BS is smaller than the size of the third partition portion 13 in the direction perpendicular to the substrate base plate BS.

[0240] For example, as shown in FIG. 4 , FIG. 7 , FIG. 10 , FIG. 11 A to FIG. 11 C , FIG. 17 , and FIG. 18A to FIG. 18C , the second partition portion 11b and the fourth partition portion 14 are located in the same layer.

[0241] For example, as shown in FIG. 20 , the second partition portion 11b and the fourth partition portion 14 are located in different layers and are made of different materials.

[0242] For example, as shown in FIG. 10 , FIG. 11 A to FIG. 11 C , FIG. 17 , and FIG. 18A to FIG. 18C , the first partition structure 11 and the second partition structure 12 have the same layer structure.

[0243] For example, as shown in FIG. 4 , FIG. 7 , and FIG. 20 , the first partition structure 11 and the second partition structure 12 have different layer structures.

[0244] For example, as shown in FIG. 4 and FIG. 7 , the first partition portion 11a includes a number of film layers that is less than or equal to the number of film layers included by the third partition portion 13.

[0245] For example, as shown in FIG. 4As shown, the material of the first partition structure 11 includes an electrically conductive material, and the material of the second partition structure 12 includes an electrically conductive material. For example, the electrically conductive material includes a metal and an electrically conductive metal oxide.

[0246] For example, as shown in FIG. 1A, the material of the first partition structure 11 includes an inorganic insulating material, and the material of the second partition structure 12 includes an inorganic insulating material. FIG. 7

[0247] For example, as shown in FIG. 1A, the material of the first partition structure 11 includes an inorganic insulating material, and the material of the second partition structure 12 includes an inorganic insulating material. FIG. 10 FIG. 11 A to FIG. 11 C FIG. 17 The material of the first partition portion 11a and the material of the second partition portion 11b are different, the material of the third partition portion 13 and the material of the fourth partition portion 14 are different, the material of the first partition portion 11a and the material of the third partition portion 13 are the same, and the material of the second partition portion 11b and the material of the fourth partition portion 14 are the same. FIG. 18A to FIG. 18C The material of the first partition portion 11a and the material of the third partition portion 13 include an organic material, and the material of the second partition portion 11b and the material of the fourth partition portion 14 include an inorganic insulating material.

[0248] FIG. 17 The material of the first partition portion 11a and the material of the third partition portion 13 include an organic material, and the material of the second partition portion 11b and the material of the fourth partition portion 14 include an inorganic insulating material. FIG. 18A to FIG. 18C The material of the first partition portion 11a and the material of the third partition portion 13 include an organic material, and the material of the second partition portion 11b and the material of the fourth partition portion 14 include an inorganic insulating material.

[0249] FIG. 10 The material of the first partition portion 11a and the material of the third partition portion 13 include an organic material, and the material of the second partition portion 11b and the material of the fourth partition portion 14 include an inorganic insulating material. FIG. 11 A to FIG. 11 C The material of the first partition portion 11a and the material of the third partition portion 13 include an organic material, and the material of the second partition portion 11b and the material of the fourth partition portion 14 include an inorganic insulating material.

[0250] FIG. 20 The material of the first partition portion 11a and the material of the third partition portion 13 include an organic material, and the material of the second partition portion 11b and the material of the fourth partition portion 14 include an inorganic insulating material.

[0251] The material of the first partition portion 11a and the material of the second partition portion 11b are in an integral structure. FIG. 20 The material of the first partition portion 11a and the material of the second partition portion 11b are in an integral structure.

[0252] The material of the first partition portion 11a and the material of the second partition portion 11b are in an integral structure. FIG. 4 The material of the first partition portion 11a and the material of the second partition portion 11b are in an integral structure. FIG. 7 The material of the first partition portion 11a and the material of the second partition portion 11b are in an integral structure. FIG. 10 The material of the first partition portion 11a and the material of the second partition portion 11b are in an integral structure. FIG. 11 A to FIG. 11 C The material of the first partition portion 11a and the material of the second partition portion 11b are in an integral structure. FIG. 17 The material of the first partition portion 11a and the material of the second partition portion 11b are in an integral structure. FIG. 18A to FIG. 18C The material of the first partition portion 11a and the material of the second partition portion 11b are in an integral structure.

[0253] ​​​​​​For example, in embodiments of the present disclosure, the inorganic insulating material includes SiOx, SiNy, or SiOxNy. For example, the conductive material includes a metal or a conductive metal oxide. For example, the organic insulating material includes a combination of one or more of acrylic, polyethylene terephthalate, polyimide, polyamide, polycarbonate, epoxy resin, etc.

[0254] For example, as shown in FIG. 1, the second partition structure 12 is provided in a plurality of forms. The second partition structure 12 further includes a fifth partition portion 15, and the material of the fifth partition portion 15 includes a conductive material. The fifth partition portions 15 of the plurality of second partition structures 12 are in an integrated structure, and the plurality of fourth partition portions 14 are sequentially arranged around the hole region R2. The conductive portion 61 is the fifth partition portion 15. FIG. 20

[0255] For example, as shown in FIG. 1, the second partition structure 12 is provided in a plurality of forms. The second partition structure 12 further includes a fifth partition portion 15, and the material of the fifth partition portion 15 includes a conductive material. The fifth partition portions 15 of the plurality of second partition structures 12 are in an integrated structure, and the plurality of fourth partition portions 14 are sequentially arranged around the hole region R2. The conductive portion 61 is the fifth partition portion 15. FIG. 4 FIG. 7 FIG. 10 FIG. 11 A to FIG. 11 C FIG. 17 FIG. 18A to FIG. 18C FIG. 20 For example, as shown in FIG. 1, the first partition structure 11 is in a T shape.

[0256] For example, the second electrode E2 is a cathode of the light-emitting element, and the first electrode E1 is an anode of the light-emitting element. In some embodiments, the display substrate forms a common cathode structure. In the case where the second electrode E2 is a continuous electrode covering the entire surface and is not disconnected by the partition structure, it is beneficial to reduce the resistance of the second electrode E2 and facilitate signal transmission on the second electrode E2.

[0257] For example, in embodiments of the present disclosure, the first electrodes E1 of different sub-pixels are insulated from each other, and the first electrodes E1 of different sub-pixels are independently arranged and can be applied with different signals. The second electrodes E2 of different sub-pixels are connected to each other and can be applied with the same signal.

[0258] In embodiments of the present disclosure, for the second partition structure 12 located in the frame region, FIG. 4 and FIG. 7 For example, the structure of the second partition structure 12 located on both sides of the barrier dam 17 is described by way of example. In other embodiments, the structures of the second partition structure 12 located on both sides of the barrier dam 17 can also be different, so that the second electrode E2 is partitioned on the outside of the barrier dam 17 (the left side of the barrier dam 17 in the figure) and is not partitioned on the inside of the barrier dam 17 (the right side of the barrier dam 17 in the figure), or so that the second electrode E2 is not partitioned on the outside of the barrier dam 17 (the left side of the barrier dam 17 in the figure) and is partitioned on the inside of the barrier dam 17 (the right side of the barrier dam 17 in the figure).

[0259] ​​​​​​​Depending on actual needs, the isolation of the second electrode E2 by the first isolation structure 11 and the second isolation structure 12 can be achieved by controlling process conditions or by adding process steps. Whether the second electrode E2 is isolated at the first isolation structure 11 or the second isolation structure 12 can also be achieved by adjusting the process.

[0260] For example, such as FIG. 4 and FIG. 7 As shown, the thickness of the first partition structure 11 in the direction perpendicular to the substrate BS is less than the thickness of the planarization layer PLN in the direction perpendicular to the substrate BS.

[0261] For example, such as FIG. 10 , FIG. 11 A to FIG. 11 C , FIG. 17 , FIG. 18A to FIG. 18C As shown, the maximum thickness of the first partition structure 11 in the direction perpendicular to the substrate BS is less than the maximum thickness of the planarization layer PLN in the direction perpendicular to the substrate BS.

[0262] For example, such as FIG. 10 , FIG. 11 A to FIG. 11 C , FIG. 17 , FIG. 18A to FIG. 18C As shown, the maximum thickness of the first partition structure 11 in the direction perpendicular to the substrate BS is less than the maximum thickness of the planarization layer PLN in the direction perpendicular to the substrate BS.

[0263] For example, such as FIG. 20 As shown, the maximum thickness of the first partition structure 11 in the direction perpendicular to the substrate BS is equal to the maximum thickness of the pixel-defined pattern PDL in the direction perpendicular to the substrate BS.

[0264] For example, such as FIG. 10 , FIG. 11 A to FIG. 11 C , FIG. 17 , FIG. 18A to FIG. 18C As shown, the side of the first partition 11a is arc-shaped with a relatively gentle transition, which facilitates the placement of the second electrode E2 on the side of the first partition 11a. The material of the second electrode E2 is usually metal or alloy, which has good climbing performance. In other embodiments, the shape of the side of the first partition 11a can also be adjusted.

[0265] For example, organic materials include, but are not limited to, resins. For example, organic materials include one or more of acrylic or polyethylene terephthalate, polyimide, polyamide, polycarbonate, epoxy resin, etc.

[0266] The display substrate provided in some embodiments of this disclosure can effectively achieve simultaneous etching of the first partition structure and the second partition structure, with good process compatibility.

[0267] The display substrate provided in some embodiments of this disclosure has a first partition structure and a second partition structure that can be formed by etching after all backplane processes are completed, eliminating the risk of adhesive coating hole halo.

[0268] For example, in embodiments of this disclosure, components located on the same layer can be formed from the same film layer using the same patterning process. In embodiments of this disclosure, the patterning or patterning process may include only photolithography, or it may include both photolithography and etching steps, or it may include other processes such as printing or inkjet printing for forming a predetermined pattern. Photolithography refers to processes including film formation, exposure, and development, using photoresist, photomasks, and exposure machines to form patterns. The appropriate patterning process can be selected based on the structure formed in the embodiments of this disclosure.

[0269] For example, in embodiments of this disclosure, the thickness of a component refers to the dimension of the component in a direction perpendicular to the substrate.

[0270] For example, in embodiments of this disclosure, the substrate BS, buffer layer BF, insulating layer GI1, insulating layer GI2, insulating layer ILD, planarization layer PLN, and spacer PS are all made of insulating materials. For example, the material of the substrate BS includes polyimide, but is not limited to this. For example, the materials of the buffer layer BF, insulating layer GI1, insulating layer GI2, and insulating layer ILD include inorganic insulating materials. For example, the materials of the planarization layer PLN, pixel-defined pattern PDL, and spacer PS include organic insulating materials. For example, inorganic insulating materials include at least one of silicon oxide, silicon nitride, and silicon oxynitride. For example, organic insulating materials include one or a combination of acrylic, polyethylene terephthalate, polyimide, polyamide, polycarbonate, epoxy resin, etc.

[0271] For example, insulating layer GI1 can also be called gate insulating layer, insulating layer GI2 can also be called gate insulating layer, and insulating layer ILD can also be called interlayer insulating layer.

[0272] In the accompanying drawings of this disclosure, if (a) is shown on the left and (b) is shown on the right, then (a) represents the display area and (b) represents the border area.

[0273] Embodiments of this disclosure also provide a display device including any of the above-described display substrates.

[0274] FIG. 28 This is a schematic diagram of a display device provided according to an embodiment of the present disclosure. FIG. 28 As shown, the display device 500 includes a display substrate 100. The display substrate 100 is any of the display substrates described above. The display substrate mentioned in the embodiments of this disclosure may also be referred to as a display panel. For example, the display substrate may be a flexible display substrate, but is not limited thereto.

[0275] In one aspect, the display substrate (display panel) avoids crosstalk between adjacent sub-pixels by providing a partition structure between adjacent sub-pixels and making at least one sub-functional layer in the light-emitting functional layer, for example, a charge generation layer, to be disconnected at the position of the partition structure, so as to avoid the higher-conductivity sub-functional layer (for example, the charge generation layer) from causing crosstalk between adjacent sub-pixels. Thus, the display device including the display substrate can also avoid crosstalk between adjacent sub-pixels, and thus has a higher product yield and higher display quality.

[0276] On the other hand, the display substrate can employ a Tandem structure to improve the pixel density. Thus, the display device including the display substrate has the advantages of long service life, low power consumption, high brightness, high resolution, and the like.

[0277] For example, the display device can be a display device such as an organic light-emitting diode display device, and any product or component having a display function, such as a television, a digital camera, a mobile phone, a watch, a tablet computer, a notebook computer, a navigator, and the like, and the embodiments of the present disclosure include but are not limited to the above.

[0278] The above merely describes specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical scope disclosed by the present disclosure, and all such changes or replacements should be encompassed within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

1. A display substrate, comprising: A substrate, comprising a hole region, a display region, and a border region located between the hole region and the display region; Multiple sub-pixels are located in the display area. Each sub-pixel includes a light-emitting element. The light-emitting element has a light-emitting area. The light-emitting element includes a first electrode, a light-emitting functional layer, and a second electrode. The second electrode is located on the side of the light-emitting functional layer away from the substrate. The first electrode is located on the side of the light-emitting functional layer close to the substrate. The light-emitting functional layer includes multiple sub-functional layers. A first partition structure, located in the display area, includes a first partition portion and a second partition portion stacked together, wherein the first partition portion is located on the side of the second partition portion closer to the substrate; and The second partition structure is located in the frame area and includes a third partition portion and a fourth partition portion stacked together, wherein the third partition portion is located on the side of the fourth partition portion closer to the substrate. The second partition portion has a first protrusion that protrudes relative to the first partition portion, and at least one sub-functional layer of the light-emitting functional layer is disconnected at the first protrusion. The fourth partition has a second protrusion that protrudes relative to the third partition, and at least one sub-functional layer of the light-emitting functional layer is disconnected at the second protrusion. The first partition structure surrounds the light-emitting area; The second partition structure is annular to surround the hole area. The second partition structure is configured in multiple ways, and the second partition structure also includes a fifth partition part. The material of the fifth partition part includes a conductive material. The fifth partition parts of the multiple second partition structures are an integral structure, and the multiple fourth partition parts are arranged sequentially around the hole area.

2. The display substrate according to claim 1, wherein, The second electrode is continuous at the first protrusion, and the first partition structure is arranged in a ring.

3. The display substrate according to claim 1, wherein, The first partition structure is ring-shaped and continuously arranged.

4. The display substrate according to claim 1, wherein, The first partition structure has a notch, the first electrode has a main body and a connecting part, the orthographic projection of the main body on the substrate overlaps with the orthographic projection of the light-emitting area on the substrate, and the connecting part is located at the notch.

5. The display substrate according to claim 1, further comprising an encapsulation layer, wherein, The encapsulation layer includes a first encapsulation layer, a second encapsulation layer, and a third encapsulation layer, which are arranged sequentially. The first encapsulation layer is closer to the substrate than the third encapsulation layer. The first encapsulation layer and the third encapsulation layer have a stacked contact portion. Multiple second partition structures are provided. The orthographic projection of one of the multiple second partition structures on the substrate overlaps with the orthographic projection of the second encapsulation layer on the substrate. The orthographic projection of another of the multiple second partition structures on the substrate overlaps with the orthographic projection of the stacked contact portion on the substrate.

6. The display substrate according to claim 1, further comprising a barrier dam, wherein, The barrier dam is located in the border area, and the second partition structure includes a plurality of second partition structures located on both sides of the barrier dam.

7. The display substrate according to claim 1, wherein, The thickness of the second partition is greater than the thickness of the first partition.

8. The display substrate according to claim 1, wherein, The ratio of the thickness of the first partition portion to the thickness of the second partition portion is greater than or equal to 0.25 and less than or equal to 1.

9. The display substrate according to claim 1, wherein, The dimension of the first partition portion in the direction perpendicular to the substrate is smaller than the dimension of the third partition portion in the direction perpendicular to the substrate.

10. The display substrate according to claim 1, wherein, The second partition and the fourth partition are located on the same layer.

11. The display substrate according to claim 1, wherein, The first partition structure and the second partition structure have the same layer structure.

12. The display substrate according to claim 1, wherein, The number of membrane layers included in the first partition is less than or equal to the number of membrane layers included in the third partition.

13. The display substrate according to claim 1, wherein, The first partition structure is made of a conductive material, and the second partition structure is made of a conductive material.

14. The display substrate according to claim 13, wherein, The conductive material includes metals and conductive metal oxides.

15. The display substrate according to claim 14, wherein, The second partition and the fourth partition are located on the same layer, and the third partition includes a portion located on the same layer as the first partition.

16. The display substrate according to claim 1, wherein, The material of the first partition structure includes inorganic insulating material, and the material of the second partition structure includes inorganic insulating material.

17. The display substrate according to claim 1, wherein, The first partition and the second partition are made of different materials, the third partition and the fourth partition are made of different materials, the first partition and the third partition are made of the same material, and the second partition and the fourth partition are made of the same material.

18. The display substrate according to claim 1, wherein, The materials of the first partition and the third partition include organic materials, while the materials of the second partition and the fourth partition include inorganic insulating materials.

19. The display substrate according to claim 1, wherein, The materials of the first partition and the third partition include organic insulating materials, while the materials of the second partition and the fourth partition include conductive materials.

20. The display substrate according to claim 1, wherein, The material of the first partition includes an organic insulating material, the material of the second partition includes an organic insulating material, the material of the third partition includes an inorganic insulating material, and the material of the fourth partition includes a conductive material.

21. The display substrate according to claim 20, wherein, The first partition and the second partition are an integral structure.

22. The display substrate according to claim 20, wherein, The second partition structure includes two sub-partition structures, with the second protrusions of the two sub-partition structures arranged opposite to each other.

23. The display substrate according to any one of claims 1-22, wherein, The orthographic projections of the third and fourth partition portions on the substrate completely fall within the orthographic projection of the fifth partition portion of the integral structure on the substrate.

24. The display substrate according to claim 1, further comprising a conductive structure, wherein, The orthographic projection of the conductive structure on the substrate overlaps with the orthographic projection of the first partition structure on the substrate.

25. The display substrate according to claim 24, wherein, The conductive structure includes a data line or a power line.

26. The display substrate according to any one of claims 1-22, 24-25, wherein, The first partition structure is T-shaped.

27. The display substrate according to any one of claims 1-22, 24-25, wherein, The first partition structure includes at least one partition substructure, wherein the orthographic projection of the at least one partition substructure on the substrate surrounds at least half of the orthographic projection of the light-emitting area on the substrate.

28. A display device comprising the display substrate according to any one of claims 1-27.

Images