Random permutation generator and distributed particle filtering method and accelerator based on it

Abstract

The present invention discloses a random permutation generator, a distributed particle filtering method based on the same, and an accelerator. The random permutation generator includes a random number generator, a selector, and a register. The random number generator generates a uniformly distributed random number N, where 0 <= N < Mlog2M. The Mlog2M input data of the selector are respectively Mlog2M given binary sequences, which are pre-obtained by cyclically shifting the sequence S by 0 to Mlog2M - 1 times. The sequence S is the binary concatenation sequence of M data to be re-randomly permuted. The selector selects the corresponding sequence from the Mlog2M input data according to the random number N and outputs it to the register for storage. The binary sequence stored in the register is divided equally into M data, which is the binary representation of the generated new random permutation. The present invention can be completed within a single clock cycle, greatly reducing the delay, and does not involve any arithmetic operations, thereby reducing the resource utilization.

Description

Technical Field

[0001] The present invention relates to digital circuits, and in particular to a random permutation generator and a distributed particle filtering method and an accelerator based thereon. Background Art

[0002] A random permutation is a set of variables that are rearranged in a random order. For example, {1,3,2} and {3,2,1} are two different random permutations of the three variables [1,2,3]. Many artificial intelligence algorithms, such as Bayesian learning, and applications require the use of random permutation generators, such as coding, cryptography, and Monte Carlo simulation [1].

[0003] There are n! random permutations of n variables. When n is large, the number of permutations increases dramatically. Therefore, it is often very difficult to design a simple and efficient method and circuit implementation to generate all permutations. However, most real-world applications do not require the use of all permutations. As long as each variable can appear in different positions in the generated permutation with equal probability, the application requirements can be met, such as the Monte Carlo sampling algorithm used in computer simulation [2].

[0004] Most of the existing random permutation generation methods are aimed at generating full permutations. Therefore, when the number of variables n increases, the computational efficiency is often low, and a large amount of circuit resources and running time are consumed, which is not suitable for real-time systems used in edge computing. For example, most of the current full permutation generation circuits are based on the Knuth Shuffle algorithm (Table 1) [3], which has a complexity of O(n 2 ), and involves operations such as remainder and exchange. The corresponding hardware implementation circuit is as follows Figure 1 As shown in Figure 1, a total of n-1 stages of circuits are required, so the total delay is n clock cycles, and each stage of the circuit requires a random number generator, a remainder circuit, and an n-input selector.

[0005] It can be seen that when n=4, the circuit implementation is already quite complicated.

[0006]

[0007] The existing random permutation generation method is mainly used to generate full permutations. When the number of variables n increases, it has the following main problems: 1) The algorithm complexity is high, which is O(n 2 ), resulting in low computing efficiency; 2) consumes a large amount of circuit resources; 3) requires n-1 levels of circuit implementation, so the total delay is (n), and the circuit delay is large; 4) is not suitable for edge computing scenarios in real-time systems. Summary of the Invention

[0008] In view of the problems existing in the random full permutation generation method in the prior art and the fact that full permutations are not required in many real-world applications, the present invention provides a random permutation generator, a distributed particle filtering method based thereon, and an FPGA device, which greatly reduce latency and do not involve any arithmetic operations, thereby reducing resource utilization.

[0009] To achieve the above technical objectives, the present invention adopts the following technical solutions:

[0010] A random permutation generator includes: a random number generator, a selector, and a register for storing Mlog2M bits of binary numbers; the random number generator generates uniformly distributed random numbers N, where 0 <= N < Mlog2M; the Mlog2M input data of the selector are respectively Mlog2M given binary sequences, which are pre-obtained by cyclically shifting the sequence S 0 to Mlog2M - 1 times; the sequence S is the binary sequence of M data to be randomly permuted again; the selector selects from the Mlog2M input data according to the random number N and outputs it to the register for storage; the M data obtained by bisecting the binary sequence S' stored in the register are the binary representation of the randomly generated permutation again.

[0011] Further, when M reaches a preset large value, the selector is implemented by a hierarchical selector.

[0012] Further, the random number generator is implemented by a linear feedback shift register.

[0013] Further, the register is implemented by Mlog2M sequentially cyclically connected flip-flops.

[0014] A distributed particle filtering method based on the random permutation generator according to any of the above technical solutions includes:

[0015] S1. Let the number of parallel computing units be k and the total number of particles be K. Divide both the particle buffer and the weight buffer into k blocks. Each computing unit processes one block. Correspondingly, each particle buffer block stores K / k particles, and each weight buffer block stores K / k weights;

[0016] S2. Store the K particles in the k buffer blocks of the first particle buffer MEM1 respectively. The sampling and weight calculation unit performs sampling and weight update operations on K / k particles in parallel, stores the sampled particles in the second particle buffer MEM2, and stores the updated weights in the weight buffer;

[0017] S3. The resampling unit performs local resampling in parallel according to the updated weights, and stores the resampled index values in k index buffer blocks respectively;

[0018] S4, using the values ​​of the k index buffers as read addresses, reading the addresses of the new particles in the second particle buffer MEM2, using the addresses of the k particles read as initial data, performing random permutation using the random permutation generator, and using the addresses of the k particles obtained by random permutation as write addresses, rewriting them into the first particle buffer MEM1;

[0019] S5, repeating steps S2, S3, and S4 until the particle filter has completed a preset number of cycles.

[0020] A distributed particle filter accelerator comprises a calculation module, a random permutation generator, a first particle buffer MEM1, a second particle buffer MEM2, a weight buffer and an index buffer. The calculation module comprises k particle sampling units, k weight calculation units and k resampling units, with one-to-one correspondence between input and output. The distributed particle filter accelerator is used in the distributed particle filtering method described in the above technical solution.

[0021] Beneficial effects

[0022] The random permutation generator based on selector implementation proposed in the present invention can be completed within a single clock cycle, greatly reducing the circuit delay; when the random permutation generator based on selector implementation is applied to distributed particle filtering, it can meet the performance requirements of the algorithm, significantly reduce the use of circuit resources and improve the speed and operating frequency of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 4-variable random permutation generation circuit based on Knuth Shuffle algorithm;

[0024] Figure 2 The selector-based 4-variable optimized random permutation generator described in Example 1;

[0025] Figure 3 The distributed particle filter accelerator described in Example 3. DETAILED DESCRIPTION

[0026] The following is a detailed description of an embodiment of the present invention. This embodiment is based on the technical solution of the present invention, provides a detailed implementation method and a specific operation process, and further explains the technical solution of the present invention.

[0027] Example 1

[0028] This embodiment provides a random permutation generator, which includes: a random number generator, a selector, and a register for storing Mlog2M bits of binary numbers; the random number generator generates a uniformly distributed random number N, and 0 <= N < Mlog2M; the Mlog2M input data of the selector are respectively Mlog2M given binary sequences, which are obtained by cyclically shifting the sequence S 0 to Mlog2M - 1 times in advance; the sequence S is the binary sequence of M data to be randomly permuted again; the selector selects from the Mlog2M input data according to the random number N and outputs it to the register for storage; the M data obtained by splitting the binary sequence S' stored in the register are the binary representation of the regenerated random permutation.

[0029] Figure 2 The circuit diagram when M = 4 consists of Mlog2M = 4 * 2 flip - flops to form an 8 - bit register, which is used to store the binary connection sequence 11100100 of the original data {3, 2, 1, 0}. The random number generator uses a Linear Feedback Shift Registers (LFSR) to generate a random number N with a uniform distribution. The 8 inputs of the selector are respectively 8 given sequences, which are 8 sequences obtained by cyclically shifting the original data sequence 11100100 0 to 7 bits in advance: 11100100, 01110010, 00111001, 10011100, 01001110, 00100111, 10010011, 11001001. It should be noted that the sequences obtained by this shift operation are not obtained by on - site shift operations, but are pre - shifted and given as the inputs of the selector. Specifically, in the FPGA, a Look - Up Table (LUT) is used to implement the given inputs of the selector. After the random number generator generates the random number N, according to the value of N, one corresponding to N is selected from Mlog2M = 8 permutations as the new random permutation output. The correspondence between the random number N and the permutation is as Figure 2 shown. When the random number N is determined, the selector can immediately select and output the new random permutation in the current cycle.

[0030] Compared with the traditional random permutation that generates all M! permutation numbers, the total number of permutations that can be randomly selected and output in this embodiment is Mlog2M. And since the probability of generating each random number in the RNG is equal, which is 1 / Mlog2M, it can be ensured that all Mlog2M permutations can appear, and the probability of each permutation appearing is equal. Thus, it meets the requirement that each variable appears at different positions in the generated permutation with equal probability.

[0031] Compared to the traditional random permutation principle (Algorithm 1), this embodiment's selector-based random permutation generator eliminates the need for a for loop. Instead, it simply selects the input to generate a new random permutation. Furthermore, no shifting is required, and the circuit delay is zero, meaning a new random permutation can be generated within a single cycle.

[0032] Since the selector implementation requires a selector where Mlog2M selects 1, the selector consumes significant resources when M is large. Therefore, in a preferred embodiment, when M is large, i.e., reaches a preset value, a hierarchical selector can be used to reduce circuit resource consumption and increase the circuit's operating clock frequency.

[0033] The random permutation generator based on the selector in this embodiment is compared with the circuit implementation schemes of two traditional random permutation methods in the literature [3], namely, the random permutation generator based on the factorial number system and the random permutation generator based on the Knuth Shuffle algorithm. The comparison of the circuit resource usage of the three schemes when implemented on FPGA is shown in the following table:

[0034]

[0035] The above results show that the two traditional random permutation methods use a lot of circuit resources, especially the method based on the factorial number system, which uses 39802 LUTs and 5349 registers when M = 32. The random permutation generator based on the selector in this embodiment reduces circuit resource usage compared to traditional methods and is particularly suitable for situations with high latency requirements.

[0036] Example 2

[0037] The distributed particle filter calculation process is shown in the figure. Compared with traditional particle filtering, the distributed particle filter divides K particles into k parts and performs sampling, weight update, and resampling calculations in parallel within k computing units, thereby achieving the effect of improving calculation speed. However, if the particle filter algorithm is only operated in parallel, the resampling step will only operate on a local set of particles, resulting in the degradation of the particle set weights. That is, the sum of the weights of some particle sets will become smaller and smaller, resulting in invalid calculations, while the sum of the weights of other particle sets will become larger and larger. As a result, the filtering effect and algorithm performance of the entire particle filter algorithm are affected, resulting in a significant reduction in algorithm accuracy. Even if the distributed particle filter can achieve an accelerated effect, its significance is lost.

[0038] Therefore, in order to ensure the algorithm performance of the distributed particle filter, it is necessary to perform sufficient interaction on the entire particle set after each iteration, that is, to ensure that the particles can be redistributed evenly within each computing unit. To solve this problem, the present embodiment applies the proposed optimized random permutation generator to the particle interaction operation after resampling to ensure that particles are exchanged with equal probability in each computing unit, thereby making the distributed particle filter and the standard particle filter have the same algorithm accuracy. Since the particle interaction step of the distributed particle filter algorithm does not require the use of the full permutation of the random permutation generator, the distributed particle filter method of this embodiment uses the optimized random permutation generator proposed in the above embodiment to greatly reduce the use of circuit resources and improve the speed and operating frequency of the circuit while meeting the requirements of algorithm performance.

[0039] like Figure 3 As shown, this embodiment is based on the distributed particle filtering method of the aforementioned optimized random permutation generator, comprising the following steps:

[0040] S1, assuming the number of parallel computing units is k, the total number of particles is K, and the particle buffer and weight buffer are divided into k blocks. Each computing unit processes one block. Accordingly, each particle buffer block stores K / k particles, and each weight buffer block stores K / k weights.

[0041] S2, K particles are stored in k cache blocks of the first particle buffer MEM1 respectively, the sampling and weight calculation unit performs sampling and weight update operations on K / k particles in parallel, the sampled particles are stored in the second particle buffer MEM2, and the updated weights are stored in the weight buffer;

[0042] S3, the resampling unit performs local resampling in parallel according to the updated weights, and the resampled index values ​​are stored in k index cache blocks respectively;

[0043] S4, using the values ​​of the k index buffers as read addresses, read the addresses of the new particles in the second particle buffer MEM2, use the read addresses of the k particles as initial data, use the random permutation generator described in Example 1 to perform random permutation, use the addresses of the k particles obtained by random permutation as write addresses, and rewrite them into the first particle buffer MEM1. Execute this step until all the new particles are read, thereby achieving random interaction operations on the resampled particles.

[0044] S5, repeating steps S2, S3, and S4 until the particle filter has completed a preset number of cycles.

[0045] Example 3

[0046] This embodiment provides a distributed particle filter accelerator, which is implemented based on an FPGA and includes a computing module, a random permutation generator, a first particle buffer MEM1, a second particle buffer MEM2, a weight buffer, and an index buffer. The computing module includes k particle sampling units, k weight calculation units, and k resampling units with a one-to-one correspondence between input and output. The FPGA device is used to implement the distributed particle filtering method described in Example 2.

[0047] The above embodiments are preferred embodiments of the present application. Ordinary technicians in this field can also make various changes or improvements on this basis. Without departing from the overall concept of the present application, these changes or improvements should fall within the scope of protection required by the present application.

[0048] References:

[0049] [1]http: / / www.techuser.net / randpermgen.html

[0050] [2] Liu, Shuanglong, Grigorios Mingas, and Christos-Savvas Bouganis. "Parallel resampling for particle filters on FPGAs." 2014InternationalConference on Field-Programmable Technology (FPT). IEEE, 2014.

[0051] [3]Butler, Jon T., and Tsutomu Sasao. "Hardware index to permutationconverter." 2012IEEE 26th International Parallel and Distributed ProcessingSymposium Workshops&PhD Forum.IEEE, 2012.

Claims

1. A random permutation generator, characterized in that Comprising: A random number generator, a selector, and a register for storing an Mlog2M-bit binary number; the random number generator generates a uniformly distributed random number N, where 0 <= N < Mlog2M; the Mlog2M input data of the selector are respectively given Mlog2M binary sequences, which are pre-obtained by cyclically shifting the sequence S 0 to Mlog2M - 1 times; the sequence S is the binary sequence of M data to be re-randomly arranged; the selector selects from the Mlog2M input data according to the random number N and outputs it to the register for storage; the M data obtained by bisecting the binary sequence S' stored in the register are the binary representations of the re-generated randomly arranged data.

2. The random permutation generator according to claim 1, characterized in that When M reaches a preset value, the selector is implemented by a hierarchical selector.

3. The random permutation generator according to claim 1, wherein The random number generator is implemented by a linear feedback shift register.

4. The random permutation generator according to claim 1, wherein The register is implemented by Mlog2M sequentially cyclically connected flip-flops.

5. A distributed particle filtering method based on the random permutation generator according to any one of claims 1 to 4, characterized in that: Comprising: S1. Let the number of parallel computing units be k and the total number of particles be K. Divide both the particle buffer and the weight buffer into k blocks. Each computing unit processes 1 block. Correspondingly, each particle buffer block stores K / k particles, and each weight buffer block stores K / k weights. S2. Store the K particles in the k buffer blocks of the first particle buffer (MEM1) respectively. The sampling and weight calculation units perform sampling and weight update operations on K / k particles in parallel, store the sampled particles in the second particle buffer (MEM2), and store the updated weights in the weight buffer. S3. The resampling unit performs local resampling in parallel according to the updated weights, and stores the resampled index values in k index buffer blocks respectively. S4. Use the values in the k index buffers as read addresses to read the addresses of the new particles in the second particle buffer (MEM2). Take the addresses of the k particles read as initial data, perform random permutation using the said random permutation generator, and use the addresses of the k randomly permuted particles as write addresses to rewrite them into the first particle buffer (MEM1). S5. Repeat steps S2, S3, and S4 until the preset number of cycles of the particle filter is completed.

6. A distributed particle filter accelerator, comprising a computing module, a random permutation generator, a first particle buffer (MEM1), a second particle buffer (MEM2), a weight buffer, and an index buffer, wherein the computing module comprises k particle sampling units, k weight calculation units, and k resampling units, each with a one-to-one correspondence between input and output; characterized in that: The distributed particle filter accelerator is used to implement the distributed particle filter method recited in claim 5.

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