Display panel and driving method thereof, and computer readable storage medium

Abstract

The embodiment of the present application provides a display panel and a driving method thereof, and a computer-readable storage medium, wherein the display panel includes multiple partitions and multiple trigger signal lines, one partition corresponds to one trigger signal line; each partition includes at least one sub-pixel row and a gate drive circuit connected to at least one sub-pixel row, and the gate drive circuit of each partition is electrically connected to the corresponding trigger signal line; in the first display mode, the trigger signal lines corresponding to at least two partitions respectively provide trigger signals of different frequencies, so that at least two partitions display pictures with different refresh frequencies. The embodiment of the present application can realize that the display panel displays pictures with multiple refresh frequencies at the same time.

Description

Technical Field

[0001] The present application belongs to the field of display technology, and in particular, relates to a display panel and a driving method thereof, and a computer-readable storage medium. Background Art

[0002] Currently, display panels or display devices support dynamic refresh rate display, that is, they can switch between multiple refresh rates, such as 1 to 120 Hz, but currently only support simultaneous switching of the entire screen.

[0003] However, with the development of technology, it may be possible to have multiple display scenes on one screen in the future, and the current full-screen switching frequency cannot meet this demand. Summary of the invention

[0004] The embodiments of the present application provide a display panel and a driving method thereof, and a computer-readable storage medium, which can enable the display panel to display images with multiple refresh frequencies at the same time.

[0005] In a first aspect, an embodiment of the present application provides a display panel, which includes multiple partitions and multiple trigger signal lines, one partition corresponds to one trigger signal line; each partition includes at least one sub-pixel row and a gate drive circuit connected to at least one sub-pixel row, and the gate drive circuit of each partition is electrically connected to the corresponding trigger signal line; in a first display mode, the trigger signal lines corresponding to at least two partitions respectively provide trigger signals of different frequencies, so that at least two partitions display images with different refresh frequencies.

[0006] According to an implementation manner of the first aspect of the present application, the display panel is electrically connected to a driving chip, and the driving chip is used to: in a first display mode, identify a target sub-pixel row corresponding to a boundary line between a first refresh frequency screen and a second refresh frequency screen; determine a target partition where the target sub-pixel row is located; when the target sub-pixel row is an intermediate sub-pixel row in the target partition, and a first frequency corresponding to the first refresh frequency screen is greater than a second frequency corresponding to the second refresh frequency screen, provide a trigger signal of a first frequency to a trigger signal line corresponding to the target partition, so that the target partition is displayed at the first refresh frequency; the intermediate sub-pixel row is a sub-pixel row in the target partition except for the first sub-pixel row in the target partition and the last sub-pixel row in the target partition; when the target sub-pixel row is an intermediate sub-pixel row in the target partition, and a second frequency corresponding to the second refresh frequency screen is greater than the first frequency corresponding to the first refresh frequency screen, provide a trigger signal of a second frequency to a trigger signal line corresponding to the target partition, so that the target partition is displayed at the second refresh frequency.

[0007] In this way, for the target partition where the dividing line between the first refresh frequency screen and the second refresh frequency screen is located, it is displayed at the higher refresh frequency of the first refresh frequency and the second refresh frequency, that is, the low-frequency screen is displayed at the high frequency, and the high-frequency screen is not displayed at the low frequency, which can avoid the problem of freeze and image smoothness when the target partition displays the first refresh frequency screen or the second refresh frequency screen.

[0008] According to any of the aforementioned embodiments of the first aspect of the present application, the driving chip is also used to: when the target sub-pixel row is the first sub-pixel row in the target partition or the last sub-pixel row in the target partition, determine whether the target partition corresponds to displaying a first refresh frequency image or a second refresh frequency image; when the target partition corresponds to displaying a first refresh frequency image, provide a trigger signal of a first frequency to a trigger signal line corresponding to the target partition so that the target partition displays the first refresh frequency image; when the target partition corresponds to displaying a second refresh frequency image, provide a trigger signal of a second frequency to a trigger signal line corresponding to the target partition so that the target partition displays the second refresh frequency image.

[0009] In this way, when the dividing line of the screens with different refresh rates coincides with the dividing line of the actual partitions, each partition can be accurately controlled to display the corresponding refresh rate screen, ensuring that the display panel has a better display effect and effectively avoiding freezes or unsmooth screen problems.

[0010] According to any of the aforementioned embodiments of the first aspect of the present application, the display panel also includes a clock signal line, and the gate driving circuits in multiple partitions share the clock signal line; the frequency of the clock signal transmitted by the clock signal line is a third frequency; for the first partition in which the refresh frequency of the displayed image is lower than the third frequency, only part of the frames provide the clock signal to the gate driving circuit in the first partition.

[0011] In this way, the clock signal lines corresponding to the multiple partitions can be multiplexed, thereby reducing the number and / or length of the clock signal lines in the display panel, saving wiring space, and reducing production costs.

[0012] According to any of the aforementioned embodiments of the first aspect of the present application, for a second partition whose refresh frequency of a displayed image is greater than or equal to a third frequency, all frames provide a clock signal to a gate driving circuit in the second partition.

[0013] According to any of the aforementioned embodiments of the first aspect of the present application, the trigger signal lines corresponding to at least two partitions are multiplexed, and the at least two partitions include a first target partition and a second target partition, and the first target partition and the second target partition each include at least one partition; when the first target partition is displayed, the trigger signal line provides a trigger signal of a first target frequency to the gate drive circuit in the first target partition; when the second target partition is displayed, the trigger signal line provides a trigger signal of a second target frequency to the gate drive circuit in the second target partition, and the first target frequency is different from the second target frequency.

[0014] In this way, by outputting trigger signals of different frequencies in different time periods through the trigger signal line, the trigger signal lines corresponding to at least two partitions can be multiplexed, thereby reducing the number and / or length of the trigger signal lines in the display panel, saving wiring space, and reducing production costs.

[0015] According to any of the aforementioned embodiments of the first aspect of the present application, the gate drive circuit includes a plurality of cascaded shift registers; the display panel also includes a switch module, and the switch module is connected between the last-stage shift register of the first partition and the first-stage shift register of the second partition in any two adjacent partitions; in the second display mode, the switch module is turned on, and the plurality of partitions display images with the same refresh frequency.

[0016] In this way, by setting the switch module, when in the second display mode, the switch module is turned on, so that multiple partitions can display pictures with the same refresh frequency.

[0017] According to any of the aforementioned implementations of the first aspect of the present application, in the first display mode, the switch module is turned off.

[0018] Thus, in the first display mode, the switch module can be turned off, so that different partitions can display pictures with different refresh frequencies.

[0019] According to any of the aforementioned embodiments of the first aspect of the present application, the switching module includes a switching transistor, a gate of the switching transistor is electrically connected to the control signal line, a first electrode of the switching transistor is electrically connected to the output end of the last-stage shift register of the first partition among two adjacent partitions, and a first electrode of the switching transistor is electrically connected to the input end of the first-stage shift register of the second partition among two adjacent partitions.

[0020] In a second aspect, an embodiment of the present application provides a method for driving a display panel, and the driving method is applied to the display panel provided in the first aspect. The driving method includes: in a first display mode, providing trigger signals of different frequencies to trigger signal lines corresponding to at least two partitions, so that at least two partitions display images with different refresh frequencies.

[0021] According to any of the aforementioned embodiments of the second aspect of the present application, in the first display mode, trigger signals of different frequencies are provided to the trigger signal lines corresponding to at least two partitions, specifically including: in the first display mode, identifying the target sub-pixel row corresponding to the boundary line between the first refresh frequency picture and the second refresh frequency picture; determining the target partition where the target sub-pixel row is located; when the target sub-pixel row is the middle sub-pixel row in the target partition, and the first frequency corresponding to the first refresh frequency picture is greater than the second frequency corresponding to the second refresh frequency picture, providing a trigger signal of the first frequency to the trigger signal line corresponding to the target partition, so that the target partition is displayed at the first refresh frequency; the middle sub-pixel row is the sub-pixel row in the target partition except the first sub-pixel row in the target partition and the last sub-pixel row in the target partition; when the target sub-pixel row is the middle sub-pixel row in the target partition, and the second frequency corresponding to the second refresh frequency picture is greater than the first frequency corresponding to the first refresh frequency picture, providing a trigger signal of the second frequency to the trigger signal line corresponding to the target partition, so that the target partition is displayed at the second refresh frequency.

[0022] According to any of the aforementioned embodiments of the second aspect of the present application, the gate drive circuit includes a plurality of cascaded shift registers; the display panel also includes a switch module, and the switch module is connected between the last-stage shift register of the first partition and the first-stage shift register of the second partition in any two adjacent partitions; the driving method also includes: in the second display mode, providing a trigger signal to the trigger signal line corresponding to the first partition in the display panel, and controlling the switch module to be turned on, so that the multiple partitions display the picture with the same refresh frequency; or, in the second display mode, providing a trigger signal of the same frequency to the trigger signal line corresponding to each of the multiple partitions, so that the multiple partitions display the picture with the same refresh frequency.

[0023] In a third aspect, an embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the display panel driving method provided in the second aspect are implemented.

[0024] The display panel and driving method thereof, and computer-readable storage medium of the embodiment of the present application, the display panel includes multiple partitions and multiple trigger signal lines, one partition corresponds to one trigger signal line; each partition includes at least one sub-pixel row and a gate drive circuit connected to at least one sub-pixel row, and the gate drive circuit of each partition is electrically connected to the corresponding trigger signal line; in the first display mode, the trigger signal lines corresponding to at least two partitions provide trigger signals of different frequencies, so that at least two partitions display pictures with different refresh frequencies. Therefore, the display panel of the embodiment of the present application is divided into multiple partitions, and since the trigger signal lines corresponding to different partitions can provide trigger signals of different frequencies to the corresponding partitions, different partitions can display pictures with different refresh frequencies, so that the display panel can display pictures with multiple refresh frequencies at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solution of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0026] Figure 1 A schematic diagram of the structure of a display panel provided in an embodiment of the present application;

[0027] Figure 2 A partial circuit diagram of a display panel provided in an embodiment of the present application;

[0028] Figure 3 A schematic diagram of an operation of a display panel provided in an embodiment of the present application;

[0029] Figure 4 A schematic diagram of a process of connecting a driver chip to a display panel provided in an embodiment of the present application;

[0030] Figure 5 Another operation schematic diagram of the display panel provided in the embodiment of the present application;

[0031] Figure 6 Another schematic diagram of a process of connecting a driver chip to a display panel provided in an embodiment of the present application;

[0032] Figure 7 A further operation schematic diagram of a display panel provided in an embodiment of the present application;

[0033] Figure 8 A circuit diagram of a display panel provided in an embodiment of the present application;

[0034] Fig. 9 A schematic diagram of another partial circuit of a display panel provided in an embodiment of the present application;

[0035] Fig.10 A schematic diagram of a flow chart of a method for driving a display panel provided in an embodiment of the present application;

[0036] Fig.11 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0037] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by illustrating the examples of the present application.

[0038] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0039] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0040] It should be noted that the transistor in the embodiment of the present application can be an N-type transistor or a P-type transistor. For an N-type transistor, the on-level is a high level and the off-level is a low level. That is, when the gate of the N-type transistor is at a high level, the first and second poles thereof are connected, and when the gate of the N-type transistor is at a low level, the first and second poles thereof are disconnected. For a P-type transistor, the on-level is a low level and the off-level is a high level. That is, when the control pole of the P-type transistor is at a low level, the first and second poles thereof are connected, and when the control terminal of the P-type transistor is at a high level, the first and second poles thereof are disconnected. In a specific implementation, the gate of each of the above-mentioned transistors is used as its control pole, and, according to the signal of the gate of each transistor and its type, the first pole thereof can be used as the source and the second pole as the drain, or the first pole thereof can be used as the drain and the second pole as the source, and no distinction is made here. In addition, the on-level and the off-level in the embodiment of the present invention are both general terms, and the on-level refers to any level that can turn on the transistor, and the off-level refers to any level that can turn off / turn off the transistor.

[0041] In the embodiments of the present application, the term “electrically connected” may refer to a direct electrical connection between two components, or may refer to an electrical connection between two components via one or more other components.

[0042] It is obvious to those skilled in the art that various modifications and changes can be made in the present application without departing from the spirit or scope of the present application. Therefore, the present application is intended to cover modifications and changes of the present application that fall within the scope of the corresponding claims (technical solutions for protection) and their equivalents. It should be noted that the implementation methods provided in the embodiments of the present application can be combined with each other without contradiction.

[0043] Before describing the technical solutions provided by the embodiments of the present application, in order to facilitate the understanding of the embodiments of the present application, the present application first specifically describes the problems existing in the related art:

[0044] Currently, display panels or display devices support dynamic refresh rate display, that is, they can switch between multiple refresh rates, such as 1 to 120 Hz, but currently only support simultaneous switching of the entire screen, that is, full-screen switching frequency.

[0045] However, with the development of technology, such as the emergence of foldable screens, it may be possible to have multiple display scenes on one screen in the future, and the current full-screen switching frequency cannot meet this demand.

[0046] In view of the above research findings of the inventors, the embodiments of the present application provide a display panel and a driving method thereof, and a computer-readable storage medium, which can solve the technical problem existing in the related art that the display panel cannot simultaneously display images with multiple refresh rates.

[0047] The technical concept of the embodiment of the present application is: the display panel is divided into multiple partitions, each partition corresponds to a trigger signal line; each partition includes at least one sub-pixel row and a gate drive circuit connected to at least one sub-pixel row, and the gate drive circuit of each partition is electrically connected to the corresponding trigger signal line; in the first display mode, the trigger signal lines corresponding to at least two partitions provide trigger signals of different frequencies, so that at least two partitions display pictures with different refresh frequencies. In this way, since the trigger signal lines corresponding to different partitions can provide trigger signals of different frequencies to their corresponding partitions, different partitions can display pictures with different refresh frequencies, so that the display panel can display pictures with multiple refresh frequencies at the same time.

[0048] The following first introduces the display panel provided in the embodiment of the present application.

[0049] Figure 1 A schematic diagram of the structure of a display panel provided in an embodiment of the present application. Figure 1 As shown, the display panel 10 provided in the embodiment of the present application may include a plurality of partitions 110 and a plurality of trigger signal lines SIN1 to SINn. Wherein, n is a positive integer. Wherein, the plurality of partitions 110 may be equally divided or unequally divided, and the embodiment of the present application is not limited to this. A partition 110 may correspond to a trigger signal line SIN. Each partition 110 may include at least one sub-pixel row 120 and a gate drive circuit 130 connected to at least one sub-pixel row 120. Wherein, a sub-pixel row 120 may include a plurality of sub-pixels arranged in sequence along the row direction X. The gate drive circuit 130 in each partition 110 may be electrically connected to the corresponding trigger signal line SIN. For example, the gate drive circuit 130 in the first partition 110 may be electrically connected to the trigger signal line SIN1, the gate drive circuit 130 in the second partition 110 may be electrically connected to the trigger signal line SIN1, and so on, the gate drive circuit 130 in the nth partition 110 may be electrically connected to the trigger signal line SINn.

[0050] Figure 2 A partial circuit diagram of a display panel provided in an embodiment of the present application. Figure 2 As shown, the gate driving circuit 130 in each partition 110 may include a plurality of cascaded shift registers 130a. The plurality of cascaded shift registers 130a may be arranged in sequence along the column direction Y. The input end of the first shift register 130a in the gate driving circuit 130 may be electrically connected to the trigger signal line SIN for receiving a trigger signal provided by the trigger signal line SIN. The output end of the i-th shift register 130a in the gate driving circuit 130 is electrically connected to the input end of the i+1-th shift register 130a, where i is a positive integer. Figure 2Taking the first partition 110 and the second partition 110 as an example, for example, the gate drive circuit 130 in the first partition 110 may be electrically connected to the trigger signal line SIN1, and the gate drive circuit 130 in the second partition 110 may be electrically connected to the trigger signal line SIN1. In some embodiments, the gate drive circuits 130 in different partitions 110 may not be connected to each other. For example, the output end of the last stage shift register 130a in the first partition 110 may not be electrically connected to the input end of the first stage shift register 130a in the second partition 110.

[0051] In the first display mode, the trigger signal lines SIN corresponding to the at least two partitions 110 provide trigger signals of different frequencies, so that the at least two partitions 110 display images of different refresh frequencies.

[0052] Specifically, the first display mode can be understood as a split-screen display mode or a multi-refresh frequency display mode. The second display mode in the following text can be understood as a full-screen display mode or a single refresh frequency display mode. In the embodiment of the present application, the refresh frequency and the frequency can be understood as the same meaning, and the units are both Hertz. In the first display mode, the trigger signal lines SIN corresponding to at least two partitions 110 can provide trigger signals of different frequencies to the gate drive circuit 130 in the corresponding partition, such as the trigger signal line SIN1 provides a trigger signal of a first frequency to the gate drive circuit 130 in the first partition 110, and the trigger signal line SIN2 provides a trigger signal of a second frequency to the gate drive circuit 130 in the first partition 110, and the first frequency is different from the second frequency. Under the action of the trigger signal, the gate drive circuit 130 starts to work, and the shift registers 130a at all levels in the gate drive circuit 130 output scanning signals or light control signals in sequence. Since at least two partitions 110 receive trigger signals of different frequencies, at least two partitions 110 can display pictures with different refresh frequencies, so that the display panel can display pictures with multiple refresh frequencies at the same time.

[0053] In some embodiments of the present application, optionally, the gate driving circuit 130 may include a scanning driving circuit (i.e., Scan driving circuit) and / or a light emitting control driving circuit (i.e., EM driving circuit). The scanning driving circuit may be used to output a scanning signal, and the light emitting control driving circuit may be used to output a light emitting control signal, which is not limited in the embodiments of the present application.

[0054] The display panel of the embodiment of the present application includes a plurality of partitions and a plurality of trigger signal lines, one partition corresponds to a trigger signal line; each partition includes at least one sub-pixel row and a gate drive circuit connected to at least one sub-pixel row, and the gate drive circuit of each partition is electrically connected to the corresponding trigger signal line; in the first display mode, the trigger signal lines corresponding to at least two partitions provide trigger signals of different frequencies, so that at least two partitions display pictures with different refresh frequencies. Therefore, the display panel of the embodiment of the present application is divided into a plurality of partitions, and since the trigger signal lines corresponding to different partitions can provide trigger signals of different frequencies to the corresponding partitions, different partitions can display pictures with different refresh frequencies, so that the display panel can display pictures with multiple refresh frequencies at the same time.

[0055] The inventor of the present application further considered that the positions of the circuit structures of the multiple partitions in the display panel are fixed, but the positions of the pictures displayed by the display panel are not fixed. For example, the boundary between the first refresh rate picture and the second refresh rate picture is located exactly in the middle of a certain partition. In this case, how to drive the partition display to ensure the display quality is a difficult problem.

[0056] Figure 3 An operation schematic diagram of a display panel provided in an embodiment of the present application. Figure 4 A schematic diagram of a process of connecting a display panel to a driver chip provided in an embodiment of the present application. Figure 3 and Figure 4 As shown, according to some embodiments of the present application, optionally, the display panel 10 may be electrically connected to the driving chip 20. The driving chip 20 may be used to perform the following steps S401 to S404.

[0057] S401 . In a first display mode, identifying a target sub-pixel row corresponding to a boundary line between a first refresh rate picture and a second refresh rate picture.

[0058] It is easy to understand that in the first display mode, part of the area in the display panel can display the first refresh rate picture, and another part of the area can display the second refresh rate picture. Among them, the first refresh rate picture is a picture displayed at the first refresh rate, and the second refresh rate picture is a picture displayed at the second refresh rate. In S401, it can be determined that the dividing line (or dividing line) f between the first refresh rate picture and the second refresh rate picture is specifically the sub-pixel row in the display panel. For the convenience of distinction, the sub-pixel row corresponding to the dividing line f between the first refresh rate picture and the second refresh rate picture is called the target sub-pixel row.

[0059] S402: Determine the target partition where the target sub-pixel row is located.

[0060] like Figure 3As shown, for example, in some examples, the display panel 10 may include three partitions 110, and the three partitions 110 are arranged in sequence along the column direction Y. The target sub-pixel row is located in the second partition, for example, then the second partition is the target partition.

[0061] S403. When the target sub-pixel row is the middle sub-pixel row in the target partition and the first frequency corresponding to the first refresh frequency picture is greater than the second frequency corresponding to the second refresh frequency picture, a trigger signal of the first frequency is provided to the trigger signal line corresponding to the target partition so that the target partition is displayed at the first refresh frequency.

[0062] The middle sub-pixel rows in the target partition are sub-pixel rows in the target partition except the first sub-pixel row in the target partition and the last sub-pixel row in the target partition. For example, the target partition includes M sub-pixel rows, where M is a positive integer. The middle sub-pixel rows in the target partition may be the 2nd sub-pixel row to the M-1th sub-pixel row.

[0063] like Figure 3 As shown, when the target sub-pixel row is one of the middle sub-pixel rows in the second partition 110, if the first frequency corresponding to the first refresh frequency screen is greater than the second frequency corresponding to the second refresh frequency screen, that is, the first refresh frequency is greater than the second refresh frequency, then a trigger signal of the first frequency can be provided to the trigger signal line SIN2 corresponding to the second partition 110, so that the second partition 100 is displayed at the first refresh frequency. In addition, the first partition 110 can be displayed at the first refresh frequency, and the third partition 110 can be displayed at the second refresh frequency.

[0064] S404. When the target sub-pixel row is the middle sub-pixel row in the target partition and the second frequency corresponding to the second refresh frequency picture is greater than the first frequency corresponding to the first refresh frequency picture, a trigger signal of the second frequency is provided to the trigger signal line corresponding to the target partition so that the target partition is displayed at the second refresh frequency.

[0065] like Figure 3 As shown, when the target sub-pixel row is one of the middle sub-pixel rows in the second partition 110, if the second frequency corresponding to the second refresh frequency picture is greater than the first frequency corresponding to the first refresh frequency picture, that is, the second refresh frequency is greater than the first refresh frequency, then a trigger signal of the second frequency can be provided to the trigger signal line SIN2 corresponding to the second partition 110, so that the second partition 100 is displayed at the second refresh frequency. In addition, the first partition 110 can be displayed at the first refresh frequency, and the third partition 110 can be displayed at the second refresh frequency.

[0066] The inventor of the present application has found that if a high refresh rate screen is displayed at a low refresh rate, problems such as freeze and uneven screen may occur. In the embodiment of the present application, the target partition where the boundary between the first refresh rate screen and the second refresh rate screen is located is displayed at the higher refresh rate of the first refresh rate and the second refresh rate, that is, the low-frequency screen is displayed at a high frequency, and the high-frequency screen is not displayed at a low frequency, which can avoid freeze and uneven screen when the target partition displays the first refresh rate screen or the second refresh rate screen.

[0067] It should be noted that the embodiment of the present application can not only support two refresh rate displays at the same time, but also support more than two refresh rate displays at the same time. Figure 5 Another operation schematic diagram of the display panel provided in the embodiment of the present application. Figure 5 As shown, in some specific embodiments, the display panel 10 may optionally include more than three partitions 110, such as eight partitions 110, and the more than three partitions 110 are arranged in sequence along the column direction Y. The boundary line (or boundary line) f1 between the first refresh rate picture and the second refresh rate picture may be located in the third partition 110, and the boundary line (or boundary line) f2 between the second refresh rate picture and the third refresh rate picture may be located in the sixth partition 110.

[0068] If the first frequency corresponding to the first refresh frequency screen is greater than the second frequency corresponding to the second refresh frequency screen, that is, the first refresh frequency is greater than the second refresh frequency, a trigger signal of the first frequency may be provided to the trigger signal line SIN corresponding to the third partition 110, so that the third partition 100 is displayed at the first refresh frequency. If the second frequency corresponding to the second refresh frequency screen is greater than the first frequency corresponding to the first refresh frequency screen, that is, the second refresh frequency is greater than the first refresh frequency, a trigger signal of the second frequency may be provided to the trigger signal line SIN corresponding to the third partition 110, so that the third partition 100 is displayed at the second refresh frequency.

[0069] If the second frequency corresponding to the second refresh frequency screen is greater than the third frequency corresponding to the third refresh frequency screen, that is, the second refresh frequency is greater than the third refresh frequency, a trigger signal of the second frequency may be provided to the trigger signal line SIN corresponding to the sixth partition 110, so that the sixth partition 100 is displayed at the second refresh frequency. If the third frequency corresponding to the third refresh frequency screen is greater than the second frequency corresponding to the second refresh frequency screen, that is, the third refresh frequency is greater than the second refresh frequency, a trigger signal of the third frequency may be provided to the trigger signal line SIN corresponding to the sixth partition 110, so that the sixth partition 100 is displayed at the third refresh frequency.

[0070] In some examples, the first refresh frequency includes but is not limited to 120 Hz, the second refresh frequency includes but is not limited to 60 Hz, and the third refresh frequency includes but is not limited to 1 Hz.

[0071] Figure 6 Another schematic diagram of a process of connecting a display panel to a driver chip provided in an embodiment of the present application. Figure 6 As shown, according to some embodiments of the present application, optionally, the driver chip can also be used to perform the following steps S601 to S603.

[0072] S601: When the target sub-pixel row is the first sub-pixel row in the target partition or the last sub-pixel row in the target partition, determine whether the target partition corresponds to displaying a first refresh rate picture or a second refresh rate picture.

[0073] When the target sub-pixel row is the first sub-pixel row in the target partition or the last sub-pixel row in the target partition, it means that the boundary between the first refresh rate picture and the second refresh rate picture coincides with the actual boundary between the partitions. Therefore, it can be determined whether the target partition needs to display the first refresh rate picture or the second refresh rate picture.

[0074] Figure 7 FIG. 2 is another operation diagram of a display panel provided in an embodiment of the present application. Figure 7 As shown, in some specific embodiments, optionally, the display panel 10 may include three partitions 110, and the three partitions 110 are arranged in sequence along the column direction Y. The first partition 110 displays the first refresh rate picture. At this time, if the boundary line f between the first refresh rate picture and the second refresh rate picture happens to be located at the last sub-pixel row of the first partition 110 or the first sub-pixel row of the second partition 110, the second partition 110 displays the second refresh rate picture.

[0075] S602: When the target partition displays a picture with a first refresh rate, provide a trigger signal with a first frequency to a trigger signal line corresponding to the target partition, so that the target partition displays the picture with the first refresh rate.

[0076] by Figure 7For example, if the target sub-pixel row where the boundary line f between the first refresh rate picture and the second refresh rate picture is located is the last sub-pixel row of the first partition 110, then the first partition 110 is the target partition. If the first partition 110 displays the first refresh rate picture, a trigger signal of the first frequency is provided to the trigger signal line corresponding to the first partition 110, so that the first partition 110 displays the first refresh rate picture. At the same time, a trigger signal of the second frequency can be provided to the trigger signal line corresponding to the partition adjacent to the target sub-pixel row (i.e., the second partition 110), so that the second partition 110 displays the second refresh rate picture.

[0077] S603: When the target partition displays a picture with the second refresh rate, provide a trigger signal with the second frequency to a trigger signal line corresponding to the target partition, so that the target partition displays a picture with the second refresh rate.

[0078] by Figure 7 For example, if the target sub-pixel row where the boundary line f between the first refresh rate picture and the second refresh rate picture is located is the first sub-pixel row of the second partition 110, then the second partition 110 is the target partition. If the second partition 110 displays the first refresh rate picture, a trigger signal of the second frequency is provided to the trigger signal line corresponding to the second partition 110, so that the second partition 110 displays the second refresh rate picture. At the same time, a trigger signal of the first frequency can be provided to the trigger signal line corresponding to the partition adjacent to the target sub-pixel row (i.e., the first partition 110), so that the first partition 110 displays the first refresh rate picture.

[0079] In this way, when the dividing line of the images with different refresh rates coincides with the dividing line of the actual partitions, the above steps S601 to S603 can accurately control each partition to display the corresponding refresh rate image, ensuring that the display panel has a better display effect and effectively avoiding freezes or unsmooth images.

[0080] It is easy to understand that a clock signal line (not shown in the figure) is also provided in the display panel 10, and the gate driving circuit 130 in each partition 110 can be connected to the clock signal line. The gate driving circuit 130 can be used to output a scanning signal or a light-emitting control signal under the control of the clock signal line.

[0081] According to some embodiments of the present application, optionally, the gate drive circuits 130 in the plurality of partitions 110 may share a clock signal line, such as a common clock signal line CK and a common clock signal line XCK. The frequency of the clock signal transmitted by the clock signal line may be a third frequency. The specific magnitude of the third frequency may be flexibly set according to actual conditions, and the embodiments of the present application do not limit this.

[0082] For the first partition whose refresh frequency of the displayed picture is less than the third frequency, only part of the frames provide clock signals to the gate driving circuit in the first partition. The first partition is the partition whose refresh frequency of the displayed picture is less than the third frequency.

[0083] For example, taking the third frequency as 60Hz, for example, for the first partition where the refresh frequency of the displayed image is 30Hz, since the gate drive circuit in the first partition needs to be driven according to a 30Hz clock signal, and the clock signal line transmits a 60Hz clock signal, the clock signal may not be provided to the gate drive circuit in the first partition during a part of the frames, and the clock signal may only be provided to the gate drive circuit in the first partition during another part of the frames, thereby realizing multiplexing of the clock signal line.

[0084] In some specific embodiments, for example, a transistor can be set between the gate drive circuit 130 and the clock signal line, and by controlling the transistor to be turned on in a part of the frames and turned off in another part of the frames, the effect of not providing a clock signal to the gate drive circuit in the first partition in a part of the frames and providing a clock signal to the gate drive circuit in the first partition only in another part of the frames is achieved.

[0085] According to some embodiments of the present application, optionally, for a second partition whose refresh frequency of the displayed picture is greater than or equal to the third frequency, all frames provide a clock signal to the gate drive circuit in the second partition. The second partition is a partition whose refresh frequency of the displayed picture is greater than or equal to the third frequency.

[0086] For example, taking the third frequency as 60 Hz, for example, for the second partition whose refresh frequency of the displayed image is 60 Hz, since the gate drive circuit in the second partition needs to be driven according to a 60 Hz clock signal, and the clock signal line transmits a 60 Hz clock signal, the clock signal transmitted by the clock signal line can be normally written to the gate drive circuit in the second partition. That is, the clock signal is provided to the gate drive circuit in the second partition in all frames.

[0087] In this way, the clock signal lines corresponding to the multiple partitions 110 can be multiplexed, thereby reducing the number and / or length of the clock signal lines in the display panel, saving wiring space, and reducing production costs.

[0088] Of course, in other embodiments, different partitions may be connected to different clock signal lines, and different clock signal lines may output clock signals of different frequencies. For example, when a partition displays a 30Hz refresh rate screen, the clock signal line corresponding to the partition may output a 30Hz clock signal, which is not limited in the embodiments of the present application.

[0089] Figure 8 A circuit diagram of a display panel provided in an embodiment of the present application. Figure 8 As shown, according to some embodiments of the present application, optionally, the trigger signal lines SIN corresponding to at least two partitions 110 are multiplexed. The at least two partitions 110 may include, for example, a first target partition 810 and a second target partition 820, and the first target partition 810 and the second target partition 820 may each include at least one partition 110.

[0090] Since each sub-pixel row in the display panel is lit up row by row, there is a lighting order between the first target partition 810 and the second target partition 820, for example, the sub-pixel row in the first target partition 810 is lit up first, and the sub-pixel row in the second target partition 820 is lit up later. Therefore, the trigger signal line SIN can output trigger signals of different frequencies in different time periods.

[0091] Specifically, when the first target partition 810 is displayed, the trigger signal line SIN can provide a trigger signal of a first target frequency to the gate drive circuit 130 in the first target partition 810. When the second target partition 820 is displayed, the trigger signal line SIN can provide a trigger signal of a second target frequency to the gate drive circuit 130 in the second target partition 820. The first target frequency is different from the second target frequency.

[0092] In this way, by outputting trigger signals of different frequencies in different time periods through the trigger signal line, the trigger signal lines SIN corresponding to at least two partitions 110 can be multiplexed, thereby reducing the number and / or length of the trigger signal lines in the display panel, saving wiring space, and reducing production costs.

[0093] Fig. 9 FIG. 1 is another partial circuit diagram of a display panel provided in an embodiment of the present application. Fig. 9 As shown, according to some embodiments of the present application, optionally, the display panel 10 may further include a switch module 901, which is connected between the last-stage shift register 130a of the first partition 110 and the first-stage shift register 130a of the second partition 110 in any two adjacent partitions 110.

[0094] In the second display mode, the switch module 901 can be turned on, and the multiple partitions 110 can display images with the same refresh rate.

[0095] Among them, the second display mode can be understood as a full-screen display mode or a single refresh rate display mode. In the second display mode, for example, the touch signal line SIN1 can provide a touch signal to the gate drive circuit 130 in the first partition of the display panel, and the switch module 901 between each partition can be turned on, and through the step-by-step transmission from top to bottom, each partition 110 can display a screen with the same refresh rate. At this time, the touch signal lines SIN2~SINn may not provide a touch signal, or provide a touch signal with the same frequency as the touch signal line SIN1.

[0096] In this way, by setting the switch module, when in the second display mode, the switch module is turned on, so that multiple partitions can display pictures with the same refresh frequency.

[0097] According to some embodiments of the present application, optionally, in the first display mode, the switch module 901 can be turned off, so that different partitions can display pictures with different refresh frequencies.

[0098] Continue to see Fig. 9 According to some embodiments of the present application, the switch module 901 may optionally include a switch transistor T1. A gate of the switch transistor T1 is electrically connected to the control signal line k, a first electrode of the switch transistor T1 may be electrically connected to an output end of a last-stage shift register 130a of a first partition 110 of two adjacent partitions 110, and a first electrode of the switch transistor T1 may be electrically connected to an input end of a first-stage shift register 130a of a second partition 110 of two adjacent partitions 110.

[0099] In the second display mode, the switch transistor T1 is turned on to achieve signal transmission between different partitions, thereby enabling multiple partitions to display images with the same refresh rate. In the first display mode, the switch transistor T1 can be turned off to disconnect signal transmission between different partitions, so that different partitions can display images with different refresh rates.

[0100] Based on the display panel 10 provided in the above embodiment, accordingly, the embodiment of the present application further provides a method for driving a display panel. The method for driving a display panel can be applied to the display panel 10 provided in the above embodiment. Please refer to the following embodiments.

[0101] Fig.10 A schematic diagram of a process flow of a method for driving a display panel provided in an embodiment of the present application. Fig.10 As shown, the driving method of the display panel provided in the embodiment of the present application may include the following steps S1001: in the first display mode, providing trigger signals of different frequencies to the trigger signal lines corresponding to at least two partitions respectively, so that at least two partitions display pictures with different refresh frequencies.

[0102] The specific process of step S1001 has been described in detail above and will not be repeated here.

[0103] The driving method of the display panel of the embodiment of the present application, the display panel includes multiple partitions and multiple trigger signal lines, one partition corresponds to one trigger signal line; each partition includes at least one sub-pixel row and a gate driving circuit connected to at least one sub-pixel row, and the gate driving circuit of each partition is electrically connected to the corresponding trigger signal line; in the first display mode, the trigger signal lines corresponding to at least two partitions provide trigger signals of different frequencies, so that at least two partitions display pictures with different refresh frequencies. Therefore, the display panel of the embodiment of the present application is divided into multiple partitions, and since the trigger signal lines corresponding to different partitions can provide trigger signals of different frequencies to the corresponding partitions, different partitions can display pictures with different refresh frequencies, so that the display panel can display pictures with multiple refresh frequencies at the same time.

[0104] like Figure 4 As shown, according to some embodiments of the present application, optionally, S1001 may specifically include the following steps S401 to S404.

[0105] S401 . In a first display mode, identifying a target sub-pixel row corresponding to a boundary line between a first refresh rate picture and a second refresh rate picture.

[0106] S402, determining a target partition where a target sub-pixel row is located;

[0107] S403, when the target sub-pixel row is the middle sub-pixel row in the target partition, and the first frequency corresponding to the first refresh frequency picture is greater than the second frequency corresponding to the second refresh frequency picture, providing a trigger signal of the first frequency to the trigger signal line corresponding to the target partition, so that the target partition is displayed at the first refresh frequency; the middle sub-pixel row is the sub-pixel row in the target partition except the first sub-pixel row in the target partition and the last sub-pixel row in the target partition;

[0108] S404. When the target sub-pixel row is the middle sub-pixel row in the target partition and the second frequency corresponding to the second refresh frequency picture is greater than the first frequency corresponding to the first refresh frequency picture, a trigger signal of the second frequency is provided to the trigger signal line corresponding to the target partition so that the target partition is displayed at the second refresh frequency.

[0109] The specific process of steps S401 to S404 has been described in detail above and will not be repeated here.

[0110] In an embodiment of the present application, for the target partition where the dividing line between the first refresh frequency screen and the second refresh frequency screen is located, the higher refresh frequency of the first refresh frequency and the second refresh frequency is used for display, that is, the low-frequency screen is displayed at a high frequency, and the high-frequency screen is not displayed at a low frequency, which can avoid the problem of freeze and unsmooth picture when the target partition displays the first refresh frequency screen or the second refresh frequency screen.

[0111] According to some embodiments of the present application, the gate driving circuit may include a plurality of cascaded shift registers. The display panel may further include a switch module connected between the last shift register of the first partition and the first shift register of the second partition in any two adjacent partitions.

[0112] Accordingly, the driving method of the display panel according to the embodiment of the present application may further include the following steps:

[0113] Step 1: in the second display mode, providing a trigger signal to a trigger signal line corresponding to the first partition in the display panel, and controlling the switch module to be turned on, so that multiple partitions display images with the same refresh frequency; or,

[0114] Step 2: In the second display mode, a trigger signal of the same frequency is provided to the trigger signal lines corresponding to each of the plurality of partitions, so that the plurality of partitions display images of the same refresh frequency.

[0115] The specific processes of the above steps 1 and 2 have been described in detail above and will not be repeated here.

[0116] like Figure 6 As shown, according to some embodiments of the present application, optionally, the driving method of the display panel of the embodiment of the present application may further include the following steps S601 to S603.

[0117] S601: When the target sub-pixel row is the first sub-pixel row in the target partition or the last sub-pixel row in the target partition, determine whether the target partition corresponds to displaying a first refresh rate picture or a second refresh rate picture.

[0118] S602: When the target partition displays a picture corresponding to the first refresh rate, provide a trigger signal of the first frequency to a trigger signal line corresponding to the target partition, so that the target partition displays the picture of the first refresh rate;

[0119] S603: When the target partition displays a picture with the second refresh rate, provide a trigger signal with the second frequency to a trigger signal line corresponding to the target partition, so that the target partition displays a picture with the second refresh rate.

[0120] In this way, when the dividing line of the images with different refresh rates coincides with the dividing line of the actual partitions, the above steps S601 to S603 can accurately control each partition to display the corresponding refresh rate image, ensuring that the display panel has a better display effect and effectively avoiding freezes or unsmooth images.

[0121] Based on the display panel driving method provided in the above embodiment, the present application also provides a specific implementation of the electronic device. Please refer to the following embodiment.

[0122] Fig.11 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application is shown.

[0123] The electronic device may include a processor 1101 and a memory 1102 storing computer program instructions.

[0124] Specifically, the processor 1101 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the embodiments of the present application.

[0125] The memory 1102 may include a large capacity memory for data or instructions. By way of example and not limitation, the memory 1102 may include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive or a combination of two or more of these. In one example, the memory 1102 may include a removable or non-removable (or fixed) medium, or the memory 1102 is a non-volatile solid-state memory. The memory 1102 may be inside or outside the integrated gateway disaster recovery device.

[0126] In one example, the memory 1102 may be a read-only memory (ROM). In one example, the ROM may be a mask-programmed ROM, a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM (EEPROM), an electrically rewritable ROM (EAROM), or a flash memory, or a combination of two or more of these.

[0127] The memory 1102 may include a read-only memory (ROM), a random access memory (RAM), a magnetic disk storage medium device, an optical storage medium device, a flash memory device, an electrical, optical or other physical / tangible memory storage device. Thus, typically, the memory includes one or more tangible (non-transitory) computer-readable storage media (e.g., a memory device) encoded with software including computer-executable instructions, and when the software is executed (e.g., by one or more processors), it is operable to perform the operations described with reference to the method according to an aspect of the present application.

[0128] The processor 1101 implements the method / steps in the above method embodiment by reading and executing the computer program instructions stored in the memory 1102, and achieves the corresponding technical effects achieved by the method embodiment executing its method / steps, which will not be repeated here for the sake of brevity.

[0129] In one example, the electronic device may further include a communication interface 1103 and a bus 1110. Fig.11 As shown, the processor 1101, the memory 1102, and the communication interface 1103 are connected via a bus 1110 and communicate with each other.

[0130] The communication interface 1103 is mainly used to implement communication between various modules, devices, units and / or equipment in the embodiments of the present application.

[0131] Bus 1110 includes hardware, software or both, and the parts of electronic equipment are coupled to each other.For example, but not limitation, bus may include accelerated graphics port (Accelerated Graphics Port, AGP) or other graphics bus, enhanced industry standard architecture (Extended Industry Standard Architecture, EISA) bus, front side bus (Front Side Bus, FSB), hypertransmission (Hyper Transport, HT) interconnection, industry standard architecture (IndustryStandard Architecture, ISA) bus, infinite bandwidth interconnection, low pin count (LPC) bus, memory bus, micro channel architecture (MCA) bus, peripheral component interconnection (PCI) bus, PCI-Express (PCI-X) bus, serial advanced technology attachment (SATA) bus, video electronics standard association local (VLB) bus or other suitable bus or two or more of these combinations. In appropriate cases, bus 1110 may include one or more buses. Although the present application embodiment describes and shows a specific bus, the application considers any suitable bus or interconnection.

[0132] In addition, in combination with the driving method of the display panel in the above-mentioned embodiment, the embodiment of the present application may provide a computer-readable storage medium for implementation. The computer-readable storage medium stores computer program instructions; when the computer program instructions are executed by the processor, any one of the driving methods of the display panel in the above-mentioned embodiment is implemented. Examples of computer-readable storage media include non-transitory computer-readable storage media, such as electronic circuits, semiconductor memory devices, ROM, random access memory, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, and hard disks.

[0133] It should be clear that the present application is not limited to the specific configuration and processing described above and shown in the figures. For the sake of simplicity, a detailed description of the known method is omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present application is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications and additions, or change the order between the steps after understanding the spirit of the present application.

[0134] The functional blocks shown in the above-described block diagram can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application-specific integrated circuit (Application Specific Integrated Circuit, ASIC), appropriate firmware, plug-in, function card, etc. When implemented in software, the elements of the present application are programs or code segments used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or communication link by a data signal carried in a carrier. "Machine-readable medium" may include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio frequency (Radio Frequency, RF) links, etc. The code segment can be downloaded via a computer network such as the Internet, an intranet, etc.

[0135] It should also be noted that the exemplary embodiments mentioned in this application describe some methods or systems based on a series of steps or devices. However, this application is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiment, or in a different order from the embodiment, or several steps can be performed simultaneously.

[0136] The above reference is according to the method of the embodiment of the present application, the flow chart of the device (system) and the computer program product and / or the block diagram described various aspects of the present application.It should be understood that each square box in the flow chart and / or the block diagram and the combination of each square box in the flow chart and / or the block diagram can be realized by computer program instructions.These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer or other programmable data processing device to produce a machine so that these instructions executed by the processor of the computer or other programmable data processing device enable the realization of the function / action specified in one or more square boxes of the flow chart and / or the block diagram.Such a processor can be but is not limited to a general-purpose processor, a special-purpose processor, a special application processor or a field programmable logic circuit.It can also be understood that each square box in the block diagram and / or the flow chart and the combination of the square boxes in the block diagram and / or the flow chart can also be realized by the dedicated hardware that performs the specified function or action, or can be realized by the combination of dedicated hardware and computer instructions.

[0137] The above is only a specific implementation of the present application. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the systems, modules and units described above can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. It should be understood that the protection scope of the present application is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in this application, and these modifications or replacements should be included in the protection scope of this application.

Claims

1. A display panel, characterized in that: The display panel includes a plurality of partitions and a plurality of trigger signal lines, one of the partitions corresponds to one of the trigger signal lines; each of the partitions includes at least one sub-pixel row and a gate driving circuit connected to the at least one sub-pixel row, and the gate driving circuit of each partition is electrically connected to the corresponding trigger signal line; In the first display mode, the trigger signal lines corresponding to at least two of the partitions respectively provide trigger signals of different frequencies, so that at least two of the partitions display images of different refresh frequencies; The display panel is electrically connected to a driver chip, and the driver chip is used for: In the first display mode, identifying a target sub-pixel row corresponding to a boundary line between a first refresh rate picture and a second refresh rate picture; Determine a target partition where the target sub-pixel row is located; When the target sub-pixel row is a middle sub-pixel row in the target partition, and the first frequency corresponding to the first refresh frequency picture is greater than the second frequency corresponding to the second refresh frequency picture, a trigger signal of the first frequency is provided to the trigger signal line corresponding to the target partition, so that the target partition is displayed at the first refresh frequency; the middle sub-pixel row is the sub-pixel row in the target partition except the first sub-pixel row in the target partition and the last sub-pixel row in the target partition; When the target sub-pixel row is the middle sub-pixel row in the target partition and the second frequency corresponding to the second refresh frequency picture is greater than the first frequency corresponding to the first refresh frequency picture, a trigger signal of the second frequency is provided to the trigger signal line corresponding to the target partition to make the target partition displayed at the second refresh frequency.

2. The display panel according to claim 1, characterized in that: The driver chip is also used for: When the target sub-pixel row is the first sub-pixel row in the target partition or the last sub-pixel row in the target partition, determining whether the target partition corresponds to displaying the first refresh rate picture or the second refresh rate picture; When the target partition corresponds to displaying the first refresh frequency picture, providing a trigger signal of the first frequency to the trigger signal line corresponding to the target partition, so that the target partition displays the first refresh frequency picture; When the target partition corresponds to displaying the second refresh rate picture, a trigger signal of the second frequency is provided to the trigger signal line corresponding to the target partition, so that the target partition displays the second refresh rate picture.

3. The display panel according to claim 1, characterized in that: The display panel further comprises a clock signal line, and the gate driving circuits in the plurality of partitions share the clock signal line; The frequency of the clock signal transmitted by the clock signal line is a third frequency; For a first partition in which the refresh frequency of the displayed picture is lower than the third frequency, only a part of the frames provide the clock signal to the gate driving circuit in the first partition.

4. The display panel according to claim 3, characterized in that: For a second partition in which the refresh frequency of the displayed picture is greater than or equal to the third frequency, all frames provide the clock signal to the gate driving circuit in the second partition.

5. The display panel according to claim 1, characterized in that: The trigger signal lines corresponding to at least two of the partitions are multiplexed, and the at least two partitions include a first target partition and a second target partition, and the first target partition and the second target partition each include at least one partition; When the first target partition is displayed, the trigger signal line provides a trigger signal of a first target frequency to the gate driving circuit in the first target partition; When the second target partition is displayed, the trigger signal line provides a trigger signal of a second target frequency to the gate driving circuit in the second target partition, and the first target frequency is different from the second target frequency.

6. The display panel according to claim 1, characterized in that: The gate driving circuit includes a plurality of cascaded shift registers; The display panel further comprises a switch module, wherein the switch module is connected between the last stage of the shift register of the first partition and the first stage of the shift register of the second partition in any two adjacent partitions; In the second display mode, the switch module is turned on, and the multiple partitions display images with the same refresh frequency.

7. The display panel according to claim 6, characterized in that: In the first display mode, the switch module is turned off.

8. The display panel according to claim 6, characterized in that: The switching module includes a switching transistor, a gate of the switching transistor is electrically connected to a control signal line, a first electrode of the switching transistor is electrically connected to an output end of the last stage of the shift register of the first partition of two adjacent partitions, and a first electrode of the switching transistor is electrically connected to an input end of the first stage of the shift register of the second partition of two adjacent partitions.

9. A method for driving a display panel, characterized in that: The driving method is applied to the display panel according to any one of claims 1 to 8, and the driving method comprises: In the first display mode, trigger signals of different frequencies are provided to the trigger signal lines corresponding to at least two of the partitions, so that the at least two partitions display pictures with different refresh frequencies; In the first display mode, providing trigger signals of different frequencies to the trigger signal lines corresponding to at least two of the partitions respectively, specifically includes: In the first display mode, identifying a target sub-pixel row corresponding to a boundary line between a first refresh rate picture and a second refresh rate picture; Determine a target partition where the target sub-pixel row is located; When the target sub-pixel row is a middle sub-pixel row in the target partition, and the first frequency corresponding to the first refresh frequency picture is greater than the second frequency corresponding to the second refresh frequency picture, a trigger signal of the first frequency is provided to the trigger signal line corresponding to the target partition, so that the target partition is displayed at the first refresh frequency; the middle sub-pixel row is the sub-pixel row in the target partition except the first sub-pixel row in the target partition and the last sub-pixel row in the target partition; When the target sub-pixel row is the middle sub-pixel row in the target partition and the second frequency corresponding to the second refresh frequency picture is greater than the first frequency corresponding to the first refresh frequency picture, a trigger signal of the second frequency is provided to the trigger signal line corresponding to the target partition to make the target partition displayed at the second refresh frequency.

10. The driving method according to claim 9, characterized in that: The gate driving circuit includes a plurality of cascaded shift registers; The display panel further comprises a switch module, wherein the switch module is connected between the last stage of the shift register of the first partition and the first stage of the shift register of the second partition in any two adjacent partitions; The driving method further comprises: In the second display mode, a trigger signal is provided to the trigger signal line corresponding to the first partition in the display panel, and the switch module is controlled to be turned on, so that the multiple partitions display images with the same refresh frequency; or In the second display mode, trigger signals of the same frequency are provided to the trigger signal lines corresponding to the plurality of partitions, so that the plurality of partitions display images of the same refresh frequency.

11. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the method for driving a display panel according to any one of claims 9 to 10 are implemented.

Images