A cross-band frequency reconfigurable planar phased array antenna with modular chip antenna elements

Abstract

The application discloses a cross-band frequency reconfigurable planar phased array antenna with a modular chip antenna unit, which is composed of a 2N*2N chip antenna unit array arrangement, N is a natural number greater than or equal to 1, and the chip antenna unit sequentially comprises a dielectric matching layer module, an air layer, a chip antenna module and a multilayer PCB carrier board module from top to bottom; the dielectric matching layer module and the chip antenna module interact with the electromagnetic waves radiated thereby, so as to improve the active standing wave ratio and cross polarization characteristics of the chip antenna unit, and the air layer is used for adjusting the distance between the dielectric matching layer module and the chip antenna module; the dielectric matching layer module, the air layer, the chip antenna module and the multilayer PCB carrier board module jointly realize the cross-band frequency reconfiguration function of the chip antenna unit from the C band to the Ku band. The frequency reconfiguration range of the application is 10 GHz, and the problems of single working frequency band, poor anti-interference ability and low aperture utilization of the traditional phased array antenna are solved.

Description

TECHNICAL FIELD

[0001] The present application relates to reconfigurable antenna technology, in particular to a cross-band frequency reconfigurable planar phased array antenna with modular chip antenna units. BACKGROUND

[0002] In recent years, with the rapid development of semiconductor and radio frequency integration technology, phased array antennas that meet different needs have been increasingly researched. In order to reduce the complexity of the antenna system working in the required frequency band, the antenna needs to automatically switch between different frequency bands, so as to realize data transmission and reception between devices in different application scenarios. Frequency reconfigurable multi-band phased array antennas occupy much less space than using multiple single-band phased array antennas, which is a very attractive solution for application scenarios with strict requirements on space and weight. In addition, in electronic countermeasures, phased array antennas with cross-band frequency reconfigurable function can help to protect receivers from power interference. Therefore, it is particularly important to study the key technologies of phased array antennas with frequency reconfigurable function, especially large range frequency reconfigurable function.

[0003] Reconfigurable antennas usually use PIN diodes, varactor diodes to reconfigure the radiation aperture of the antenna or peripheral bias circuits to realize the reconfigurable function of the antenna. In the case of using PIN diodes, the operating frequency can be changed to meet the predetermined requirements, but the continuous scanning of the operating frequency is limited. In contrast, varactor diodes are a good solution for continuous frequency scanning, however, the low self-resonant frequency of commercial varactor diodes limits the adjustable frequency range. In addition, MEMS switches or tunable materials can also be used for frequency reconfigurable antennas.

[0004] At present, in order to solve the problem of phased array antennas working in different frequency bands under the same aperture, the traditional method is to make multiple antennas share the same radiation aperture surface in a limited space to work normally in their respective frequency bands, that is, the co-aperture antenna technology, but the three-dimensional structure of the co-aperture antenna is complex and difficult to process. At the same time, limited by the size and spacing of the antenna units, the cross-frequency range of the high / low frequency working frequency band of the co-aperture antenna is limited, and often cannot realize single feeding, that is, the number of antenna units working in each working frequency band is usually not the same. In order to meet the unit spacing requirements, the number of low-frequency antenna units is much less than that of high-frequency antenna units, which leads to low aperture utilization. SUMMARY

[0005] The application aims to solve the problems in the prior art, and provides a cross-band frequency reconfigurable planar phased array antenna with a modular chip antenna unit by means of three-dimensional heterogeneous integration of a dielectric matching layer module, a chip antenna module and a multilayer PCB carrier module, and by regulating the off / on working state of a PIN diode by applying a bias voltage, so as to realize C to Ku band cross-band frequency reconfiguration.

[0006] The application provides a cross-band frequency reconfigurable planar phased array antenna with a modular chip antenna unit, which is composed of a 2N*2N chip antenna unit array, wherein N is a natural number greater than or equal to 1, and the chip antenna unit comprises, from top to bottom, a dielectric matching layer module, an air layer, a chip antenna module and a multilayer PCB carrier module; the dielectric matching layer module interacts with electromagnetic waves radiated by the chip antenna module, so as to improve the active standing wave ratio and cross-polarization characteristics of the chip antenna unit; the air layer is used to adjust the distance between the dielectric matching layer module and the chip antenna module; the chip antenna module comprises, from top to bottom, a second metal layer, a chip layer and a ball grid array layer; the second metal layer is a radiation layer of the chip layer, and the phased array antenna works at different frequency bands by controlling the second metal layer; the ball grid array layer is used to connect a direct current signal and a radio frequency signal to the second metal layer, and is electrically connected to the multilayer PCB carrier module, so as to realize three-dimensional heterogeneous integration of the chip antenna module and the multilayer PCB carrier module; the multilayer PCB carrier module is provided with a bias line circuit, and is used to suppress radio frequency signals in the bias line circuit, so as to reduce the influence of the bias line circuit on the radiation performance of the phased array antenna, and to realize unidirectional radiation of electromagnetic waves by the chip antenna unit, while reducing the mutual coupling between the chip antenna units in the array; the dielectric matching layer module, the air layer, the chip antenna module and the multilayer PCB carrier module jointly realize the cross-band frequency reconfiguration function of the chip antenna unit from the C band to the Ku band.

[0007] Preferably, the dielectric matching layer module comprises a first dielectric layer and a first metal layer attached to the upper surface of the first dielectric layer, and the first metal layer comprises periodically arranged metal lines; the dielectric matching layer module improves the active standing wave ratio and cross-polarization characteristics of the chip antenna unit by means of the periodic metal line structure on the first metal layer and the first dielectric layer, so that the standing wave ratio is less than 2 in the two reconfigured band ranges.

[0008] Preferably, the second metal layer comprises a first metal rectangular patch, a second metal rectangular patch, a third metal rectangular patch and a fourth metal rectangular patch arranged in sequence at equal intervals, and a first PIN diode is loaded between each two adjacent metal rectangular patches, when three first PIN diodes are not applied with bias voltage, the radio frequency signals on the four metal rectangular patches are discontinuous, the antenna works in a high frequency state, i.e. Ku band; when the three first PIN diodes are turned on under bias voltage excitation, the radio frequency currents between the four metal rectangular patches are continuous, the effective radiation length of the antenna is increased to make the antenna switch to a low frequency working state, i.e. C band.

[0009] Preferably, when the three first PIN diodes are not applied with bias voltage, the radio frequency signals directly excite the second metal rectangular patch, the length of the second metal rectangular patch corresponds to a half wavelength of the antenna when the antenna works in a high frequency state, and the other three metal rectangular patches at this time serve as parasitic patches, the lengths of which affect the directivity and resonance frequency point of the antenna.

[0010] Preferably, three through silicon vias are made on the chip layer by using a through silicon via technology, the second metal layer and the ball grid array layer are interconnected through the three through silicon vias, the second through silicon via in the middle is connected with the second rectangular metal patch and serves as a radio frequency signal access point, the first through silicon via and the third through silicon via on the two sides are respectively connected with the first rectangular metal patch and the fourth rectangular metal patch and serve as DC signal access points, and the first through silicon via accesses a positive DC signal and the third through silicon via is grounded.

[0011] Preferably, the ball grid array layer comprises a first solder ball, a second solder ball, a third solder ball and a fourth solder ball, the first solder ball, the second solder ball and the third solder ball are respectively interconnected with the first through silicon via, the second through silicon via and the third through silicon via on the chip layer, and the fourth solder ball is provided in a plurality of pieces and serves as a support.

[0012] Preferably, the multilayer PCB carrier module comprises, from top to bottom, a third metal layer, a second dielectric layer, a third dielectric layer, a fourth metal layer, a fourth dielectric layer and a fifth metal layer, the third metal layer comprises a first metal wire, a first metal wire group, a second metal wire group, a second PIN diode and a lumped inductor, the first metal wire group and the second metal wire group are the same in structure and each comprises a second metal wire, a third metal wire and a fourth metal wire arranged in a linear array, a second PIN diode is loaded between the second metal wire and the third metal wire, a lumped inductor is loaded between the third metal wire and the fourth metal wire and between adjacent fourth metal wires, and the first metal wire is arranged between the second metal wires of the first metal wire group and the second metal wire group.

[0013] Preferably, three first metallized vias are arranged on the second dielectric layer, three second metallized vias are arranged on the third dielectric layer, two through holes and a third metallized via are arranged on the fourth metal layer, three fourth metallized vias are arranged on the fourth dielectric layer, and the fifth metal layer comprises metal strips and metal patches that are not in contact, and the metal patches are provided with annular through holes; the three first metallized vias, the three second metallized vias, the two through holes and the third metallized via, and the three fourth metallized vias are respectively matched with the lumped inductance at the end of the first metal strip group and the second metal strip group of the third metal layer, and the first metal strip, and the first metal strip passes through the first metallized via, the second metallized via, the through hole and the fourth metallized via in sequence to be electrically connected with the circular metal patch in the annular through hole of the metal patch, the lumped inductance at the end of the first metal strip group passes through the first metallized via, the second metallized via, the through hole and the fourth metallized via in sequence to be electrically connected with the metal strip on the fifth metal layer, and the lumped inductance at the end of the second metal strip group passes through the first metallized via, the second metallized via, the third metallized via and the fourth metallized via in sequence to be electrically connected with the metal patch on the fifth metal layer.

[0014] Preferably, the bias line circuit is composed of the third metal layer, the first metallized via on the second dielectric layer, the second metallized via on the third dielectric layer, the fourth metallized via on the fourth dielectric layer, and the metal strip in the fifth metal layer.

[0015] Preferably, the two sides of the third dielectric layer corresponding to the first metal strip group and the second metal strip group are also symmetrically provided with periodically arranged fifth metallized vias for reducing the mutual coupling between the chip antenna units in the array.

[0016] The annular array metallized vias are arranged around the fourth metallized via for connecting the radio frequency ground signal of the fifth metal layer to the fourth metal layer, thereby realizing multi-point common ground and preventing parasitic resonance of the antenna.

[0017] The phased array antenna of the application realizes switching of the working frequency band from C band to Ku band by loading a plurality of series PIN diodes on the phased array chip antenna unit, and the frequency reconstruction range is across 10 GHz, thereby solving the problems of single working frequency band, poor anti-interference ability and low aperture utilization rate of the traditional phased array antenna system.

[0018] Beneficial effects: Compared with the prior art, the significant technical effects of the application are: by loading multiple series PIN diodes in the chip antenna module, the frequency reconfiguration of the antenna operating frequency band switching range is realized, which is more than 10GHz; compared with the traditional common aperture antenna, the antenna elements of the antenna array are single-fed and the number of antenna elements working in two operating frequency bands is the same, so the aperture utilization is higher; based on the through silicon via (TSV) technology and the ball grid array (BGA) packaging technology, the three-dimensional heterogeneous integration of the chip antenna module and the multi-layer PCB carrier module is realized, so that the antenna array has higher integration, stronger anti-interference ability and broader application prospect. BRIEF DESCRIPTION OF DRAWINGS

[0019] Figure 1 is a phased array antenna schematic diagram of the application, wherein (a) is a three-dimensional structure schematic diagram, (b) is a chip antenna module and a multi-layer PCB carrier module combined structure top view;

[0020] Figure 2 is a chip antenna unit layered structure schematic diagram of the application;

[0021] Figure 3 is a medium matching layer module top view of the application;

[0022] Figure 4 is a chip antenna module top view of the application;

[0023] Figure 5 is a through silicon via (TSV) structure schematic diagram in the chip layer of the application;

[0024] Figure 6 is a chip antenna module bottom view of the application;

[0025] Figure 7 is a multi-layer PCB carrier module top view of the application;

[0026] Figure 8 is a multi-layer PCB carrier module schematic diagram of the application, wherein (a) is a layered structure schematic diagram, (b) is a third dielectric layer schematic diagram, (c) is a fourth metal layer schematic diagram, (d) is a fourth dielectric layer schematic diagram, and (e) is a fifth metal layer schematic diagram;

[0027] Figure 9 is an active S parameter curve of the chip antenna unit of the application;

[0028] Figure 10 is a simulation curve of the E-plane radiation pattern of the phased array antenna of the application varying with the scanning angle in the high-frequency working state;

[0029] Figure 11 is a simulation curve of the H-plane radiation pattern of the phased array antenna of the application varying with the scanning angle in the high-frequency working state;

[0030] Figure 12 is the simulation curve of the E-plane radiation pattern of the phased array antenna of the application under the low-frequency working state varying with the scanning angle;

[0031] Figure 13 is the simulation curve of the H-plane radiation pattern of the phased array antenna of the application under the low-frequency working state varying with the scanning angle;

[0032] In the figure: the first metal layer 1, the first dielectric layer 2, the air layer 3, the second metal layer 4, the first metal rectangular patch 41, the second metal rectangular patch 42, the third metal rectangular patch 43, the fourth metal rectangular patch 44, the first PIN diode 45, the chip layer 5, the first silicon through hole 51, the second silicon through hole 52, the third silicon through hole 53, the ball grid array layer 6, the first solder ball 61, the second solder ball 62, the third solder ball 63, the fourth solder ball 64, the third metal layer 7, the first metal wire 71, the second PIN diode 74, the first lumped inductor 751, the second lumped inductor 752, the third lumped inductor 753, the fourth lumped inductor 754, the fifth lumped inductor 755, the sixth lumped inductor 756, the second metal wire 76, the third metal wire 77, the fourth metal wire 78, the circular metal pad 79, the second dielectric layer 8, the first metallized via 81, 82, 83, the third dielectric layer 9, the second metallized via 91, 92, 93, the fifth metallized via 94, the fourth metal layer 10, the through hole 101, 102, the third metallized via 103, the fourth dielectric layer 11, the fourth metallized via 111, 112, 113, the annular array metallized via 114, the fifth metal layer 12, the metal wire 121, the metal patch 122, the annular through hole 1221, the circular metal patch 1222. DETAILED DESCRIPTION

[0033] The technical solutions in the embodiments of the application will be clearly and completely described below with reference to the drawings in the embodiments of the application. Obviously, the described embodiments are only part of the embodiments of the application, not all the embodiments of the application.

[0034] The cross-band frequency reconfigurable planar phased array antenna with a modular chip antenna unit of the application is composed of a 2N*2N chip antenna unit array arrangement, and N is a natural number greater than or equal to 1. Figure 1As shown in (a) and (b), the cross-band frequency reconfigurable planar phased array antenna designed in the embodiment is an 8x8 array antenna with rectangular arrangement of chip antenna units, the unit spacing is 12mm, the number of units is 64, and the chip antenna unit structure is composed of a chip antenna module, an air layer, a multilayer PCB carrier module and a dielectric matching layer module. The dielectric matching layer module is composed of a plurality of metal microstrip periodic arrangements, which is used to improve the active standing wave ratio and cross polarization characteristics of the antenna array, and at the same time protects the antenna and PIN diode from the environment. The chip antenna module is composed of a rectangular metal patch, a PIN diode and a silicon wafer. When the PIN diode is not excited, the radio frequency signals on the four rectangular metal patches are discontinuous, and the antenna works in the Ku band; when the PIN diode is turned on under the bias voltage excitation, the continuous radio frequency current makes the antenna switch to the low frequency working state, that is, the C band. The multilayer PCB carrier module is composed of a metal bias line, a metalized via, a ground metal plate, a PIN diode and a lumped inductor; the metal bias line on the bottom layer of the module is isolated from the antenna radiation surface array through the ground metal plate, which greatly reduces the mutual coupling between the metal components and the reconfigurable components. The on-chip phased array antenna can realize the switching of the working frequency band from C band to Ku band, the frequency reconfiguration range is more than 10GHz, and each chip antenna unit in the array is fed by a single port. The number of antenna units working in two bands is the same; the high-resistance silicon wafer with high dielectric constant (11.9) is used as the substrate of the chip antenna module, which can effectively reduce the size of the antenna unit and prevent the spacing between the units from being too large. Through the through silicon via (TSV) technology and the ball grid array (BGA) packaging technology, the chip antenna module is micro-assembled on the multilayer PCB carrier module to realize three-dimensional heterogeneous integration, so that the antenna metal layer is closer to the air layer for radiation, and the PIN tube is convenient for heat dissipation. The application of the planar phased array antenna to the seeker can realize the switching of different working bands of the system without occupying additional space, and has very good anti-interference effect in electronic countermeasure. It should be noted that the array size is only for the specific embodiments of the present application and does not limit the present application.

[0035] As Figure 2 shown, the chip antenna unit designed in the present application is sequentially arranged from top to bottom: a first metal layer 1, a first dielectric layer 2, an air layer 3, a second metal layer 4, a chip layer 5, a ball grid array layer 6, a third metal layer 7, a second dielectric layer 8, a third dielectric layer 9, a fourth metal layer 10, a fourth dielectric layer 11 and a fifth metal layer 12, wherein the first metal layer 1 is composed of a periodic structure composed of metal lines, the first metal layer 1 and the first dielectric layer 2 together form a dielectric matching layer module, which interacts with the electromagnetic waves radiated by the chip antenna module; the plan view of the combination of the second metal layer 4, the chip layer 5, the ball grid array layer 6, the third metal layer 7, the second dielectric layer 8, the third dielectric layer 9, the fourth metal layer 10, the fourth dielectric layer 11 and the fifth metal layer 12 is as shown inFigure 1 As shown in (b), the second metal layer 4, the chip layer 5 and the ball grid array layer 6 together constitute a chip antenna module, the second metal layer 4 is composed of a metal rectangular patch and a PIN diode structure, the chip layer 5 is composed of a high-resistance silicon wafer and a through-silicon via (TSV) structure, and the ball grid array layer 6 is composed of a metal solder ball structure; the chip antenna module adopts a microstrip antenna surface array form, and the purpose of frequency reconstruction is achieved by controlling the on-off of the PIN diode loaded in the antenna radiation unit (i.e. the second metal layer 4); the air layer 3 is used to adjust the distance between the dielectric matching layer module and the chip antenna module; the third metal layer 7, the second dielectric layer 8, the third dielectric layer 9, the fourth metal layer 10, the fourth dielectric layer 11 and the fifth metal layer 12 together constitute a multi-layer PCB carrier module, the third metal layer 7 is composed of a metal wire, a PIN diode and a lumped inductor structure; the second dielectric layer 8 is the same as the first dielectric layer 2 in material parameters, size and thickness, the second dielectric layer 8, the third dielectric layer 9 and the fourth dielectric layer 11 are all composed of a metallized via structure; the fifth metal layer 12 is composed of a metal wire and a rectangular metal patch structure. The period of the entire chip antenna unit structure is 12 mm, the thickness of the air layer 3 is 9 mm, and the overall thickness is 12.5 mm. The second metal layer (4) is made of aluminum with a thickness of 4 um. The other metal layers are made of copper with a thickness of 0.035 mm.

[0036] The chip antenna module serves as an array antenna radiation structure to realize effective radiation of electromagnetic waves and frequency reconstruction function; the chip antenna module is electrically mounted on the multi-layer PCB carrier module through a surface mounting process to realize vertical three-dimensional heterogeneous integration, the multi-layer PCB carrier module is distributed with a direct current bias line circuit for providing a bias voltage for the first PIN diode in the chip antenna module, the multi-layer PCB carrier module can also play a role in facilitating subsequent testing of the chip antenna module and interconnection with the phase shifter, and meanwhile, the off-chip ground plane (the fourth metal layer 10) of the chip antenna is located in the multi-layer PCB carrier module, which helps to improve the gain of the antenna; the dielectric matching layer module is used to modulate and compensate the surface impedance of the array, which can effectively improve the impedance matching between the array and the free space and guide electromagnetic waves to propagate in space; the metal strip (periodic metal wire structure on the first metal 1) can absorb electromagnetic waves in the cross-polarization direction, improve the cross-polarization isolation, and thus improve the cross-polarization characteristics.

[0037] The bias line circuit is composed of the third metal layer 7, the first metallized via 81, 82 on the second dielectric layer 8, the second metallized via 91, 92 on the third dielectric layer 9, the fourth metallized via 111, 112 on the fourth dielectric layer 11, and the metal wire 121 in the fifth metal layer 12.

[0038] The chip antenna unit realizes cross-band frequency reconstruction of C to Ku band, is formed by the cooperation of the chip antenna module, the multi-layer PCB carrier module and the dielectric matching layer module, and is composed of an 8*8 antenna array. The control network formed by the bias line circuits of the chip antenna units in the chip antenna unit array is a DC bias network.

[0039] As shown in Figure 3 The first metal layer 1 is composed of a periodic structure of metal lines, and is attached to the first dielectric layer 2. The first dielectric layer 2 is a RO4350B board with a relative dielectric constant of 3.66 and a loss tangent of 0.0037, and has a thickness of 0.254 mm. The dielectric matching layer module uses the periodic metal line structure on the first metal layer 1 and the first dielectric layer 2 to improve the active standing wave ratio and cross-polarization characteristics of the chip antenna unit, so that the standing wave ratio is less than 2 in the two reconstructed band ranges, and provides a good working environment for the chip antenna module.

[0040] Specifically, the dielectric plate (the first dielectric layer 2) placed at a certain distance above the chip antenna module array plays a role of a parallel susceptance, modulates and compensates the surface impedance of the array, effectively improves the impedance matching between the array and the air layer, and guides electromagnetic waves to propagate in space. The metal strip (the periodic metal line structure on the first metal layer 1) can absorb electromagnetic waves in the cross-polarization direction, improve the cross-polarization isolation, and thus improve the cross-polarization characteristics.

[0041] As shown in Figure 4 The second metal layer 4 is a radiation patch layer of the chip antenna module, and is composed of metal rectangular patches and first PIN diodes 45. The metal rectangular patches include first, second, third and fourth metal rectangular patches 41, 42, 43 and 44 arranged at equal intervals in sequence. A first PIN diode 45 is loaded between each two adjacent metal rectangular patches. The first PIN diode is adhered to a specific position of the gap between the adjacent metal rectangular patches by conductive adhesive. When the three first PIN diodes are not applied with a bias voltage, the radio frequency signals on the four metal rectangular patches are discontinuous, and the antenna works in a high-frequency state, i.e., the Ku band. When the three first PIN diodes are turned on under the excitation of the bias voltage, the four metal rectangular patches are turned on, and the continuous radio frequency current makes the antenna switch to a low-frequency working state, i.e., the C band.

[0042] The first PIN diode 45 adopts a 0201 packaged PIN diode (WK0013) as a switching device for realizing antenna frequency reconstruction, and the current in the high-level state is 15 mA; the four metal rectangular patch materials of the second metal layer 4 are aluminum, and the thickness is 4 um; the width of the metal rectangular patch is 0.6 mm, the length of the first metal rectangular patch 41 is 1.4 mm, the length of the second metal rectangular patch 42 is 2.6 mm, the length of the third metal rectangular patch 43 is 1.1 mm, the length of the fourth metal rectangular patch 44 is 0.7 mm, and the length of the gap between two adjacent metal rectangular patches is 0.3 mm. A first PIN diode 45 is loaded in the middle of each gap. When three first PIN diodes 45 are not applied with a bias voltage, the radio frequency signals on the four metal rectangular patches are discontinuous, the radio frequency signals directly excite the second metal rectangular patch 42, and the length of the second metal rectangular patch 42 corresponds to the half wavelength when the antenna works in a high frequency state. The remaining three metal rectangular patches act as parasitic patches at this time, and their lengths affect the directional diagram and resonant frequency point of the antenna, which need to be determined by electromagnetic simulation software for simulation optimization; when three first PIN diodes 45 are turned on under the excitation of a bias voltage, the radio frequency current between the four metal rectangular patches is continuous, the effective radiation length of the antenna increases, and the antenna switches to a low frequency working state, that is, the C band; at this time, the lengths of the four metal rectangular patches are also set according to the method when three first PIN diodes 45 are not turned on.

[0043] As shown in Figure 5 , a high-resistance silicon wafer (relative dielectric constant 11.9, electrical conductivity 0.01 S / m) is used as the substrate of the chip antenna module, that is, the chip layer 5. A through-silicon via (TSV) technology is used to make a silicon through-hole (mainly copper) with a diameter of 20 um inside the silicon base (chip layer 5) to interconnect the top second metal layer 4 of the chip antenna module with the bottom ball grid array layer 6 at three specific positions. The middle second through-silicon via 52 is connected to the second rectangular metal patch 42 for radio frequency signal access, and the first and third through-silicon vias 51 and 53 on the two sides are connected to the first and fourth rectangular metal patches 41 and 44, respectively, for DC signal access. The first through-silicon via 51 accesses the positive DC signal, and the third through-silicon via 53 is grounded. Compared with the flip chip technology, the TSV technology can realize the normal mounting of the chip on the PCB carrier, so that the antenna metal layer is closer to the air for easy radiation, and the PIN diode is easy to dissipate heat.

[0044] As shown in Figure 6 , the bottom of the chip antenna module is a ball grid array (BGA) structure, and the bottom of the chip antenna module after BGA packaging has 11 solder ball structures to form a ball grid array layer 6. The middle three solder balls, first solder ball 61, second solder ball 62 and third solder ball 63, are respectively connected toFigure 5 The first, second and third through silicon vias 51, 52 and 53 on the chip layer 5 are interconnected, and the other 8 fourth solder balls 64 serve as support. The 11 solder balls are BGA packaged on the chip layer 5, and then interconnected with the ball planting pads (i.e. circular metal pads 79) on the third metal layer 7 at the top of the multi-layer PCB carrier module through surface mount welding. After the reflow process, the solder ball height is reduced, and the air gap height between the chip layer 5 and the second dielectric layer 8 of the multi-layer PCB carrier module is maintained at about 200um. The ball grid array layer 6 is interconnected with the second metal layer 4 through through silicon vias (TSV), used to access DC signals and RF signals for the second metal layer 4, and interconnected with the metal pads in the third metal layer 7 through a surface mount process, thereby realizing three-dimensional heterogeneous integration of the chip antenna module and the multi-layer PCB carrier module. The first solder ball 61 and the third solder ball 63 are connected with the second metal lines 76 in the first metal line group 72 and the second metal line group 73, respectively, the second solder ball 62 is connected with the first metal line 71, and the fourth solder ball 64 is connected with the circular metal pad 79 one by one. The air layer 3 is used to adjust the distance between the dielectric matching layer module and the chip antenna module, and to provide space for the loading of PIN diodes and lumped inductors.

[0045] As shown in Figure 7 The third metal layer 7 of the top layer part of the multi-layer PCB carrier module is the top layer part of the bias line circuit structure, and the third metal layer 7 includes the first metal line 71, the first metal line group 72, the second metal line group 73, the second PIN diode 74 and the lumped inductor 75. The first metal line group 72 and the second metal line group 73 are the same structure and are symmetrically arranged, and each includes the second metal line 76, the third metal line 77 and the linear array arranged fourth metal line 78. The second PIN diode 74 is loaded between the second metal line 76 and the third metal line 77, the lumped inductor 75 is loaded between the third metal line 77 and the fourth metal line 78, and between adjacent fourth metal lines 78. The first metal line 71 is arranged between the second metal lines 76 of the first metal line group 72 and the second metal line group 73.

[0046] In the multilayer PCB carrier module, the metal lines in the third metal layer 7, the two PIN diodes and the six lumped inductors form the top part of the bias line circuit for DC signal access, wherein the PIN diodes and the lumped inductors are used to suppress the radio frequency signals in the bias line circuit in the low frequency and high frequency operating frequency bands of the phased array antenna, so as to reduce the influence of the bias line circuit on the radiation performance of the phased array antenna. The fourth metal line 78 is interconnected with the fourth metal layer 10 and the fifth metal layer 12 through the metalized vias inside the second dielectric layer 8, the third dielectric layer 9 and the fourth dielectric layer 11, wherein the fourth metal layer 10 serves as a ground metal plate to enable the chip antenna unit to realize unidirectional radiation of electromagnetic waves; the metal lines in the fifth metal layer 12 belong to part of the bottom part of the bias line circuit, and the rectangular metal patch is used to connect the radio frequency signal connector. The fifth metalized via 94 arranged in a periodic structure inside the third dielectric layer 9 can reduce the mutual coupling between the chip antenna units in the array.

[0047] In the embodiment, there are two second PIN diodes 74 and six lumped inductors 75. The second PIN diodes 74 are the same as the first PIN diodes 45 in the second metal layer 4 and serve to isolate the radio frequency signals when the antenna operates in a high frequency state (i.e., the second PIN diodes 74 are not conductive, and thus the metal lines are not conductive when the antenna operates in a high frequency state). The lumped inductors 75 are 0402 packaged, and the inductance values are 3nH and 12nH (wherein the inductance values of the first lumped inductor 751, the third lumped inductor 753 and the fourth lumped inductor 754 are 12nH, and the inductance values of the second lumped inductor 752, the fifth lumped inductor 755 and the sixth lumped inductor 756 are 3nH), and the two kinds of inductors have good suppression effect on the radio frequency signals near 7GHz and 17GHz frequency points, respectively. The second dielectric layer 8 attached with the third metal layer 7 is an RO4350B board material with a relative dielectric constant of 3.66 and a loss tangent of 0.0037, and a thickness of 0.508mm. The third dielectric layer 9 is an RO5880 board material with a dielectric constant of 2.2, a loss tangent of 0.0009 and a thickness of 1.575mm; the diameter of the metalized via inside the board is 0.3mm. The fourth dielectric layer 11 is an FR4 board material with a dielectric constant of 4.4, a loss tangent of 0.02 and a thickness of 0.254mm.

[0048] As Figure 8As shown in (a)-(e), the multi-layer PCB carrier module is provided with a metallized via and a through-hole structure. Three first metallized vias 81, 82 and 83 are arranged on the second dielectric layer 8. Three second metallized vias 91, 92 and 93 are arranged on the third dielectric layer 9. Two through-holes 101 and 102 and a third metallized via 103 are arranged on the fourth metal layer 10. Three fourth metallized vias 111, 112 and 113 and a ring-shaped metallized via 114 are arranged on the fourth dielectric layer 11. The fifth metal layer 12 includes a metal strip 121 and a metal patch 122 which are not in contact with each other. The metal patch 122 is provided with a ring-shaped through-hole 1221, and a circular metal patch 1222 is arranged inside the ring-shaped through-hole 1221.

[0049] The top of the first metallized via 81 is connected to Figure 7 The bottom of the pad under the third lumped inductor 753 of the third metal layer 7 shown in (c) is connected to the second metallized via 91. The second metallized via 91 passes through the through-hole 101 with a diameter of 0.9 mm on the fourth metal layer 10 and is connected to the fourth metallized via 111. The fourth metallized via 111 is interconnected with the metal strip 121. Through this structure, a positive direct current signal is provided for the chip antenna module. Figure 7 The bottom of the pad under the sixth lumped inductor 756 of the third metal layer 7 shown in (d) is connected to the second metallized via 92, the third metallized via 103, the fourth metallized via 112 and the metal patch 122 in sequence. The metal patch 122 is used to connect the direct current ground signal and the radio frequency ground signal. Figure 7 The first metal strip 71 of the third metal layer 7 shown in (e) is connected to Figure 4 The second metal rectangular patch 42 of the second metal layer 4 shown in (f) is connected to the second metallized via 93. The second metallized via 93 passes through the through-hole 102 with a diameter of 1 mm on the fourth metal layer 10 and is connected to the fourth metallized via 113. The fourth metallized via 113 is connected to the circular metal patch 1222 with a diameter of 0.6 mm inside the ring-shaped through-hole 1221 with a diameter of 1 mm. The coaxial structure formed by the ring-shaped through-hole 1221 and the circular metal patch 1222 is interconnected with an external radio frequency connector (not shown in the figure) to provide a radio frequency signal for the chip antenna module. The ring-shaped array metallized via 114 around the fourth metallized via 113 is used to connect the radio frequency ground signal of the fifth metal layer to the fourth metal layer, thereby realizing multi-point common ground and preventing parasitic resonance of the antenna.

[0050] The two sides of the third dielectric layer 9 corresponding to the first metal strip group 72 and the second metal strip group 73 are also symmetrically provided with periodically arranged fifth metallized vias 94, which are used to reduce the mutual coupling between the chip antenna units in the array.

[0051] Figure 9 The simulation curve of the active S parameter of the chip antenna unit in the embodiment of the application varying with frequency. The results show that the low-frequency operating frequency point of the antenna is about 7.1 GHz, and the -10 dB operating bandwidth is about 600 MHz; the high-frequency operating frequency point of the antenna is about 17.2 GHz, and the -10 dB operating bandwidth is about 600 MHz.

[0052] Figure 10 The simulation curve of the E-plane radiation pattern of the phased array antenna in the high-frequency operating state varying with the scanning angle in the embodiment of the application. The results show that the maximum gain of the normal beam of the phased array antenna is about 24.5 dB; under the condition that the gain of the E-plane scanning is within 6 dB and no large grating lobe appears in the visible region, the beam scanning range of the phased array antenna can reach -30° to +30°.

[0053] Figure 11 The simulation curve of the H-plane radiation pattern of the phased array antenna in the high-frequency operating state varying with the scanning angle in the embodiment of the application. The results show that the maximum gain of the normal beam of the phased array antenna is about 24.5 dB; under the condition that the gain of the H-plane scanning is within 6 dB and no large grating lobe appears in the visible region, the beam scanning range of the phased array can reach -30° to +30°.

[0054] Figure 12 The simulation curve of the E-plane radiation pattern of the phased array antenna in the low-frequency operating state varying with the scanning angle in the embodiment of the application. The results show that the maximum gain of the normal beam of the phased array is about 13.4 dB; under the condition that the gain of the E-plane scanning is within 6 dB and no large grating lobe appears in the visible region, the beam scanning range of the phased array can reach -30° to +30°.

[0055] Figure 13 The simulation curve of the H-plane radiation pattern of the phased array antenna in the low-frequency operating state varying with the scanning angle in the embodiment of the application. The results show that the maximum gain of the normal beam of the phased array is about 13.4 dB; under the condition that the gain of the H-plane scanning is within 6 dB and no large grating lobe appears in the visible region, the beam scanning range of the phased array can reach -30° to +30°.

[0056] The application aims at the difficulties of the prior art, and provides a planar on-chip phased array antenna structure scheme for realizing C to Ku band cross-band frequency reconfiguration through a three-dimensional heterogeneous integration mode of a dielectric matching layer module, a chip antenna module and a multilayer PCB carrier module, and regulating the off / on working states of PIN diodes by applying a bias voltage, solves the problems of single working frequency band, poor anti-interference capability and low aperture utilization of a traditional phased array antenna system, and the frequency reconfiguration range is 10 GHz. The dielectric matching layer module is composed of a plurality of metal microstrip periodic arrangements, is used for improving the active standing wave ratio and cross polarization characteristics of the antenna array, and protecting the antenna and the PIN diode from the environment. The chip antenna unit module is composed of four metal rectangular patches, three PIN diodes and a silicon wafer (i.e. a chip layer 5). When the three PIN diodes are not excited, the radio frequency signals on the four metal rectangular patches are discontinuous, and the antenna works in the Ku band; when the PIN diodes are turned on under the bias voltage excitation, the continuous radio frequency current makes the antenna switch to the low-frequency working state, i.e. the C band. The multilayer PCB carrier module is composed of a metal bias line, a metallized via, a ground metal plate, two PIN diodes and six lumped inductors; the metal line 121 on the bottom layer of the module is isolated from the antenna radiation surface array (i.e. a second metal layer 4) through the ground metal plate, and the mutual coupling between the metal components and the reconfigurable components is greatly reduced. Each chip antenna unit in the array is fed by a single port, and the number of chip antenna units working in the two bands is the same (i.e. all the antenna units work at the same time in the C band and the Ku band); wherein, the radio frequency feeding port is composed of a circular metal patch 1222 and a circular via 1221 structure in the fifth metal layer 12; the high-resistance silicon wafer with a high dielectric constant (11.9) is used as the substrate of the chip antenna module, which can effectively reduce the size of the antenna unit and prevent the spacing between the units from being too large. The chip antenna module is micro-assembled on the multilayer PCB carrier module through the through silicon via (TSV) technology and the ball grid array (BGA) packaging technology, realizes three-dimensional heterogeneous integration, makes the antenna second metal layer 4 closer to the air layer for radiation, and facilitates heat dissipation of the PIN tube. The application of the planar phased array antenna to a seeker can realize switching of different working bands of the system without occupying extra space, and has very good anti-interference effect in electronic countermeasures. The performance characteristics of the antenna are as follows: 1. frequency reconfiguration across bands, the frequency reconfiguration range is more than 10 GHz; 2. modular chip antenna unit, which improves the reliability of the antenna array system; 3. three modules of the chip antenna unit are heterogeneously integrated, which has high integration; 4. each antenna unit can realize frequency reconfiguration, i.e. the number of antenna units working in the high / low frequency state of the antenna array is the same, and the aperture utilization is high.

[0057] The above detailed description of the specific embodiments of the present application has been given to understand the purpose, technical solutions and beneficial effects of the present application. It should be understood that the above description is only a specific embodiment of the present application and is not intended to limit the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A cross-band frequency reconfigurable planar phased array antenna with modular chip antenna units, characterized in that, The phased array antenna is composed of an array of 2N*2N chip antenna units, N is a natural number greater than or equal to 1, and the chip antenna unit comprises, from top to bottom, a dielectric matching layer module, an air layer (3), a chip antenna module and a multilayer PCB carrier board module; The medium matching layer module interacts with electromagnetic waves radiated by the chip antenna module to improve the active standing wave ratio and cross polarization characteristics of the chip antenna unit, the air layer is used to adjust the distance between the medium matching layer module and the chip antenna module, the chip antenna module sequentially comprises a second metal layer (4), a chip layer (5) and a ball grid array layer (6) from top to bottom, the second metal layer (4) is the radiation layer of the chip layer (5), the second metal layer (4) comprises first, second, third and fourth metal rectangular patches (41, 42, 43 and 44) arranged at equal intervals in sequence, a first PIN diode (45) is loaded between each two adjacent metal rectangular patches, when the three first PIN diodes are not applied with a bias voltage, the radio frequency signals on the four metal rectangular patches are discontinuous, and the antenna works in a high frequency state, i.e. a Ku band; when the three first PIN diodes (45) are turned on under the excitation of the bias voltage, the radio frequency current between the four metal rectangular patches is continuous, the effective radiation length of the antenna is increased, and the antenna is switched to a low frequency working state, i.e. a C band, the second metal layer (4) is controlled to make the phased array antenna work in different frequency bands, the ball grid array layer (6) is used for connecting the second metal layer (4) with direct current signals and radio frequency signals, and is electrically connected with the multi-layer PCB carrier module to realize three-dimensional heterogeneous integration of the chip antenna module and the multi-layer PCB carrier module; the multi-layer PCB carrier module sequentially comprises a third metal layer (7), a second dielectric layer (8), a third dielectric layer (9), a fourth metal layer (10), a fourth dielectric layer (11) and a fifth metal layer (12) from top to bottom, the third metal layer (7) comprises a first metal wire (71), a first metal wire group (72), a second metal wire group (73), a second PIN diode (74) and a lumped inductor (75), the first metal wire group (72) and the second metal wire group (73) are the same in structure and each comprises a second metal wire (76), a third metal wire (77) and a fourth metal wire (78) arranged in a linear array, the second PIN diode (74) is loaded between the second metal wire (76) and the third metal wire (77), the lumped inductor (75) is loaded between the third metal wire (77) and the fourth metal wire (78) and between adjacent fourth metal wires (78), and the first metal wire (71) is arranged between the second metal wires (76) of the first metal wire group (72) and the second metal wire group (73); the multi-layer PCB carrier module is provided with a bias line circuit, the multi-layer PCB carrier module is used to suppress radio frequency signals in the bias line circuit on one hand to reduce the influence of the bias line circuit on the radiation performance of the phased array antenna, and on the other hand to make the chip antenna unit realize one-way radiation of electromagnetic waves and reduce the mutual coupling between the chip antenna units in the array; the medium matching layer module, the air layer, the chip antenna module and the multi-layer PCB carrier module jointly realize the cross-band frequency reconstruction function of the chip antenna unit from the C band to the Ku band.

2. The cross-band frequency reconfigurable planar phased array antenna with modular chip antenna units of claim 1, wherein, The dielectric matching layer module comprises a first dielectric layer (2) and a first metal layer (1) attached to the upper surface of the first dielectric layer (2), the first metal layer (1) comprising a periodic array of metal strips, the dielectric matching layer module using the periodic metal strip structure on the first metal layer (1) and the first dielectric layer (2) to improve the active standing wave ratio and cross-polarization characteristics of the chip antenna unit, so that the standing wave ratio is less than 2 in the two reconstructed waveband ranges.

3. The cross-band frequency reconfigurable planar phased array antenna with modular chip antenna elements of claim 1, wherein, When the three first PIN diodes are not applied with a bias voltage, the radio frequency signal directly excites the second metal rectangular patch (42), the length of the second metal rectangular patch (42) corresponding to the half wavelength of the antenna operating in a high frequency state, and the remaining three metal rectangular patches acting as parasitic patches at this time, the lengths of which affect the directional diagram and resonant frequency point of the antenna.

4. The cross-band frequency reconfigurable planar phased array antenna with modular chip antenna elements of claim 1, wherein, Three through silicon vias are made on the chip layer (5) by using the through silicon via technology, the second metal layer (4) and the ball grid array layer (6) are interconnected through the three through silicon vias, the middle second through silicon via (52) is connected with the second rectangular metal patch (42) to serve as a radio frequency signal access point, the first through silicon via (51) and the third through silicon via (53) on the two sides are respectively connected with the first rectangular metal patch (41) and the fourth rectangular metal patch (44) to serve as DC signal access points, wherein the first through silicon via (51) accesses a positive DC signal and the third through silicon via (53) is grounded.

5. The cross-band frequency reconfigurable planar phased array antenna with modular chip antenna unit of claim 4, wherein, The ball grid array layer (6) comprises first solder balls (61), second solder balls (62), third solder balls (63) and fourth solder balls (64), the first solder balls (61), the second solder balls (62) and the third solder balls (63) are respectively interconnected with the first through silicon via (51), the second through silicon via (52) and the third through silicon via (53) on the chip layer (5), and the fourth solder balls (64) are multiple and used for supporting.

6. The cross-band frequency reconfigurable planar phased array antenna with modular chip antenna elements of claim 1, wherein, The second dielectric layer (8) is provided with three first metallized vias (81, 82, 83), the third dielectric layer (9) is provided with three second metallized vias (91, 92, 93), the fourth metal layer (10) is provided with two through holes (101, 102) and a third metallized via (103), the fourth dielectric layer (11) is provided with three fourth metallized vias (111, 112, 113), and the fifth metal layer (12) comprises a metal strip (121) and a metal patch (122) which are not in contact, and the metal patch (122) is provided with an annular through hole (1221); the positions of the three first metallized vias (81, 82, 83), the three second metallized vias (91, 92, 93), the two through holes (101, 102) and the third metallized via (103), and the three fourth metallized vias (111, 112, 113) are respectively matched with the lumped inductance at the end of the first metal strip group (72) and the second metal strip group (73) on the third metal layer (7), and the first metal strip (71) is electrically connected to the circular metal patch in the annular through hole (1221) of the metal patch (122) in sequence through the first metallized via (83), the second metallized via (93), the through hole (102) and the fourth metallized via (113), the lumped inductance at the end of the first metal strip group (72) is electrically connected to the metal strip (121) on the fifth metal layer (12) in sequence through the first metallized via (81), the second metallized via (91), the through hole (101) and the fourth metallized via (111), and the lumped inductance at the end of the second metal strip group (73) is electrically connected to the metal patch (122) on the fifth metal layer (12) in sequence through the first metallized via (82), the second metallized via (92), the third metallized via (103) and the fourth metallized via (112).

7. The cross-band frequency reconfigurable planar phased array antenna with modular chip antenna elements of claim 6, wherein, The bias line circuit is composed of the third metal layer (7), the first metallized vias (81, 82) on the second dielectric layer (8), the second metallized vias (91, 92) on the third dielectric layer (9), the fourth metallized vias (111, 112) on the fourth dielectric layer (11), and the metal strip (121) in the fifth metal layer (12).

8. The cross-band frequency reconfigurable planar phased array antenna with modular chip antenna elements of claim 6, wherein, The two sides of the third dielectric layer (9) corresponding to the first metal strip group (72) and the second metal strip group (73) are also symmetrically provided with periodically arranged fifth metallized vias (94) for reducing the mutual coupling between the chip antenna units in the array; An annular array metallized via (114) is arranged around the fourth metallized via (113) for connecting the radio frequency ground signal of the fifth metal layer to the fourth metal layer, thereby realizing multi-point common ground and preventing the antenna from appearing parasitic resonance.

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