Network chips and network devices

Abstract

The present application provides a network chip, which is provided with multiple ports, and the network chip also includes multiple buses and multiple switching units, wherein: the switching unit is bound to at least one port, and is used to receive data from outside the network chip and send data to outside the network chip through the bound port; each of the multiple buses is bound to at least two switching units, each of the switching units is bound to at least one of the multiple buses, and the switching unit forwards data between different switching units through a network composed of the multiple buses. The present application reduces the data exchange delay.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a network chip and a network device. Background Art

[0002] A network chip (NP) is a microprocessor used in communication networks to provide logic for sending and receiving data. NP is a programmable device that is specifically used for various tasks in the communication field, such as packet processing, protocol analysis, routing lookup, voice / data aggregation, firewalls, etc.

[0003] The network chip includes multiple ports arranged at the periphery of the network chip and a switch arranged at the middle position of the network chip. The principle of data exchange between the ports in the network chip is as follows: the network chip receives data from the outside of the network chip through one port, and the data must be exchanged by the switch located at the middle position of the network chip before it can be output from another port.

[0004] Obviously, data exchange between any ports must pass through the switch located in the middle, which increases the workload of the switch and increases the data exchange delay. Summary of the invention

[0005] The present application provides a network chip and a network device, which are used to solve the problem of long data exchange delay in the network chip.

[0006] In a first aspect, the present application provides a network chip, which is provided with multiple ports, and the network chip also includes multiple buses and multiple switching units, wherein: the switching unit is bound to at least one of the ports, and is used to receive data from outside the network chip and send data to outside the network chip through the bound port; each of the multiple buses is bound to at least two of the switching units, each of the switching units is bound to at least one of the multiple buses, and the switching unit forwards data between different switching units through the network formed by the multiple buses.

[0007] Since the switching unit in the network chip forwards data between different switching units through a network composed of multiple buses, when exchanging data between ports on the network chip, data exchange between ports can be achieved by forwarding the data through the switching unit in the network chip, and each switching unit only needs to forward the data it receives. Compared with the prior art in which all data is forwarded through the switch in the chip, the data received by the network chip is diverted, which improves the data exchange efficiency and thus reduces the data exchange delay in the network chip; since data is forwarded between switching units through the bus, the data transmission efficiency in the network chip is improved and the data forwarding delay is further reduced; for the case where the port sends and receives data spontaneously, the data exchange can be completed in the switching unit to which the port is bound, without the participation of other switching units, and compared with related technologies, there is no need for the data to go to the center of the network chip The data exchange delay in the network chip is further reduced; and because the network chip includes multiple switching units and each switching unit has the same structure, only one switching unit needs to be developed to complete the design of network chips with different bandwidths by reusing the switching unit, thereby reducing the design difficulty and workload; because the network chip includes multiple switching units connected by a bus and the switching units have the same structure, the difficulty of top-level wiring and connection is reduced; because each switching unit has the same structure, the processing complexity of each switching unit is the same, thus, the occurrence of hot spots on the network chip can be avoided to a certain extent, reducing the difficulty of power supply and heat dissipation; because the network chip includes multiple switching units and the switching units are interconnected by a bus, multiple network chips can be interconnected by the bus to coordinate the processing flows between different network chips without defining a separate set of interconnection protocols.

[0008] In one possible implementation, the switching unit includes a switch and an access controller, wherein: the access controller is used to obtain a data packet carrying the data from outside the network chip and send a data packet carrying the data to outside the network chip through a port bound to the switching unit to which it belongs; the switch is used to obtain a data packet carrying the data from the access controller or a bus, obtain a destination address from the data packet, determine a sending port from the multiple ports based on the destination address, determine a destination unit according to the sending port, determine a next transit unit from the multiple switching units according to the destination unit, and forward the data packet to the next transit unit through the bus, so that the next transit unit continues to determine the next transit unit and forward the data packet until the data carried in the data packet is forwarded to the destination unit.

[0009] In a possible implementation, the switching unit includes a switch and an access controller, wherein: the access controller is used to obtain a data packet carrying the data from outside the network chip and send a data packet carrying the data to outside the network chip through a port bound to the switching unit to which it belongs; if the switch obtains the data packet from the access controller, the switch is used to obtain a destination address from the data packet, determine a sending port based on the destination address, determine a destination unit based on the sending port, determine path information for forwarding the data to the destination unit based on the destination unit, and transmit the data to the destination unit based on the path information and the bus. The data and the path information are sent to the transit unit so that the transit unit continues to forward the data and the path information according to the path information until the data is forwarded to the destination unit; if the switch obtains the data and the path information forwarded by another switching unit or the transit unit from the bus, the switch is used to continue to forward the data and the path information according to the path information until the data is forwarded to the destination unit; wherein the path information is used to indicate information of the transit unit through which the data is forwarded to the destination unit, and the transit unit is a switching unit among the multiple switching units used to forward the data.

[0010] In one possible implementation, the switching unit includes a switch, an access controller and a data packet processor, wherein: the access controller is used to obtain a data packet carrying the data from outside the network chip and send a data packet carrying the data to outside the network chip through a port bound to the switching unit to which it belongs; the data packet processor is used to obtain the data packet from the access controller or from the bus through the switch, obtain a destination address from the data packet, determine a sending port from the multiple ports based on the destination address, determine a destination unit according to the sending port, and determine information of a next transit unit according to the destination unit; the switch is used to obtain information of the data packet and the next transit unit from the data packet processor, and transmit the data packet to the next transit unit through the bus according to the information of the next transit unit, so that the next transit unit continues to determine the next transit unit and forward the data packet until the data carried in the data packet is forwarded to the destination unit.

[0011] In a possible implementation, the switching unit includes a switch, an access controller and a data packet processor, wherein: the access controller is used to obtain a data packet carrying the data from outside the network chip and send a data packet carrying the data to outside the network chip through a port bound to the switching unit to which it belongs; the data packet processor is used to obtain the data packet from the access controller, obtain a destination address from the data packet, determine a sending port from the multiple ports based on the destination address, determine a destination unit according to the sending port, and determine path information for forwarding the data to the destination unit according to the destination unit; if the switch obtains the path information and the data from the data packet processor, then The switch is used to send the data and the path information to the transit unit through the bus according to the path information, so that the transit unit continues to forward the data and the path information according to the path information until the data is forwarded to the destination unit; if the switch obtains the data and the path information forwarded by another switching unit or the transit unit from the bus, the switch is used to continue to forward the data and the path information according to the path information until the data is forwarded to the destination unit; wherein the path information is used to indicate information of the transit unit through which the data is forwarded to the destination unit, and the transit unit is a switching unit among the multiple switching units used to forward the data.

[0012] In a possible implementation, the switching unit is further configured to share data packet processors in different switching units through a network formed by the multiple buses.

[0013] In one possible implementation, the switching unit also includes a traffic manager and / or a first buffer, wherein: the traffic manager is used to write the data into a corresponding queue and schedule the data in the queue according to the attributes of the data; the first buffer is used to cache the data; and the switch is also used to forward the data according to the scheduling information of the data by the traffic manager.

[0014] In a possible implementation, the switching unit is further configured to share first buffers in different switching units through a network formed by the multiple buses.

[0015] In a possible implementation, the traffic manager in the switching unit is also used to obtain a data transmission scheduling request sent by another switching unit through the network composed of the multiple buses, and generate scheduling response information so that the other switching unit schedules the data based on the scheduling response information.

[0016] In a possible implementation, the network chip further includes a second buffer and / or a forwarding table, wherein:

[0017] The second buffer and the forwarding table are both connected to the switching unit via a bus;

[0018] The second buffer is used to cache the data obtained by the switching unit;

[0019] The forwarding table is used to indicate the port information used for communication between the network chips.

[0020] In a second aspect, the present application provides a network device, comprising at least one network chip as described in any one of the first aspects above, wherein at least one of the network chips is connected via a bus. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 A schematic diagram of the structure of a network chip provided in the related art;

[0022] Figure 2 Schematic diagram of the structure of the network chip provided in the embodiment of the present application Figure 1 ;

[0023] Figure 3 Schematic diagram of the structure of the network chip provided in the embodiment of the present application Figure 2 ;

[0024] Figure 4 Schematic diagram of the structure of the network chip provided in the embodiment of the present application Figure 3 ;

[0025] Figure 5 Schematic diagram of the structure of the network chip provided in the embodiment of the present application Figure 4 ;

[0026] Figure 6 Schematic diagram of the structure of the network chip provided in the embodiment of the present application Figure 5 ;

[0027] Figure 7 Schematic diagram of the structure of the network chip provided in the embodiment of the present application Figure 6 ;

[0028] Figure 8 Schematic diagram of the structure of the network chip provided in the embodiment of the present application Figure 7 ;

[0029] Fig. 9 Schematic diagram of the structure of the network chip provided in the embodiment of the present application Figure 8 ;

[0030] Fig.10 Schematic diagram of the structure of the network chip provided in the embodiment of the present application Figure 9 . DETAILED DESCRIPTION

[0031] The technical solution in this application will be described below in conjunction with the accompanying drawings.

[0032] In order to make the purpose, technical solutions and advantages of this application clearer, the technical solutions in this application will be clearly and completely described below in conjunction with the drawings in this application. Obviously, the described embodiments are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0033] The terms "first", "second", etc. in the specification embodiments, claims, and drawings of the present application are only used for the purpose of distinguishing descriptions, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, including a series of steps or units. The method, system, product, or device is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products, or devices.

[0034] It should be understood that in the present application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0035] First, the structure of a network chip in the related art is described.

[0036] Figure 1 FIG. 1 is a schematic diagram of the structure of a network chip provided in the related art. Figure 1As shown, the network chip includes multiple ports, multiple media access controllers (Media Access Control, MAC), multiple packet processors (Packet Processing, PP), a traffic manager (Traffic Manager, TM) and a switch (Switch, SW).

[0037] in:

[0038] TM and SW are located in the middle of the network chip, multiple PPs are distributed around TM and SW, multiple MACs are distributed around multiple PPs, and multiple ports are distributed around multiple MACs. Obviously, the various parts of the network chip are distributed around TM and SW. In addition, each MAC is bound to at least one port, and each PP is bound to at least one MAC.

[0039] Next, the functions of each part in the network chip are described.

[0040] Ports are high-speed interfaces mainly used to provide signals to network chips, such as 50Gbps high-speed electrical serial interface SerDes or optical interface Optical IO. Network chips receive data from or send data to the outside of the network chip through ports.

[0041] The media access controller is used to provide an interface for standard protocols and to verify data (for example, verify the integrity and correctness of the data), frame delimitation, transmission and reception, and encapsulation through standard protocols.

[0042] The data packet processor is used to perform protocol analysis on the received data packets, find the sending port, etc.

[0043] The traffic manager is used to write data into the corresponding queue according to the data's attributes and sending port, and to schedule the data written into the queue according to a certain QOS strategy.

[0044] The switch is used to switch data to the sending port.

[0045] Next, the principle of data exchange between ports in a network chip in the related art is described.

[0046] The network chip receives data from the receiving port, and the data is processed by the receiving side of the first MAC and the first PP in turn, and then reaches the TM and SW. The TM writes the data into the corresponding queue according to the attributes of the data, and schedules the data in the queue. The SW exchanges the data to the second PP according to the scheduling information of the TM. The data is processed by the sending side of the second PP and the second MAC in turn, and then output through the sending port. It should be noted that the sending port is a port among multiple ports that sends the data to the outside of the network chip, and the receiving port is a port among multiple ports that receives the data from the outside of the network chip.

[0047] The first MAC is the MAC bound to the receiving port in the network chip, the first PP is the PP bound to the first MAC in the network chip, the second MAC is the MAC bound to the sending port in the network chip, and the second PP is the PP bound to the second MAC in the network chip. It should be noted that the receiving port and the sending port can be the same or different.

[0048] Obviously, the data exchange process between any ports in the network chip must pass through the SW located in the middle of the network chip, which increases the workload of the SW and lengthens the data exchange delay. In addition, since the SW is located in the middle of the network chip, the data exchange between the ports must be completed after the data reaches the SW located in the middle of the network chip. Even if a port sends and receives data by itself, it needs to pass through the SW in the middle, which prolongs the data transmission time in the network chip, and further lengthens the data exchange delay. In addition, since the above-mentioned parts are first developed independently and then integrated together, the difficulty of the top-level layout and connection of each part is increased. In addition, since the processing complexity of each part is different, the power consumption of each part is different, which makes the network chip have hot spots and increases the difficulty of power supply and heat dissipation design. In addition, when multiple network chips are interconnected, it is necessary to define another set of interconnection protocols to coordinate the processing flow between the various parts in different network chips.

[0049] It should be noted that the packet processor and traffic manager in the above network chip are optional, that is, whether to set the packet processor and traffic manager in the network chip can be determined according to the function of the network chip. In addition, when the network chip does not include the packet processor and traffic manager, the description of the functions of each part in the above network chip will also be adjusted accordingly.

[0050] In order to solve the above problems, an embodiment of the present application provides a network chip, which is provided with multiple ports, and the network chip also includes multiple buses and multiple switching units, wherein: the switching unit is bound to at least one port, and is used to receive data from outside the network chip and send data to outside the network chip through the bound port; each of the multiple buses is bound to at least two switching units, each of the switching units is bound to at least one of the multiple buses, and the switching unit forwards data between different switching units through a network composed of multiple buses. There is no intersection between the multiple buses.

[0051] Next, a switching unit, a plurality of buses, and a plurality of ports are described.

[0052] The multiple switching units may be arranged in an array, for example. The array arrangement may be a rectangular array arrangement or a ring array arrangement, etc., which is not particularly limited in the present application.

[0053] The number of switching units and the bandwidth of each switching unit can be set according to the bandwidth of the network chip. For example, if the bandwidth of the network chip is 14.4Tbps, the number of switching units can be 9, and the bandwidth of each switching unit is 1.6Tbps. For another example, if the bandwidth of the network chip is 24Tbps, the number of switching units can be 8, and the bandwidth of each switching unit is 3Tbps.

[0054] It should be noted that the bandwidth of each switching unit may be the same or different, and the embodiment of the present application does not impose any special limitation on this.

[0055] The number of ports bound to the switching unit and the bandwidth of each port can be determined according to the bandwidth of the switching unit. For example, if the bandwidth of the switching unit is 1.6Tbps, the number of ports can be 8, and the bandwidth of each port is 0.2Tbps. For another example, if the bandwidth of the switching unit is 1.2Tbps, the number of ports can be 4, and the bandwidth of each port is 0.3Tbps.

[0056] It should be noted that the number of ports corresponding to each switching unit and the bandwidth of each port may be the same or different, and this application does not impose any special limitation on this.

[0057] The port is mainly used to provide a high-speed interface for providing signals to the network chip, for example, a 50 Gbps high-speed electrical serial interface SerDes, or an optical interface Optical IO.

[0058] The port can be set in the following two ways:

[0059] The first one is that multiple ports are distributed around multiple switching units.

[0060] In the second method, each port is set in the switching unit to which it is bound.

[0061] The deployment mode of the multiple buses may be, for example, a non-blocking deployment mode or a rearranged non-blocking deployment mode, etc. Each bus may include multiple physical buses to provide sufficient bandwidth.

[0062] The principle of data exchange between the ports on the above network chip is:

[0063] The receiving port receives data from outside the network chip and forwards the received data to the switching unit bound to it. The switching unit forwards the data to the transit unit through the bus bound to it, so that the transit unit continues to forward the data through the bus bound to it until the data is forwarded to the switching unit bound to the sending port, and the switching unit bound to the sending port sends the received data to the outside of the network chip through the sending port. The sending port is a port among multiple ports that sends the data to the outside of the network chip, and the receiving port is a port among multiple ports that receives the data from the outside of the network chip. The transit unit is a switching unit used to transit data when exchanging data between the switching unit bound to the receiving port and the switching unit bound to the sending port.

[0064] The switching unit bound to the receiving port, each transit unit, and the switching unit bound to the sending port in the network chip constitute the transmission path of the data in the network chip. There are multiple paths for data in the network chip, and the final transmission path of the data in the network chip is one of the multiple paths. Specifically, a routing rule can be set to determine the transmission path of the data. For example, in order to shorten the transmission delay of data inside the network chip and balance the load on different paths, when determining the transmission path of the data, a path with relatively low load is selected according to the load of each path.

[0065] The data transmission path is determined by the switching unit bound to the receiving port or is jointly determined by the switching unit bound to the receiving port, each transit unit and the switching unit bound to the sending port.

[0066] In other words, if the transmission path is determined by the switching unit bound to the receiving port, the switching unit bound to the receiving port needs to determine the information of the transit unit and the identifier of the switching unit bound to the sending port, the information of the transit unit includes the identifier of the transit unit and the sequence between the transit units, and the path information is generated based on the above information. In this way, each transit unit can exchange data from the switching unit bound to the receiving port to the switching unit bound to the sending port according to the path information.

[0067] If the transmission path is jointly determined by the switching unit bound to the receiving port, each transit unit and the switching unit bound to the sending port, the switching unit bound to the receiving port first determines the information of the transit unit adjacent to it, and then the determined transit unit determines the information of the transit unit adjacent to it and located behind it in the data transmission direction, that is, the previous unit in the transmission path only needs to determine the unit adjacent to it and located behind it. In this way, the switching unit bound to the receiving port and each transit unit can exchange data from the switching unit bound to the receiving port to the switching unit bound to the sending port according to the information of the transit unit determined by themselves. It should be noted that when determining the transit unit, the switching unit bound to the sending port is required.

[0068] It should be noted that the number of transfer units can be 0, or 1 or more, and is not specifically limited here.

[0069] From the above, it can be seen that since the switching unit in the network chip forwards data between different switching units through a network composed of multiple buses, when exchanging data between ports on the network chip, the data exchange between the ports can be realized by forwarding the data through the switching unit in the network chip, and each switching unit only needs to forward the data it receives. Compared with the prior art in which all data is forwarded through the switch in the chip, the data received by the network chip is diverted, the data exchange efficiency is improved, and thus the data exchange delay in the network chip is reduced; since the switching units forward data through the bus, the data transmission efficiency in the network chip is improved, and the data forwarding delay is further reduced; for the case where the port sends and receives data spontaneously, the data exchange can be completed in the switching unit to which the port is bound, without the participation of other switching units, and compared with the related technology, there is no need for the data to go to the center of the network chip The data is exchanged at different positions, which further reduces the data exchange delay in the network chip; and because the network chip includes multiple switching units and the structure of each switching unit is the same, only one switching unit needs to be developed to complete the design of network chips with different bandwidths by reusing the switching unit, which reduces the design difficulty and workload; because the network chip includes multiple switching units connected by a bus, and the structure of the switching units is the same, the difficulty of top-level wiring and connection is reduced; because the structure of each switching unit is the same, the processing complexity of each switching unit is the same, thus, the occurrence of hot spots on the network chip can be avoided to a certain extent, reducing the difficulty of power supply and heat dissipation; because the network chip includes multiple switching units and the switching units are interconnected by a bus, multiple network chips can be interconnected by the bus to coordinate the processing flows between different network chips without defining a separate set of interconnection protocols.

[0070] Next, the internal structure of the switching unit is described.

[0071] In a possible implementation, the switching unit includes a switch and an access controller.

[0072] Since the principles for determining the data transmission path are different, the working principle of the switch in the switching unit will vary. Therefore, the working principles of the switch and the access controller in the switching unit are described respectively based on different principles for determining the transmission path.

[0073] As can be seen from the above, there are two principles for determining the data transmission path. The first principle is determined by the switching unit bound to the receiving port, each transit unit and the switching unit bound to the sending port, and the second principle is determined by the switching unit bound to the receiving port. Below, the working principles of the switch and the access controller are explained based on the above two transmission path determination principles.

[0074] If the data transmission path is determined according to the first method, then:

[0075] The access controller is used to obtain data packets carrying data from outside the network chip and send data packets carrying data to outside the network chip through the port bound to the switching unit to which it belongs. The switch is used to obtain data packets carrying data from the access controller or the bus, obtain the destination address from the data packet, determine the sending port from multiple ports based on the destination address, and determine the destination unit according to the sending port, determine the next transit unit from multiple switching units according to the destination unit, and forward the data packet to the next transit unit through the bus, so that the next transit unit continues to determine the next transit unit and forward the data packet until the data carried in the data packet is forwarded to the destination unit. The destination unit is the switching unit bound to the sending port among multiple switching units.

[0076] It should be noted that if the switching unit is a switching unit bound to the receiving port, the switch obtains the data packet from the access controller. If the switching unit is a transit unit, the switch obtains the data packet from the bus, which is a data packet sent through the bus by the switching unit that is before and adjacent to it in the transmission path (i.e., the switching unit bound to the receiving port or other transit units).

[0077] It should be noted that a switching unit can also be used as a transit unit and a switching unit bound to a receiving port at the same time, and the data forwarded by the transit unit is different from the data forwarded by the switching unit bound to a receiving port. That is, a switching unit can forward data received from the port to which it is bound, and can also forward data received from the port bound to other switching units.

[0078] After obtaining the data packet carrying the data, the access controller can also verify the data (e.g., verify the integrity and correctness of the data), frame delimit, encapsulate, etc. through standard protocols. The access controller is, for example, but not limited to, a media access controller, and this application does not make any special restrictions on this.

[0079] Based on this, the principle of data exchange between ports on the network chip is:

[0080] The receiving port receives a data packet carrying data from outside the network chip, and sends the data packet to the switching unit bound thereto. The access controller in the switching unit obtains the data packet and transmits the data packet to the switch in the switching unit. The switch determines the next transit unit according to the destination address carried in the data packet and in combination with the above principle, and sends the data packet to the next transit unit through the bus. The switch in the next transit unit receives the data packet from the bus, and determines the next transit unit (i.e., the next transit unit corresponding to the next transit unit) according to the destination address carried in the data packet and in combination with the above principle, and forwards the data packet through the bus until the data carried in the data packet is forwarded to the destination unit. The switch in the destination unit sends data to the outside of the network chip through the sending port. Specifically, the switch in the destination unit sends the data to the access controller therein, so that the access controller encapsulates the data and sends it from the sending port.

[0081] If the data transmission path is determined according to the second method, then:

[0082] The access controller is used to obtain a data packet carrying data from outside the network chip and send a data packet carrying data to outside the network chip through a port bound to the switching unit to which it belongs. If the switch obtains a data packet from the access controller, that is, the switching unit is a switching unit bound to a receiving port, the switch is used to obtain a destination address from the data packet, determine a sending port based on the destination address, determine a destination unit according to the sending port, determine path information for forwarding data to the destination unit according to the destination unit, and send the data and path information to the transfer unit according to the path information and through the bus, so that the transfer unit continues to forward the data and path information according to the path information until the data is forwarded to the destination unit. If the switch obtains data and path information forwarded by another switching unit (that is, the switching unit bound to the receiving port) or a transfer unit from the bus, that is, the switching unit is a transfer unit, the switch is used to continue to forward the data and path information according to the path information until the data is forwarded to the destination unit. Among them, the path information is used to indicate the information of the transfer unit through which the data is forwarded to the destination unit, and the transfer unit is a switching unit used to transfer data among multiple switching units, and the information of the transfer unit is used to indicate the identification of the transfer unit and the order between the transfer units.

[0083] The access controller has been described above and will not be described again here.

[0084] Based on this, the principle of data exchange between ports on the network chip is:

[0085] The receiving port receives a data packet carrying data from outside the network chip, and sends the data packet to the switching unit bound to it. The access controller in the switching unit obtains the data packet and transmits the data packet to the switch in the switching unit. The switch determines the path information based on the destination address carried in the data packet and in combination with the above principle, and sends the data and path information to the transit unit adjacent to it through the bus based on the path information. The switch in the transit unit receives the path information and data, and continues to forward the data and path information to the next transit unit based on the path information until the data is forwarded to the destination unit. The switch in the destination unit receives the data and sends the data to the outside of the network chip through the sending port. Specifically, the switch in the destination unit sends the data to the access controller therein, so that the access controller encapsulates the data and sends it from the sending port.

[0086] In another possible implementation, the switching unit includes a switch, an access controller, and a data packet processor.

[0087] Due to the different principles for determining the data transmission path, the working principles of the switch and packet processor in the switching unit will vary. Therefore, based on the different principles for determining the transmission path, the working principles of the switch, access controller and packet processor in the switching unit are explained respectively.

[0088] Following the description of the principle of determining the data transmission path in the above text, if the data transmission path is determined according to the first method, then:

[0089] The access controller is used to obtain data packets carrying data from outside the network chip and send data packets carrying data to outside the network chip through the port bound to the switching unit to which it belongs. The data packet processor is used to obtain data packets from the access controller or from the bus through the switch, obtain the destination address from the data packet, determine the sending port from multiple ports based on the destination address, determine the destination unit according to the sending port, and determine the information of the next transit unit according to the destination unit. The switch is used to obtain the data packet and the information of the next transit unit from the data packet processor, and transmit the data packet to the next transit unit through the bus according to the information of the next transit unit, so that the next transit unit continues to determine the next transit unit and forward the data packet until the data carried in the data packet is forwarded to the destination unit.

[0090] It should be noted that if the switching unit is a switching unit bound to the receiving port, the data packet processor obtains the data packet from the media access controller in the switching unit. If the switching unit is a transit unit, the data packet processor obtains the data packet from the bus through the switch in the switching unit, and the data packet is a data packet sent through the bus by the switching unit that is before and adjacent to it in the transmission path (i.e., the switching unit bound to the receiving port or other transit units).

[0091] The access controller has been described above and will not be described again here.

[0092] In one possible implementation, the packet processor includes a packet processor on the receiving side and a packet processor on the sending side, wherein the packet processor on the receiving side is used to complete the packet processing flow on the receiving side, and the packet processor on the sending side is used to complete the packet processing flow on the sending side.

[0093] For example, the packet processor includes multiple levels of Match / Action (MA) units, and each level of MA can complete a certain packet processing process according to the software pre-developed by the user. The more levels of MA, the more complex the functions supported by PP. The levels of MA included in the packet processor in each switching unit can be the same or different, and the embodiments of the present application do not specifically limit this. It should be noted that the structure of the above-mentioned packet processor is only exemplary and is not used to limit the present application.

[0094] Based on this, the principle of data exchange between ports on the network chip is:

[0095] The receiving port receives a data packet carrying data from outside the network chip, and sends the data packet to the switching unit bound thereto. The access controller in the switching unit obtains the data packet and transmits the data packet to the data packet processor in the switching unit. The data packet processor determines the information of the next transit unit according to the destination address in the data packet and in combination with the above principle, and sends the information of the next transit unit and the data packet to the switch in the switching unit, and the switch forwards the data packet to the next transit unit through the bus according to the information of the next transit unit. The information of the next transit unit is used to indicate the identifier of the next transit unit. The switch in the next transit unit receives the data packet through the bus, and transmits the data packet to the data packet processor, and the data packet processor determines the next transit unit (i.e., the next transit unit corresponding to the next transit unit) according to the above principle, and sends the information of the next transit unit determined by it and the data packet to the switch, so that the switch continues to forward the data packet until the data carried in the data packet is forwarded to the destination unit. The destination unit is the switching unit bound to the sending port. The switch in the destination unit sends data to the outside of the network chip through the sending port. Specifically, the switch in the destination unit sends the data to the data packet processor and access controller therein in sequence for corresponding processing, and then sends the data out from the sending port.

[0096] If the data transmission path is determined according to the second method, then:

[0097] The access controller is used to obtain data packets carrying data from outside the network chip and send data packets carrying data to outside the network chip through the port bound to the switching unit to which it belongs. The data packet processor is used to obtain a data packet from the access controller (that is, the switching unit is a switching unit bound to the receiving port), obtain a destination address from the data packet, determine a sending port from multiple ports based on the destination address, determine a destination unit according to the sending port, and determine path information for forwarding data to the destination unit according to the destination unit. The destination unit is a switching unit bound to the sending port.

[0098] If the switch obtains the path information and the data from the packet processor, that is, the switching unit is a switching unit bound to the receiving port, the switch is used to send the data and the path information to the transit unit through the bus according to the path information, so that the transit unit continues to forward the data and the path information according to the path information until the data is forwarded to the destination unit.

[0099] If the switch obtains data and path information forwarded by another switching unit or a transfer unit from the bus, that is, the switching unit is a transfer unit, the switch is used to continue forwarding the data and path information according to the path information until the data is forwarded to the destination unit. The path information is used to indicate the information of the transfer unit through which the data is forwarded to the destination unit, and the transfer unit is a switching unit used to forward data among multiple switching units. The information of the transfer unit is used to indicate the identification of the transfer unit and the order between the transfer units.

[0100] The structure of the access controller and the packet processor has been described above, so it will not be repeated here.

[0101] Based on this, the principle of data exchange between ports on the network chip is:

[0102] The receiving port receives a data packet carrying data from outside the network chip, and sends the data packet to the switching unit bound thereto; the access controller in the switching unit obtains the data packet, and transmits the data packet to the data packet processor in the switching unit; the data packet processor determines the path information for sending the data to the destination unit according to the destination address in the data packet and in combination with the above method, and transmits the path information and data to the switch in the switching unit, and the switch sends the data and path information to the transit unit adjacent thereto through the bus according to the path information. The switch in the transit unit receives the path information and data, and continues to forward the data and path information to the next transit unit according to the path information until the data is forwarded to the destination unit. The switch in the destination unit receives the data and sends the data to the outside of the network chip through the sending port. Specifically, the switch in the destination unit sends the data to the data packet processor and the access controller therein in sequence for corresponding processing, and then sends it out from the sending port.

[0103] Furthermore, the switching unit is also used to share the data packet processors in different switching units through a network composed of multiple buses. In this way, when the data packet processor in the switching unit performs complex processing on the data packet, it can request the data packet processors in other switching units to assist in the processing, thereby improving the processing speed. In addition, since the data packet processors in other switching units can be requested to assist in the processing, the complexity of the data packet processing by the data packet processor in each switching unit is reduced.

[0104] From the above, it can be seen that by sharing the packet processor in the switching unit, the processing capabilities of the packet processors in the network chip can be integrated, thereby greatly enhancing the ability to support complex services, and when the complexity of the services to be supported is the same, reducing the processing volume and processing complexity of each packet processor and reducing the functional requirements for each packet processor.

[0105] It should be noted that the structure of the above-mentioned switching unit is only exemplary and is not used to limit the present application. For example, based on the structure of the above-mentioned switching unit, the switching unit may further include: a traffic manager and / or a first buffer, wherein: the traffic manager is used to write data into a corresponding queue and schedule the data in the queue according to the attributes of the data; the first buffer is used to cache the data to be forwarded. The switch is also used to forward data according to the scheduling information of the traffic manager for the data, wherein the scheduling information refers to whether to forward the data and the traffic used when forwarding the data. The switch is also used to temporarily store the received data in the first buffer so that when the data needs to be called, the data can be obtained from the first buffer.

[0106] Furthermore, the switching unit is also used to share the first buffers in different switching units through a network composed of multiple buses. In this way, when the first buffer in the switching unit is full, the data can be temporarily stored in the first buffers in other switching units through the network. When the data needs to be forwarded, the temporarily stored data is obtained from other switching units through the bus and the data is forwarded. Or when the data needs to be forwarded, a forwarding request is sent to other switching units so that other switching units forward the data.

[0107] In order to achieve traffic management and scheduling between multiple switching units, so as to better transmit data, the traffic manager in the switching unit is also used to obtain a data transmission scheduling request sent by another switching unit through a network composed of multiple buses, and generate scheduling response information so that the other switching unit can schedule the data based on the scheduling response information. The data transmission scheduling request is used to request whether the data can be forwarded, and the scheduling response information is used to indicate whether it is allowed to forward the data, and the traffic used when forwarding the data and other information.

[0108] In another possible implementation, the network chip may also include a second buffer and / or a forwarding table, wherein: the second buffer and the forwarding table are both connected to the switching unit via a bus; the second buffer is used to cache data obtained by the switching unit; and the forwarding table is used to indicate the port information used for communication between network chips.

[0109] It should be noted that when the sending port is determined according to the destination address in the above text, it needs to be determined according to the forwarding table.

[0110] The second buffer can be arranged in an array with multiple switching units. The second buffer can be located in the middle of the array, for example, or can be set according to business requirements, which is not specifically limited in the present embodiment.

[0111] The forwarding table and multiple switching units in the network chip can be arranged in an array. The location of the forwarding table can be, for example, the middle position of the array, and can also be set according to business needs (for example, the forwarding table is set near the switching unit that needs to frequently access the forwarding table), which is not particularly limited in the embodiments of the present application.

[0112] In order to further expand the storage capacity of the network chip, the switch in each switching unit in the network chip can also access the external buffer through the bus to temporarily store the data in the external buffer.

[0113] In order to further increase the capacity of the forwarding table, the switch in each switching unit in the network chip can also access the external forwarding table through the bus.

[0114] In order to reduce the pressure of data packets on the destination unit and / or alleviate the current situation of congestion of the sending port, before the switch in the switching unit bound to the receiving port sends the data packet to the switch in the destination unit through the bus, it also includes: the switch in the switching unit bound to the receiving port sends a transmission request to the switch in the destination unit through the bus, and the switch in the destination unit responds to the transmission request and replies to the switch in the switching unit bound to the receiving port through the bus according to the number of data packets currently to be processed, the number of received transmission requests and other information. The transmission response information is used to indicate whether the switch in the switching unit bound to the receiving port is allowed to send the data packet. The switch in the switching unit bound to the receiving port receives the transmission response information. If the transmission response information indicates that the switch in the switching unit bound to the receiving port sends the data packet, the switch in the switching unit bound to the receiving port sends the data packet to the switch in the destination unit through the bus. If the transmission response information indicates that the switch in the switching unit bound to the receiving port is not allowed to send the data packet, the switch in the switching unit bound to the receiving port does not send the data packet.

[0115] It should be noted that the transmission of other information (i.e., information other than data packets, such as transmission requests, authorization instructions, etc.) between different switching units can share the same bus as the transmission of data packets between different units, or they can use their own buses respectively.

[0116] The following is an example to illustrate the structure of a network chip.

[0117] Figure 2 Schematic diagram of the structure of the network chip provided in the embodiment of the present application Figure 1 .exist Figure 2 In the example, the access controller is a media access controller.

[0118] like Figure 2As shown, the network chip includes 9 switching units 201, 6 buses 202 and multiple ports 203, and each switching unit includes a switch SW and a media access controller MAC. The 9 switching units 201 are arranged in 3 rows and 3 columns, and the 6 buses 202 are arranged in 3 rows and 3 columns and distributed around each switching unit. The switch SW in the switching unit 201 in the i-th row is connected to the bus 202 in the i-th row, and the switch SW in the switching unit 201 in the j-th column is connected to the bus 202 in the j-th column. Multiple ports 203 are distributed around the 9 switching units 201. It should be noted that there is no intersection between different buses.

[0119] If data is exchanged between the port bound to the upper left switching unit 201 and the port bound to the lower right switching unit 201 (i.e., the destination unit) in the network chip, the paths for forwarding data from the upper left switching unit 201 to the lower right switching unit 201 may include multiple paths, of which six are drawn by dotted lines. One dotted line represents one path.

[0120] Figure 3 The structure of the network chip provided in the embodiment of the present application is shown in FIG. Figure 2 ,like Figure 3 As shown, the network chip and Figure 2 The difference between the network chip in FIG. 20 and FIG. 20 is that the switching unit in the middle position is replaced by the second buffer 204 , so that the switching unit 201 can cache data in the second buffer through the bus 202 .

[0121] Figure 4 The structure of the network chip provided in the embodiment of the present application is shown in FIG. Figure 3 .like Figure 4 As shown, the number and arrangement of switching units and buses are similar to Figure 2 Similar to the embodiment of the present invention, an external buffer 205 is configured in the network chip, and the external buffer 205 is connected to the switching unit 201 through the bus 202.

[0122] It should be noted that Figure 4 The structure of the switching unit is not shown, that is, the structure of the switching unit is not limited. Figure 4 Multiple ports are not shown.

[0123] Figure 5 The structure of the network chip provided in the embodiment of the present application is shown in FIG. Figure 4 ,like Figure 5 As shown, the network chip and Figure 2 The difference between the network chip in FIG. 201 and FIG. 202 is that the switching unit in the middle is replaced by the forwarding table 206 , so that the switching unit 201 can access the forwarding table 206 through the bus 202 .

[0124] Figure 6 The structure of the network chip provided in the embodiment of the present application is shown in FIG. Figure 5 ,like Figure 6 As shown, the network chip and Figure 2 The difference between the network chip in FIG. 201 and FIG. 202 is that the switching unit in the third row and second column is replaced by the forwarding table 206 , so that the switching unit 201 can access the forwarding table 206 through the bus 202 .

[0125] Figure 7 The structure of the network chip provided in the embodiment of the present application is shown in FIG. Figure 6 ,like Figure 7 As shown, the number and arrangement of the switching units 201 and the bus 202 are similar to Figure 2 The network chip is similar to that in FIG. 2 , and is configured with an external forwarding table 207 , and the external forwarding table 207 is connected to the switching unit 201 via a bus 202 .

[0126] It should be noted that Figure 7 The structure of the switching unit is not shown, that is, the structure of the switching unit is not limited. Figure 7 Multiple ports are not shown.

[0127] Figure 8 The structure of the network chip provided in the embodiment of the present application is shown in FIG. Figure 7 , Figure 8 The network chip in Figure 2 The difference from the network chip in FIG. 2 is that the switching unit 201 also includes a data packet processor PP.

[0128] Fig. 9 The structure of the network chip provided in the embodiment of the present application is shown in FIG. Figure 8 . Fig. 9 The network chip in Figure 2 The difference between the network chip in FIG. 20 and FIG. 20 is that the switching unit 201 also includes a traffic scheduler TM.

[0129] Fig.10 The structure of the network chip provided in the embodiment of the present application is shown in FIG. Figure 9 . Fig. 9 The network chip in Figure 2 The difference between the network chip in FIG. 2 is that the switching unit 201 also includes a traffic scheduler TM and a data packet processor PP.

[0130] The embodiment of the present application further provides a network device, which includes at least one network chip of any one of the above. At least one network chip is connected via a bus. The network device may be, for example, a server or other device, which is not specifically limited in the embodiment of the present application.

[0131] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A network chip, characterized in that: The network chip is provided with a plurality of ports, and the network chip also includes a plurality of buses and a plurality of switching units, wherein: The switching unit is bound to at least one of the ports and is used to receive data from outside the network chip and send data to outside the network chip through the bound port; Each of the multiple buses is bound to at least two of the switching units, each of the switching units is bound to at least one of the multiple buses, and the switching unit forwards data between different switching units through a network formed by the multiple buses; The switching unit comprises a switch and an access controller, wherein: The access controller is used to obtain a data packet carrying the data from outside the network chip and send a data packet carrying the data to outside the network chip through a port bound to the switching unit to which it belongs; If the switch obtains the data packet from the access controller, the switch is used to obtain a destination address from the data packet, determine a sending port based on the destination address, determine a destination unit according to the sending port, determine path information for forwarding the data to the destination unit according to the destination unit, and send the data and the path information to a transfer unit according to the path information and through the bus, so that the transfer unit continues to forward the data and the path information according to the path information until the data is forwarded to the destination unit; If the switch obtains the data and the path information forwarded by another switching unit or the transit unit from the bus, the switch is used to continue forwarding the data and the path information according to the path information until the data is forwarded to the destination unit; The path information is used to indicate information about a transfer unit through which the data is forwarded to the destination unit, and the transfer unit is a switching unit among the multiple switching units used to forward the data.

2. The network chip according to claim 1, characterized in that: The switching unit comprises a switch and an access controller, wherein: The access controller is used to obtain a data packet carrying the data from outside the network chip and send a data packet carrying the data to outside the network chip through a port bound to the switching unit to which it belongs; The switch is used to obtain a data packet carrying the data from the access controller or the bus, obtain a destination address from the data packet, determine a sending port from the multiple ports based on the destination address, and determine a destination unit according to the sending port, determine a next transit unit from the multiple switching units according to the destination unit, and forward the data packet to the next transit unit through the bus, so that the next transit unit continues to determine the next transit unit and forward the data packet until the data carried in the data packet is forwarded to the destination unit.

3. The network chip according to claim 1, characterized in that: The switching unit includes a switch, an access controller and a data packet processor, wherein: The access controller is used to obtain a data packet carrying the data from outside the network chip and send a data packet carrying the data to outside the network chip through a port bound to the switching unit to which it belongs; The data packet processor is used to obtain the data packet from the access controller or from the bus through the switch, obtain a destination address from the data packet, determine a sending port from the multiple ports based on the destination address, determine a destination unit according to the sending port, and determine information of a next transfer unit according to the destination unit; The switch is used to obtain the information of the data packet and the next transfer unit from the data packet processor, and transmit the data packet to the next transfer unit through a bus according to the information of the next transfer unit, so that the next transfer unit continues to determine the next transfer unit and forward the data packet until the data carried in the data packet is forwarded to the destination unit.

4. The network chip according to claim 1, characterized in that: The switching unit includes a switch, an access controller and a data packet processor, wherein: The access controller is used to obtain a data packet carrying the data from outside the network chip and send a data packet carrying the data to outside the network chip through a port bound to the switching unit to which it belongs; The data packet processor is used to obtain the data packet from the access controller, obtain a destination address from the data packet, determine a sending port from the multiple ports based on the destination address, determine a destination unit according to the sending port, and determine path information for forwarding the data to the destination unit according to the destination unit; If the switch obtains the path information and the data from the packet processor, the switch is used to send the data and the path information to the transfer unit through the bus according to the path information, so that the transfer unit continues to forward the data and the path information according to the path information until the data is forwarded to the destination unit; If the switch obtains the data and the path information forwarded by another switching unit or the transit unit from the bus, the switch is used to continue forwarding the data and the path information according to the path information until the data is forwarded to the destination unit; The path information is used to indicate information about a transfer unit through which the data is forwarded to the destination unit, and the transfer unit is a switching unit among the multiple switching units used to forward the data.

5. The network chip according to claim 3 or 4, characterized in that: The switching unit is also used to share data packet processors in different switching units through the network formed by the multiple buses.

6. The network chip according to any one of claims 1 to 4, characterized in that: The switching unit further comprises a traffic manager and / or a first buffer, wherein: The traffic manager is used to write the data into a corresponding queue according to the attributes of the data and schedule the data in the queue; The first buffer is used to cache the data; The switch is further configured to forward the data according to scheduling information of the data by the traffic manager.

7. The network chip according to claim 6, characterized in that: The switching unit is also used to share the first buffers in different switching units through the network formed by the multiple buses.

8. The network chip according to claim 6, characterized in that: The traffic manager in the switching unit is further used to obtain a data transmission scheduling request sent by another switching unit through the network formed by the multiple buses, and generate scheduling response information so that the other switching unit schedules the data based on the scheduling response information.

9. The network chip according to any one of claims 1 to 4 and 7, characterized in that: The network chip further includes a second buffer and / or a forwarding table, wherein: The second buffer and the forwarding table are both connected to the switching unit via a bus; The second buffer is used to cache the data obtained by the switching unit; The forwarding table is used to indicate the port information used for communication between the network chips.

10. A network device, characterized in that: It comprises at least one network chip as claimed in any one of claims 1 to 9, wherein at least one of the network chips is connected via a bus.

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