A distributed optical signal multiplexing and converging device and implementation method
By using a distributed optical signal multi-path convergence device, the algorithm is modularly processed and executed on multiple boards, solving the problems of slow device response and difficulty in algorithm writing under large data volumes, and achieving efficient signal processing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- TOEC TECHNOLOGLY CO LTD
- Filing Date
- 2022-12-02
- Publication Date
- 2026-06-30
AI Technical Summary
When dealing with large amounts of data, existing devices cannot respond in a timely manner, and when using multi-threading to allocate computing tasks, it is difficult to write algorithms, and the efficiency improvement is not significant.
A distributed optical signal multi-path cross-connection and aggregation device is adopted to break down the algorithm into multiple modules that are executed on different boards. The main control card, cross-connect card and service card are used for signal processing and result aggregation.
It significantly improves the algorithm's execution efficiency, increasing the number of cross instructions processed per unit time by more than tenfold, and simplifies the algorithm's writing difficulty.
Smart Images
Figure CN116249039B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of optical communication technology, and in particular to a distributed optical signal multi-path cross-convergence device and its implementation method. Background Technology
[0002] With the explosive growth of network data, the demand for signal processing equipment capacity is increasing. This also places demands on the equipment's ability to respond promptly even with large data volumes. Although multi-core processor When processing multiple tasks simultaneously, it's natural to assign different tasks to different cores. However, when running a program written in conventional serial code, it's difficult to break down the computational task into multiple parts and run them simultaneously on multiple cores. When an algorithm needs to process large amounts of data, the computation time on a single processor platform will be very long. Using multithreading to distribute computation across different cores significantly increases the difficulty of writing the algorithm, with only a slight improvement, perhaps two to three times. On the other hand, by reasonably breaking down the algorithm into independent modules and performing computation on multiple processors simultaneously, not only does the difficulty of writing the algorithm decrease, but it also significantly improves the execution efficiency. The degree of efficiency improvement depends on the number of processor platforms used; the more processor platforms used, the greater the efficiency improvement. Often, each additional processor platform can double the efficiency. Summary of the Invention
[0003] To address the issue of devices failing to respond promptly under large data volumes, this invention provides a distributed optical signal multi-path cross-connection and aggregation device. This device employs a distributed strategy, breaking down the algorithm into multiple modules, each executed on a different board. The execution results are returned to the main control card, which then aggregates the results and sends them back to the host computer. This distributed strategy solves the problem of algorithm serialization.
[0004] The technical solution adopted in this invention is as follows: a distributed optical signal multi-path cross-connection and aggregation device, including a PC host computer, a main control card, cross-connect card 1, cross-connect card 2, and several service cards; the main control card is connected to the PC host computer for socket communication; the main control card is connected to the cross-connect card and several service cards through a LAN switch for socket communication; the signal transmission between cross-connect card 1 and cross-connect card 2 and the service cards is achieved through channel groups in the sending and receiving directions; in the sending direction, signals are sent from cross-connect card 1 and cross-connect card 2 to the service cards; in the receiving direction, the cross-connect card receives signals sent from the service cards; the number of channel groups from cross-connect card 1 and cross-connect card 2 to each service card is the same.
[0005] A method for implementing a distributed optical signal multi-path cross-connection and aggregation device, wherein the main control card, cross-connect card 1, cross-connect card 2, and several service cards in the device are all based on the Linux operating system to control the devices and software logic on the main control card, the devices and software logic on cross-connect card 1 and cross-connect card 2, and the devices and software logic on the service cards. The main control card includes a software logic control unit running on the ZYNQⅠ processing platform. The service cards include several SFP+ input interfaces as signal input units, several SFP+ output interfaces as signal output units, an FPGA as a signal processing unit, and a software logic control unit running on the ZYNQⅢ processing platform. The service cards serve as input and output cards. Cross-connect card 1 and cross-connect card 2 each include several cross-connect chips as signal processing units and a software logic control unit running on the ZYNQⅡ processing platform. The host computer communicates with the main control card via a network port using a socket, sending batch service instructions to the main control card. The software logic control unit running on the ZYNQⅠ processing platform of the main control card verifies and processes the received batch cross-connect instructions, and then classifies and recombines the instructions according to the input board number of each cross-connect instruction. These instructions are then sent to the service cards with input signal cross-connect instructions, called input cards, through the LANswitch LAN switch communication module. The software logic control unit running on the ZYNQⅢ processing platform on each input card receives the instructions. Upon receiving an instruction, the system determines its type. For cross-board instructions where signals originate from and exit from both the input and output cards (referred to as local board cross-board instructions), the FPGA signal processing unit configures the cross-board configuration and returns the result to the main control card via the LANSWitch internal communication module. For cross-board instructions, the system sends a channel request instruction to the cross-board card via the LANSWitch internal communication module. The software logic control unit running on the ZYNQⅡ processing platform responds to the input card's request, allocates a channel, configures the signal processing unit to configure the cross-board configuration, and returns the response result to the input card via the LANSWitch internal communication module. Upon receiving the result, the input card outputs the instructions according to the cross-board instructions. The input cards are categorized and command reassembled, and the results of the requests are sent to the respective output cards (i.e., service cards with output signal crossover commands) through the lanswitch internal communication module. After receiving the command, the software logic control unit running on the ZYNQⅢ processing platform configures the FPGA signal processing unit to configure crossover according to the received command, and returns the result to the input card through the lanswitch internal communication module. The input card configures its FPGA signal processing unit to configure crossover according to the result, and then returns the result to the main control card through the lanswitch internal communication module. The main control card waits for the processing results of all input cards, compiles them, and returns them to the host computer through the network port.
[0006] The beneficial effects of this invention are as follows: The original device's allocation algorithm ran entirely independently on the main control card's ZYNQ processing platform. When processing tens of thousands of cross instructions in batches, the main control card executed each instruction serially, resulting in excessively long processing times and sometimes causing computation timeouts. This invention, without considering complex multi-core, multi-threaded programming, breaks down the algorithm into different independent modules, which are directly distributed across multiple ZYNQ processing platforms on different boards for execution. Each board only calculates the part relevant to itself, greatly simplifying algorithm writing and improving execution efficiency by more than ten times—that is, increasing the number of cross instructions that can be processed per unit time by more than ten times. Attached Figure Description
[0007] The present invention will be further described below with reference to the accompanying drawings and embodiments.
[0008] Figure 1 This is a system architecture block diagram of the distributed cross-convergence device of the present invention;
[0009] Figure 2 This is the system control flowchart of the present invention;
[0010] Figure 3 This is the main flowchart of the present invention. Detailed Implementation
[0011] like Figure 1 As shown, a distributed optical signal multi-path cross-connection and aggregation device includes a PC host computer, a main control card, cross-connect card 1, cross-connect card 2, and several service cards;
[0012] The entire device consists of one main control card, two cross-connect cards, and several service cards. The main control card is connected to a PC host computer, cross-connect card 1, cross-connect card 2, and several service cards, respectively. Cross-connect card 1 and cross-connect card 2 are each connected to several service cards.
[0013] The main control card includes a ZYNQⅠ processor, a network port, and a LANswitch local area network switch. The main control card communicates with the host computer via a gigabit Ethernet port using a socket. The LANswitch local area network switch has routing and switching functions and connects internally with the service cards and cross-connect cards to form a decentralized local area network. Any two cards within the local area network can communicate end-to-end. The ZYNQⅠ processor is an ARM processor system platform used to run the Linux operating system and applications, control the devices on the main control card, and implement software logic control.
[0014] The cross-connect card includes a ZYNQ II processor and several cross-connect chips. Each cross-connect chip has several sets of input / output signal channels with each service card to handle cross-board signal exchange. Cross-board signals are signals that are input from one service card and output from another service card. The ZYNQ II processor is an ARM processor system platform used to run the Linux operating system and applications, control the devices on the cross-connect card, and implement software logic control.
[0015] The service card serves as both an input and output card, comprising: a ZYNQⅢ processor, an FPGA, and several SFP+ modules. The SFP+ modules are used for signal input and output. The FPGA handles internal signal cross-switching, processes signals input from the SFP+ modules and input channels connected to the cross-switching card, and selects the output channels specified by the logic control program to output to the SFP+ modules and output channels connected to the cross-switching card. The ZYNQⅢ processor is an ARM processor system platform used to run the Linux operating system and applications, control the devices on the service card, and implement software logic control.
[0016] The device uses several service cards and two cross-connect cards, enabling it to handle larger capacity signal cross-connect services. The main control card interacts with the host computer via the network port, simultaneously monitoring the status of the two cross-connect cards and several service cards, and managing the service logic and services of the entire device.
[0017] exist Figure 2 The entire system control flow is divided into 9 units. Four of these units handle the control process: the main control card software logic control unit, the service card software logic control unit (as an input board), the service card software logic control unit (as an output board), and the cross-connect card software logic control unit. Five units handle signal flow processing: the service card signal input unit (several SFP+ chips) (as an input board), the service card signal processing unit (FPGA) (as an input board), the cross-connect card signal processing unit (several cross-connect chips), the service card signal processing unit (FPGA) (as an output board), and the service card signal output unit (several SFP+ chips) (as an output board).
[0018] The main control card software logic control unit is responsible for monitoring the overall device status, splitting and issuing batch cross-connect commands, compiling service card return results, and returning them to the host computer. The service card software logic control unit, acting as an input board, is responsible for controlling and monitoring the various devices on the monitoring board, processing commands, requesting cross-connect channels from the cross-connect card, and configuring the signal processing unit (FPGA). The service card signal processing unit (FPGA), acting as an input board, processes input signals and configures cross-connect switching channels. The service card signal input unit (several SFP+), acting as an input board, provides signal input interfaces, converts optical signals to electrical signals, and transmits the signals to the signal processing unit (FPGA). The service card software logic control unit, acting as an output board, controls the overall device status, batch cross-connect command splitting and issuing, statistical analysis of service card return results, and returns to the host computer. Unit: Responsible for controlling and monitoring various devices on the monitoring board, processing instructions, and configuring the signal processing unit (FPGA) according to the configuration scheme issued by the input board; Service card signal processing unit (FPGA) as output board: Configures cross-connect channels and transmits signals to the signal output unit (several SFP+); Service card signal output unit (several SFP+) as output board: Outputs the signal from the signal processing unit (FPGA) through the output interface, converting electrical signals to optical signals; Cross-connect card software logic control unit: Allocates cross-connect channels and configures signal processing units (several cross-connect chips); Cross-connect card signal processing unit (several cross-connect chips): Processes the signals in the cross-connect channels according to the configuration.
[0019] Logical control connection relationships: The main control card logic control unit module interacts with the input service card logic control unit via socket communication; the input service card logic control unit interacts with the cross-connect card logic control unit and the output service card logic control unit via socket communication; the cross-connect card logic control unit only interacts with the input service card logic control unit via socket communication; the output service card logic control unit only interacts with the input service card logic control unit via socket communication; the input service card logic control unit configures the input service card signal processing unit (FPGA) through a custom protocol interface; the output service card logic control unit configures the output service card signal processing unit (FPGA) through a custom protocol interface; the cross-connect card logic control unit controls the signal processing unit (several cross-connect chips) via the I2C interface protocol.
[0020] Signal control flow connection relationship: The signal input unit (several SFP+) of the fiber optic access input service card identifies the optical signal and converts it into an electrical signal. The signal then enters the input service card signal processing unit (FGPA) through the data interface inside the board. The signal processing unit outputs the signal to the channel number (several cross-connect chips) currently configured by the logic control unit and connected to the cross-connect card signal processing unit. The cross-connect card signal processing unit (several cross-connect chips) outputs the signal to the output channel connected to the output service card according to the configured channel number. The output service card signal processing unit receives the signal and outputs it to the output channel number of the signal output unit (SFP+) according to the current configuration. The signal is then converted into an optical signal by the output service card signal output unit (several SFP+) and sent out.
[0021] exist Figure 3 The document describes the entire execution flow of the algorithm.
[0022] 1) Start batch task: The PC host computer sends a command to create a batch of cross-connects to the main control card, and then executes step 2).
[0023] 2) Detect and split instructions: The main control card detects instructions, calls the allocation algorithm according to the instruction type, classifies and reassembles instructions based on the cross-instruction input board number, and then executes step 3).
[0024] 3) Sending instructions to input cards: The main control card sends the grouped cross-instructions to each input service card. Then, step 4 is executed.
[0025] 4) Determine if it is a task for this board: After receiving the cross-connect instruction, the input service card determines whether it is a cross-connect instruction for this board (a cross-connect instruction for this board means that the input card and output card of the cross-connect instruction are the same service card). If it is, proceed to step 12; otherwise, proceed to step 5.
[0026] 5) Determine if there is a reusable channel: Based on the cross-instruction, the input service card first determines if there is a reusable channel (if a reusable channel exists: the same input signal already exists, but to different output channels of the same input board; the existing signal has already been transferred from the input board to the output board, so the output board only needs to copy the signal and output it from the new channel; if the existing input signal is not a complete signal, and there is already a channel between the input board and the output board, but it is not full, the newly added signal can pass through, and the existing channel can be used directly). If there is a reusable channel, proceed to step 9; otherwise, proceed to step 6).
[0027] 6) Send a channel request to the cross-connect card: Input the service card and send a channel request command to the cross-connect card through the communication module. Then proceed to step 7).
[0028] 7) Allocate and return results to the input card: After receiving the request instruction, the cross-connect card allocates channels, configures the cross-connect chip, and returns the results to the input service card. Then proceed to step 8).
[0029] 8) Determine if allocation was successful: Input the service card and check if the cross-card returned a result. If allocation was successful, proceed to step 9; otherwise, proceed to step 13.
[0030] 9) Sending configuration results to the output card: The input service sends the configuration scheme to the output service card, and then executes step 10).
[0031] 10) Configure the output card: The output service card configures the FPGA on this board according to the configuration instructions, and then executes step 11).
[0032] 11) Returning the result to the input card: The output service card sends the configuration result to the input service card through the communication module, and then executes step 12).
[0033] 12) Configure Input Card: Input service card, calculate the cross-configuration data for this board according to the cross-command, and configure the FPGA. Then execute step 13).
[0034] 13) Returning results to the main control card: Input service card, summarize the results of this board and the output service card, and send the results to the main control card. Then execute step 14).
[0035] 14) Summarize the results and return them to the host computer: The main control card summarizes the results returned by each input service card and sends them to the host computer (15).
[0036] 15) End: Calculation complete, end.
[0037] In Example 1, the device is configured with 1 main control card, 2 cross-connect cards, and 10 service cards, requiring 100,000 cross-connect instructions to be sent to the device at once. The PC host computer sends 100,000 cross-connect instructions at once, which are as follows: 1,000 instructions each for input card 1 to output card 1 to 10, 1,000 instructions each for input card 2 to output card 1 to 10, 1,000 instructions each for input card 3 to output card 1 to 10, and so on, up to 1,000 instructions each for input card 10 to output card 1 to 10, totaling 100,000 instructions. The main control card, running on the ZYNQⅠ processing platform, verifies and processes the received 100,000 cross-connect instructions. These instructions are then divided into 10 groups of 10,000 instructions each, based on the input board number. Each group contains 10,000 cross-connect instructions, which are then sent to 10 input service cards via the LAN switch. Input board number 1 is sent to service card 1, input board number 2 to service card 2, and so on, up to input board number 10, which is sent to service card 10. Each of the 10 service cards receives 10,000 cross-connect instructions, which are then simultaneously calculated by the software logic control unit running on the ZYNQⅢ processing platform. For cross-connects on this board (input card 1 and output card 1, input card 2 and output card 2, input card 3 and output card 3, up to input card 10 and output card 10), the input service card signal processing unit (FPGA) is directly configured. For cross-connects not on this board, the output card channel is requested from the cross-connect card through the LAN switch. The software logic control unit running on the ZYNQⅡ processing platform of the cross-connect card will calculate and allocate cross-connect channels according to the order in which the channel request instructions from the input card arrive, and reply to the input service card with the allocated channel. At the same time, the signal processing unit cross-connect chip on the cross-connect card is configured. When the input service card receives the return instruction from the cross-connect card, if the allocation is successful, it will send instructions to the output card for configuration processing through the LAN switch. The software logic control unit running on the ZYNQⅢ processing platform of the output card configures the signal processing unit FPGA according to the cross-connect configuration. At this time, the amount of cross-connect data received has been reduced to one-tenth, and the processing time has also been reduced to one-tenth. After all output service cards have completed processing, the results are returned to the input cards. The input cards then configure the input signal processing unit. (At this point, the signal flow is complete; the signal enters the input card's signal input unit (SFP+), then the input card's signal processing unit (FPGA), then passes through the cross-connect chip of the cross-connect card, and finally exits through the output card's signal processing unit (FPGA), and finally outputs from the output interface of the output card's signal output unit (SFP+).) The results are then returned to the main control card, which summarizes the results of 100,000 routes and reports them to the host computer. This example fully demonstrates the crucial role of distributed processing algorithms in improving efficiency.
Claims
1. A distributed optical signal multiplexing and converging device implementation method, the device comprising a PC host computer, characterized in that: It also includes a main control card, cross-connect card 1, cross-connect card 2, and several service cards; the main control card is connected to a PC host computer for socket communication; the main control card is connected to the cross-connect card and several service cards through a LAN switch for socket communication; the signal transmission between cross-connect card 1 and cross-connect card 2 and the service cards is achieved through channel groups in the sending and receiving directions. In the sending direction, signals are sent from cross-connect card 1 and cross-connect card 2 to the service cards; in the receiving direction, the cross-connect card receives signals sent from the service cards; the number of channel groups from cross-connect card 1 and cross-connect card 2 to each service card is the same. The main control card includes a ZYNQⅠ processor, a network port, and a LANswitch local area network switch. The main control card communicates with the host computer via a gigabit Ethernet port using a socket. The LANswitch local area network switch has routing and switching functions and connects internally with the service cards and cross-connect cards to form a decentralized local area network. Any two boards within the local area network can communicate end-to-end. The ZYNQⅠ processor is an ARM processor system platform used to run the Linux operating system and applications, control the devices on the main control card, and implement software logic control. The cross-connect card includes a ZYNQ II processor and several cross-connect chips. Each cross-connect chip has several sets of input and output signal channels with each service card to handle cross-connection of cross-board signals. Cross-board signals are signals that are input from one service card and output from another service card. The ZYNQ II processor is an ARM processor system platform used to run the Linux operating system and applications, control the devices on the cross-connect card, and implement software logic control. The service card serves as both an input and output card, comprising: a ZYNQⅢ processor, an FPGA, and several SFP+ modules. The SFP+ modules are used for signal input and output. The FPGA is used to handle internal signal cross-switching, processing signals input from the SFP+ modules and input channels connected to the cross-switching card, and selecting output channels specified by the logic control program to the SFP+ modules and output channels connected to the cross-switching card. The ZYNQⅢ processor is an ARM processor system platform used to run the Linux operating system and applications, control the devices on the service card, and implement software logic control. The implementation method is as follows: The main control card, cross-connect card 1, cross-connect card 2, and several service cards in the device are all based on the Linux operating system to control the devices and software logic on the main control card, the devices and software logic on cross-connect card 1 and cross-connect card 2, and the devices and software logic on the service cards; the main control card includes a software logic control unit running on the ZYNQⅠ processing platform; the service card includes several SFP+ input interfaces as signal input units, several SFP+ output interfaces as signal output units, an FPGA as a signal processing unit, and a software logic control unit running on the ZYNQⅢ processing platform; the service card serves as both an input card and an output card; cross-connect card 1 and cross-connect card 2 respectively include several cross-connect chips as signal processing units and a software logic control unit running on the ZYNQⅡ processing platform; The host computer communicates with the main control card via a network port using a socket, sending batch service instructions to the main control card. The software logic control unit running on the ZYNQⅠ processing platform on the main control card verifies and processes the received batch cross-connect instructions. Then, it classifies and recombines the instructions according to the input board number of each cross-connect instruction, and sends them to the service cards with input signal cross-connect instructions (called input cards) through the lanswitch LAN switch communication module. The software logic control unit running on the ZYNQⅢ processing platform on each input card receives the instructions, judges the instruction type, and for cross-connect instructions where the signal is both input and output from the input card, it is called local board cross-connect. After configuring the cross-connection by the FPGA signal processing unit, the result is returned to the main control card through the lanswitch internal communication module. For cross-connect instructions, a channel request instruction is sent to the cross-connect card through the lanswitch internal communication module. The cross-connect card then processes the instructions on the ZYNQⅡ processing platform. The software logic control unit running on the platform responds to the input card's request, allocates channels, and configures the signal processing unit to configure cross-connection. It then returns the response result to the input card via the LANSWitch internal communication module. Upon receiving the result, the input card classifies and reassembles the instructions based on the output board number of the cross-connection command, and sends the requested result to each output card (i.e., the service card with the output signal cross-connection command) via the LANSWitch internal communication module. Upon receiving the command, the software logic control unit running on the ZYNQⅢ processing platform configures the FPGA signal processing unit to configure cross-connection according to the received command, and returns the result to the input card via the LANSWitch internal communication module. The input card, based on the result, configures its FPGA signal processing unit to configure cross-connection, and then returns the result to the main control card via the LANSWitch internal communication module. The main control card waits for all input card processing results, compiles them, and returns them to the host computer via the network port.