Display device and method for controlling the same

Abstract

A display device is disclosed. The display device includes: a thin film transistor formed at an intersection of a gate line and a data line; a common electrode line for supplying a common voltage to a liquid crystal capacitor and a holding capacitor; and a controller for supplying a data voltage corresponding to a data signal to the liquid crystal capacitor and the holding capacitor through the thin film transistor during an activation period, wherein the controller identifies whether a blank period starts and whether a next data signal is received after a threshold time, and controls the common electrode line to adjust the common voltage based on the identification result.

Description

Technical Field

[0001] The present invention relates to a display device and a method for controlling the display device, and more particularly, to a display device capable of changing a frame rate and a method for controlling the display device. Background Art

[0002] With recent developments in display device technology, high-scan rate display devices for improving image quality have been developed and provided.

[0003] A conventional display device may be operated by being fixed to an optimal driving timing to prevent lower image quality such as flicker, brightness inversion, or afterimage.

[0004] Conventional display devices may have a fixed frame rate (or scan rate) of a panel, which results in many limitations, such as having to have separate hardware to output images suitable for various frame rates.

[0005] In addition, conventional display devices may experience lower image quality such as brightness changes, flickering, or afterimages when driven at a frame rate other than the optimal driving timing, and therefore may not provide the best image to the user or only provide images at a fixed frame rate. Summary of the invention

[0006]

Technical issues

[0007] The present disclosure provides a display device which can output an image by changing a frame rate of a display panel and a method for controlling the display device.

[0008]

Technical solution

[0009] According to an embodiment of the present disclosure, a display device includes: a thin film transistor located at the intersection of a gate line and a data line; a common electrode line that provides a common voltage to a liquid crystal capacitor and a holding capacitor; and a controller that supplies a data voltage corresponding to a data signal to the liquid crystal capacitor and the holding capacitor through the thin film transistor during an activation time period, wherein the controller identifies whether a next data signal is received after a threshold time has passed after the start of a blank time period, and controls the common electrode line to adjust the common voltage based on the identification result.

[0010] In addition, the controller may count an elapsed time based on a reference clock when the blank period starts, and when the counted elapsed time is longer than a threshold time, control the common electrode line to adjust the common voltage based on the counted elapsed time.

[0011] Here, the device may further include a memory storing information related to a voltage increase / decrease rate for each of a plurality of time periods included in a blank time period, wherein the controller obtains a first increase / decrease rate corresponding to a first time period when the counted elapsed time belongs to a first time period among the plurality of time periods, and adjusts the common voltage by applying the obtained first increase / decrease rate to the common voltage.

[0012] Here, the controller may obtain a second increase / decrease rate corresponding to a second time period when the counted elapsed time belongs to a second time period among the plurality of time periods while maintaining the blank time period, and apply the second increase / decrease rate to the adjusted common voltage.

[0013] Here, the voltage increase / decrease rate applied to the common voltage may increase or decrease in proportion to the elapsed time.

[0014] In addition, the controller may supply a data voltage corresponding to a next data signal to the liquid crystal capacitor and the holding capacitor through the thin film transistor when receiving the next data signal, and reset an increase / decrease rate applied to the common voltage.

[0015] In addition, the controller may maintain the common voltage when receiving the next data signal within a threshold time, and the threshold time may be determined based on a frame rate of the display device.

[0016] In addition, the controller may adjust at least one voltage of: a voltage of the liquid crystal capacitor based on the first common voltage, or a voltage of the holding capacitor based on the second common voltage based on the recognition result.

[0017] In addition, charges accumulated in the liquid crystal capacitor and the holding capacitor may be discharged due to voltage loss caused by distortion of the common voltage and leakage characteristics of the thin film transistor during the blank period.

[0018] According to another embodiment of the present disclosure, a method for controlling a display device includes a thin film transistor located at the intersection of a gate line and a data line, and a common electrode line that provides a common voltage to a liquid crystal capacitor and a holding capacitor, the method including: supplying a data voltage corresponding to a data signal to the liquid crystal capacitor and the holding capacitor through the thin film transistor during an activation time period; and identifying whether a next data signal is received after a threshold time has passed after the start of a blank time period, and controlling the common electrode line to adjust the common voltage based on the identification result.

[0019] Here, controlling the common electrode line may include counting an elapsed time based on a reference clock when the blank period starts, and when the counted elapsed time is longer than a threshold time, controlling the common electrode line to adjust the common voltage based on the counted elapsed time.

[0020] Here, the display device may include information related to a voltage increase / decrease rate for each of a plurality of time periods included in a blank time period, and controlling a common electrode line may include: when the counted elapsed time belongs to a first time period among the plurality of time periods, obtaining a first increase / decrease rate corresponding to the first time period; and adjusting the common voltage by applying the obtained first increase / decrease rate to the common voltage.

[0021] Here, controlling the common electrode line may include: while maintaining the blank period, when the counted elapsed time belongs to a second period among the plurality of time periods, obtaining a second increase / decrease rate corresponding to the second period; and applying the second increase / decrease rate to the adjusted common voltage.

[0022] Here, the voltage increase / decrease rate applied to the common voltage may increase or decrease in proportion to the elapsed time.

[0023] In addition, the method may further include: supplying a data voltage corresponding to the next data signal to the thin film transistor through the data line when the next data signal is received; and resetting an increase / decrease rate applied to the common voltage.

[0024] Additionally, controlling the common electrode line may include maintaining the common voltage when a next data signal is received within a threshold time, and the threshold time may be determined based on a frame rate of the display device.

[0025] In addition, controlling the common electrode line may include adjusting at least one voltage of: a voltage of a liquid crystal capacitor based on the first common voltage, or a voltage of a holding capacitor based on the second common voltage based on the recognition result.

[0026] In addition, charges accumulated in the liquid crystal capacitor and the holding capacitor may be discharged due to voltage loss caused by distortion of the common voltage and leakage characteristics of the thin film transistor during the blank period.

[0027]

Beneficial Effects

[0028] According to various embodiments of the present disclosure as described above, a display panel may be driven at a plurality of frame rates without changing a panel structure of a display device. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 is a diagram for explaining a configuration of a display device according to an embodiment of the present disclosure.

[0030] Figure 2 is a block diagram for explaining a detailed configuration of a display device according to an embodiment of the present disclosure.

[0031] Figure 3 is a diagram for explaining an active period and a blank period according to an embodiment of the present disclosure.

[0032] Figure 4 is a diagram for explaining a plurality of time periods and a common voltage according to an embodiment of the present disclosure.

[0033] Figure 5 is a diagram for explaining an optimal common voltage according to an embodiment of the present disclosure.

[0034] Figure 6 is a diagram for explaining an adjusted common voltage according to an embodiment of the present disclosure.

[0035] Figure 7 is a diagram for explaining an adjusted common voltage according to another example of the present disclosure.

[0036] Figure 8 is a graph for explaining a voltage increase rate according to an embodiment of the present disclosure.

[0037] Fig. 9 is a graph for explaining a voltage reduction rate according to another example of the present disclosure.

[0038] Fig.10 is a flowchart for explaining a method for controlling a display device according to another embodiment of the present disclosure. DETAILED DESCRIPTION

[0039] [Best Mode]

[0040]

model

[0041] Hereinafter, the present disclosure is described in detail with reference to the accompanying drawings.

[0042] Considering their roles in the present disclosure, currently widely used general terms are selected as the terms used in the embodiments of the present disclosure, and may be changed based on the intention of those skilled in the art or the emergence of judicial precedents, new technologies, etc. In addition, in certain cases, there may be terms arbitrarily selected by the applicant. In this case, the meanings of these terms are mentioned in detail in the corresponding description parts of the present disclosure. Therefore, the terms used in the present disclosure need to be defined based on the meanings of the terms and the content throughout the present disclosure, rather than simple term names.

[0043] In the present disclosure, expressions such as “having”, “may have”, “including”, “may include”, etc. indicate the existence of corresponding features (e.g., values, functions, operations, or components such as parts), and do not exclude the existence of additional features.

[0044] The expression “at least one of A or / and B” may mean “A or B” or “both A and B”.

[0045] The expressions "first", "second", etc. used in the present disclosure may indicate various components regardless of the order and / or importance of the components. These expressions are only used to distinguish one component from other components and do not limit the corresponding components.

[0046] If it is mentioned that any component (e.g., a first component) is "(operably or communicatively) coupled to" or "connected to" another component (e.g., a second component), it should be understood that any component can be directly coupled to the other component or can be coupled to the other component through another component (e.g., a third component).

[0047] Singular terms may include their plural forms unless otherwise clearly indicated in the context. It should be understood that the terms "comprising", "formed by...", etc. used in this application specify the presence of features, numbers, steps, operations, components, parts, or combinations thereof mentioned in the specification, and do not exclude the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0048] In the present disclosure, a "module" or "device" can perform at least one function or operation, and can be implemented by hardware, software, or a combination of hardware and software. In addition, in addition to the "module" or "device" that needs to be implemented by specific hardware, multiple "modules" or multiple "devices" can be integrated into at least one module and can be implemented by at least one processor (not shown).

[0049] In this specification, the term "user" may refer to a person who uses an electronic device or a device (e.g., an artificial intelligence electronic device) that uses the electronic device.

[0050] Hereinafter, embodiments of the present disclosure are described in more detail with reference to the accompanying drawings.

[0051] Figure 1 is a diagram for explaining a configuration of a display device according to an embodiment of the present disclosure.

[0052] like Figure 1 As shown, the display device 100 according to an embodiment of the present disclosure may include a liquid crystal panel, a gate driver, a data driver, and a common voltage generator.

[0053] Reference Figure 1 The liquid crystal panel may include a plurality of liquid crystal cells arranged in a matrix form, the gate driver may be connected to a plurality of gate lines GL1 to GLn of the liquid crystal panel, and the data driver may be connected to a plurality of data lines DL1 to DLm of the liquid crystal panel.

[0054] The plurality of liquid crystal cells may be each connected to a transistor (eg, a thin film transistor (TFT)) located at an intersection of the gate line and the data line and a common electrode line supplying a common voltage Vcom.

[0055] According to an embodiment, the gate electrode of the thin film transistor may be connected to the gate line, the source electrode may be connected to the data line, and the drain electrode may be simultaneously connected to the liquid crystal capacitor C 1c One electrode and holding capacitor C st According to an embodiment, the liquid crystal capacitor may be an equivalent representation of a liquid crystal material formed between the pixel electrode Vp and the common electrode Vcom, and a holding capacitor may be formed between the pixel electrode and the common electrode. Meanwhile, for ease of explanation, Figure 1 It is assumed and shown that the common electrode is connected to each of the liquid crystal capacitor and the holding capacitor. However, the first common electrode may be connected to the liquid crystal capacitor, and the second common electrode may be connected to the holding capacitor. Here, the first common electrode and the second common electrode refer to different electrodes.

[0056] According to an embodiment, the gate voltage applied to the gate line may have a periodically repeated on-time period and an off-time period, and the thin film transistor may be turned on during the on-time period. Here, when the thin film transistor is turned on, a data voltage corresponding to a data signal may be supplied to the thin film transistor, and thus the data voltage may be applied to the pixel electrode. Here, the data voltage may indicate a pixel voltage or a grayscale voltage, and for ease of explanation, the voltage is collectively referred to as a data voltage.

[0057] Meanwhile, an electric field corresponding to the difference between the data voltage and the common voltage Vcom may be applied to the liquid crystal panel, and light may be transmitted with a transmittance corresponding to the electric field.

[0058] According to an embodiment, the liquid crystal panel may display an image by inputting a data signal based on valid image data to the liquid crystal panel during an active period (or active time) in which a data voltage is applied.

[0059] Meanwhile, a blank period (or blank time) in which no valid image data is applied may be defined between the activation periods. The blank period (or blank time) when no data voltage is applied may indicate a period in which an image corresponding to a previous data signal is maintained until a data voltage corresponding to a next data signal is supplied. According to an embodiment, the holding capacitor C st It may be auxiliary for maintaining a data voltage (eg, pixel voltage) for one frame. According to an embodiment, charges accumulated in the thin film transistor may be released by the data voltage supplied to the thin film transistor during the blank period.

[0060] Meanwhile, conventional display devices may have fixed LCD panels that operate only at a specific frame rate. Here, the frame rate may indicate the speed at which the display device displays one frame. The frame rate of the LCD panel may be referred to as the screen refresh rate, frequency, or scan rate, and for ease of explanation, is collectively referred to as the frame rate hereinafter. The frame rate may be expressed in Hz. For example, when the frame rate is 60 Hz, the LCD panel may provide 60 frames per second. For another example, when the frame rate is 120 Hz, the LCD panel may provide 120 frames per second.

[0061] According to an embodiment, when the frame rate of the liquid crystal panel is 60 Hz, the 1 / 60 s time for displaying one frame may include an active time period in which valid image data is applied and a blank time period in which no valid image data is applied. Typically, the frame rate of the liquid crystal panel may be fixed, and therefore the active time period and the blank time period may also be fixed.

[0062] Unlike conventional display devices, the display device 100 according to various examples of the present disclosure can be variably driven at any of a plurality of frame rates. Hereinafter, this specification describes a method for minimizing lower screen quality such as flicker or afterimage by variably changing an activation period and a blank period and dynamically changing a common voltage Vcom when the display device 100 operates at various frame rates.

[0063] Meanwhile, the active period may be referred to as a display area or a display period, and the blank period may be referred to as a non-display area or a non-display period. However, for ease of explanation, these periods are collectively referred to as active period and blank period, respectively, hereinafter.

[0064] Hereinafter, this specification describes a method of providing an image corresponding to each of a plurality of frame rates without lower image quality such as flicker or afterimage by fixing an activation period and changing a blank period according to various embodiments of the present disclosure.

[0065] Figure 2 is a block diagram for explaining a detailed configuration of a display device according to an embodiment of the present disclosure.

[0066] Reference Figure 2 , the display device 100 according to an embodiment of the present disclosure may include a display panel 110 , a controller 120 , and a memory 130 .

[0067] The display device 100 according to the embodiment can be implemented as a television (TV), but is not limited thereto. The display device 100 can be applied to any device having a display function without limitation, such as a video wall, a large-size display (LFD), a digital signage, a digital information display (DID), or a projector display. In addition, the display panel 110 can be implemented as various types of display panels, such as a liquid crystal display (LCD), an organic light emitting diode (OLED), a liquid crystal on silicon (LCoS), a digital light processing (DLP), a quantum dot (QD), a quantum dot light emitting diode (QLED), a micro light emitting diode (μLED), or a mini LED.

[0068] At the same time, if Figure 1 As shown, the display panel 110 may include a plurality of gate lines, a plurality of data lines, a thin film transistor located at the intersection of the gate lines and the data lines, and a common electrode line for providing a common voltage. According to an embodiment, the common electrode line may provide a common voltage to the liquid crystal capacitor and the holding capacitor. For example, the common electrode line may provide a plurality of common voltages to the liquid crystal capacitor and the holding capacitor, respectively. For example, the common electrode line may provide a first common voltage (e.g., Vcom) to the liquid crystal capacitor, and provide a second common voltage (e.g., V cst ).

[0069] The display device 100 according to an embodiment of the present disclosure may be implemented as a touch screen combined with a touch sensor, a flexible display, a rollable display, a three-dimensional (3D) display, a display in which a plurality of display modules are physically connected to each other, and the like.

[0070] The controller 120 may control overall operations of the display device 100 .

[0071] The controller 120 according to the embodiment may be implemented as a digital signal processor (DSP), a microprocessor, an artificial intelligence (AI) processor, or a timing controller (T-CON) for processing a digital image signal. However, the controller 120 is not limited thereto, and may include one or more of a central processing unit (CPU), a microcontroller unit (MCU), a microprocessing unit (MPU), a controller, an application processor (AP), a communication processor (CP), and an ARM processor, or may be defined by these terms. In addition, the controller 120 may be implemented by a system on chip (SoC) or a large-scale integration (LSI) embedded with a processing algorithm, or may be implemented in a field programmable gate array (FPGA).

[0072] The controller 120 according to an embodiment of the present disclosure may supply a data voltage corresponding to a data signal to the thin film transistor through a data line during an activation period. That is, the controller 120 may apply effective image data to the liquid crystal unit during the activation period. Meanwhile, as an example, the data signal may indicate a frame of data signals, and the data signal is not limited thereto. For example, a frame may be divided into a plurality of blocks, and the data signal may indicate a signal corresponding to a predetermined number of blocks among the plurality of blocks.

[0073] Figure 3 is a diagram for explaining an active period and a blank period according to an embodiment of the present disclosure.

[0074] The controller 120 according to an embodiment of the present disclosure can identify whether the next data signal is received after a threshold time after a blank period in which no valid image data is applied. The controller 120 can then control the common electrode line to adjust the common voltage Vcom based on the identification result. Meanwhile, the common voltage can be referred to as the counter electrode voltage, and is collectively referred to as the common voltage for ease of explanation.

[0075] Conventional display devices may have a fixed frame rate, and thus the active period and the blank period may be fixed. The display device 100 according to an embodiment of the present disclosure may operate by changing the frame rate, and thus the active period and the blank period may also be changed.

[0076] The display device 100 according to various examples of the present disclosure can output an image that conforms to the calculation result (e.g., the frame rate of the image) of a computing device (e.g., a graphics card) without lower image quality such as flickering or afterimage, and eliminate screen tearing by corresponding to a variety of adaptive synchronization technologies such as AMD's Free SyncTM and Nvidia's G-SyncTM.

[0077] Reference Figure 3 The display device 100 according to the embodiment of the present disclosure may define the blank period as immediately following the activation period until the first period t 1 or until the second time period t 2 For ease of explanation, Figure 3 Only the threshold time t is shown vrr and the first time period t 1 To the third time period t 3 However, the blank period can be defined as the period after the active period until the nth period t n time period.

[0078] For convenience of explanation, this specification assumes and describes a case where the display device 100 operates at a specific frame rate.

[0079] In this case, the controller 120 may identify that a threshold time t has elapsed after the blank period immediately following the activation period begins. vrr Whether the next data signal is received. Here, the threshold time t vrr For example, the display device 100 may include a display panel 110 that operates at a frame rate of 120 Hz, and in this case, the controller 120 may identify a threshold time t after the activation period. vrr Here, the activation time period and the threshold time t vrr The sum can be 1 / 120s.

[0080] According to an embodiment, when at the threshold time t vrr When the next data signal is received within 10 seconds, the controller 120 may determine that the frame rate has not changed.

[0081] This manual refers to Figure 4 The configuration is described in detail.

[0082] Reference Figure 4 , when the data signal is at the threshold time t vrr When the next data signal is received within 10 seconds, the controller 120 according to an embodiment of the present disclosure may determine that the frame rate has not changed and maintain the common voltage.

[0083] Then the activation period can be at the threshold time t vrr After that, the controller 120 may apply the valid image data corresponding to the received next data signal to the liquid crystal panel. That is, the controller 120 may supply the data voltage corresponding to the next data signal to the thin film transistor through the data line.

[0084] During the blank period, the charge accumulated in the capacitor via the thin film transistor may be discharged by the data voltage, that is, a loss due to voltage discharge may occur. In the display device 100, considering the loss due to voltage discharge during the blank period, an optimal common voltage corresponding to the frame rate of the display device 100 may be set to prevent lower image quality phenomena such as flicker or afterimage. This specification refers to Figure 5 The configuration is described in detail.

[0085] Figure 5 is a diagram for explaining an optimal common voltage according to an embodiment of the present disclosure.

[0086] Reference Figure 5, the thin film transistors of the liquid crystal display may degrade when the electric field is continuously applied in the same direction due to its characteristics, such as with ion stacking. Therefore, it is necessary to drive the display by reversing the polarity of the data voltage (e.g., pixel voltage or grayscale voltage) based on the common electrode in units of frames. For example, when the polarity of the voltage applied to a liquid crystal unit is positive (+), the polarity of the voltage applied to the liquid crystal unit based on the next data signal needs to be negative (-). That is, based on the common electrode, the data voltage can be positive (+) or negative (-).

[0087] At the same time, the effective value of the voltage actually applied to the liquid crystal unit can be determined by the voltage magnitude between the data voltage and the common voltage Vcom. Here, the voltage magnitudes of the positive polarity (+) and the negative polarity (-) can be symmetrical to each other, thereby preventing lower image quality phenomena such as flickering or afterimage.

[0088] Conventional display devices may have fixed active and blanking periods, taking into account only the situation where the device operates at a specific frame rate. In addition, conventional display devices may operate at an optimal common voltage, which is set to prevent lower image quality due to loss caused by voltage discharge during the fixed blanking period.

[0089] For example, refer to Figure 5 For example, a conventional display device may operate at a frame rate of 48 Hz, and in this case, an optimal common voltage corresponding thereto may be predetermined. For another example, a conventional display device may operate at a frame rate of 120 Hz, and in this case, an optimal common voltage corresponding thereto may be predetermined.

[0090] As in the embodiment of the present disclosure, the display device 100 can appropriately adjust (eg, increase or decrease) the common voltage to prevent lower image quality when outputting images of various frame rates. Figure 6 The configuration is described in detail.

[0091] Figure 6 is a diagram for explaining an adjusted common voltage according to an embodiment of the present disclosure.

[0092] Reference Figure 6, the controller 120 according to an embodiment of the present disclosure may count the elapsed time based on a reference clock at the beginning of a blank period. The controller 120 may then control the common electrode line to adjust the common voltage based on the counted elapsed time. According to an embodiment, the controller 120 may also count the elapsed time based on a reference clock at the beginning of an activation period. That is, the reference for counting the elapsed time may be after the beginning of a blank period or after the beginning of an activation period. At the same time, the reference clock may be a clock based on the operating frequency of the display device 100. For example, the reference clock may indicate a scanning time for scanning each of a plurality of pixel lines included in the display panel 110 in an activation period. However, this configuration is merely an example and may not be limited thereto.

[0093] According to an embodiment, the controller 120 may, after the activation period (eg, the time point at which the activation period ends), generate a time signal when the counted elapsed time is longer than the threshold time t vrr The first time period t 1 The controller 120 may then adjust the common voltage by applying the obtained first increase / decrease rate to the common voltage.

[0094] Reference Figure 6 , at the threshold time t vrr The case where the next data signal is not received within the blank period may be a case where an image having a frame rate different from that of the display device 100 is received. For example, the display device 100 may have a frame rate of 120 Hz. In this case, because after the blank period (for example, the threshold time t corresponding to the frame rate of 120 Hz) vrr ) When the next data signal is not received, no valid image data is received and the blank time period may become longer.

[0095] When the blank period becomes longer as the frame rate of the image changes (for example, when the elapsed time counted after the active period is longer than the threshold time t vrr ), the conventional display device may increase the voltage distortion of the common electrode and rapidly reduce the brightness due to the voltage discharge. Therefore, the conventional display device 100 may apply an electric field corresponding to the difference between the data voltage corresponding to the next data signal and the common voltage Vcom to the liquid crystal without compensating for the voltage loss increased during the blank period. Therefore, due to the gradually increased or decreased brightness, flickering may occur, and in severe cases, lower image quality phenomena such as image distortion or afterimage may occur.

[0096] According to an embodiment of the present disclosure, after the blank period immediately following the activation period begins, the threshold time t vrrIf the next data signal is not received within 10 seconds, the controller 120 may determine that the frame rate is changed. The controller 120 may then adjust (eg, increase or decrease) the common voltage to compensate for voltage loss due to voltage distortion of the common electrode that increases as the blank period becomes longer.

[0097] Meanwhile, the display device 100 according to an embodiment of the present disclosure may include the memory 130 storing information on a voltage increase / decrease rate for each of a plurality of time periods included in the blank time period.

[0098] For example, Figure 3 As shown, the display device 100 may include a memory 130, which stores the blank period starting from the threshold time t vrr To the first time period t 1 The information about the voltage increase / decrease rate from the first time period t 1 To the second time period t 2 The information about the voltage increase / decrease rate and the information about the voltage increase / decrease rate from the second time period t 2 To the third time period t 3 Information about the rate of voltage increase / decrease.

[0099] According to an embodiment, the controller 120 may count the elapsed time based on the reference clock at the beginning of the blank period, and when the threshold time t vrr The elapsed time counted from 1 , the common voltage is adjusted by applying a first increase / decrease rate corresponding to the first time period to the common voltage. Meanwhile, the time point at which the controller 120 counts the elapsed time may not be limited to the time point after the start of the blank time period, and the controller 120 may count the elapsed time based on the reference clock at the same time as the start of the activation time period. In this case, the threshold time t may be increased in consideration of the activation time period. vrr .

[0100] At the same time, if Figure 6 As shown, when the next data signal is received, the blank period can be defined as until the first period t 1 The blank period may be maintained for a longer period of time, and then the active period may start again. However, the next data signal may not be received, so that the blank period may remain longer. Figure 7 This example is described.

[0101] Figure 7 is a diagram for explaining an adjusted common voltage according to another example of the present disclosure.

[0102] Reference Figure 7, the controller 120 may obtain a second increase / decrease rate corresponding to the second time period when the counted elapsed time belongs to the second time period among the plurality of time periods while maintaining the blank time period.

[0103] For example, when in the first time period t 1 When the next data signal is not received thereafter, the voltage loss due to the voltage distortion of the common electrode may increase as the blank period becomes longer.

[0104] The controller 120 according to an embodiment of the present disclosure may apply the obtained second increase / decrease rate to the adjusted common voltage. For example, the controller 120 may apply the second increase / decrease rate previously obtained in the first time period t 1 The common voltage to which the first increase / decrease rate is applied is applied with a second increase / decrease rate.

[0105] For ease of explanation, Figure 6 and Figure 7 Assume and show that the first time period t 1 The corresponding first increase / decrease rate corresponds to 5%, and is related to the second time period t 2 The corresponding second increase / decrease rate corresponds to 10%. However, these ratios are only examples and are not limited thereto. For example, the voltage increase / decrease rate of each of the plurality of time periods may be set differently based on test results, etc., which measure how much loss occurs due to voltage discharge when the blank time period starts and the elapsed time reaches each of the plurality of time periods in the blank time period.

[0106] Meanwhile, the information about the voltage increase / decrease rate of each of the plurality of time periods included in the blank time period stored in the memory 130 may be information in the form of a lookup table predetermined based on the above-mentioned test results, etc. However, this form is only an example, and the information may be implemented in various types of data.

[0107] Figure 8 is a graph for explaining a voltage increase rate according to an embodiment of the present disclosure.

[0108] Reference Figure 8 , the voltage increase / decrease rate applied to the common voltage can be related to the threshold time t vrr As described above, since the threshold time t after the blank period starts vrr If the next data signal is not received within the threshold time t, when the blank period becomes longer, the voltage loss caused by the voltage distortion of the common electrode may increase. Therefore, the controller 120 may vrr Thereafter, the rate of increase / decrease of the voltage applied to the common voltage is changed in proportion to the elapsed time.

[0109] Reference Figure 8 , it can be assumed that the third time period t after the blank time period begins 3 In this case, the blank period may be defined as a period of time until the third period of time t after the activation period. 3 time period.

[0110] The controller 120 according to an embodiment of the present disclosure may count the elapsed time based on the reference clock while the blank period starts, and when the counted elapsed time is longer than the threshold time t vrr When the counted elapsed time belongs to the first time period t 1 When the controller 120 applies the common voltage to the first time period t 1 The corresponding increase / decrease rate (e.g., 5%).

[0111] Then, while maintaining the blank period, when the elapsed time is longer than the first period t 1 When the controller 120 applies the common voltage to the second time period t 2 The corresponding increase / decrease rate (e.g., 10%).

[0112] Then, while maintaining the blank period, when the elapsed time is longer than the second period t 2 When the controller 120 applies the common voltage to the third time period t 3 The corresponding increase / decrease rate (e.g., 15%). That is, while maintaining the blank period, when the counted elapsed time increases, the voltage increase / decrease rate applied to the common voltage can be increased or decreased proportionally. For ease of explanation, Figures 6 to 8 The specific numbers shown are merely examples, and the present disclosure is not limited thereto.

[0113] Reference Figures 6 to 8 , when the next data signal is received, the blank period may end and the active period may start. That is, the controller 120 may provide the thin film transistor with a data voltage corresponding to the next data signal through the data line.

[0114] In addition, the controller 120 according to an embodiment of the present disclosure may reset the increase / decrease rate applied to the common voltage at the beginning of the activation period while receiving the next data signal. For example, the next data signal may be received in a state where the common voltage increases or decreases as the blank period becomes longer. In this case, the controller 120 may change the common voltage to a common voltage predetermined by the manufacturer (e.g., Figure 5For example, the increase / decrease rate applied to the common voltage may be reset. In this case, the display device 100 may be initialized to have a common voltage initially set by the manufacturer.

[0115] Fig. 9 is a graph for explaining a voltage reduction rate according to another example of the present disclosure.

[0116] For ease of explanation, Figures 6 to 8 Only a case where an increase rate corresponding to each time period is obtained to increase the common voltage, and vice versa is assumed and shown.

[0117] In the display device 100 according to various examples of the present disclosure, the blank period may not be fixed and may be changed. The data signal may be received after a threshold time has passed after the blank period immediately following the activation period begins. In addition, when the data signal is not received within the threshold time, the controller 120 may determine that the frame rate is changed and appropriately increase or decrease the common voltage to maintain the voltage loss caused by the common electrode voltage distortion when the blank period becomes longer.

[0118] According to an embodiment of the present disclosure, the display device 100 may be configured to have an active period corresponding to a frame rate of 120 Hz and an optimal common voltage, and include a plurality of periods t in the blank period. 1 to 3 They may correspond to 80 Hz, 60 Hz, and 48 Hz, respectively. This configuration is for convenience of explanation, and the present disclosure is not limited thereto.

[0119] According to an embodiment of the present disclosure, the display device 100 can provide images at a variable frequency of 48 Hz to 120 Hz while minimizing lower image quality phenomena or grayscale distortion phenomena such as flicker or afterimage by appropriately adjusting the common voltage to ensure voltage loss due to voltage distortion of the common electrode.

[0120] According to various examples of the present disclosure, the display device 100 can not only operate at a fixed frame rate, but also provide images of various frame rates by appropriately changing the blank time period. Therefore, the display device 100 according to various examples of the present disclosure can output an image that conforms to the calculation result (e.g., the frame rate of the image) of the computing device (e.g., the graphics card) without lower image quality such as flickering or afterimage, and eliminate screen tearing by corresponding to various adaptive synchronization technologies such as AMD's Free SyncTM and Nvidia's G-SyncTM.

[0121] In addition, the above embodiment assumes and describes the case where the common electrode is equally connected to each of the liquid crystal capacitor and the holding capacitor. However, respectively, the first common electrode may be connected to the liquid crystal capacitor, and the second common electrode may be connected to the holding capacitor. In this case, the controller 120 may apply a voltage corresponding to the threshold time t to at least one of the voltage of the liquid crystal capacitor based on the first common voltage or the voltage of the holding capacitor based on the second common voltage. vrr The rate of increase corresponding to the elapsed time thereafter.

[0122] Here, the first common electrode and the second common electrode refer to different electrodes.

[0123] return Figure 2 , the panel driver (not shown) may provide a driving signal to the display panel 110. For example, the panel driver may include a gate driver (not shown), a data driver (not shown), and a common voltage generator (not shown). Figure 3 The example of FIG. 1 describes the panel driving unit as a separate component. However, in another example of the present disclosure, the controller 120 may also be used as the panel driving unit.

[0124] The memory 130 may be electrically connected to the controller 120 and store data required for various examples of the present disclosure. For example, the memory 130 may be implemented as an internal memory included in the processor 130, such as a read-only memory (ROM) (e.g., an electrically erasable programmable read-only memory (EEPROM)) or a random access memory (RAM), or a memory separate from the processor 130.

[0125] Based on the data storage purpose, the memory 130 may be implemented as a memory embedded in the display device 100, or as a memory detachable from the display device 100. For example, data for driving the display device 100 may be stored in the memory embedded in the display device 100, and data for the extended functions of the display device 100 may be stored in the memory detachable from the display device 100. When implemented as a memory embedded in the display device 100, the memory 130 may be at least one of a volatile memory (e.g., a dynamic random access memory (DRAM), a static RAM (SRAM), or a synchronous dynamic RAM (SDRAM)), or a non-volatile memory (e.g., a one-time programmable read-only memory (OTPROM), a programmable ROM (PROM), an erasable programmable ROM (EPROM), an electrically erasable programmable ROM (EEPROM), a mask ROM, a flash ROM, a flash memory (e.g., a NAND flash memory or a NOR flash memory), a hard disk drive, or a solid state drive (SSD)).

[0126] When implemented as a memory that is removable from the display device 100, the memory 130 may be a memory card (e.g., Compact Flash (CF), Secure Digital (SD), Micro Secure Digital (Micro-SD), Mini Secure Digital (Mini-SD), Extreme Digital (xD), or MultiMediaCard (MMC)), or an external memory that may be connected to a Universal Serial Bus (USB) port (e.g., a USB memory).

[0127] Specifically, the memory 130 according to an embodiment of the present disclosure may store information about setting values ​​required to drive the display panel 110 at a specific frame rate among a plurality of frame rates.

[0128] For example, the memory 120 may store information about a voltage increase / decrease rate for each of a plurality of frame rates other than a specific frame rate.

[0129] The user interface (not shown) may be implemented as a device such as a button, a touch pad, a mouse, or a keyboard, or may be implemented as a touch screen that can perform the above-mentioned display function and operation input function together, a remote control transceiver, etc. The remote control transceiver may receive or send a remote control signal from an external remote control device through at least one of infrared communication, Bluetooth communication, and Wi-Fi communication.

[0130] The output device (not shown) can output a sound signal. For example, the output device can convert a digital sound signal processed by the controller 120 into an analog sound signal, amplify it, and output the amplified sound signal. For example, the output device may include at least one speaker unit that can output at least one channel, a digital-to-analog (D / A) converter, an audio amplifier, etc. For example, the output device can output various multi-channel sound signals. In this case, the controller 120 can control the output device to enhance the processing and output the input sound signal to correspond to the enhanced processing of the input image. For example, the controller 120 can convert the input dual-channel sound signal into a virtual multi-channel (e.g., 5.1 channel) sound signal, process the corresponding signal into a stereo signal optimized for space by identifying the position where the display device 100' is placed, or provide an optimized sound signal for the type of input image (e.g., content type).

[0131] According to an example, the display device 100 may further include a tuner and a demodulator. The tuner (not shown) may receive a radio frequency (RF) broadcast signal by tuning a channel selected by a user or all pre-stored channels in the RF broadcast signal received through an antenna. The demodulator (not shown) may receive and demodulate a digital intermediate frequency (DIF) signal converted by the tuner, and may also perform channel decoding, etc. An input image received by the tuner according to the example may be processed by the demodulator (not shown) and then provided to the controller 120 for image processing according to an example of the present disclosure.

[0132] Fig.10 is a flowchart for explaining a method for controlling a display device according to another embodiment of the present disclosure.

[0133] According to another embodiment of the present disclosure, a method for controlling a display device, the display device includes a thin film transistor located at the intersection of a gate line and a data line, and a common electrode line for providing a common voltage to a liquid crystal capacitor and a holding capacitor, the method may first include: supplying a data voltage corresponding to a data signal to the liquid crystal capacitor and the holding capacitor through the thin film transistor during an activation period (S1005). Then, the method may include: identifying whether a next data signal is received after a threshold time has passed after the start of a blank period, and controlling the common electrode line to adjust the common voltage based on the identification result (S1010).

[0134] According to another embodiment, controlling the common electrode line (S1010) may include counting an elapsed time based on a reference clock when a blank period starts, and controlling the common electrode line to adjust a common voltage based on the counted elapsed time when the counted elapsed time is longer than a threshold time.

[0135] According to another embodiment, the display device may include information related to a voltage increase / decrease rate for each of a plurality of time periods included in a blank time period, and controlling the common electrode line (S1010) may include: when the counted elapsed time belongs to a first time period among the plurality of time periods, obtaining a first increase / decrease rate corresponding to the first time period, and adjusting the common voltage by applying the obtained first increase / decrease rate to the common voltage.

[0136] According to another embodiment, controlling the common electrode line (S1010) may include: while maintaining a blank time period, when the counted elapsed time belongs to a second time period among multiple time periods, obtaining a second increase / decrease rate corresponding to the second time period, and applying the second increase / decrease rate to the adjusted common voltage.

[0137] Here, the voltage increase / decrease rate applied to the common voltage may increase or decrease in proportion to the elapsed time.

[0138] According to another embodiment, the control method may further include supplying a data voltage corresponding to the next data signal to the thin film transistor through the data line when the next data signal is received, and resetting an increase / decrease rate applied to the common voltage.

[0139] According to another embodiment, controlling the common electrode line ( S1010 ) may include maintaining a common voltage when a next data signal is received within a threshold time, wherein the threshold time is determined based on a frame rate of the display device.

[0140] According to another embodiment, controlling the common electrode line ( S1010 ) may include adjusting at least one voltage of: a voltage of a liquid crystal capacitor based on the first common voltage, or a voltage of a holding capacitor based on the second common voltage based on the recognition result.

[0141] According to another embodiment of the present disclosure, charges accumulated in the liquid crystal capacitor and the holding capacitor may be released due to voltage loss caused by distortion of the common voltage and leakage characteristics of the thin film transistor during a blank period.

[0142] However, various embodiments of the present disclosure may be applied to all electronic devices that can perform image processing (eg, image receiving devices such as set-top boxes and image processing devices) and display devices.

[0143] At the same time, the above-mentioned various embodiments of the present disclosure can be implemented in a computer or a computer-readable recording medium using software, hardware, or a combination of software and hardware. In some cases, the embodiments described in the present disclosure can be implemented by the processor itself. According to the software implementation, embodiments such as the processes and functions described in this specification can be implemented by separate software modules. Each software module can perform one or more functions and operations described in this specification.

[0144] Meanwhile, computer instructions for executing the processing operation of the sound output device 100 according to the above-described various embodiments of the present disclosure may be stored in a non-transitory computer-readable medium. When a processor of a specific device executes the instructions, the computer instructions stored in the non-transitory computer-readable medium allow the specific device to execute the processing operation of the sound output device 100 according to the above-described various embodiments.

[0145] A non-transitory computer-readable medium is not a medium in which data is temporarily stored, such as a register, a cache, or a memory, but refers to a medium in which data is semi-permanently stored and can be read by a machine. Specific examples of non-transitory computer-readable media may include a compact disc (CD), a digital versatile disc (DVD), a hard disk, a Blu-ray disc, a universal serial bus (USB), a memory card, a read-only memory (ROM), etc.

[0146] Although the embodiments are shown and described above in the present disclosure, the present invention is not limited to the above specific embodiments, and various modifications may be made by those skilled in the art without departing from the gist of the present disclosure as claimed in the appended claims. These modifications should also be understood to fall within the scope and spirit of the present disclosure.

Claims

1. A display device, comprising: A thin film transistor located at the intersection of the gate line and the data line; A common electrode line for providing a common voltage to the liquid crystal capacitor and the holding capacitor; a memory storing information on a voltage increase / decrease rate for each of a plurality of time periods included in the blank time period; as well as a controller that supplies a data voltage corresponding to a data signal to the liquid crystal capacitor and the holding capacitor through the thin film transistor during an activation period, wherein, when the blank period starts, the controller counts the elapsed time based on a reference clock to identify whether the next data signal is received after a threshold time. The controller obtains a first increase / decrease rate corresponding to a first time period among the plurality of time periods when the counted elapsed time belongs to the first time period, and The common voltage is adjusted by controlling the common electrode line by applying the obtained first increase / decrease rate to the common voltage.

2. The display device according to claim 1, wherein: The controller obtains a second increase / decrease rate corresponding to a second time period when the counted elapsed time belongs to a second time period among the plurality of time periods while maintaining the blank time period, and The second increase / decrease rate is applied to the adjusted common voltage.

3. The display device according to claim 2, wherein: The voltage increase / decrease rate applied to the common voltage increases or decreases in proportion to the elapsed time.

4. The display device according to claim 2, wherein: When receiving the next data signal, the controller supplies a data voltage corresponding to the next data signal to the liquid crystal capacitor and the holding capacitor through the thin film transistor, and The increase / decrease rate applied to the common voltage is reset.

5. The display device according to claim 1, wherein: The controller maintains the common voltage when receiving the next data signal within the threshold time, and The threshold time is determined based on a frame rate of the display device.

6. The display device according to claim 1, wherein: The controller adjusts at least one of a voltage of the liquid crystal capacitor based on a first common voltage or a voltage of the holding capacitor based on a second common voltage by applying the obtained first increase / decrease rate to the common voltage.

7. The display device according to claim 1, wherein: Charges accumulated in the liquid crystal capacitor and the holding capacitor are discharged due to voltage loss caused by distortion of the common voltage and leakage characteristics of the thin film transistor during the blank period.

8. A method for controlling a display device, the display device comprising a thin film transistor located at an intersection of a gate line and a data line, a common electrode line supplying a common voltage to a liquid crystal capacitor and a holding capacitor, and a memory storing information on a voltage increase / decrease rate for each of a plurality of time periods included in a blank time period, the method comprising: supplying a data voltage corresponding to a data signal to the liquid crystal capacitor and the holding capacitor through the thin film transistor during an active period; When the blank period starts, the elapsed time is counted based on the reference clock to identify whether the next data signal is received after the threshold time, When the counted elapsed time belongs to a first time period among the plurality of time periods, obtaining a first increase / decrease rate corresponding to the first time period, and The common voltage is adjusted by controlling the common electrode line by applying the obtained first increase / decrease rate to the common voltage.

9. The method according to claim 8, wherein: Controlling the common electrode line comprises: while maintaining the blank time period, when the counted elapsed time belongs to a second time period among the plurality of time periods, obtaining a second increase / decrease rate corresponding to the second time period; and The second increase / decrease rate is applied to the adjusted common voltage.

10. The method according to claim 9, wherein: The voltage increase / decrease rate applied to the common voltage increases or decreases in proportion to the elapsed time.

11. The method according to claim 9, further comprising: When the next data signal is received, supplying a data voltage corresponding to the next data signal to the thin film transistor through the data line; as well as The increase / decrease rate applied to the common voltage is reset.

Images