Server boot sequence debugging system

Abstract

The application provides a server start-up sequence debugging system applied to a server, which comprises a voltage regulator, a CPLD, a transmission module and a display module; the voltage regulator is used to adjust and transmit power-on signals required by each component during server start-up, to power on the server, and to transmit the power-on signals to the CPLD; the CPLD is used to receive the power-on signals transmitted by the voltage regulator and to distribute the power-on signals to each component of the server; the transmission module is used to receive data, to convert the data, and then to transmit the converted data to the display module; and the display module is used to display power-on signals that do not meet standard requirements in the power-on process of the server according to the data.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of servers, and in particular to a server startup sequence debugging system. BACKGROUND

[0002] There are multiple DC power supply rails on the circuit board of a server. When the server is powered on, these power supplies need to be turned on in the order and time specified by the standard to ensure that the server can work normally. During the product development stage and after mass production of the product, it is necessary to frequently debug the power-on / off sequence of the server machine. There are usually two traditional debugging methods: the first method is to solder corresponding power control and indicator light signals on the circuit board of the server, and use a logic analyzer or an oscilloscope to measure and analyze the sequence and time of the signals, which requires a lot of time for soldering, is time-consuming and laborious, and soldering can cause damage to the circuit board of the server. The second method is to display the state of the startup sequence control in the form of a binary code on the debugging LED of the server, but since the LED is observed with the naked eye, the sequence and time between the power supply rails cannot be accurately determined. Therefore, there is still a need for continuous improvement in the debugging of the server startup sequence. SUMMARY

[0003] The present application provides a server startup sequence debugging system applied to a server, which comprises a voltage regulator, a complex programmable logic device (CPLD), a transmission module and a display module. The voltage regulator is used to adjust and transmit the power-on signals required by each component of the server during startup, to power on the server, and to transmit the power-on signals to the CPLD. The CPLD is used to receive the power-on signals transmitted by the voltage regulator and distribute them to each component of the server, while collecting a second signal in the power-on signals and converting the second signal into second data, and then transmitting the second data to the transmission module. The transmission module is used to receive the second data and parse the second data into third data, and then transmit the third data to the display module. The display module is used to display the power-on signals that do not meet the standard requirements for power-on timing during the power-on process of the server according to the third data.

[0004] The CPLD comprises a power-on module and a debugging module. The power-on module has a logic program written in it, and the power-on module is used to receive the power-on signals transmitted by the voltage regulator and distribute them to each component of the server according to the written logic program, while transmitting the power-on signals to the debugging module. The debugging module is electrically connected to the power-on module, and the debugging module comprises a sampling module, a detection module, a storage module and a conversion module.

[0005] The sampling module is electrically connected with the power-on module, and is used to collect the initial voltage when the server is powered on and the change of the signal in the timing in the subsequent power-on process; when the power-on module transmits the power-on signal into the sampling module, the power-on signal in the power-on timing is encoded in the sampling module, and the initial voltage of the power-on signal at the power-on time is collected; the sampling module includes a sampling timer, which starts timing when the server starts effective power-on, and continuously keeps timing in the subsequent power-on process.

[0006] The detection module is electrically connected with the sampling module, and is used to detect the change of the signal in the power-on timing; when a second signal in the power-on signal in the power-on timing is detected, the second signal is the power-on signal that changes in the power-on timing, the time when the second signal changes and the code of the second signal are extracted from the sampling module, the code of the second signal and the change time are integrated into first data in a preset byte stream format, and the first data is transmitted to the storage module; the detection module is also used to detect whether the power-on process of the server is abnormal.

[0007] The storage module is electrically connected with the detection module, and is used to store the time when the second signal changes and the code of the second signal in the power-on process of the server detected by the detection module.

[0008] When the storage module is full, the conversion module extracts the first data in the storage module and converts it; when the storage module is not full, the detection module detects whether the power-on process of the server is abnormal; if it is detected that the power-on process of the server is not abnormal, the conversion module extracts the first data in the storage module and converts it; if it is detected that the power-on process of the server is abnormal, it is detected whether the server is powered on; if it is detected that the server is powered on, the conversion module extracts the first data in the storage module and converts it; if it is detected that the server is not powered on, the detection module continues to detect the change of the signal, and the storage module also continues to store the time when the signal changes and the code of the signal that changes in the power-on process of the server detected by the detection module.

[0009] The conversion module is electrically connected with the storage module, and is used to convert the first data in the storage module into second data, so that the second data can be transmitted to the display module through the transmission module.

[0010] The transmission module includes a universal asynchronous receiver-transmitter (UART) and a USB interface. The UART receives the second data, parses the second data into the third data, and then transmits the third data out through the USB interface.

[0011] The display module is electrically connected to the transmission module. The display module is used to display a power-on signal that does not conform to a standard during a power-on process of a server. A program is written in the display module to determine whether the power-on signal conforms to the standard according to the third data.

[0012] When it is determined that the power-on signal conforms to the standard, that is, each component of the server is normally powered on within the standard time sequence during the power-on process of the server, the debugging ends. When it is determined that the power-on signal does not conform to the standard, that is, each component of the server is not normally powered on within the standard time sequence during the power-on process of the server, the display module displays the power-on signal that does not conform to the standard.

[0013] The server start-up sequence debugging system provided in the application does not need to weld a test line or connect an external instrument during debugging of a server start-up sequence. A debugging module in a CPLD is used to sample a power-on signal within a power-on time sequence. After the server is powered on, the change of the power-on signal within the power-on time sequence is detected, and the change of the power-on signal is detected at the same time. The data of the signal change is output to a terminal. It is determined whether the power-on conforms to the standard, and the power-on signal that does not conform to the power-on standard is displayed. BRIEF DESCRIPTION OF DRAWINGS

[0014] Figure 1 is a combined block diagram of the server start-up sequence debugging system of the embodiment of the application;

[0015] Figure 2 is a debugging flowchart of the server start-up sequence debugging system of the embodiment of the application.

[0016] MAIN ELEMENT SYMBOL EXPLANATION

[0017] Debugging system 1

[0018] Voltage regulator 10

[0019] CPLD 20

[0020] Power-on module 21

[0021] Debugging module 22

[0022] Sampling module 23

[0023] Detection module 24

[0024] Storage module 25

[0025] Conversion module 26

[0026] Transmission module 30

[0027] Display module 40

[0028] The following specific embodiments will further illustrate the present application in conjunction with the above-mentioned figures. DETAILED DESCRIPTION

[0029] The technical solutions in the embodiments of the present application will be described clearly and completely in conjunction with the figures in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments of the present application.

[0030] The server startup sequence debugging system proposed in the present application does not need to weld test lines on the circuit board of the server, nor needs to externally connect instruments when debugging the server startup sequence. The debugging module in the complex programmable logic device (CPLD) is used to sample and detect the signals in the power-on sequence, to judge whether the power-on meets the standard requirements, and to display the signals that do not meet the power-on standard requirements.

[0031] Referring to Figure 1 The combination block diagram of the server startup sequence debugging system 1 in the embodiments of the present application is shown in FIG. 1. The debugging system 1 can include a voltage regulator 10, a CPLD 20, a transmission module 30, and a display module 40. The voltage regulator 10 is electrically connected with the CPLD 20. The CPLD 20 is electrically connected with the transmission module 30. The transmission module 30 is electrically connected with the display module 40.

[0032] The voltage regulator 10 is used to adjust and transmit the power-on signals required by each component of the server during startup, to power on the server, and to transmit the power-on signals to the CPLD 20. In some embodiments, the power-on signals transmitted by the voltage regulator 10 to the server and the CPLD 20 can be electrical signals.

[0033] The CPLD 20 includes a power-on module 21 and a debugging module 22. The power-on module 21 can write logic programs therein. The power-on module 21 is used to receive the power-on signals transmitted by the voltage regulator 10 according to the written logic programs, and to distribute the power-on signals to each component of the server, while transmitting the power-on signals to the debugging module 22. The debugging module 22 is electrically connected with the power-on module 21. The debugging module 22 includes a sampling module 23, a detection module 24, a storage module 25, and a conversion module 26.

[0034] The sampling module 23 is electrically connected to the power-on module 21. The sampling module 23 is used to collect the initial voltage when the server is powered on and the change of the power-on signal in the subsequent power-on process. When the power-on module 21 transmits the power-on signal to the sampling module 23, the power-on signal in the power-on sequence is encoded in the sampling module 23, and the initial voltage of the power-on signal at the time of power-on is collected. The sampling module 23 can include a sampling timer. When the server starts to be effectively powered on, the sampling timer starts to count. In the subsequent power-on process, the sampling timer continues to count. In some embodiments, when the server starts to be effectively powered on, an effective power-on flag is lit. After the effective power-on flag is lit, the sampling timer starts to count.

[0035] The detection module 24 is electrically connected to the sampling module 23. The detection module 24 is used to detect the change of the power-on signal in the power-on sequence. When a second signal in the power-on signal in the power-on sequence is detected, the second signal is the power-on signal that changes in the power-on sequence, the time when the second signal changes and the encoding of the second signal are extracted from the sampling module 23, and then the encoding of the second signal and the change time are integrated into the first data in the preset byte stream format, and the first data is transmitted to the storage module 25. In some embodiments, the detection module 24 is also used to detect whether the power-on process of the server is abnormal.

[0036] The storage module 25 is electrically connected to the detection module 24. The storage module 25 can be a random access memory (RAM), which is used to store the time when the second signal changes and the encoding of the second signal in the power-on process of the server detected by the detection module 24. In some embodiments, the storage module 25 can be used to store the data in the preset byte stream format.

[0037] When the storage module 25 is full, the conversion module 26 extracts the first data in the storage module 25 and converts it. When the storage module 25 is not full, the detection module 24 detects whether the power-on process of the server is abnormal (such as power-on interruption). If the power-on process of the server is detected to be normal, the conversion module 26 extracts the first data in the storage module 25 and converts it; if the power-on process of the server is detected to be abnormal, the detection module 24 detects whether the power-on of the server is completed. If the power-on of the server is detected to be completed, the conversion module 26 extracts the first data in the storage module 25 and converts it; if the power-on of the server is detected to be not completed, the detection module 24 continues to detect the change of the power-on signal, and the storage module 25 also continues to store the time when the second signal changes and the code of the second signal detected by the detection module 24 during the power-on process of the server.

[0038] The conversion module 26 is electrically connected to the storage module 25, and the conversion module 26 is used to convert the first data in the storage module 25 into second data, which can be ASCII code, and the converted second data can be transmitted to the display module 40 through the transmission module 30. In some embodiments, the transmission module 30 can receive, parse and transmit ASCII code.

[0039] In some embodiments, the transmission module 30 can include a universal asynchronous receiver / transmitter (UART) and a USB interface, the UART can receive the second data and parse the second data into third data, which can be USB data, and then the UART can transmit the third data through the USB interface. In some embodiments, the transmission module 30 can be connected to the display module 40 through a USB data line to transmit the third data to the display module 40.

[0040] The display module 40 is electrically connected to the transmission module 30, and the display module 40 can be a USB data output terminal, which is used to display the power-on signal whose power-on timing does not conform to the standard during the power-on process of the server.

[0041] In some embodiments, a program can be written in the display module 40 to determine whether the change of the power-on signal in the power-on timing meets the standard requirement according to the third data. When it is determined that the change of the power-on signal meets the standard requirement, that is, each component of the server is normally powered on within the standard timing during the server power-on process, the debugging ends; when it is determined that the change of the power-on signal does not meet the standard requirement, that is, each component of the server is not normally powered on within the standard timing during the server power-on process, the display module 40 displays the power-on signal that does not meet the standard requirement.

[0042] Referring to Figure 2 FIG. 1 is a flowchart of a debugging process of a server start-up sequence debugging system according to an embodiment of the present application, the debugging process comprising:

[0043] S201: The voltage regulator 10 starts to power on the server.

[0044] When the server is powered on, the voltage regulator 10 transmits the power-on signal to the power-on module 21, and the power-on module 21 has a logic program written therein, and then the power-on module 21 receives the power-on signal transmitted by the voltage regulator 10 according to the written logic program, and distributes the power-on signal to each component of the server, and transmits the power-on signal to the sampling module 23, and then S202 is performed.

[0045] S202: The power-on signal in the power-on timing is encoded, and the initial voltage is collected.

[0046] When the power-on module 21 transmits the power-on signal to the sampling module 23, the power-on signal in the power-on timing is encoded in the sampling module 23, and the initial voltage in the power-on timing is collected, and then S203 is performed.

[0047] S203: After the server is effectively powered on, the sampling module starts to count time.

[0048] The sampling module 23 can include a sampling timer, and when the server starts to be effectively powered on, the sampling timer starts to count time, and during the subsequent power-on process, the sampling timer continuously keeps counting time, and then S204 is performed.

[0049] S204: The detection module 24 detects the change of the power-on signal in the power-on process, encodes the changed power-on signal, integrates the time into first data, and transmits the first data to the storage module 25.

[0050] The detection module 24 detects any changes in the power-on signal within the power-on sequence. When a second signal is detected among the power-on signals, and the second signal changes, the time when the second signal changes and the encoding of the second signal are extracted from the sampling module 23. The encoding of the second signal and the change time are then integrated into first data in a preset byte stream format, and the first data is transmitted to the storage module 25, thereby executing S205.

[0051] S205: Determine if the storage module is full.

[0052] When the storage module 25 is full, the first data in the storage module 25 is extracted and transmitted to the conversion module 26, i.e., S208 is executed; when the storage module 25 is not full, it is detected whether there is an abnormality in the power-on process of the server (e.g., power-on is aborted), i.e., S206 is executed.

[0053] S206: Determine if the power-on is abnormal.

[0054] If an abnormality is detected in the server's power-on process, the first data in the storage module 25 is extracted and transmitted to the conversion module 26, i.e., S208 is executed; if no abnormality is detected in the server's power-on process, the server's power-on is checked to see if it is complete, i.e., S207 is executed.

[0055] S207: Determine whether power-on is complete.

[0056] If the server power-on is detected as complete, the first data in the storage module 25 is extracted and transmitted to the conversion module 26, i.e., S208 is executed; if the server power-on is not detected as complete, S204 is executed.

[0057] S208: Extract the first data from the storage module 25 and convert it into the second data.

[0058] The conversion module 26 is electrically connected to the storage module 25. The conversion module 26 is used to convert the data in the storage module 25 into second data. Then, the second data can be parsed into third data by the transmission module 30 and transmitted to the display module 40, thereby executing S209.

[0059] S209: The second data is parsed into third data by the transmission module 30 and transmitted to the display module 40.

[0060] In some embodiments, the transmission module 30 can include a universal asynchronous receiver / transmitter (UART) and a USB interface. The UART can receive and parse the second data into third data, which can be USB data. The UART can then transmit the third data through the USB interface. In some embodiments, the transmission module 30 can be connected to the display module 40 through a USB data line, and transmit the third data to the display module 40, and then perform S210.

[0061] S210: Determine whether the power-on meets the standard requirements.

[0062] In some embodiments, the display module 40 can have a program written therein, which can be used to determine whether the power-on meets the standard requirements according to the change of the power-on signal displayed by the second data. When it is determined that the change of the power-on signal meets the standard requirements, that is, each component of the server is normally powered on within the standard time sequence during the server power-on process, the debugging is completed. When it is determined that the change of the power-on signal does not meet the standard requirements, that is, each component of the server is not normally powered on within the standard time sequence during the server power-on process, the display module 40 displays the power-on signal that does not meet the standard requirements, and then performs S211.

[0063] S211: The display module displays the power-on signal that does not meet the requirements.

[0064] When it is determined that the change of the power-on signal does not meet the standard requirements, that is, each component of the server is not normally powered on within the standard time sequence during the server power-on process, the display module 40 displays the power-on signal that does not meet the standard requirements.

[0065] The server power-on sequence debugging system provided in the present application does not need to weld test lines or connect external instruments when debugging the server power-on sequence. The debugging module in the CPLD is used to sample the power-on signal within the power-on time sequence. After the server is powered on, the change of the power-on signal within the power-on time sequence is detected, and the change of the power-on signal is detected at the same time. The data of the signal change is output to the terminal. It is determined whether the power-on meets the standard requirements, and the power-on signal that does not meet the standard requirements is displayed.

[0066] Those skilled in the art should recognize that the above embodiments are only used to illustrate the present application, and are not used as a limitation on the present application. Any appropriate changes and variations to the above embodiments within the scope of the spirit of the present application should fall within the scope of the present application.

Claims

1. A server boot sequence debugging system applied to a server, characterized in that, The debugging system comprises a voltage regulator, a CPLD, a transmission module and a display module; The voltage regulator is used to adjust and transmit the power-on signal required by each component when the server is started, to power on the server, and to transmit the power-on signal to the CPLD; The CPLD is used to receive the power-on signal transmitted by the voltage regulator, and comprises a debugging module, which comprises a sampling module, a detection module, a storage module and a conversion module; the detection module is electrically connected with the sampling module; the storage module is electrically connected with the detection module; and the conversion module is electrically connected with the storage module; The sampling module is used to collect the initial voltage when the server is powered on and the change of the signal in the timing sequence in the subsequent power-on process; when the power-on signal is transmitted into the sampling module, the power-on signal in the power-on timing sequence is encoded in the sampling module, and the initial voltage of the power-on signal at the power-on time is collected; The detection module is used to detect the change of the signal in the power-on timing sequence; when it is detected that the second signal in the power-on signal in the power-on timing sequence changes, the second signal is the power-on signal that changes in the power-on timing sequence, the time when the second signal changes and the code of the second signal are extracted from the sampling module, and then the code and the change time of the second signal are integrated into first data in a preset byte stream format, and the first data is transmitted to the storage module; The conversion module is used to convert the first data in the storage module into second data, and then transmit the second data to the transmission module; The transmission module is used to receive the second data, parse the second data into third data, and then transmit the third data to the display module; The display module is used to display the power-on signal in the power-on timing sequence that does not conform to the standard provision in the server power-on process according to the third data.

2. The debug system of claim 1, wherein, The CPLD further comprises a power-on module; the sampling module is electrically connected with the power-on module; The power-on module has a logic program written therein, and then the power-on module is used to receive the power-on signal transmitted by the voltage regulator according to the written logic program, and distribute the power-on signal to each component of the server, while transmitting the power-on signal to the sampling module.

3. The debug system of claim 1, wherein, The sampling module comprises a sampling timer; when the server starts to be effectively powered on, the sampling timer starts to count, and the sampling timer continuously keeps counting in the subsequent power-on process.

4. The debug system of claim 3, wherein, The detection module is further used to detect whether the server power-on process is abnormal.

5. The commissioning system of claim 4, wherein, The storage module is used to store the time when the second signal changes and the code of the second signal detected by the detection module in the server power-on process.

6. The debug system of claim 5, wherein, When the storage module is full, the conversion module extracts the first data in the storage module and converts it; When the storage module is not full, the detection module detects whether the server power-on process is abnormal; If it is detected that the server power-on process is not abnormal, the conversion module extracts the first data in the storage module and converts it; If the power-on process of the server is detected to be abnormal, whether the power-on of the server is completed is detected; If the power-on of the server is detected to be completed, the first data in the storage module is extracted and converted by the conversion module; If the power-on of the server is detected to be not completed, the change of the signal is continuously detected by the detection module, and the time when the signal changes and the code of the changed signal in the power-on process of the server are continuously stored by the storage module.

7. The commissioning system of claim 6, wherein, The transmission module includes a universal asynchronous receiver-transmitter (UART) and a USB interface, the second data is received by the UART, the second data is parsed into the third data, and then the third data is transmitted out by the USB interface.

8. The commissioning system of claim 7, wherein, The display module is electrically connected with the transmission module, and the display module is used to display the power-on signal which does not conform to the standard provision in the power-on process of the server. The program is written in the display module, which is used to acquire the change of the power-on signal in the power-on timing according to the third data, and judge whether the power-on conforms to the standard provision.

9. The commissioning system of claim 8, wherein, When the change of the power-on signal conforms to the standard provision, that is, each component of the server is normally powered on in the standard provision timing in the power-on process of the server, the debugging is completed; When the change of the power-on signal does not conform to the standard provision, that is, each component of the server is not normally powered on in the standard provision timing in the power-on process of the server, the display module displays the power-on signal which does not conform to the standard provision.

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