Wafer sub-array interconnection structure and wafer sub-array for composite integration of multi-material systems

Abstract

The present invention discloses a multi-material system composite integrated wafer sub-array interconnection structure and wafer sub-array, belonging to the field of antenna and microwave technology. The present invention comprises a structural carrier, a low-loss main power divider, an HTCC substrate and an interconnection button; the structural carrier comprises a structural carrier cavity, a chip built-in cavity and a welding surface; the low-loss main power divider is embedded in the structural carrier cavity; one side of the HTCC substrate is welded with the structural carrier and the low-loss main power divider, and the functional chips and components thereon are buried in the chip built-in cavity; the low-frequency, power supply and radio frequency signals in the board are interconnected through a vertical transition structure, interconnected with the functional chip signals through gold wires, and interconnected with the signals in the T / R components through a BGA interconnection layer; the interconnection button is embedded in the structural carrier and is crimped and interconnected with the HTCC substrate. The present invention has small size, light weight, high integration, high thermal conductivity, high reliability, low loss and good consistency, and is suitable for highly integrated and high-density phased array antennas.

Description

Technical Field

[0001] The present invention belongs to the field of wireless and microwave technology, and in particular relates to a wafer sub-array interconnection structure and a wafer sub-array compositely integrated with a multi-material system. Background Art

[0002] With the development of phased array antennas, their integration is getting higher and higher. In recent years, microsystem technology and wafer integration technology have been greatly developed and applied in phased array antennas. The unit spacing and profile height of antenna arrays integrated using these technologies are constantly shrinking. The available area and thickness of the integrated interconnect layer used for signal transmission and integrated carriers are constantly compressed, and its design is greatly restricted and challenged. In addition, the interconnect network within the wafer-integrated millimeter-wave subarray must also meet the requirements of lightweight, low loss, large bandwidth, high-density transmission of high and low frequency signals, and matching the thermal expansion coefficient of the substrate with the wafer RF front end (silicon-based or other wafer materials).

[0003] Traditional phased array radar systems mostly use high and low frequency cables, electrical connectors and other methods to achieve the interconnection of RF, power and control signals between antennas and T / R components. However, with the expansion of the array scale and the increase in the corresponding active channel density, this traditional interconnection method has been unable to meet the needs of high-density interconnection of the array. At the same time, the weight burden brought by cables and connectors is growing exponentially, which is contrary to the design concept of lightweight, high integration, low profile and high reliability of high-density channel active phased array antennas in the field of small target detection. Due to the high frequency band, small size, many components and high integration density of millimeter wave antenna arrays, it involves the system transmission of four major links: RF, control, power and heat. Therefore, a comprehensive network with low loss, high broadband performance, high signal density and high thermal conductivity is an issue that needs to be considered during the design and implementation process. Summary of the invention

[0004] The purpose of the present invention is to provide a wafer sub-array interconnection structure and a wafer sub-array with a multi-material system composite and multiple functions integrated. The comprehensive interconnection design scheme has the characteristics of small size, light weight, high integration, high thermal conductivity, high reliability, low loss, good consistency, etc., and is suitable for use in highly integrated and high-density phased array antennas.

[0005] Specifically, on one hand, the present invention provides a multi-material system composite integrated wafer sub-array interconnection structure, comprising a structural carrier, a low-loss main power divider, an HTCC substrate and an interconnection button;

[0006] The structural carrier includes a structural mounting portion, a structural carrier cavity, a chip built-in cavity, a welding surface and a cover plate; the structural mounting portion is used to fix the structural carrier;

[0007] The low-loss main power divider is provided with a stripline-to-microstrip line structure and a radio frequency main port connector; the stripline-to-microstrip line structure serves as a radio frequency port; the low-loss main power divider is embedded in the structural carrier cavity;

[0008] One side of the HTCC substrate is interconnected with the structural carrier through the welding surface, and is welded to the low-loss main power divider; the surface of the HTCC substrate is provided with functional chips, components, interconnection button press pads, gold wire bonding pads and BGA interconnection layers, the functional chips and components are buried in the chip built-in cavity of the structural carrier, and the chip built-in cavity is sealed by a cover plate; the HTCC substrate is provided with a radio frequency routing layer, a power distribution layer and a low-frequency control layer; the circuit of the matching structure is arranged in the radio frequency routing layer, and is interconnected with the low-loss main power divider through gold wire bonding; the low-frequency signal, power signal and radio frequency signal in the HTCC substrate are interconnected through a vertical transition structure, interconnected with the signal in the functional chip through gold wire bonding, and interconnected with the signal in the T / R component placed on the HTCC substrate through a BGA interconnection layer;

[0009] The interconnecting wool button is embedded in the structural carrier board, and is interconnected with the HTCC substrate by pressing and connecting the interconnecting wool button pressing plate, so as to transmit the external control signal and power supply signal into the HTCC substrate.

[0010] Furthermore, the RF main port connector and the stripline-to-microstrip line structure are connected to the outside from the structure carrier cavity by gold wire bonding.

[0011] Furthermore, the structural mounting portion is columnar and is provided with screw mounting holes.

[0012] Furthermore, the low-loss main circuit board power divider 2 is flush with the welding surface when embedded in the structure carrier cavity.

[0013] Furthermore, when the multi-material system composite integrated wafer sub-array transmits a signal, the RF signal enters the low-loss main power divider from the RF main port connector, enters the RF routing layer of the HTCC substrate through the matching structure, enters the functional chip, and is transmitted to the BGA interconnection layer to provide RF excitation signals for the T / R components; the control signal and the power signal are connected to the HTCC substrate through the interconnection buttons, enter the low-frequency control layer and the power distribution layer through the vertical transition structure, and reach the functional chip and the T / R components.

[0014] Furthermore, the HTCC substrate is a plurality of independent HTCC substrates.

[0015] Furthermore, the HTCC substrate and the structural carrier are made of high thermal conductivity materials.

[0016] Furthermore, the structural carrier plate is made of a material having a thermal expansion coefficient close to that of the HTCC substrate.

[0017] Furthermore, the structural mounting portion is made of heat dissipation material.

[0018] On the other hand, the present invention also provides a multi-material system composite integrated wafer sub-array, including the multi-material system composite integrated wafer sub-array interconnection structure.

[0019] The multi-material system composite integrated wafer sub-array interconnect structure and wafer sub-array of the present invention have the following beneficial effects:

[0020] Small size and light weight: integrated design concept, using the form of bare chip mounted on the surface of the HTCC substrate, integrating various functional chip modules, and realizing the signal interconnection of RF, low frequency and power supply in the HTCC substrate through gold wire bonding to achieve integrated design; the HTCC substrate and the structural carrier are welded and interconnected, and the bare chip is buried in the cavity of the structural carrier, which not only saves the structural size of the RF active functional module, but also meets the airtight requirements of the chip, effectively realizing the miniaturization and lightweight of the integrated network.

[0021] High thermal conductivity: High thermal conductivity HTCC substrate and structural carrier are selected to transfer the heat generated by the T / R components to the HTCC carrier through the BGA layer for temperature equalization, and then transfer the heat to the structural carrier through the welding surface; and through the structural mounting column made of heat dissipation material, the heat is transferred to the cold plate, realizing the effective transmission of heat from the T / R components.

[0022] High reliability: Due to the difference in expansion coefficient between the HTCC substrate and the structural carrier, the HTCC substrate is split into multiple independent HTCC substrates and welded on the structural carrier. Multiple independent HTCC substrates effectively release the welding stress with the structural carrier, reduce the deformation degree of the wafer sub-array during temperature changes, and ensure the reliability of the wafer sub-array and its external interconnection; at the same time, the highly integrated feeding technology greatly reduces or eliminates the interconnection devices between the components, improving the reliability of the system.

[0023] Low loss: Due to the large RF loss of the HTCC substrate, in order to reduce the RF link loss, a low-loss main power divider is used in combination with the HTCC substrate. The RF main transmission adopts a low-loss transmission structure (for example, a low-loss main power divider made of microwave multilayer boards, micro-coaxial cables, etc.). Compared with the HTCC substrate, the loss ratio of the low-loss transmission structure is less than 1 / 2. The stripline to microstrip line structure of the low-loss main power divider is used as the RF branch port. The interconnection between the low-loss main power divider and the HTCC substrate is achieved at the RF branch port through gold wire bonding, welding, etc., which not only realizes the interconnection design between the functional chip and the HTCC substrate, but also reduces the loss of the entire RF link.

[0024] Low thermal expansion rate: Compared with the integrated interconnection layer realized by traditional microwave boards, the present invention has a lower expansion coefficient and can support the integrated installation of packaged antennas of larger size and lower expansion coefficient materials; it can support the integration of silicon-based wafer integrated front ends larger than 20 mm into the multi-material system composite integrated wafer sub-array interconnection structure of the present invention.

[0025] The multi-material system composite integrated wafer sub-array interconnection structure of the present invention has good electrical performance consistency and is suitable for use in highly integrated and high-density phased array antennas: it adopts intra-board RF interconnection and gold wire bonding, has high processing and assembly precision, and is simple in form, eliminating the inconsistency caused by blind plug interconnection and the connector itself, so that the system has good electrical performance consistency. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a three-dimensional stereogram of an embodiment of the present invention.

[0027] Figure 2 1 is a three-dimensional diagram of a structural carrier plate (upper surface) according to an embodiment of the present invention.

[0028] Figure 3 3D is a perspective view of a structural carrier plate (lower surface) according to an embodiment of the present invention.

[0029] Figure 4 Schematic diagram of a low-loss main path power divider according to an embodiment of the present invention.

[0030] Figure 5 Schematic diagram of the HTCC substrate (upper surface) according to an embodiment of the present invention.

[0031] Figure 6 Schematic diagram of the HTCC substrate (lower surface) according to an embodiment of the present invention.

[0032] Figure 7 Schematic diagram of internal stacking and signal interconnection of the HTCC substrate according to an embodiment of the present invention.

[0033] Figure 8 It is a schematic diagram of the radio frequency interconnection structure between different materials in an embodiment of the present invention.

[0034] Fig. 9 Schematic diagram of heat conduction according to an embodiment of the present invention.

[0035] Markings in the figure: 1-structural carrier, 2-low-loss main power divider, 3-HTCC substrate, 4-interconnection button, 5-structural mounting part, 6-threaded mounting hole, 7-chip built-in cavity, 8-welding surface, 9-structural carrier cavity, 10-RF main port connector, 11-stripline to microstrip line structure, 12-functional chip, 13-components, 14-interconnection button press pad, 15-gold wire bonding pad, 16-BGA interconnection layer, 17-T / R component, 18-BGA ball, 19-RF routing layer, 20-power distribution layer, 21-low-frequency control layer, 22-vertical transition structure, 23-gold wire, 25-matching structure, 28-cover plate. DETAILED DESCRIPTION

[0036] The present invention is further described in detail below in conjunction with embodiments and with reference to the accompanying drawings.

[0037] One embodiment of the present invention is a multi-material system composite integrated wafer sub-array interconnection structure, such as Figure 1 As shown, it includes a structural carrier board 1, a low-loss main power divider 2, a HTCC substrate 3 and interconnection buttons 4.

[0038] like Figure 2 and Figure 3 As shown, the structural carrier 1 includes a structural mounting portion 5, a structural carrier cavity 9, a chip built-in cavity 7, a cover plate 28, and a large-area welding surface 8 distributed on the bottom surface. Preferably, in another embodiment, the structural mounting portion 5 is columnar and has a threaded mounting hole 6 disposed thereon.

[0039] The low-loss main power divider 2 is embedded in the structural carrier cavity 9. Preferably, the upper surface of the low-loss main power divider 2 placed in the structural carrier cavity 9 is flush with the welding surface 8 of the structural carrier 1, so that the low-loss main power divider 2 and the structural carrier 1 can be welded to the HTCC substrate 3 together. One side of the HTCC substrate 3 is welded to the structural carrier 1 through the welding surface 8, and the side of the HTCC substrate welded to the structural carrier 1 is also welded to the low-loss main power divider 2 embedded in the structural carrier cavity 9 of the structural carrier 1, ensuring the consistency of the substrate ground planes of the two materials of the low-loss main power divider 2 and the HTCC substrate. Figure 4 As shown, the low-loss main power divider 2 is provided with a stripline-to-microstrip line structure 11 and an RF main port connector 10 for external connection. The stripline-to-microstrip line structure serves as an RF splitter. The RF main port connector 10 and the stripline-to-microstrip line structure 11 can be connected to the outside from the structure carrier cavity 9, for example, by gold wire bonding or the like.

[0040] The surface of the HTCC substrate 3 is provided with various functional chips 12, components 13, interconnection button press pads 14, gold wire bonding pads 15 and BGA interconnection layers 16. The functional chips 12 and components 13 are embedded in the chip built-in cavity 7 of the structural carrier 1, and the chip built-in cavity 7 is sealed by a cover plate 28. For example, Figure 5 and Figure 6 As shown, the HTCC substrate 3 includes various functional chips 12 distributed on the upper surface, various components 13 (such as capacitors, resistors, etc.), interconnection button press pads 14, gold wire bonding pads 15, and a BGA interconnection layer 16 distributed on the lower surface.

[0041] like Figure 7 As shown, the HTCC substrate 3 is provided with a radio frequency routing layer 19, a power distribution layer 20 and a low frequency control layer 21. The line of the matching structure 25 interconnected with the low loss main power divider 2 via the radio frequency port (i.e., the stripline to microstrip line structure 11) is arranged in the radio frequency routing layer, and is interconnected with the low loss main power divider 2 through gold wire bonding. For example, in another embodiment, the HTCC substrate 3 includes 24 layers of circuits, wherein layers 1 to 8 are radio frequency routing layers 19, layers 9 to 14 are power distribution layers 20, and layers 15 to 24 are low frequency control layers 21.

[0042] In the wafer sub-array interconnection structure of the multi-material system composite integration of the present invention, the RF signal is transmitted to the multiple HTCC substrates 3 through the RF splitter (i.e., the stripline to microstrip line structure 11) of the low-loss main power divider 2 through the matching structure 25 through the interconnection structure between different materials. The low-frequency signal, power signal, and RF signal in the HTCC substrate 3 are interconnected through the vertical transition structure 22, and the signal interconnection with each functional chip 12 is achieved through the gold wire 23, and the signal interconnection is achieved through the BGA interconnection layer 16 ( Figure 7 The BGA balls 18 in the HTCC substrate 3 are not shown to realize signal interconnection with the T / R components 17 placed on the HTCC substrate 3.

[0043] The interconnection buttons 4 are embedded in the structural carrier 1 and are press-connected and interconnected with the HTCC substrate 3 through the interconnection buttons pressing pads 14 , so as to transmit the control signals and power signals outside the wafer sub-array into the HTCC substrate 3 .

[0044] Since the expansion coefficient of the HTCC substrate is different from that of the structural carrier, preferably, in another embodiment, the HTCC substrate is split into several independent HTCC substrates and welded on the structural carrier 1. The use of multiple independent HTCC substrates effectively releases the welding stress generated by the different thermal expansion coefficients of the HTCC substrate 3 and the structural carrier 1, reduces the deformation degree of the wafer sub-array during the temperature change process, and ensures the reliability of the wafer sub-array and its external interconnection; at the same time, the highly integrated feeding technology greatly reduces or eliminates the interconnection devices between the components, and improves the reliability of the system.

[0045] The assembly method of the multi-material system composite integrated wafer sub-array interconnect structure of the present invention is as follows:

[0046] like Figure 1 , 7 As shown in , 8, firstly weld the low-loss main power divider 2 in the structure carrier cavity 9, and ensure that the low-loss main power divider 2 is flush with the large-area welding surface 8, and then weld several HTCC substrates 3 on the structure carrier 1 through tooling. The welding here mainly ensures the grounding position welding penetration rate of the RF interconnection structure between different materials such as the HTCC substrate 3, the structure carrier 1, and the low-loss main power divider 2. Finally, the functional chip 12 is set (for example, mounted) on the HTCC substrate 3 in the chip built-in cavity 7 of the structure carrier 1, and gold wire bonding is performed, and finally sealed by the cover plate 28.

[0047] Preferably, in another embodiment, Figure 8 As shown, effective matching of RF signals between different materials is achieved through the stripline-to-microstrip structure 11, the gold wire 23, the matching structure 25 of the HTCC substrate, and the vertical transition structure 22 of the HTCC substrate of the low-loss main power divider 2. After the RF signal enters the HTCC substrate 3, it is transmitted in the RF routing layer 19, enters various functional chips through the vertical transition structure 22 and the gold wire 23, and is finally transmitted to the T / R component 17. The intra-board RF interconnection and gold wire bonding method are adopted, with high processing and assembly precision and simple form, eliminating the inconsistency caused by blind plug interconnection and the connector itself, so that the system electrical performance consistency is good.

[0048] The multi-material system composite integrated wafer sub-array interconnection structure of the present invention adopts the form of bare chips mounted on the surface of the HTCC substrate, integrates various functional chips, realizes the signal interconnection of radio frequency, low frequency and power supply in the HTCC substrate through gold wire bonding, and realizes an integrated design; the HTCC substrate and the structural carrier are welded and interconnected, and the bare chips are buried in the cavity of the structural carrier, which not only saves the structural size of the radio frequency active functional module, but also meets the airtightness requirements of the chip, and effectively realizes the miniaturization and lightweight of the integrated network.

[0049] The signal flow in the wafer sub-array interconnection structure of the multi-material system composite integration of the present invention is as follows:

[0050] When the multi-material system composite integrated wafer sub-array transmits a signal, the RF signal enters the low-loss main power divider 2 through the RF main port connector 10, and is transmitted to multiple HTCC substrates 3 through gold wires and other methods, and enters the RF routing layer 19 of the HTCC substrate 3 through the matching structure 25, and after entering the various functional chips 12, it is transmitted to the BGA interconnection layer 16 to provide RF excitation signals for the T / R components 17. The control signal and the power signal are connected to the HTCC substrate 3 through the interconnection buttons 4, and enter the low-frequency control layer 21 and the power distribution layer 20 through the vertical transition structure 22, providing power and control signals for various functional chips 12 and T / R components 17.

[0051] Preferably, in another embodiment, the HTCC substrate and the structural carrier are made of high thermal conductivity materials. The structural carrier 1 is made of materials with a thermal expansion coefficient close to that of HTCC, and the optional materials include aluminum silicon, molybdenum copper, etc. Preferably, in another embodiment, the structural mounting portion 5 is made of heat dissipation material. Fig. 9 As shown, the heat generated by the T / R component 17 is transferred to the HTCC substrate 3 through the BGA ball 18 and the BGA interconnection layer 16, and after being heated by the HTCC substrate 3, the heat is transferred to the structural carrier 1 through the welding surface, and then heated by the structural carrier 1; and the structural mounting column also serves as a structural heat conduction column, and the heat is transferred to the external heat dissipation cold plate through the structural mounting column, thereby realizing the effective transmission of the heat of the T / R component.

[0052] Although the present invention has been disclosed as above with preferred embodiments, the embodiments are not intended to limit the present invention. Any equivalent changes or modifications made without departing from the spirit and scope of the present invention also belong to the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the content defined by the claims of this application.

Claims

1. A wafer sub-array interconnect structure for composite integration of multiple material systems, characterized in that: It includes structural carrier board, low-loss main power divider, HTCC substrate and interconnection buttons; The structural carrier includes a structural mounting portion, a structural carrier cavity, a chip built-in cavity, a welding surface and a cover plate; the structural mounting portion is used to fix the structural carrier; The low-loss main power divider is provided with a stripline-to-microstrip line structure and a radio frequency main port connector; the stripline-to-microstrip line structure serves as a radio frequency port; the low-loss main power divider is embedded in the structural carrier cavity; One side of the HTCC substrate is interconnected with the structural carrier through the welding surface, and is welded to the low-loss main power divider; the surface of the HTCC substrate is provided with functional chips, components, interconnection button press pads, gold wire bonding pads and BGA interconnection layers, the functional chips and components are buried in the chip built-in cavity of the structural carrier, and the chip built-in cavity is sealed by a cover plate; the HTCC substrate is provided with a radio frequency routing layer, a power distribution layer and a low-frequency control layer; the circuit of the matching structure is arranged in the radio frequency routing layer, and is interconnected with the low-loss main power divider through gold wire bonding; the low-frequency signal, power signal and radio frequency signal in the HTCC substrate are interconnected through a vertical transition structure, interconnected with the signal in the functional chip through gold wire bonding, and interconnected with the signal in the T / R component placed on the HTCC substrate through a BGA interconnection layer; The interconnecting fur button is embedded in the structural carrier board, and is interconnected with the HTCC substrate by crimping the interconnecting fur button crimping plate, so as to transmit the external control signal and power supply signal into the HTCC substrate.

2. The multi-material system composite integrated wafer sub-array interconnection structure according to claim 1, characterized in that: The RF main port connector and the stripline-to-microstrip line structure are connected to the outside from the structure carrier cavity by gold wire bonding.

3. The multi-material system composite integrated wafer sub-array interconnection structure according to claim 1, characterized in that: The structural mounting portion is columnar and is provided with screw mounting holes.

4. The multi-material system composite integrated wafer sub-array interconnection structure according to claim 1, characterized in that: The low-loss main path power divider is flush with the welding surface when embedded in the cavity of the structural carrier board.

5. The multi-material system composite integrated wafer sub-array interconnection structure according to claim 1, characterized in that: When the multi-material system composite integrated wafer sub-array transmits a signal, the RF signal enters the low-loss main power divider from the RF main port connector, enters the RF routing layer of the HTCC substrate through the matching structure, enters the functional chip, and is transmitted to the BGA interconnection layer to provide RF excitation signals for the T / R components; the control signal and the power signal are connected to the HTCC substrate through the interconnection buttons, enter the low-frequency control layer and the power distribution layer through the vertical transition structure, and reach the functional chip and the T / R components.

6. The multi-material system composite integrated wafer sub-array interconnection structure according to claim 1, characterized in that: The HTCC substrates are several independent HTCC substrates.

7. The multi-material system composite integrated wafer sub-array interconnection structure according to claim 1, characterized in that: The HTCC substrate and the structural carrier are made of high thermal conductivity materials.

8. The multi-material system composite integrated wafer sub-array interconnection structure according to claim 7, characterized in that: The structural carrier plate is made of a material having a thermal expansion coefficient close to that of the HTCC substrate.

9. The multi-material system composite integrated wafer sub-array interconnection structure according to claim 1, characterized in that: The structural mounting portion is made of heat dissipation material.

10. A wafer sub-array for composite integration of multiple material systems, characterized in that: It comprises a wafer sub-array interconnection structure of composite integration of multiple material systems according to any one of claims 1-9.

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