Method for manufacturing a cavity type film bulk acoustic resonator
By combining etching with endpoint detection and using multiple chemical mechanical polishing techniques, the problem of difficult-to-control etching process was solved, and high-quality fabrication of thin-film bulk acoustic resonators was achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SILEX MICROSYSTEMS (BEIJING) CO LTD
- Filing Date
- 2022-12-12
- Publication Date
- 2026-05-19
AI Technical Summary
In the existing technology, the etching process is difficult to control during the fabrication of thin-film bulk acoustic resonators, resulting in uneven sacrificial layer thickness and affecting product quality.
The first sacrificial layer on the substrate, whose orthogonal projection is located outside the groove, is removed by a combination of etching and endpoint detection. The remaining first sacrificial layer in the groove is made to be on the same plane as the substrate surface by multiple chemical mechanical polishing processes.
This ensures complete removal and stability of the sacrificial layer, reduces on-chip non-uniformity, and improves the product quality of thin-film bulk acoustic resonators.
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Figure CN116260412B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of microelectronic device technology, and in particular to a method for manufacturing a cavity-type thin-film bulk acoustic resonator. Background Technology
[0002] A film bulk acoustic resonator (FBAR) is a type of piezoelectric thin-film resonator. The basic structure of a FBAR is a stacked structure consisting of an upper electrode, a piezoelectric layer, and a lower electrode on a substrate; to suppress the dissipation of vibrational energy, a cavity is provided below the stacked structure.
[0003] In related technologies, when fabricating thin-film bulk acoustic resonators, a sacrificial layer is typically formed on a substrate first, followed by the fabrication of a stacked structure on the sacrificial layer. After fabricating the stacked structure, the sacrificial layer is etched to create a cavity between the stacked structure and the substrate. Specifically, during the fabrication of the sacrificial layer, it is usually etched to remove a portion of the sacrificial layer, and then the remaining portion is chemically mechanically polished (CMP) to planarize its surface.
[0004] However, etching requires the sacrificial layer to remain at a specified thickness, which is extremely difficult to control in the etching process. To prevent over-etching, the remaining sacrificial layer is often quite thick. Processing the remaining thick sacrificial layer using CMP technology can easily lead to poor on-wafer non-uniformity (WTWNU), making the CMP process unstable and affecting the product quality of the fabricated thin-film bulk acoustic resonator. Summary of the Invention
[0005] In view of the above problems, the present invention is proposed to provide a method for manufacturing a cavity-type thin-film bulk acoustic resonator that overcomes or at least partially solves the above problems.
[0006] This invention provides a method for manufacturing a cavity-type thin-film bulk acoustic resonator, the method comprising:
[0007] A groove is formed on the substrate surface;
[0008] A first sacrificial layer is deposited on the substrate surface, the first sacrificial layer covering the groove;
[0009] The first sacrificial layer, whose orthogonal projection on the substrate is located outside the groove, is removed by using a combination of etching and endpoint detection.
[0010] A second sacrificial layer is deposited on the substrate surface, the second sacrificial layer covering the remainder of the first sacrificial layer;
[0011] The second sacrificial layer and the first sacrificial layer located outside the groove are removed by multiple chemical mechanical polishing processes, so that the remaining first sacrificial layer inside the groove is located on the same plane as the substrate surface;
[0012] A stacked structure covering the groove is deposited on the substrate surface, the stacked structure comprising a bottom electrode, a piezoelectric layer and a top electrode deposited sequentially;
[0013] Remove the remaining first sacrificial layer within the groove to form a cavity beneath the stacked structure.
[0014] Optionally, depositing the first sacrificial layer on the substrate surface includes:
[0015] A layer of phosphosilicate glass or tetraethyl orthosilicate is deposited on the surface of the substrate as the first sacrificial layer.
[0016] Optionally, the thickness of the first sacrificial layer is 1.2 to 2 times the depth of the groove.
[0017] Optionally, the material of the second sacrificial layer is the same as the material of the first sacrificial layer.
[0018] Optionally, the thickness of the second sacrificial layer is greater than the depth of the groove.
[0019] Optionally, the step of removing the second sacrificial layer and the first sacrificial layer located outside the groove by multiple chemical mechanical polishing processes, such that the remaining first sacrificial layer within the groove is located on the same plane as the substrate surface, includes:
[0020] The second sacrificial layer and the first sacrificial layer outside the groove are polished for the first time using a chemical mechanical polishing method until the thickness of the second sacrificial layer and the first sacrificial layer outside the groove from the substrate surface is a set thickness.
[0021] The remaining second sacrificial layer and the first sacrificial layer outside the groove are subjected to a second polishing process using a chemical mechanical polishing method until all the second sacrificial layer and the first sacrificial layer outside the groove are removed.
[0022] A chemical mechanical polishing method is used to perform a third polishing process on the surface of the substrate and the surface of the remaining first sacrificial layer in the groove until the remaining first sacrificial layer in the groove and the substrate surface are located on the same plane, and the roughness of the remaining first sacrificial layer in the groove and the substrate surface meet the set requirements.
[0023] Optionally, the set thickness is 1 to 2 μm.
[0024] Optionally, during the second polishing process, an endpoint detection method is used to monitor whether the remaining thickness of the second sacrificial layer and the first sacrificial layer has been completely removed.
[0025] Optionally, forming the groove on the substrate surface includes:
[0026] A groove with a depth of 3 to 30 μm is formed on the surface of the substrate using a dry or wet etching method.
[0027] Optionally, before forming the groove on the substrate surface, the manufacturing method further includes:
[0028] The substrate is cleaned and dried for later use.
[0029] The technical solutions provided in the embodiments of the present invention have at least the following technical effects or advantages:
[0030] This invention provides a method for manufacturing a cavity-type thin-film bulk acoustic wave resonator. By employing a combination of etching and endpoint detection, a first sacrificial layer whose orthogonal projection on the substrate is located outside the groove is removed. This method retains only the first sacrificial layer inside and above the groove, ensuring complete removal of the first sacrificial layer from the substrate surface. Next, a second sacrificial layer is deposited on the substrate surface to cover the remaining first sacrificial layer. The second sacrificial layer and the remaining first sacrificial layer form a unified whole, ensuring the stability of the remaining first sacrificial layer. Then, multiple chemical mechanical polishing (CMP) processes are used to remove the second and first sacrificial layers above the substrate surface, ensuring that the remaining first sacrificial layer within the groove is on the same plane as the substrate surface, meeting the planarization requirements of subsequent multilayer growth. Multiple CMP processes reduce the thickness and duration of each polishing step, avoiding the imbalance between chemical reaction and mechanical removal caused by prolonged polishing on a single polishing station, which can lead to poor on-chip inhomogeneity and thus ensure the quality of the fabricated thin-film bulk acoustic wave resonator.
[0031] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, and in order to make the above and other objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention are described below. Attached Figure Description
[0032] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings.
[0033] In the attached diagram:
[0034] Figure 1 This is a flowchart of a manufacturing method for a cavity-type thin-film bulk acoustic resonator provided by related technologies;
[0035] Figure 2 This is a flowchart illustrating a method for manufacturing a cavity-type thin-film bulk acoustic resonator according to an embodiment of the present invention.
[0036] Figure 3 This is a flowchart of another method for manufacturing a cavity-type thin-film bulk acoustic resonator provided in an embodiment of the present invention;
[0037] Figure 4 This is a schematic diagram of the structure after executing step S302;
[0038] Figure 5 This is a schematic diagram of the structure after step S303 is executed;
[0039] Figure 6 This is a schematic diagram of the structure after executing step S304;
[0040] Figure 7 This is a schematic diagram of the structure after executing step S305;
[0041] Figure 8 This is a schematic diagram of the structure after executing step S306;
[0042] Figure 9 This is a schematic diagram of the structure after executing step S307;
[0043] Figure 10 This is a schematic diagram of the structure after step S308 is executed. Detailed Implementation
[0044] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings.
[0045] The accompanying drawings illustrate various structural schematics according to embodiments of the present disclosure. These drawings are not to scale, and some details have been enlarged for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.
[0046] In the context of this disclosure, when a layer / component is referred to as being "above" another layer / component, that layer / component may be directly above the other layer / component, or there may be an intermediate layer / component between them. Additionally, if a layer / component is "above" another layer / component in one orientation, then when the orientation is reversed, that layer / component may be "below" the other layer / component. In the context of this disclosure, similar or identical components may be denoted by the same or similar reference numerals.
[0047] To better understand the above technical solutions, the following will describe the above technical solutions in detail with reference to specific implementation methods. It should be understood that the embodiments of this disclosure and the specific features in the embodiments are detailed descriptions of the technical solutions of this application, rather than limitations on the technical solutions of this application. In the absence of conflict, the embodiments of this application and the technical features in the embodiments can be combined with each other.
[0048] To better understand this application, a brief introduction to the relevant technologies involved in the embodiments of the present invention will be provided first:
[0049] Figure 1 This is a flowchart of a manufacturing method for a cavity-type thin-film bulk acoustic resonator provided by related technologies, such as... Figure 1 As shown, the manufacturing method includes:
[0050] Step S101: Form a groove on the substrate surface.
[0051] Step S102: Deposit a sacrificial layer covering the groove on the substrate surface.
[0052] Step S103: Remove part of the sacrificial layer outside the groove using a dry or wet etching method, so that the surface of the remaining sacrificial layer is planarized.
[0053] Step S104: Remove the remaining sacrificial layer outside the groove by chemical mechanical polishing, so that the remaining sacrificial layer inside the groove is on the same plane as the substrate surface.
[0054] Step S105: Deposit a stacked structure covering the groove on the substrate surface. The stacked structure includes a bottom electrode, a piezoelectric layer and a top electrode deposited sequentially.
[0055] Step S106: Remove the remaining first sacrificial layer in the groove to form a cavity below the stacked structure.
[0056] In the above methods, etching requires the sacrificial layer to remain at a specified thickness, which is extremely difficult to control in the etching process. To prevent over-etching, the remaining sacrificial layer is often quite thick. Processing the remaining thick sacrificial layer using CMP technology can easily lead to poor on-wafer non-uniformity (WTWNU), making the CMP process unstable and affecting the product quality of the fabricated thin-film bulk acoustic resonator.
[0057] Therefore, in order to solve the above-mentioned technical problems, the present invention provides a method for manufacturing a cavity-type thin-film bulk acoustic resonator.
[0058] Figure 2 This is a flowchart illustrating a method for manufacturing a cavity-type thin-film bulk acoustic resonator according to an embodiment of the present invention. Figure 2 As shown, the manufacturing method includes:
[0059] Step S201: Form a groove on the substrate surface.
[0060] Step S202: Deposit a first sacrificial layer on the substrate surface, the first sacrificial layer covering the groove.
[0061] Step S203: Using a combination of etching and endpoint detection, the first sacrificial layer whose orthogonal projection on the substrate is located outside the groove is removed.
[0062] Step S204: Deposit a second sacrificial layer on the substrate surface, the second sacrificial layer covering the remaining first sacrificial layer.
[0063] Step S205: Remove the second sacrificial layer and the first sacrificial layer located outside the groove by multiple chemical mechanical polishing, so that the remaining first sacrificial layer inside the groove is on the same plane as the substrate surface.
[0064] Step S206: Deposit a stacked structure covering the groove on the substrate surface. The stacked structure includes a bottom electrode, a piezoelectric layer and a top electrode deposited sequentially.
[0065] Step S207: Remove the remaining first sacrificial layer in the groove to form a cavity below the stacked structure.
[0066] This invention provides a method for manufacturing a cavity-type thin-film bulk acoustic wave resonator. By employing a combination of etching and endpoint detection, a first sacrificial layer whose orthogonal projection on the substrate is located outside the groove is removed. This method retains only the first sacrificial layer inside and above the groove, ensuring complete removal of the first sacrificial layer from the substrate surface. Next, a second sacrificial layer is deposited on the substrate surface to cover the remaining first sacrificial layer. The second sacrificial layer and the remaining first sacrificial layer form a unified whole, ensuring the stability of the remaining first sacrificial layer. Then, multiple chemical mechanical polishing (CMP) processes are used to remove the second and first sacrificial layers above the substrate surface, ensuring that the remaining first sacrificial layer within the groove is on the same plane as the substrate surface, meeting the planarization requirements of subsequent multilayer growth. Multiple CMP processes reduce the thickness and duration of each polishing step, avoiding the imbalance between chemical reaction and mechanical removal caused by prolonged polishing on a single polishing station, which can lead to poor on-chip inhomogeneity and thus ensure the quality of the fabricated thin-film bulk acoustic wave resonator.
[0067] Figure 3 This is a flowchart illustrating another method for manufacturing a cavity-type thin-film bulk acoustic resonator according to an embodiment of the present invention, serving as a further explanation of the above embodiments. Figure 3 As shown, the manufacturing method includes:
[0068] Step S301: Clean the substrate and dry it for later use.
[0069] Optionally, the substrate can be a substrate material such as silicon, sapphire, gallium arsenide, gallium nitride, silicon carbide, quartz, or glass. In this embodiment of the invention, the substrate can be a silicon wafer.
[0070] For example, the standard RCA cleaning process can be used to clean silicon wafers. Silicon wafer surface contamination refers to particles, metals, organic matter, moisture molecules, and native oxide films deposited on the silicon wafer surface. Because organic matter can partially cover the silicon wafer surface, it makes the oxide layer and related contaminants difficult to remove. The standard RCA cleaning process first removes organic contaminants from the silicon wafer surface, as organic matter can partially cover the surface, making the oxide film and related contaminants difficult to remove; then, it dissolves the oxide film, as the oxide layer is a "contamination trap" and can also introduce epitaxial defects; finally, it removes particle and metal contaminants while passivating the silicon wafer surface. This is a conventional technique and will not be elaborated further.
[0071] Step S302: Form a groove on the substrate surface.
[0072] For example, dry or wet etching methods can be used to form grooves with a depth of 2.3 to 30 μm (typically 2.6 to 3.7 μm) on the surface of the substrate.
[0073] Figure 4 This is a schematic diagram of the structure presented after executing step S302, as shown below. Figure 4 As shown, a groove 100a is formed on the surface of the substrate 100.
[0074] Step S303: Deposit a first sacrificial layer on the substrate surface, the first sacrificial layer covering the groove.
[0075] In this embodiment, a layer of phosphosilicate glass or tetraethyl orthosilicate can be deposited on the substrate surface using PECVD (Plasma Enhanced Chemical Vapor Deposition) as the first sacrificial layer.
[0076] Optionally, the thickness of the first sacrificial layer is 1.2 to 2 times the depth of the groove, so as to ensure that the first sacrificial layer can partially protrude from the groove.
[0077] Figure 5 This is a structural diagram presented after executing step S303, as shown below. Figure 5 As shown, a first sacrificial layer 110 is sequentially deposited on the substrate 100 with the groove 100a formed therein.
[0078] Step S304: Using a combination of etching and endpoint detection, the first sacrificial layer whose orthogonal projection on the substrate is located outside the groove is removed.
[0079] In this embodiment, the first sacrificial layer whose orthogonal projection on the substrate is located outside the groove can be removed by dry etching or wet etching. During the etching process, the endpoint detection is performed to detect whether the first sacrificial layer to be etched and removed has been completely etched, ensuring that the first sacrificial layer on the substrate surface can be completely removed, leaving only the first sacrificial layer inside and above the groove.
[0080] In existing technologies, only a portion of the sacrificial layer needs to be etched, and the etching start and end points are made of the same material. Therefore, endpoint detection methods cannot be used to detect whether the etching is complete. However, in this embodiment, the entire first sacrificial layer on the substrate surface is removed. Since the substrate and the first sacrificial layer are made of different materials, meaning the etching start and end points are made of different materials, endpoint detection methods can be used to detect whether the etching is complete, resulting in higher etching accuracy.
[0081] Figure 6 This is a structural diagram showing the result after step S304 is executed, as follows: Figure 6 As shown, at this time, the first sacrificial layer 110, whose orthogonal projection on the substrate 100 is located outside the groove 100a, is removed. Only the first sacrificial layer 110 located inside and above the groove 100a is retained.
[0082] Step S305: Deposit a second sacrificial layer on the substrate surface, the second sacrificial layer covering the remaining first sacrificial layer.
[0083] In this embodiment, the material of the second sacrificial layer is the same as that of the first sacrificial layer, so as to better form a whole with the first sacrificial layer. Specifically, a layer of phosphosilicate glass or tetraethyl orthosilicate can be deposited on the substrate surface by PECVD as the second sacrificial layer.
[0084] Optionally, the thickness of the second sacrificial layer is greater than the depth of the groove.
[0085] Figure 7 This is a schematic diagram of the structure presented after executing step S305, as shown below. Figure 7 As shown, at this time, a second sacrificial layer 120 is deposited on the substrate surface, and the second sacrificial layer 120 covers the remaining first sacrificial layer 110.
[0086] Step S306: Remove the second sacrificial layer and the first sacrificial layer located outside the groove by multiple chemical mechanical polishing, so that the remaining first sacrificial layer inside the groove is on the same plane as the substrate surface.
[0087] Optionally, step S306 may include:
[0088] The first step is to use chemical mechanical polishing to perform the first polishing process on the second sacrificial layer and the first sacrificial layer outside the groove until the thickness of the second sacrificial layer and the first sacrificial layer outside the groove from the substrate surface is the set thickness.
[0089] The second step involves using chemical mechanical polishing to polish the remaining second and first sacrificial layers outside the groove until all the second and first sacrificial layers outside the groove are removed.
[0090] During the second polishing process, the endpoint detection method can be used to monitor whether the remaining thickness of the second sacrificial layer and the first sacrificial layer has been completely removed, so as to ensure polishing accuracy.
[0091] The third step involves using chemical mechanical polishing to perform a third polishing process on the substrate surface and the surface of the remaining first sacrificial layer in the groove until the remaining first sacrificial layer in the groove and the substrate surface are on the same plane, and the roughness of the remaining first sacrificial layer in the groove and the substrate surface meet the set requirements.
[0092] Chemical mechanical polishing (CMP) uses chemical etching and mechanical force to smooth silicon wafers or other substrate materials during processing. Its specific working principle is as follows:
[0093] The structure to be polished is placed at the bottom of the polishing head, and the polishing pad is placed on the grinding disc. During polishing, the rotating polishing head presses against the rotating polishing pad with a certain pressure. The polishing slurry, composed of submicron or nano-abrasive particles and a chemical solution, flows between the surface of the structure to be polished and the polishing pad. Then, under the action of the polishing pad and centrifugal force, the polishing slurry is evenly distributed on it, forming a thin film of polishing slurry between the structure to be polished and the polishing pad. The chemical components in the polishing slurry react with the surface material of the silicon wafer, converting insoluble substances into soluble substances or softening hard substances. Then, through the micro-mechanical friction of the abrasive particles, these chemical reactants are removed from the surface of the silicon wafer and dissolved into the flowing liquid and carried away. That is, planarization is achieved in the alternating process of chemical and mechanical film removal.
[0094] For example, during the first polishing process, the pressure applied by the polishing head can be controlled to be 3-5.5 PSI, the polishing pad rotation speed to be 80-120 RPM, and a composite polishing pad can be used in conjunction with a polishing slurry containing colloidal silica abrasive particles (particle size can be 50-120 nm).
[0095] During the second polishing process, the pressure applied by the polishing head can be controlled at 1.5-4 PSI, the polishing pad rotation speed at 90-120 RPM, and a composite polishing pad can be used in conjunction with a polishing slurry containing colloidal silica abrasive particles (particle size can be 50-120 nm).
[0096] During the third polishing process, the pressure applied by the polishing head can be controlled at 1-3 PSI, the polishing pad rotation speed at 100-130 RPM, and a fine polishing pad and fine polishing fluid (ultrapure water can also be used) can be used for processing. The polishing time is 10-40 seconds to improve the roughness after polishing.
[0097] This process can not only effectively control the thickness of the sacrificial layer and reduce various defects inside and outside the interface, but also significantly improve the surface roughness to meet the needs of the next process (such as wafer bonding, direct bonding has extremely high requirements for surface roughness).
[0098] Figure 8 This is a structural diagram presented after executing step S306, as shown below. Figure 8 As shown, at this time, all the second sacrificial layers 120 and the first sacrificial layers 110 outside the groove 100a are removed, leaving only the first sacrificial layer 110 inside the groove 100a.
[0099] Step S307: Deposit a stacked structure covering the groove on the substrate surface. The stacked structure includes a bottom electrode, a piezoelectric layer and a top electrode deposited sequentially.
[0100] In this embodiment, the bottom electrode and top electrode can be metal materials such as aluminum, gold, aluminum-copper alloy, aluminum-silicon alloy, aluminum-silicon-copper alloy, tungsten, titanium, titanium-tungsten compounds, molybdenum, and platinum. The piezoelectric layer can be a piezoelectric material such as zinc oxide, lead zirconate titanate (PZT), or aluminum nitride.
[0101] For example, a metal layer can first be grown on the substrate surface, and then this metal layer can be etched into a bottom electrode, for example, using sputtering, photolithography, and etching processes. The bottom electrode covers the location of the groove. Then, a piezoelectric material is deposited on the bottom electrode, and this piezoelectric material is etched into a piezoelectric layer. Finally, a metal layer is grown on the piezoelectric layer, and then this metal layer is etched into a top electrode, for example, using deposition, photolithography, and etching processes.
[0102] Figure 9 This is a structural diagram presented after executing step S307, as shown below. Figure 9 As shown, a stacked structure 130 covering the groove is deposited on the substrate surface at this time. The stacked structure 130 includes a bottom electrode 131, a piezoelectric layer 132 and a top electrode 133 deposited sequentially.
[0103] Step S308: Remove the remaining first sacrificial layer in the groove to form a cavity below the stacked structure.
[0104] In this embodiment, a release window can be first obtained around the groove by dry etching, and then an aqueous solution of hydrofluoric acid (HF) can be injected from the release window to remove the remaining first sacrificial layer located in the groove.
[0105] Figure 10 This is a structural diagram presented after executing step S308, as shown below. Figure 10 As shown, a cavity S is formed below the stacked structure 130 at this time.
[0106] This invention provides a method for manufacturing a cavity-type thin-film bulk acoustic wave resonator. By employing a combination of etching and endpoint detection, a first sacrificial layer whose orthogonal projection on the substrate is located outside the groove is removed. This method retains only the first sacrificial layer inside and above the groove, ensuring complete removal of the first sacrificial layer from the substrate surface. Next, a second sacrificial layer is deposited on the substrate surface to cover the remaining first sacrificial layer. The second sacrificial layer and the remaining first sacrificial layer form a unified whole, ensuring the stability of the remaining first sacrificial layer. Then, multiple chemical mechanical polishing (CMP) processes are used to remove the second and first sacrificial layers above the substrate surface, ensuring that the remaining first sacrificial layer within the groove is on the same plane as the substrate surface, meeting the planarization requirements of subsequent multilayer growth. Multiple CMP processes reduce the thickness and duration of each polishing step, avoiding the imbalance between chemical reaction and mechanical removal caused by prolonged polishing on a single polishing station, which can lead to poor on-chip inhomogeneity and thus ensure the quality of the fabricated thin-film bulk acoustic wave resonator.
[0107] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.
[0108] Similarly, it should be understood that, in order to simplify this disclosure and aid in understanding one or more of the various aspects of the invention, in the above description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof. However, this method of disclosure should not be construed as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim. Rather, as reflected in the following claims, inventive aspects lie in fewer than all features of a single foregoing disclosed embodiment. Therefore, the claims following the detailed description are hereby expressly incorporated into this detailed description, wherein each claim itself is a separate embodiment of the invention.
[0109] It should be noted that the above embodiments are illustrative of the invention and not restrictive of the invention, and that those skilled in the art can devise alternative embodiments without departing from the scope of the appended claims.
Claims
1. A method for manufacturing a cavity-type thin-film bulk acoustic resonator, characterized in that, The manufacturing method includes: A groove is formed on the substrate surface; A first sacrificial layer is deposited on the substrate surface, the first sacrificial layer covering the groove; The first sacrificial layer, whose orthogonal projection on the substrate is located outside the groove, is removed by using a combination of etching and endpoint detection. A second sacrificial layer is deposited on the substrate surface, the second sacrificial layer covering the remainder of the first sacrificial layer; The second sacrificial layer and the first sacrificial layer located outside the groove are removed by multiple chemical mechanical polishing processes, so that the remaining first sacrificial layer inside the groove is located on the same plane as the substrate surface; A stacked structure covering the groove is deposited on the substrate surface, the stacked structure comprising a bottom electrode, a piezoelectric layer and a top electrode deposited sequentially; Remove the remaining first sacrificial layer within the groove to form a cavity beneath the stacked structure.
2. The manufacturing method according to claim 1, characterized in that, The deposition of the first sacrificial layer on the substrate surface includes: A layer of phosphosilicate glass or tetraethyl orthosilicate is deposited on the surface of the substrate as the first sacrificial layer.
3. The manufacturing method according to claim 2, characterized in that, The thickness of the first sacrificial layer is 1.2 to 2 times the depth of the groove.
4. The manufacturing method according to claim 2, characterized in that, The material of the second sacrificial layer is the same as that of the first sacrificial layer.
5. The manufacturing method according to claim 4, characterized in that, The thickness of the second sacrificial layer is greater than the depth of the groove.
6. The manufacturing method according to claim 1, characterized in that, The step of removing the second sacrificial layer and the first sacrificial layer located outside the groove by multiple chemical mechanical polishing processes, so that the remaining first sacrificial layer inside the groove is located on the same plane as the substrate surface, includes: The second sacrificial layer and the first sacrificial layer outside the groove are polished for the first time using a chemical mechanical polishing method until the thickness of the second sacrificial layer and the first sacrificial layer outside the groove from the substrate surface is a set thickness. The remaining second sacrificial layer and the first sacrificial layer outside the groove are subjected to a second polishing process using a chemical mechanical polishing method until all the second sacrificial layer and the first sacrificial layer outside the groove are removed. A chemical mechanical polishing method is used to perform a third polishing process on the surface of the substrate and the surface of the remaining first sacrificial layer in the groove until the remaining first sacrificial layer in the groove and the substrate surface are located on the same plane, and the roughness of the remaining first sacrificial layer in the groove and the substrate surface meet the set requirements.
7. The manufacturing method according to claim 6, characterized in that, The set thickness is 1 to 2 μm.
8. The manufacturing method according to claim 6, characterized in that, During the second polishing process, the remaining thickness of the second sacrificial layer and the first sacrificial layer are monitored using an endpoint detection method to ensure that they are completely removed.
9. The manufacturing method according to any one of claims 1 to 8, characterized in that, The process of forming a groove on the substrate surface includes: A groove with a depth of 2.3 to 30 μm is formed on the surface of the substrate using a dry or wet etching method.
10. The manufacturing method according to any one of claims 1 to 8, characterized in that, Before forming the groove on the substrate surface, the manufacturing method further includes: The substrate is cleaned and dried for later use.