Optical proximity correction methods and systems, photomasks, devices and storage media
By adding auxiliary patterns to the side of the main pattern in semiconductor manufacturing and setting the number according to the forbidden edge rule, the problem of lithographic pattern distortion caused by optical proximity effect is solved, thus improving lithography quality and efficiency.
Patent Information
- Application Number
- CN202111533657.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-12-15
- Publication Date
- 2026-01-30
- Estimated Expiration
- 2041-12-15
AI Technical Summary
In semiconductor manufacturing, as design dimensions shrink, optical proximity effect causes distortion of photolithographic patterns, which is difficult to correct effectively with existing technologies, and is time-consuming and labor-intensive.
By adding auxiliary graphics to the side of the main pattern and setting the number of auxiliary graphics according to the forbidden edge rule, sub-resolution auxiliary graphics technology is used to reduce imaging deviation and improve lithography quality.
It improves the fidelity of photolithography patterns, reduces the probability of defects, optimizes the processing results of optical proximity correction, and improves the efficiency of adding auxiliary patterns.
Smart Images

Figure CN116263558B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor manufacturing, and more particularly to an optical proximity correction method and system, a photomask, an apparatus, and a storage medium. Background Technology
[0002] In semiconductor manufacturing, as design dimensions continue to shrink and approach the limits of photolithography imaging systems, the diffraction effect of light becomes increasingly pronounced, leading to optical image degradation of the final design pattern. The actual photolithographic pattern formed is severely distorted relative to the pattern on the mask, resulting in a difference between the actual pattern formed on the silicon wafer and the design pattern. This phenomenon is called the Optical Proximity Effect (OPE).
[0003] Currently, the correction process for the optical proximity effect requires a great deal of time and effort. Summary of the Invention
[0004] The problem solved by the embodiments of the present invention is to provide an optical proximity correction method and system, a mask, an apparatus and a storage medium to improve the processing results of the optical proximity correction process.
[0005] To address the aforementioned problems, embodiments of the present invention provide an optical proximity correction method, comprising: providing a main pattern; setting a prohibition edge rule based on the spacing between adjacent main patterns; and adding auxiliary patterns to the side of the main pattern, wherein the number of auxiliary patterns added to the side of the main pattern is obtained based on the prohibition edge rule.
[0006] Accordingly, embodiments of the present invention also provide an optical proximity correction system, comprising: a graphic providing module for providing a main graphic; a rule formulating module for setting a prohibition edge rule based on the spacing between adjacent main graphics; and an auxiliary graphic adding module for adding auxiliary graphics to the side of the main graphic, wherein the number of auxiliary graphics added to the side of the main graphic is obtained based on the prohibition edge rule.
[0007] Accordingly, embodiments of the present invention also provide a photomask, including a pattern obtained using the optical proximity correction method provided in embodiments of the present invention.
[0008] Accordingly, embodiments of the present invention also provide an apparatus including at least one memory and at least one processor, wherein the memory stores one or more computer instructions, and the one or more computer instructions are executed by the processor to implement the optical proximity correction method provided in embodiments of the present invention.
[0009] Accordingly, embodiments of the present invention also provide a storage medium storing one or more computer instructions, which are used to implement the optical proximity correction method provided in embodiments of the present invention.
[0010] Compared with the prior art, the technical solution of the embodiments of the present invention has the following advantages:
[0011] In the optical proximity correction method provided in this embodiment of the invention, a forbidden edge rule is set according to the spacing between adjacent main patterns, and auxiliary patterns are added to the side of the main pattern. The number of auxiliary patterns added to the side of the main pattern is obtained based on the forbidden edge rule. The auxiliary patterns are usually sub-resolution assist features, that is, the auxiliary patterns are non-exposed patterns. By adding auxiliary patterns around the main pattern, the imaging deviation caused by the different diffraction effects of different main patterns is reduced, thereby improving the image fidelity and the lithographic quality of the main pattern. Moreover, in this embodiment, by setting a forbidden edge rule and obtaining the number of auxiliary patterns added to the side of the main pattern based on the forbidden edge rule, the auxiliary patterns can be added according to the actual environmental conditions around the main pattern, thereby improving the processing result of the optical proximity correction process.
[0012] In an optional embodiment, in the print layer, the main auxiliary graphics are added sequentially to the sides of the feasible edges of each main graphic in ascending order of the number of feasible edges. The ascending order of the number of feasible edges of the main graphic corresponds to the descending order of the number of forbidden edges. The more forbidden edges a main graphic has, the more likely defects are to occur during photolithography. In other words, the more prone the main graphic is to defects, the higher the priority for adding the main auxiliary graphics. Since the main auxiliary graphics are the auxiliary graphics closest to the feasible edges, they have the greatest impact on the main graphic among the auxiliary graphics. Therefore, in this embodiment of the invention, the graphics most prone to defects are first selected. The main graphic is selected first, and main auxiliary graphics are added preferentially to the main graphic that is prone to defects. Appropriate main and auxiliary graphics can be placed on the side of the main graphic that is prone to defects in a targeted manner. This prevents the problem of missing main and auxiliary graphics around the main graphic that is prone to defects or the main and auxiliary graphics being added incorrectly after the auxiliary graphics are added to the entire plate layer. This reduces the probability of needing to readjust the arrangement of auxiliary graphics after the auxiliary graphics are added to the entire plate layer, thereby reducing the time for adding auxiliary graphics and improving the efficiency of adding auxiliary graphics. At the same time, it also helps to reduce the probability of defects in subsequent photolithography processes. All of the above are conducive to improving the processing results of the optical proximity correction process. Attached Figure Description
[0013] Figure 1This is a flowchart of an embodiment of the optical proximity correction method of the present invention;
[0014] Figures 2 to 8 This is a schematic diagram of each step in one embodiment of the optical proximity correction method of the present invention;
[0015] Figure 9 This is a functional block diagram of an embodiment of the optical proximity correction system of the present invention;
[0016] Figure 10 This is a hardware structure diagram of an embodiment of the device provided by the present invention. Detailed Implementation
[0017] As is known from the background technology, in semiconductor manufacturing, as the design size continues to shrink, it gets closer and closer to the limit of the photolithography imaging system. The diffraction effect of light becomes more and more obvious, resulting in optical image degradation of the final design pattern. The actual photolithographic pattern formed is severely distorted relative to the pattern on the mask. In the end, the actual pattern formed on the silicon wafer by photolithography is different from the design pattern. This phenomenon is called the optical proximity effect.
[0018] To address the aforementioned technical problem, embodiments of the present invention provide an optical proximity correction method. (Reference) Figure 1 The flowchart of an embodiment of the optical proximity correction method of the present invention is shown.
[0019] In this embodiment, the optical proximity correction method includes the following basic steps:
[0020] Step S1: Provide the main graphic;
[0021] Step S2: Set prohibited edge rules based on the spacing between adjacent main graphics;
[0022] Step S3: Add auxiliary graphics to the side of the main graphic, wherein the number of auxiliary graphics added to the side of the main graphic is obtained based on the forbidden edge rule.
[0023] In this embodiment, a forbidden edge rule is set according to the spacing between adjacent main patterns, and auxiliary patterns are added to the side of the main pattern. The number of auxiliary patterns added to the side of the main pattern is obtained based on the forbidden edge rule. The auxiliary patterns are usually sub-resolution auxiliary images, that is, the auxiliary patterns are non-exposed images. By adding auxiliary patterns around the main pattern, the imaging deviation caused by the different diffraction effects of different main patterns is reduced, thereby improving the image fidelity and the lithographic quality of the main pattern. Moreover, in this embodiment, by setting a forbidden edge rule and obtaining the number of auxiliary patterns added to the side of the main pattern based on the forbidden edge rule, the auxiliary patterns can be added according to the actual environmental conditions around the main pattern, thereby improving the processing result of the optical proximity correction process.
[0024] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
[0025] Figures 2 to 8 This is a schematic diagram of each step in one embodiment of the optical proximity correction method of the present invention.
[0026] refer to Figure 2 Step S1: Provide the main graphic 100.
[0027] Specifically, a plate layer 100a is provided, including the main graphic 100.
[0028] The main graphic 100 in layer 100a is the design graphic. The design graphic is the target graphic transferred onto the wafer. After optical proximity correction processing is performed on the design graphic, the resulting graphic is used to create a photomask, which is then used for photolithography to form the corresponding photomask pattern on the wafer.
[0029] In this embodiment, the layout layer 100a includes layout layers applied to logic devices and SRAM devices.
[0030] In the layout layer of logic devices, the distribution of the main pattern 100 is relatively random, while in the layout layer of SRAM devices, the distribution of the main pattern 100 is relatively regular. Therefore, in optical proximity correction processing, when using sub-resolution auxiliary pattern technology to improve the lithographic quality of the main pattern 100 of the entire device area, defects such as missing auxiliary patterns around the main pattern 100 or incorrect placement of auxiliary patterns are more likely to occur. Therefore, in this embodiment, a strategy of setting the priority for adding auxiliary patterns is subsequently used to add auxiliary patterns to the layout layer 100a. This is particularly beneficial for accurately adding auxiliary patterns to the layout layers of both logic devices and SRAM devices simultaneously, thereby improving the processing results of optical proximity correction processing.
[0031] The plate layer in this embodiment includes a hole graphic, which is usually square in shape. Correspondingly, in this embodiment, the main graphic 100 in the plate layer 100a includes a hole graphic, and the main graphic 100 is square in shape.
[0032] In this embodiment, the hole pattern includes a contact hole pattern or an interconnecting via pattern.
[0033] Contact hole patterns are used to form contact holes on the wafer, and contact holes are used to form contact hole plugs. Interconnect via patterns are used to form interconnect vias on the wafer, and interconnect vias are used to form interconnect via structures. Typically, the distribution of contact hole patterns or interconnect via patterns in the lithography layer is relatively random, and isolated (ISO) patterns are prone to appear. For the main pattern 100 which is an ISO pattern, it is especially necessary to have surrounding auxiliary patterns to provide illumination and improve the photolithography quality of the contact hole patterns or interconnect via patterns.
[0034] It should be noted that, for ease of illustration, Figure 2 Only two main graphics 100 are shown. Depending on different process requirements, the number of main graphics 100 is not limited to two.
[0035] Reference Figure 3 and Figure 4 Step S2: Set the prohibited edge rule based on the spacing between adjacent main graphics 100.
[0036] Specifically, the distance d between adjacent main graphics 100 is obtained, and the edge of any main graphics 100 whose distance d with another adjacent main graphics 100 is less than the minimum distance between which auxiliary graphics can be placed is selected as a prohibited edge 110, and the remaining edge is selected as a feasible edge 120. The minimum distance between which auxiliary graphics can be placed is the minimum width j of the auxiliary graphics and twice the minimum distance i between the adjacent main graphics 100 and the auxiliary graphics.
[0037] In the optical proximity correction process, sub-resolution auxiliary patterning technology is used to improve the lithographic resolution. By adding sub-resolution auxiliary patterns around the main pattern in the plate layer, the imaging deviation caused by the different diffraction effects of different main patterns is reduced, the lithographic quality of the main pattern is improved, and thus the fidelity of the main pattern is improved.
[0038] For the strategy of placing auxiliary graphics in the plate layer 100a, based on the mask manufacturability rule constraint (MRC) condition, the minimum width j of the auxiliary graphics and the minimum spacing i between the adjacent main graphics 100 and the auxiliary graphics are specified.
[0039] It should be noted that, for ease of understanding, Figure 3 The dashed box illustrates a schematic diagram assuming the existence of an auxiliary graphic 200, with exactly one auxiliary graphic 200 placed between adjacent main graphics 100. Figure 4It can be seen that for adjacent main graphics 100, the condition for placing an auxiliary graphic 200 on the side of one main graphic 100 is that the distance between the adjacent auxiliary graphic 200 and the main graphic 100 is greater than or equal to i; the condition for placing an auxiliary graphic 200 on the side of the other main graphic 100 is also that the distance between the adjacent auxiliary graphic 200 and the main graphic 100 is greater than or equal to i, and the width of the auxiliary graphic 200 that can be placed needs to be greater than or equal to j. That is to say, the minimum distance between which an auxiliary graphic 200 can be placed is the sum of the minimum width j of the auxiliary graphic 200 and twice the minimum distance i between the adjacent main graphic 100 and the auxiliary graphic 200. Therefore, for adjacent main graphics 100, when the distance d between adjacent main graphics 100 is greater than or equal to 2i+j, an auxiliary graphic 200 can be placed between adjacent main graphics 100; when the distance d between adjacent main graphics 100 is less than 2i+j, an auxiliary graphic 200 cannot be placed between adjacent main graphics 100.
[0040] In this embodiment, the edge of any main graphic 100 whose distance d from another adjacent main graphic 100 is less than the minimum distance for placing auxiliary graphics is selected as the prohibited edge 110. The prohibited edge 110 is the edge on the side of the main graphic 100 where no auxiliary graphic 200 is placed. The remaining edge is selected as the feasible edge 120. The feasible edge 120 is the edge on the side of the main graphic 100 where the auxiliary graphic 200 is placed.
[0041] For ease of understanding, Figure 4 The diagram illustrates several cases where the main graphic 100 within the dashed circle has forbidden edges 110 and feasible edges 120. Figure 4 The diagram only shows the case where the spacing d is less than the minimum spacing of the adjacent main graphic 100 where the auxiliary graphic 200 can be placed. It does not show the case where the spacing d is greater than or equal to the minimum spacing of the adjacent main graphic 100 where the auxiliary graphic 200 can be placed. For the main graphic 100 located in the dashed circle, the solid line indicates its prohibited edge 110, and the dotted line indicates its feasible edge 120.
[0042] Continue to refer to Figure 4 Get the number of feasible edges 120 for each main graph 100.
[0043] The number of feasible edges 120 for each main graphic 100 is used as the basis for determining the priority strategy for adding auxiliary graphics 200.
[0044] Figure 4 The diagram illustrates several cases where the main figure 100 within the dashed circle has one or more feasible edges 120, as examples. Figure 4 (a) The main figure 100 within the dashed circle has one feasible edge 120. Figure 4 (b) The main figure 100 within the dashed circle has two feasible edges 120. Figure 4(c) The main figure 100 within the dashed circle has 3 feasible edges 120. Figure 4 (d) The main figure 100 in the dashed circle has 4 feasible edges 120.
[0045] It should be noted that if the main graphic 100 does not have a feasible edge 120, then no auxiliary graphic 200 will be added around it subsequently. Figure 4 The main figure 100 is not shown and does not have a feasible edge 120.
[0046] In this embodiment, before adding the auxiliary graphic 200, the method further includes: obtaining the optimal distance between the main auxiliary graphic and the main graphic 100 based on the experimental design data, as the first dimension a, and obtaining the optimal width of the auxiliary graphic 200, as the second dimension b.
[0047] Among them, the main auxiliary graph is the auxiliary graph 200 that is closest to the feasible edge 120.
[0048] Different page layers 100a have different main graphics 100 and different distributions of the main graphics 100. Therefore, before adding auxiliary graphics 200, it is necessary to conduct experiments on the environment in which the auxiliary graphics 200 are added. Finally, based on the data from the Design of Experiments (DOE), the optimal spacing between the main auxiliary graphics 210 and the main graphics 100, as well as the optimal width of the auxiliary graphics 200, are obtained for the corresponding page layer 100a. This serves as the basis for achieving the optimal effect when adding auxiliary graphics 200.
[0049] Reference Figures 4 to 8 Step S3: Add auxiliary graphics 200 to the side of the main graphic 100, wherein the number of auxiliary graphics 200 added to the side of the main graphic 100 is obtained based on the forbidden edge rule.
[0050] Specifically, in layer 100a, auxiliary graphics 200 are added to the side of the feasible edge 120 of the main graphic 100. The auxiliary graphics 200 includes a main auxiliary graphic 210 that is closest to the feasible edge 120. The main auxiliary graphics 210 are added to the side of the feasible edge 120 of the main graphic 100 in an increasing order of the number of feasible edges 120 of each main graphic 100.
[0051] In this embodiment, in the step of adding an auxiliary graphic 200 to the side of the feasible edge 120 of the main graphic 100, the long side of the auxiliary graphic 200 faces the corresponding feasible edge 120, which helps to avoid the problem of insufficient lighting in the main graphic 100.
[0052] In this embodiment, the auxiliary pattern 200 includes a scattering bar (SBar). The main pattern 100 is an exposeable pattern, and the auxiliary pattern 200 is a non-expose pattern. Therefore, the auxiliary pattern 200 is a scattering bar, and the linewidth of the auxiliary pattern 200 is greater than or equal to the minimum linewidth of the mask writing rule, and less than or equal to the resolution of the photolithography process, so that the auxiliary pattern 200 can be written into the template but will not be exposed.
[0053] Setting scattering strips around the main pattern 100 helps improve light intensity contrast, reduce edge placement error (EPE), and also helps increase the depth of focus, thereby improving the lithography process window.
[0054] In this embodiment, the increasing order of the number of feasible edges 120 of the main pattern 100 is the same as the decreasing order of the number of forbidden edges 110 of the main pattern 100. The more forbidden edges 110 the main pattern 100 has, the more likely defects will occur during the photolithography process. In other words, the more likely the main pattern 100 is to generate defects, the higher the priority of adding the main auxiliary pattern 210 to the main pattern 100. The main auxiliary pattern 210 is the auxiliary pattern 200 closest to the feasible edges 120. Therefore, the main auxiliary pattern 210 is the auxiliary pattern 200 that has the greatest impact on the main pattern 100. Thus, in this embodiment, the main pattern 100 that is prone to generating defects is selected first, and priority is given to the main pattern 100 that is prone to generating defects. Adding a main auxiliary graphic 210 to the main graphic 100 that is prone to defects prevents the main auxiliary graphic 210 from being missing around the main graphic 100 or from being added incorrectly after the auxiliary graphic 200 is added to the entire plate layer 100a. This reduces the probability of needing to readjust the arrangement of the auxiliary graphics 200 after the auxiliary graphics 200 is added to the entire plate layer 100a, thereby reducing the time required to add the auxiliary graphics 200 and improving the efficiency of adding the auxiliary graphics 200. At the same time, it also helps to reduce the probability of defects in the subsequent photolithography process. All of the above are beneficial to improving the processing results of optical proximity correction.
[0055] like Figure 4 As shown, in this embodiment, taking the main graphic 100 in the dashed circle as an example, the feasible edges 120 of each main graphic 100 are sequentially arranged in ascending order. Figure 4 (a) Figure 4 (b), Figure 4 (c) and Figure 4 Add a main auxiliary graphic 210 to the side of the feasible edge 120 in (d).
[0056] In this embodiment, main auxiliary graphics 210 are added to the main graphics 100 with the same number of feasible edges 120.
[0057] Since the number of feasible edges 120 is the same, the environment around which main auxiliary graphics 210 are added is similar. Therefore, the same strategy can be adopted to add main auxiliary graphics 210 at the same time, which is beneficial to improve the efficiency of adding auxiliary graphics 200.
[0058] Reference Figures 5 to 8 The steps of adding main auxiliary graphics 210 to the side of the feasible edge 120 of the main graphic 100 in sequence include: determining whether the side of the feasible edge 120 of the main graphic 100 has other adjacent feasible edges 120.
[0059] Determine whether the feasible side of the main graphic 100 has other adjacent feasible sides 120, in order to classify the different environments in which the main auxiliary graphic 210 is added.
[0060] Specifically, in conjunction with reference Figures 5 to 7 When the feasible edge 120 of the main graphic 100 has adjacent feasible edges 120, the spacing between the adjacent feasible edges 120 is detected.
[0061] The spacing d0 between adjacent feasible edges 120 is detected and used to classify the number and position of main and auxiliary graphics 210 placed between adjacent feasible edges 120.
[0062] It should be noted that if the adjacent edge of an adjacent main figure 100 is a feasible edge 120, then the distance d between adjacent main figures 100 is greater than or equal to 2i+j, and thus the distance d0 between adjacent feasible edges 120 is greater than or equal to 2i+j.
[0063] Specifically, such as Figure 5 As shown, when the distance d0 between adjacent feasible edges 120 is less than the first distance, a main auxiliary graphic 210 is placed between adjacent feasible edges 120, such as... Figure 6 and Figure 7 As shown, when the distance d0 between adjacent feasible edges 120 is greater than or equal to the first distance, two main auxiliary graphics 210 are placed between adjacent feasible edges 120. The first distance is the sum of twice the minimum distance i between the adjacent auxiliary graphics 200 and the main graphics 100, twice the minimum width j of the auxiliary graphics 200, and the minimum distance k between the adjacent auxiliary graphics 200. That is, the first distance is equal to 2i+2j+k.
[0064] For the strategy of placing auxiliary graphics in the plate layer 100a, based on the MRC condition, the minimum spacing k between adjacent auxiliary graphics is also specified.
[0065] It should be noted that for adjacent feasible edges 120, the condition for placing a main auxiliary graphic 210 on the side of one feasible edge 120 is that the distance between the main auxiliary graphic 210 and the feasible edge 120 is greater than or equal to i; the condition for placing a main auxiliary graphic 210 on the side of the other feasible edge 120 is also that the distance between the main auxiliary graphic 210 and the feasible edge 120 is greater than or equal to i, and the width of the main auxiliary graphic 210 that can be placed must be greater than or equal to j. Furthermore, the condition for placing two main auxiliary graphics 210 also includes that the distance between two adjacent main auxiliary graphics 210 is k. In other words, two main auxiliary graphics can be placed. The minimum spacing of shape 210 is the sum of twice the minimum spacing i between adjacent auxiliary shapes 200 and main shape 100, twice the minimum width j of auxiliary shape 200, and the minimum spacing k between adjacent auxiliary shapes 200. Therefore, for adjacent feasible edges 120, when the spacing d0 between adjacent feasible edges 120 is greater than or equal to 2i+2j+k, two main auxiliary shapes 210 can be placed between adjacent feasible edges 120; when the spacing d0 between adjacent feasible edges 120 is less than 2i+2j+k, only one main auxiliary shape 210 can be placed between adjacent feasible edges 120, that is, the first spacing is 2i+2j+k.
[0066] In this embodiment, in the step of placing the main auxiliary graphic 210 between adjacent feasible edges 120, the spacing between adjacent feasible edges 120 and the main auxiliary graphic 210 is equal.
[0067] The spacing between adjacent feasible edges 120 and the main auxiliary graphic 210 is equal, resulting in more uniform illumination of the main auxiliary graphic 210 on the adjacent main graphic 100. This is beneficial for improving the uniformity of the photolithography quality of the main graphic 100 in the plate layer 100a. In particular, when the spacing between adjacent feasible edges 120 is insufficient to place the main auxiliary graphic 210 in the optimal position, directly placing the main auxiliary graphic 210 at a position with equal spacing to the feasible edges 120 helps avoid the situation where the main auxiliary graphic 210 is placed in the optimal position for both adjacent feasible edges 120, which would lead to conflicts between the main auxiliary graphics 210. Subsequently, special cleaning of conflicting main auxiliary graphics 210 is required, which could easily lead to problems such as missing main auxiliary graphics 210 around the main graphic 210 or incorrect placement of the main auxiliary graphics 210.
[0068] Specifically, refer to Figure 5 The step of placing a main auxiliary graphic 210 between adjacent feasible edges 120 includes: placing a main auxiliary graphic 210 between adjacent feasible edges 120, wherein the distances t1 and t2 between the main auxiliary graphic 210 and the adjacent feasible edges 120 on both sides are equal, and the width s of the main auxiliary graphic 210 is the second dimension b.
[0069] The distances t1 and t2 between the main auxiliary graphic 210 and the adjacent feasible edges 120 on both sides are equal, so that the spacing between the adjacent feasible edges 120 and the main auxiliary graphic 210 is equal. The width s of the main auxiliary graphic 210 is the second dimension b, so that when setting the main auxiliary graphic 210, its width s is set to the optimal width.
[0070] The width s of the main auxiliary graphic 210 has a significant impact on the supplementary lighting effect of the adjacent main graphic 210. Therefore, for the width s of the main auxiliary graphic 210 and the distance between the main auxiliary graphic 210 and the adjacent feasible edge 120, the width s of the main auxiliary graphic 210 should be prioritized to be optimal, i.e., the second dimension b.
[0071] In this embodiment, the distance between the main auxiliary graphic 210 and the adjacent feasible edge 120 is obtained as the first distance t0.
[0072] Obtain the first distance t0, which will serve as the basis for whether to adjust the main and auxiliary graphics 210 subsequently.
[0073] In this embodiment, it is determined whether the first distance t0 is greater than or equal to the minimum distance i between adjacent main graphics 100 and auxiliary graphics 200.
[0074] Specifically, when the first distance t0 is less than the minimum distance i between the adjacent main graphic 100 and the auxiliary graphic 200, the width s of the main and auxiliary graphic 210 is reduced, and the process returns to obtain the distance between the main and auxiliary graphic 210 and the adjacent feasible edge 120.
[0075] When the first distance t0 is less than the minimum distance i between the adjacent main graphic 100 and the auxiliary graphic 200, the first distance t0 does not satisfy the MRC condition. Therefore, the width s of the main and auxiliary graphic 210 is reduced, and the main and auxiliary graphic 210 is simultaneously reduced from both sides toward the middle, so that the main and auxiliary graphic 210 always maintains the same distance from the adjacent feasible edges 120 on both sides, and can simultaneously increase the first distance t0 on both sides of the main and auxiliary graphic 210, so that the first distance t0 satisfies the MRC condition.
[0076] In this embodiment, in the step of reducing the width s of the main auxiliary graphic 210, the width of the first preset size is reduced each time.
[0077] In the step of reducing the width s of the main auxiliary graphic 210, the same size is reduced each time, so that the width s of the main auxiliary graphic 210 decreases uniformly and regularly. This unifies the algorithm for reducing the width s of the main auxiliary graphic 210 each time, simplifies the method of iteratively adjusting the width s of the main auxiliary graphic 210, avoids the steps of adding auxiliary graphic 200 being too cumbersome and chaotic, and is conducive to stably achieving the first distance t0 being greater than or equal to the minimum spacing i between the adjacent main graphic 100 and the auxiliary graphic 200.
[0078] It should be noted that the first preset size should not be too large or too small. If the first preset size is too large, the step size of the loop iteration will be too large, and the width s of the main auxiliary graphic 210 will be reduced too much each time. This may result in the final width s of the main auxiliary graphic 210 being too small, which may lead to insufficient supplementary lighting of the main auxiliary graphic 210 to the adjacent main graphic 100. At the same time, it may also lead to the final first distance t0 being too large than the minimum distance i between the adjacent main graphic 100 and the auxiliary graphic 200, resulting in unnecessary waste of space in the layout layer 100a. If the first preset size is too small, the step size of the loop iteration will be too small, and the width s of the main auxiliary graphic 210 will be reduced too little each time. This may result in too many loop iterations, increasing the time for adding the auxiliary graphic 200 and increasing unnecessary time and computational costs. Therefore, in this embodiment, the first preset size is 0.2nm to 2nm. For example, the first preset size is 0.6nm, 1nm, or 1.5nm.
[0079] In this embodiment, when the first distance t0 is greater than or equal to the minimum distance i between adjacent main graphics 100 and auxiliary graphics 200, the step of placing a main auxiliary graphic 210 between adjacent feasible edges 120 is completed.
[0080] When the first distance t0 is greater than or equal to the minimum distance i between the adjacent main graphic 100 and the auxiliary graphic 200, the first distance t0 satisfies the MRC condition, and the width of the main auxiliary graphic 210 is the second dimension b, which also satisfies the MRC condition. Therefore, the step of placing a main auxiliary graphic 210 between adjacent feasible edges 120 is completed.
[0081] It should be noted that when the first distance t0 is greater than the first size a, although the first distance t0 is greater than the optimal spacing between the main auxiliary pattern 210 and the main pattern 100, in order to prevent the main auxiliary pattern 210 from being exposed, the width s of the main auxiliary pattern 210 should be less than or equal to the resolution of the photolithography process. Therefore, the width s of the main auxiliary pattern 210 should not be too large, and the width s of the main auxiliary pattern 210 is the optimal size of the second size b, which is sufficient to supplement the light of the main pattern 100, improve the light intensity contrast, and improve the photolithography process window. Thus, when the first distance t0 is greater than the first size a, the step of placing a main auxiliary pattern 210 between adjacent feasible edges 120 is still completed.
[0082] Reference Figure 6 and Figure 7 The step of placing two main auxiliary graphics 210 between adjacent feasible edges 120 includes: determining whether the distance d0 between adjacent feasible edges 120 is less than the second distance, wherein the second distance is the sum of twice the first size a, twice the second size b, and the minimum distance k between adjacent auxiliary graphics 200.
[0083] The second spacing is the classification criterion for whether two main and auxiliary graphics 210 placed between adjacent feasible edges 120 can be placed in the optimal position.
[0084] It should be noted that for adjacent feasible edges 120, the condition for optimal placement of the main auxiliary graphic 210 on the side of one feasible edge 120 is that the distance between the main auxiliary graphic 210 and the feasible edge 120 is greater than or equal to b; the condition for optimal placement of the main auxiliary graphic 210 on the side of the other feasible edge 120 is also that the distance between the main auxiliary graphic 210 and the feasible edge 120 is greater than or equal to b, and the optimal width of the main auxiliary graphic 210 that can be placed is a. The condition for placing two main auxiliary graphics 210 simultaneously also includes that the distance between two adjacent main auxiliary graphics 210 is k. In other words, two optimal main auxiliary graphics 210 can be placed in the optimal position. The minimum spacing between the main auxiliary graphic 210 is the sum of twice the first dimension a, twice the second dimension b, and the minimum spacing k between adjacent auxiliary graphics 200. Therefore, for adjacent feasible edges 120, when the spacing d0 between adjacent feasible edges 120 is greater than or equal to 2a+2b+k, two main auxiliary graphics 210 of optimal width can be placed between adjacent feasible edges 120. When the spacing d0 between adjacent feasible edges 120 is less than 2a+2b+k, the placement position of the main auxiliary graphic 210 or the width s of the main auxiliary graphic 210 needs to be adjusted between adjacent feasible edges 120, that is, the second spacing is 2a+2b+k.
[0085] Specifically, refer to Figure 6 When the distance d0 between adjacent feasible edges 120 is less than the second distance, a main auxiliary graphic 210 is placed on each side of the midline 10z between adjacent feasible edges 120. The distance between the two main auxiliary graphics 210 is the minimum distance k between adjacent auxiliary graphics 200, and the distances between the two main auxiliary graphics 210 and the midline 10z are equal. The width s of the main auxiliary graphic 210 is the second dimension b. The width s of the main auxiliary graphic 210 includes the widths s1 and s2 of the two main auxiliary graphics 210.
[0086] A main auxiliary graphic 210 is placed on each side of the centerline 10z between adjacent feasible edges 120, and the distances between the two main auxiliary graphics 210 and the centerline 10z are equal. Then the distances t1 and t2 between the main auxiliary graphic 210 and the adjacent feasible edges 120 are equal, so that the spacing between the adjacent feasible edges 120 and the main auxiliary graphic 210 is equal. The widths s1 and s2 of the main auxiliary graphic 210 are both the second dimension b, so the width s is set to the optimal width when setting the main auxiliary graphic 210.
[0087] The width s of the main auxiliary graphic 210 has a significant impact on the supplementary lighting effect of the adjacent main graphic 210. Therefore, for the width s of the main auxiliary graphic 210 and the distance between the main auxiliary graphic 210 and the adjacent feasible edge 120, the width s of the main auxiliary graphic 210 should be prioritized to be optimal, i.e., the second dimension b.
[0088] In this embodiment, the distance between the main auxiliary graphic 210 and the adjacent feasible edge 120 is obtained as the second distance T0.
[0089] Obtain the second distance T0, which will serve as the basis for whether to adjust the main and auxiliary graphics 210 subsequently.
[0090] In this embodiment, it is determined whether the second distance T0 is greater than or equal to the minimum distance i between the adjacent main graphic 100 and the auxiliary graphic 200.
[0091] Specifically, when the second distance T0 is less than the minimum distance i between the adjacent main graphic 100 and the auxiliary graphic 200, the widths s1 and s2 of the two main and auxiliary graphics 210 are reduced at the same time, and the process returns to obtain the distance between the main and auxiliary graphics 210 and the adjacent feasible edge 120.
[0092] When the second distance T0 is less than the minimum distance i between the adjacent main graphic 100 and the auxiliary graphic 200, the second distance T0 does not satisfy the MRC condition. Therefore, the widths s1 and s2 of the two main and auxiliary graphics 210 are reduced simultaneously, and the reduction is made from both sides of each main and auxiliary graphic 210 towards the middle, so that the main and auxiliary graphics 210 always maintains the same distance from the adjacent feasible edges 120 on both sides, and the second distance T0 on both sides of the main and auxiliary graphics 210 is increased at the same time, so that the second distance T0 satisfies the MRC condition.
[0093] In this embodiment, in the step of simultaneously reducing the widths s1 and s2 of the two main auxiliary graphics 210, the width of the two main auxiliary graphics 210 is reduced by a second preset size each time.
[0094] In the step of simultaneously reducing the widths s1 and s2 of the two main auxiliary graphics 210, the same size is reduced for each main auxiliary graphics 210, so that the widths s1 and s2 of the two main auxiliary graphics 210 decrease uniformly and regularly. This unifies the algorithm for reducing the widths s1 and s2 of the two main auxiliary graphics 210 each time, simplifies the method of iteratively adjusting the widths s of the main auxiliary graphics 210, avoids the overly cumbersome and chaotic steps of adding auxiliary graphics 200, and is conducive to stably achieving the second distance T0 being greater than or equal to the minimum distance i between the adjacent main graphics 100 and the auxiliary graphics 200.
[0095] It should be noted that the second preset size should not be too large or too small. If the second preset size is too large, the step size of the loop iteration will be too large, and the widths s1 and s2 of the two main auxiliary graphics 210 will be reduced too much each time. This may result in the widths s1 and s2 of the two main auxiliary graphics 210 being too small, which may lead to insufficient supplementary lighting of the main auxiliary graphics 210 to the adjacent main graphics 100. At the same time, it may also result in the final second distance T0 being too large than the minimum distance i between the adjacent main graphics 100 and the auxiliary graphics 200, causing unnecessary waste of space in the layout layer 100a. If the second preset size is too small, the step size of the loop iteration will be too small, and the widths s1 and s2 of the two main auxiliary graphics 210 will be reduced too little each time. This may result in too many loop iterations, increasing the time for adding auxiliary graphics 200 and increasing unnecessary time and computational costs. Therefore, in this embodiment, the second preset size is 0.2nm to 2nm. For example, the second preset size is 0.6nm, 1nm, or 1.5nm.
[0096] In this embodiment, when the second distance T0 is greater than or equal to the minimum distance i between adjacent main graphics 100 and auxiliary graphics 200, the step of placing two main and auxiliary graphics 210 between adjacent feasible edges 120 is completed.
[0097] When the second distance T0 is greater than or equal to the minimum distance i between the adjacent main graphic 100 and the auxiliary graphic 200, the second distance T0 satisfies the MRC condition, and the width of the main and auxiliary graphic 210 is the second dimension b, which also satisfies the MRC condition. Therefore, the step of placing two main and auxiliary graphics 210 between adjacent feasible edges 120 is completed.
[0098] refer to Figure 7 When the distance d0 between adjacent feasible edges 120 is greater than or equal to the second distance, a main auxiliary graphic 210 adjacent to the corresponding feasible edge 120 is placed at a distance a from the first dimension a of any feasible edge 120, and the width s of the main auxiliary graphic 210 is the second dimension b.
[0099] When the distance d0 between adjacent feasible edges 120 is greater than or equal to the second distance, it is sufficient to place the main auxiliary graphic 210 of the optimal width at the optimal position between adjacent feasible edges 120. Therefore, at a distance a from any feasible edge 120 by the first dimension a, the main auxiliary graphic 210 adjacent to the corresponding feasible edge 120 is placed, and the width s of the main auxiliary graphic 210 is the second dimension b.
[0100] refer to Figure 8 When there is no adjacent main graphic 100 on the side of the feasible edge 120 of the main graphic 100, a main auxiliary graphic 210 is placed on the side of the feasible edge 120.
[0101] If there is no adjacent main graphic 100 on the side of the feasible edge 120 of the main graphic 100, then a main auxiliary graphic 210 can be placed on the side of the feasible edge 120.
[0102] In this embodiment, when there is no adjacent main graphic 100 on the side of the feasible edge 120 of the main graphic 100, in the step of placing a main auxiliary graphic 210 on the side of the feasible edge 120, the main auxiliary graphic 210 is placed at a distance of a first dimension a from the feasible edge 120, and the width of the main auxiliary graphic 210 is a second dimension b.
[0103] When there is no adjacent main graphic 100 on the side of the feasible edge 120 of the main graphic 100, it is sufficient to place the main auxiliary graphic 210 of the optimal width at the optimal position on the side of the feasible edge 120. Therefore, the main auxiliary graphic 210 is placed at a distance of the first dimension a from the feasible edge 120, and the width of the main auxiliary graphic 210 is the second dimension b.
[0104] Reference Figure 7 and Figure 8 ,like Figure 7 As shown, when the distance d0 between adjacent feasible edges 120 is greater than or equal to the third distance, or, as... Figure 8 As shown, when there is no adjacent main graphic 100 on the side of the feasible edge 120 of the main graphic 100, in the step of adding auxiliary graphic 200 on the side of the feasible edge 120 of the main graphic 100, after adding main auxiliary graphic 210 on the side of the feasible edge 120 of the main graphic 100 in sequence, it also includes: placing other auxiliary graphic 200 on the side of the main auxiliary graphic 210 away from the feasible edge 120, wherein the third spacing is the sum of twice the first size a, twice the second size b, twice the minimum spacing k of the adjacent auxiliary graphic, and the minimum width j of the auxiliary graphic, that is, the third spacing is equal to 2a+2b+2k+j.
[0105] It should be noted that the main auxiliary graphic 210 is the auxiliary graphic 200 that has the greatest impact on the main graphic 100. Therefore, other auxiliary graphics 200 should be placed only after ensuring that the main auxiliary graphic 210 is placed in the optimal position and has the optimal width.
[0106] Therefore, it should also be noted that for adjacent feasible edges 120, the condition for optimal placement of the main auxiliary graphic 210 on the side of one feasible edge 120 is: the distance between the main auxiliary graphic 210 and the feasible edge 120 is greater than or equal to b; the condition for optimal placement of the main auxiliary graphic 210 on the side of the other feasible edge 120 is also: the distance between the main auxiliary graphic 210 and the feasible edge 120 is greater than or equal to b, and the optimal width of the main auxiliary graphic 210 that can be placed is a. The conditions for placing three auxiliary graphics 200 simultaneously include: the distance between two adjacent auxiliary graphics 200... The spacing is k. The width of the third auxiliary graphic 200 should be greater than or equal to j. That is, the minimum spacing d0 for placing other auxiliary graphics 200 is: twice the first dimension a, twice the second dimension b, twice the minimum spacing k of the adjacent auxiliary graphics, and the minimum width j of the auxiliary graphics. Therefore, for adjacent feasible edges 120, when the spacing d0 of adjacent feasible edges 120 is greater than or equal to 2a+2b+2k+j, other auxiliary graphics 200 can be placed between adjacent feasible edges 120, that is, the third spacing is 2a+2b+2k+j.
[0107] When the distance d0 between adjacent feasible edges 120 is greater than or equal to the third distance, or when there is no adjacent main pattern 100 on the side of the feasible edge 120 of the main pattern 100, after placing the main auxiliary pattern 210 on the side of the feasible edge 120, there is still space to place other auxiliary patterns 200 to further supplement the main pattern 100 with light, reduce the imaging deviation caused by the different diffraction effects of different main patterns 100, improve the lithography quality of the main pattern 100, and thus improve the fidelity of the main pattern 100.
[0108] It should be noted that, in this embodiment, after adding auxiliary graphics 200 to the side of the feasible edge 120 of the main graphic 100, the method further includes: performing optical proximity correction processing on the main graphic 100.
[0109] In other embodiments, the main graphic may be optically near-adjacent before adding auxiliary graphics to the side of the feasible edge of the main graphic. That is, after optically near-adjacent is applied to the main graphic, auxiliary graphics are added to the side of the feasible edge of the main graphic.
[0110] Accordingly, the present invention also provides an optical proximity correction system. Figure 9 This is a functional block diagram of an embodiment of the optical proximity correction system of the present invention.
[0111] In this embodiment, the optical proximity correction system 50 includes: a graphic providing module 501 for providing a main graphic; a rule setting module 502 for setting a prohibition edge rule based on the spacing between adjacent main graphics; and an auxiliary graphic adding module 504 for adding auxiliary graphics to the side of the main graphic, wherein the number of auxiliary graphics added to the side of the main graphic is obtained based on the prohibition edge rule.
[0112] The graphics providing module 501 is used to provide the main graphics.
[0113] Specifically, the graphics providing module 501 includes: a plate layer providing unit for providing a plate layer, including a main graphic.
[0114] The main graphic in the template layer is the design graphic. The design graphic is the target graphic transferred onto the wafer. After optical proximity correction processing is performed on the design graphic, the resulting graphic is used to create a photomask. The photomask is then used for photolithography to form the corresponding mask pattern on the wafer.
[0115] In this embodiment, the layout layer includes layout layers applied to logic devices and SRAM devices.
[0116] In the layout layer of logic devices, the distribution of the main pattern is relatively random, while in the layout layer of SRAM devices, the distribution of the main pattern is relatively regular. Therefore, in optical proximity correction processing, when using sub-resolution auxiliary pattern technology to improve the lithographic quality of the main pattern of the device across the entire area, defects such as missing auxiliary patterns around the main pattern or incorrect placement of auxiliary patterns are more likely to occur. Therefore, in this embodiment, a strategy of setting the priority for adding auxiliary patterns is subsequently used to add auxiliary patterns to the layout layer. This is particularly beneficial for accurately adding auxiliary patterns to the layout layers of both logic devices and SRAM devices simultaneously, thereby improving the processing results of optical proximity correction processing.
[0117] In this embodiment, the plate layer includes a hole graphic, which is usually square in shape. Correspondingly, in this embodiment, the main graphic in the plate layer includes a hole graphic, which is square in shape.
[0118] In this embodiment, the hole pattern includes a contact hole pattern or an interconnecting through-hole pattern.
[0119] Contact hole patterns are used to form contact holes on the wafer, and contact holes are used to form contact hole plugs. Interconnect via patterns are used to form interconnect vias on the wafer, and interconnect vias are used to form interconnect via structures. Typically, the distribution of contact hole patterns or interconnect via patterns in the lithography layer is relatively random, and isolated (ISO) patterns are prone to appear. For the main pattern that is an ISO pattern, it is especially necessary to have surrounding auxiliary patterns to provide illumination and improve the photolithography quality of the contact hole patterns or interconnect via patterns.
[0120] The rule-making module 502 includes: a spacing measurement unit, used to obtain the spacing d between adjacent main graphics, and select the edge of any main graphic whose spacing d with another adjacent main graphic is less than the minimum spacing between which auxiliary graphics can be placed as a prohibited edge, and the remaining edges as feasible edges. The minimum spacing between which auxiliary graphics can be placed is the minimum width j of the auxiliary graphic and twice the minimum spacing i between the adjacent main graphic and the auxiliary graphic.
[0121] In the optical proximity correction process, sub-resolution auxiliary patterning technology is used to improve the lithographic resolution. By adding sub-resolution auxiliary patterns located around the main pattern in the plate layer, the imaging deviation caused by the different diffraction effects of different main patterns is reduced, the lithographic quality of the main pattern is improved, and thus the fidelity of the main pattern is improved.
[0122] For the strategy of placing auxiliary graphics in the plate layer, based on the mask manufacturability rule constraints, the minimum width j of the auxiliary graphics and the minimum spacing i between adjacent main graphics and auxiliary graphics are specified.
[0123] It should be noted that for adjacent main graphics, the condition for placing auxiliary graphics on the side of one main graphic is that the distance between the adjacent auxiliary graphics and the main graphic is greater than or equal to i; the condition for placing auxiliary graphics on the side of the other main graphic is also that the distance between the adjacent auxiliary graphics and the main graphic is greater than or equal to i, and the width of the auxiliary graphics that can be placed must be greater than or equal to j. In other words, the minimum spacing for placing auxiliary graphics is the sum of the minimum width j of the auxiliary graphics and twice the minimum spacing i between the adjacent main graphics and the auxiliary graphics. Therefore, for adjacent main graphics, auxiliary graphics can only be placed between adjacent main graphics when the distance d between adjacent main graphics is greater than or equal to 2i+j; when the distance d between adjacent main graphics is less than 2i+j, auxiliary graphics cannot be placed between adjacent main graphics.
[0124] In this embodiment, the edge in any main graphic whose distance d from another adjacent main graphic is less than the minimum distance for placing auxiliary graphics is selected as the prohibited edge. The prohibited edge is the edge on the side of the main graphic where no auxiliary graphics are placed. The remaining edge is the feasible edge, which is the edge on the side of the main graphic where auxiliary graphics are placed.
[0125] The rule-making module 502 also includes a quantity acquisition unit, used to acquire the number of feasible edges for each main graphic.
[0126] The number of feasible edges for each main graphic is used as a basis for determining the priority strategy for adding auxiliary graphics.
[0127] In this embodiment, before adding auxiliary graphics, the method further includes: obtaining the optimal distance between the main auxiliary graphic and the main graphic based on the experimental design data, as the first dimension a, and obtaining the optimal width of the auxiliary graphic, as the second dimension b.
[0128] Among them, the main auxiliary graph is the auxiliary graph that is closest to the feasible edge.
[0129] Different layout layers have different main graphics and different distributions of the main graphics. Therefore, before adding auxiliary graphics, it is necessary to conduct experiments on the environment in which the auxiliary graphics are added. Finally, based on the experimental design data, the optimal spacing between the main auxiliary graphics and the main graphics, as well as the optimal width of the auxiliary graphics, are obtained for the corresponding layout layer. This serves as the basis for adding auxiliary graphics to achieve the best effect.
[0130] The auxiliary graphic adding module 503 is also used to add auxiliary graphics to the side of the feasible edge of the main graphic in the plate layer. The auxiliary graphics include the main auxiliary graphic closest to the feasible edge. The main auxiliary graphics are added to the side of the feasible edge of the main graphic in order of increasing number of feasible edges of each main graphic.
[0131] In this embodiment, the long side of the auxiliary graphic faces the corresponding feasible side, which helps to avoid the problem of insufficient lighting for the main graphic.
[0132] In this embodiment, the main pattern is an exposing pattern, and the auxiliary pattern is an unexposing pattern. Therefore, the auxiliary pattern is a scattering bar, and the line width of the auxiliary pattern is greater than or equal to the minimum line width of the mask writing rule, and less than or equal to the resolution of the photolithography process, so that the auxiliary pattern can be written into the template, but will not be exposed.
[0133] Setting scattering strips around the main pattern helps improve light intensity contrast, reduce edge placement errors, and also helps increase the depth of focus, thereby improving the lithography process window.
[0134] In this embodiment, the order in which the number of feasible edges of the main graphic increases is the same as the order in which the number of forbidden edges of the main graphic decreases. The more forbidden edges the main graphic has, the more likely defects will occur during the photolithography process. In other words, the more likely the main graphic is to produce defects, the higher the priority of adding main auxiliary graphics to the main graphic. The main auxiliary graphics are the auxiliary graphics closest to the feasible edges, and thus the main auxiliary graphics have the greatest impact on the main graphic among the auxiliary graphics. Therefore, this embodiment first selects the main graphics that are prone to defects and prioritizes adding main auxiliary graphics to the main graphics that are prone to defects. This is to prevent the problem of missing main auxiliary graphics around the main graphics that are prone to defects or the main auxiliary graphics being added incorrectly after the entire plate layer has been completed with the addition of auxiliary graphics. This reduces the probability of needing to readjust the arrangement of auxiliary graphics after the entire plate layer has been completed with the addition of auxiliary graphics, thereby reducing the time for adding auxiliary graphics and improving the efficiency of adding auxiliary graphics. At the same time, it is also beneficial to reduce the probability of defects occurring in the subsequent photolithography process. All of the above are beneficial to improving the processing results of optical proximity correction.
[0135] In this embodiment, main and auxiliary graphs are added to the main graphs with the same number of feasible edges.
[0136] The environments around which main and auxiliary graphs are added are similar for main graphs with the same number of feasible edges. Therefore, the same strategy can be adopted to add main and auxiliary graphs at the same time, which is beneficial to improving the efficiency of adding auxiliary graphs.
[0137] In this embodiment, it is determined whether the feasible side of the main graphic has other adjacent feasible sides.
[0138] Determine whether the feasible side of the main graph has other adjacent feasible sides to classify different environments in which main and auxiliary graphs are added.
[0139] Specifically, when a feasible edge of the main graph has adjacent feasible edges, the spacing between the adjacent feasible edges is detected.
[0140] The distance d0 between adjacent feasible edges is detected and used to classify the number and position of main and auxiliary graphics placed between adjacent feasible edges.
[0141] It should be noted that if the adjacent edges of adjacent main figures are feasible edges, then the distance d between adjacent main figures is greater than or equal to 2i+j, and thus the distance d0 between adjacent feasible edges is greater than or equal to 2i+j.
[0142] Specifically, when the distance d0 between adjacent feasible edges is less than the first distance, a main auxiliary graphic is placed between adjacent feasible edges. When the distance d0 between adjacent feasible edges is greater than or equal to the first distance, two main auxiliary graphics are placed between adjacent feasible edges. The first distance is the sum of twice the minimum distance i between the adjacent auxiliary graphic and the main graphic, twice the minimum width j of the auxiliary graphic, and the minimum distance k between the adjacent auxiliary graphics. That is, the first distance is equal to 2i+2j+k.
[0143] For the strategy of placing auxiliary graphics in the plate layer, based on the MRC condition, the minimum spacing k between adjacent auxiliary graphics is also specified.
[0144] It should be noted that for adjacent feasible edges, the condition for placing a main auxiliary graphic on the side of one feasible edge is that the distance between the main auxiliary graphic and the feasible edge is greater than or equal to i; the condition for placing a main auxiliary graphic on the side of the other feasible edge is also that the distance between the main auxiliary graphic and the feasible edge is greater than or equal to i, and the width of the main auxiliary graphic that can be placed must be greater than or equal to j. Furthermore, the condition for placing two main auxiliary graphics also includes that the distance between the two adjacent main auxiliary graphics is k. In other words, the minimum distance between two main auxiliary graphics is the sum of twice the minimum distance i between the adjacent auxiliary graphic and the main graphic, twice the minimum width j of the auxiliary graphic, and the minimum distance k between the adjacent auxiliary graphics. Therefore, for adjacent feasible edges, two main auxiliary graphics can be placed between adjacent feasible edges only when the distance d0 between adjacent feasible edges is greater than or equal to 2i+2j+k; when the distance d0 between adjacent feasible edges is less than 2i+2j+k, only one main auxiliary graphic can be placed between adjacent feasible edges, i.e., the first distance is 2i+2j+k.
[0145] In this embodiment, during the step of placing the main auxiliary graphic between adjacent feasible edges, the spacing between adjacent feasible edges and the main auxiliary graphic is equal.
[0146] The equal spacing between adjacent feasible edges and main / auxiliary graphics ensures uniform illumination of adjacent main graphics, which improves the uniformity of photolithography quality in the main graphics within the plate layer. In particular, when the spacing between adjacent feasible edges is insufficient to place the main / auxiliary graphics in the optimal position, placing the main / auxiliary graphics at a distance equal to the feasible edge avoids conflicts that could arise from placing the main / auxiliary graphics in the optimal position for both adjacent feasible edges. This would require subsequent special cleanup of conflicting main / auxiliary graphics, potentially leading to missing or incorrectly placed main / auxiliary graphics around the main graphic.
[0147] Specifically, a primary auxiliary figure is placed between adjacent feasible edges. The distances t1 and t2 between the primary auxiliary figure and the adjacent feasible edges on both sides are equal. The width s of the primary auxiliary figure is the second dimension b.
[0148] The distances t1 and t2 between the main auxiliary graphic and the adjacent feasible edges on both sides are equal, so that the spacing between the adjacent feasible edges and the main auxiliary graphic is equal. The width s of the main auxiliary graphic is the second dimension b, so the width s is set to the optimal width when setting the main auxiliary graphic.
[0149] The width s of the main auxiliary graphic has a significant impact on the supplementary lighting effect of adjacent main graphics. Therefore, for the width s of the main auxiliary graphic and the spacing between the main auxiliary graphic and adjacent feasible edges, the width s of the main auxiliary graphic should be prioritized to be optimal, i.e., the second dimension b.
[0150] In this embodiment, the distance between the main auxiliary graph and the adjacent feasible edge is obtained as the first distance t0.
[0151] Obtain the first distance t0, which will serve as the basis for whether to adjust the main and auxiliary graphics in the future.
[0152] In this embodiment, it is determined whether the first distance t0 is greater than or equal to the minimum distance i between adjacent main graphics and auxiliary graphics.
[0153] Specifically, when the first distance t0 is less than the minimum distance i between the adjacent main graphic and the auxiliary graphic, the width s of the main and auxiliary graphics is reduced, and the process returns to obtain the distance between the main and auxiliary graphics and the adjacent feasible edges.
[0154] When the first distance t0 is less than the minimum distance i between the adjacent main and auxiliary graphics, the first distance t0 does not satisfy the MRC condition. Therefore, the width s of the main and auxiliary graphics is reduced, and the main and auxiliary graphics are simultaneously reduced from both sides towards the middle, so that the main and auxiliary graphics always maintain the same distance from the adjacent feasible edges on both sides, and the first distance t0 on both sides of the main and auxiliary graphics can be increased at the same time, so that the first distance t0 satisfies the MRC condition.
[0155] In this embodiment, in the step of reducing the width s of the main auxiliary graphic, the width of the first preset size is reduced each time.
[0156] In the step of reducing the width s of the main and auxiliary graphics, the same size is reduced each time, so that the width s of the main and auxiliary graphics decreases uniformly and regularly. This unifies the algorithm for reducing the width s of the main and auxiliary graphics each time, simplifies the method of iteratively adjusting the width s of the main and auxiliary graphics, avoids the steps of adding auxiliary graphics being too cumbersome and chaotic, and is conducive to stably achieving the first distance t0 being greater than or equal to the minimum distance i between adjacent main graphics and auxiliary graphics.
[0157] It should be noted that the first preset size should not be too large or too small. If the first preset size is too large, the step size of the loop iteration will be too large, and the width s of the main and auxiliary graphics will be reduced too much each time. This can easily lead to the final width s of the main and auxiliary graphics being too small, resulting in insufficient lighting for adjacent main graphics. It can also easily lead to the final first distance t0 being too large compared to the minimum distance i between adjacent main graphics and auxiliary graphics, causing unnecessary waste of layout space. If the first preset size is too small, the step size of the loop iteration will be too small, and the width s of the main and auxiliary graphics will be reduced too little each time. This can easily lead to too many loop iterations, increasing the time for adding auxiliary graphics and increasing unnecessary time and computational costs. Therefore, in this embodiment, the first preset size is 0.2nm to 2nm. For example, the first preset size is 0.6nm, 1nm, or 1.5nm.
[0158] In this embodiment, when the first distance t0 is greater than or equal to the minimum spacing i between adjacent main graphics and auxiliary graphics, the placement of a main and auxiliary graphics between adjacent feasible edges is completed.
[0159] When the first distance t0 is greater than or equal to the minimum spacing i between adjacent main and auxiliary figures, the first distance t0 satisfies the MRC condition, and the width of the main and auxiliary figures is the second dimension b, which also satisfies the MRC condition. Therefore, the placement of a main and auxiliary figure between adjacent feasible edges is completed.
[0160] It should be noted that when the first distance t0 is greater than the first size a, although the first distance t0 is greater than the optimal spacing between the main auxiliary pattern and the main pattern, in order to prevent the main auxiliary pattern from being exposed, the width s of the main auxiliary pattern should be less than or equal to the resolution of the photolithography process. Therefore, the width s of the main auxiliary pattern should not be too large. The width s of the main auxiliary pattern is the second size b, which is already the optimal size and is sufficient to supplement the light of the main pattern, improve the light intensity contrast, and improve the photolithography process window. Thus, when the first distance t0 is greater than the first size a, it is still possible to place a main auxiliary pattern between adjacent feasible edges.
[0161] In this embodiment, it is determined whether the distance d0 between adjacent feasible edges is less than the second distance, wherein the second distance is the sum of twice the first size a, twice the second size b, and the minimum distance k between adjacent auxiliary graphics.
[0162] The second spacing is the classification criterion for whether two main and auxiliary graphs placed between adjacent feasible edges can be placed in the optimal position.
[0163] It should be noted that for adjacent feasible edges, the condition for optimal placement of the main auxiliary graphic on the side of one feasible edge is that the distance between the main auxiliary graphic and the feasible edge is greater than or equal to b; the condition for optimal placement of the main auxiliary graphic on the side of the other feasible edge is also that the distance between the main auxiliary graphic and the feasible edge is greater than or equal to b, and the optimal width of the main auxiliary graphic that can be placed is a. The condition for placing two main auxiliary graphics also includes that the distance between the two adjacent main auxiliary graphics is k. That is to say, the minimum distance between two main auxiliary graphics of optimal width that can be optimally placed is the sum of twice the first dimension a, twice the second dimension b, and the minimum distance k between adjacent auxiliary graphics. Therefore, for adjacent feasible edges, when the distance d0 between adjacent feasible edges is greater than or equal to 2a+2b+k, two main auxiliary graphics of optimal width can be optimally placed between adjacent feasible edges; when the distance d0 between adjacent feasible edges is less than 2a+2b+k, the placement position or width s of the main auxiliary graphics between adjacent feasible edges needs to be adjusted, that is, the second distance is 2a+2b+k.
[0164] Specifically, when the distance d0 between adjacent feasible edges is less than the second distance, a main auxiliary figure is placed on each side of the midline between the adjacent feasible edges. The distance between the two main auxiliary figures is the minimum distance k between adjacent auxiliary figures, and the distances between the two main auxiliary figures and the midline are equal. The width s of the main auxiliary figure is the second dimension b. The width s of the main auxiliary figure includes the widths s1 and s2 of the two main auxiliary figures.
[0165] Place a main auxiliary graphic on each side of the midline between adjacent feasible edges, and ensure that the distances between the two main auxiliary graphics and the midline are equal. Then, the distances t1 and t2 between the main auxiliary graphics and the adjacent feasible edges on both sides are equal, thus making the spacing between adjacent feasible edges and the main auxiliary graphics equal. The widths s1 and s2 of the main auxiliary graphics are both the second dimension b, so that the width s is set to the optimal width when setting the main auxiliary graphics.
[0166] The width s of the main auxiliary graphic has a significant impact on the supplementary lighting effect of adjacent main graphics. Therefore, for the width s of the main auxiliary graphic and the spacing between the main auxiliary graphic and adjacent feasible edges, the width s of the main auxiliary graphic should be prioritized to be optimal, i.e., the second dimension b.
[0167] In this embodiment, the distance between the main auxiliary graphic and the adjacent feasible edge is obtained as the second distance T0.
[0168] Obtain the second distance T0, which will serve as the basis for whether to adjust the main and auxiliary graphics in the future.
[0169] In this embodiment, it is determined whether the second distance T0 is greater than or equal to the minimum distance i between adjacent main graphics and auxiliary graphics.
[0170] Specifically, when the second distance T0 is less than the minimum distance i between the adjacent main and auxiliary graphics, the widths s1 and s2 of the two main and auxiliary graphics are reduced simultaneously, and the process returns to obtain the distance between the main and auxiliary graphics and the adjacent feasible edges.
[0171] When the second distance T0 is less than the minimum distance i between the adjacent main and auxiliary figures, the second distance T0 does not satisfy the MRC condition. Therefore, the widths s1 and s2 of the two main and auxiliary figures are reduced simultaneously, and the reduction is made from both sides of each main and auxiliary figure towards the middle, so that the distance between the main and auxiliary figures and the adjacent feasible edges on both sides is always equal, and the second distance T0 on both sides of the main and auxiliary figures can be increased at the same time, so that the second distance T0 satisfies the MRC condition.
[0172] In this embodiment, the width of the second preset size is reduced for each of the two main and auxiliary graphics.
[0173] The two main and auxiliary graphics are reduced by the same size each time, so that the widths s1 and s2 of the two main and auxiliary graphics decrease uniformly and regularly. The algorithm for reducing the widths s1 and s2 of the two main and auxiliary graphics each time is unified, which simplifies the method of iteratively adjusting the widths s of the main and auxiliary graphics. This avoids the steps of adding auxiliary graphics being too cumbersome and chaotic, and is conducive to stably achieving the second distance T0 being greater than or equal to the minimum distance i between adjacent main and auxiliary graphics.
[0174] It should be noted that the second preset size should not be too large or too small. If the second preset size is too large, the step size of the loop iteration will be too large, and the widths s1 and s2 of the two main and auxiliary graphics will be reduced too much each time. This can easily lead to the final widths s1 and s2 of the two main and auxiliary graphics being too small, which may result in insufficient lighting of the main and auxiliary graphics on the adjacent main graphics. At the same time, it may also easily lead to the final second distance T0 being too large than the minimum distance i between the adjacent main graphics and the auxiliary graphics, resulting in unnecessary waste of layout space. If the second preset size is too small, the step size of the loop iteration will be too small, and the widths s1 and s2 of the two main and auxiliary graphics will be reduced too little each time. This can easily lead to too many loop iterations, increasing the time for adding auxiliary graphics and increasing unnecessary time and computational costs. Therefore, in this embodiment, the second preset size is 0.2nm to 2nm. For example, the second preset size is 0.6nm, 1nm, or 1.5nm.
[0175] In this embodiment, when the second distance T0 is greater than or equal to the minimum spacing i between adjacent main graphics and auxiliary graphics, the placement of two main and auxiliary graphics between adjacent feasible edges is completed.
[0176] When the second distance T0 is greater than or equal to the minimum spacing i between adjacent main and auxiliary figures, the second distance T0 satisfies the MRC condition, and the width of the main and auxiliary figures is the second dimension b, which also satisfies the MRC condition. Therefore, the placement of two main and auxiliary figures between adjacent feasible edges is completed.
[0177] In this embodiment, when the distance d0 between adjacent feasible edges is greater than or equal to the second distance, a main auxiliary graphic adjacent to the corresponding feasible edge is placed at a distance a from any feasible edge by a first dimension a, and the width s of the main auxiliary graphic is the second dimension b.
[0178] When the distance d0 between adjacent feasible edges is greater than or equal to the second distance, it is sufficient to place the main auxiliary graphic of the optimal width at the optimal position between adjacent feasible edges. Therefore, at a distance a from any feasible edge by the first dimension a, the main auxiliary graphic adjacent to the corresponding feasible edge is placed, and the width s of the main auxiliary graphic is the second dimension b.
[0179] In this embodiment, when there is no adjacent main graphic on the side of the feasible edge of the main graphic, a main auxiliary graphic is placed on the side of the feasible edge.
[0180] If there is no adjacent main figure on the side of a feasible edge of a main figure, then a main auxiliary figure can be placed on the side of the feasible edge.
[0181] In this embodiment, when there is no adjacent main graphic on the side of the feasible edge of the main graphic, in the step of placing a main auxiliary graphic on the side of the feasible edge, the main auxiliary graphic is placed at a distance of a first dimension a from the feasible edge, and the width of the main auxiliary graphic is a second dimension b.
[0182] When there is no adjacent main graphic on the side of a feasible edge of the main graphic, it is sufficient to place the main auxiliary graphic of the optimal width at the optimal position on the side of the feasible edge. Therefore, the main auxiliary graphic is placed at a distance of the first dimension a from the feasible edge, and the width of the main auxiliary graphic is the second dimension b.
[0183] In this embodiment, when the distance d0 between adjacent feasible edges is greater than or equal to the third distance, or when there is no adjacent main graphic on the side of the feasible edge of the main graphic, in the auxiliary graphic adding module 504, after adding main auxiliary graphics to the side of the feasible edge of the main graphic in sequence, it further includes: placing other auxiliary graphics on the side of the main auxiliary graphic away from the feasible edge, wherein the third distance is the sum of twice the first size a, twice the second size b, twice the minimum distance k between adjacent auxiliary graphics, and the minimum width j of the auxiliary graphics, that is, the third distance is equal to 2a+2b+2k+j.
[0184] It should be noted that the main auxiliary graphic is the auxiliary graphic that has the greatest impact on the main graphic. Therefore, other auxiliary graphics should only be placed after ensuring that the main auxiliary graphic is placed in the optimal position and has the optimal width.
[0185] Therefore, it should also be noted that for adjacent feasible edges, the condition for optimal placement of the main auxiliary graphic on the side of one feasible edge is that the distance between the main auxiliary graphic and the feasible edge is greater than or equal to b; the condition for optimal placement of the main auxiliary graphic on the side of another feasible edge is also that the distance between the main auxiliary graphic and the feasible edge is greater than or equal to b, and the optimal width of the main auxiliary graphic that can be placed is a. The conditions for placing three auxiliary graphics simultaneously include that the distance between two adjacent auxiliary graphics is k, and the width of the third auxiliary graphic should be greater than or equal to j. That is, the minimum spacing d0 that can be used to place other auxiliary graphics is the sum of twice the first dimension a, twice the second dimension b, twice the minimum spacing k of adjacent auxiliary graphics, and the minimum width j of the auxiliary graphics. Therefore, for adjacent feasible edges, when the spacing d0 of adjacent feasible edges is greater than or equal to 2a+2b+2k+j, other auxiliary graphics can be placed between adjacent feasible edges, that is, the third spacing is 2a+2b+2k+j.
[0186] When the distance d0 between adjacent feasible edges is greater than or equal to the third distance, or when there is no adjacent main pattern on the side of the feasible edge of the main pattern, after placing the main auxiliary pattern on the side of the feasible edge, there is still space to place other auxiliary patterns to further supplement the main pattern with light, reduce the imaging deviation caused by the different diffraction effects of different main patterns, improve the lithography quality of the main pattern, and thus improve the fidelity of the main pattern.
[0187] It should be noted that in this embodiment, after adding auxiliary graphics to the side of the feasible edge of the main graphic, the method further includes: performing optical proximity correction processing on the main graphic.
[0188] In other embodiments, the main graphic may be optically near-adjacent before adding auxiliary graphics to the side of the feasible edge of the main graphic. That is, after optically near-adjacent is applied to the main graphic, auxiliary graphics are added to the side of the feasible edge of the main graphic.
[0189] Accordingly, the present invention also provides a photomask, comprising: a pattern obtained using the optical proximity correction method provided in the embodiments of the present invention.
[0190] As can be seen from the foregoing embodiments, the auxiliary pattern is usually a sub-resolution auxiliary pattern, that is, the auxiliary pattern is an unexposed pattern. By adding auxiliary patterns around the main pattern, the imaging deviation caused by the different diffraction effects of different main patterns is reduced, thereby improving the fidelity of the pattern and the lithographic quality of the main pattern. Moreover, in this embodiment, a forbidden edge rule is set, and the number of auxiliary patterns added to the side of the main pattern is obtained based on the forbidden edge rule. The auxiliary patterns can be added according to the actual environmental conditions around the main pattern, thereby improving the processing result of the optical proximity correction process.
[0191] In the optional scheme, the order in which the number of feasible edges of the main graphic increases is the same as the order in which the number of forbidden edges of the main graphic decreases. The more forbidden edges of the main graphic, the more likely defects are to occur during photolithography. In other words, the more likely the main graphic is to produce defects, the higher the priority of adding main auxiliary graphics to the main graphic. The main auxiliary graphics are the auxiliary graphics closest to the feasible edges, and thus the main auxiliary graphics have the greatest impact on the main graphic among the auxiliary graphics. Therefore, in this embodiment of the invention, the main graphic that is prone to defects is first selected, and the main auxiliary graphics are added to the main graphic that is prone to defects in a priority manner. This allows for the targeted placement of appropriate main auxiliary graphics on the side of the main graphic that is prone to defects, in order to prevent the problem of missing main auxiliary graphics or incorrect addition of main auxiliary graphics around the main graphic that is prone to defects after the overall addition of auxiliary graphics to the plate layer. This reduces the probability of needing to readjust the arrangement of auxiliary graphics after the overall addition of auxiliary graphics to the plate layer, thereby reducing the time for adding auxiliary graphics and improving the efficiency of adding auxiliary graphics. At the same time, it also helps to reduce the probability of defects occurring in subsequent photolithography processes. All of the above are beneficial to improving the processing results of the optical proximity correction process.
[0192] This invention also provides a device that can implement the optical proximity correction method provided in this invention by loading a program, as described above. An optional hardware structure of the terminal device provided in this invention can be as follows: Figure 10 As shown, it includes: at least one processor 01, at least one communication interface 02, at least one memory 03, and at least one communication bus 04.
[0193] In this embodiment, the number of processor 01, communication interface 02, memory 03, and communication bus 04 is at least one, and the processor 01, communication interface 02, and memory 03 communicate with each other through communication bus 04. Communication interface 02 can be an interface of a communication module for network communication, such as the interface of a GSM module. Processor 01 may be a central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more integrated circuits configured to implement embodiments of the present invention. Memory 03 may include high-speed RAM and may also include non-volatile memory (NVM), such as at least one disk storage device. Memory 03 stores one or more computer instructions, which are executed by processor 01 to implement the optical proximity correction method provided in this embodiment of the present invention.
[0194] It should be noted that the aforementioned terminal device may also include other devices (not shown) that may not be essential to understanding the content disclosed in the embodiments of the present invention; given that these other devices may not be essential for understanding the content disclosed in the embodiments of the present invention, the embodiments of the present invention will not describe them one by one.
[0195] This invention also provides a storage medium storing one or more computer instructions for implementing the optical proximity correction method provided in this invention.
[0196] In the optical proximity correction method provided in this embodiment of the invention, the auxiliary pattern is usually a sub-resolution auxiliary pattern, that is, the auxiliary pattern is an unexposed pattern. By adding auxiliary patterns around the main pattern, the imaging deviation caused by the different diffraction effects of different main patterns is reduced, thereby improving the fidelity of the pattern and the lithographic quality of the main pattern. Moreover, in this embodiment, a forbidden edge rule is set, and the number of auxiliary patterns added to the side of the main pattern is obtained based on the forbidden edge rule. The auxiliary patterns can be added according to the actual environmental conditions around the main pattern, thereby improving the processing result of the optical proximity correction process.
[0197] In the optional scheme, the order in which the number of feasible edges of the main graphic increases is the same as the order in which the number of forbidden edges of the main graphic decreases. The more forbidden edges of the main graphic, the more likely defects are to occur during photolithography. In other words, the more likely the main graphic is to produce defects, the higher the priority of adding main auxiliary graphics to the main graphic. The main auxiliary graphics are the auxiliary graphics closest to the feasible edges, and thus the main auxiliary graphics have the greatest impact on the main graphic among the auxiliary graphics. Therefore, in this embodiment of the invention, the main graphic that is prone to defects is first selected, and the main auxiliary graphics are added to the main graphic that is prone to defects in a priority manner. This allows for the targeted placement of appropriate main auxiliary graphics on the side of the main graphic that is prone to defects, in order to prevent the problem of missing main auxiliary graphics or incorrect addition of main auxiliary graphics around the main graphic that is prone to defects after the overall addition of auxiliary graphics to the plate layer. This reduces the probability of needing to readjust the arrangement of auxiliary graphics after the overall addition of auxiliary graphics to the plate layer, thereby reducing the time for adding auxiliary graphics and improving the efficiency of adding auxiliary graphics. At the same time, it also helps to reduce the probability of defects occurring in subsequent photolithography processes. All of the above are beneficial to improving the processing results of the optical proximity correction process.
[0198] The embodiments of the present invention described above are combinations of elements and features of the present invention. Unless otherwise stated, the elements or features described are optional. Individual elements or features may be practiced without combination with other elements or features. Furthermore, embodiments of the present invention may be constructed by combining some elements and / or features. The order of operations described in the embodiments of the present invention may be rearranged. Some constructions of any embodiment may be included in another embodiment and may be replaced by corresponding constructions of another embodiment. It will be apparent to those skilled in the art that claims in the appended claims that are not expressly referenced to each other may be combined to form embodiments of the present invention, or may be included as new claims in amendments made after the filing of this application.
[0199] Embodiments of the present invention can be implemented by various means, such as hardware, firmware, software, or combinations thereof. In a hardware configuration, the method according to an exemplary embodiment of the present invention can be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), processors, controllers, microcontrollers, microprocessors, etc. In a firmware or software configuration, embodiments of the present invention can be implemented in the form of modules, processes, functions, etc. Software code can be stored in memory units and executed by a processor. The memory units are located inside or outside the processor and can send data to and receive data from the processor via various known means.
[0200] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is accorded the widest scope consistent with the principles and novel features disclosed herein.
[0201] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.
Claims
1. An optical proximity correction method characterized by, The method comprises the following steps: providing a main pattern; wherein, in the step of providing the main pattern, a layout layer is provided, and the layout layer comprises the main pattern; setting a forbidden edge rule according to the spacing between adjacent main patterns; wherein, in the step of setting the forbidden edge rule according to the spacing between adjacent main patterns, the spacing between adjacent main patterns is obtained, and any edge of a main pattern, which has a spacing smaller than the minimum spacing of a placeable auxiliary pattern, is selected as a forbidden edge, and the remaining edges are selected as feasible edges, wherein the minimum spacing of the placeable auxiliary pattern is the sum of the minimum width of the auxiliary pattern and twice the minimum spacing between the main pattern and the auxiliary pattern; the number of feasible edges of each main pattern is obtained; adding auxiliary patterns to the side of the main pattern, wherein the number of auxiliary patterns added to the side of the main pattern is obtained based on the forbidden edge rule; wherein, in the step of adding auxiliary patterns to the side of the main pattern, auxiliary patterns are added to the side of the feasible edges of the main pattern in the layout layer, and the auxiliary patterns comprise main auxiliary patterns closest to the feasible edges, wherein the main auxiliary patterns are sequentially added to the side of the feasible edges of the main pattern in an order of increasing number of feasible edges of each main pattern.
2. The optical proximity correction method of claim 1, wherein, In the step of sequentially adding the main auxiliary patterns to the side of the feasible edges of the main pattern in an order of increasing number of feasible edges of each main pattern, the main auxiliary patterns are simultaneously added to the main patterns with the same number of feasible edges.
3. The optical proximity correction method according to claim 1 or 2, wherein The step of sequentially adding the main auxiliary patterns to the side of the feasible edges of the main pattern comprises judging whether the side of the feasible edge of the main pattern has adjacent other feasible edges. When the feasible edge of the main pattern has adjacent feasible edges, the spacing between the adjacent feasible edges is detected. When the spacing between the adjacent feasible edges is smaller than a first spacing, one main auxiliary pattern is placed between the adjacent feasible edges, and when the spacing between the adjacent feasible edges is greater than or equal to the first spacing, two main auxiliary patterns are placed between the adjacent feasible edges, wherein the first spacing is the sum of twice the minimum spacing between the main pattern and the auxiliary pattern, twice the minimum width of the auxiliary pattern, and the minimum spacing between the adjacent auxiliary patterns. When the side of the feasible edge of the main pattern has no adjacent main pattern, one main auxiliary pattern is placed on the side of the feasible edge.
4. The optical proximity correction method of claim 3, wherein, Before adding the auxiliary patterns, the correction method further comprises: obtaining the optimal spacing between the main auxiliary pattern and the main pattern as a first size and obtaining the optimal width of the auxiliary pattern as a second size based on the data of the experimental design. In the step of placing one main auxiliary pattern on the side of the feasible edge of the main pattern when the side of the feasible edge of the main pattern has no adjacent main pattern, the main auxiliary pattern is placed at a distance of the first size from the feasible edge, and the width of the main auxiliary pattern is the second size.
5. The optical proximity correction method of claim 3, wherein, In the step of placing the main auxiliary pattern between the adjacent feasible edges, the spacing between the adjacent feasible edges and the main auxiliary pattern is equal. In the step of placing the main auxiliary pattern between the adjacent feasible edges, the spacing between the adjacent feasible edges and the main auxiliary pattern is equal.
6. The optical proximity correction method of claim 3, wherein, The correction method further comprises, before adding the auxiliary graph, obtaining an optimal distance between the main auxiliary graph and the main graph as a first size and an optimal width of the auxiliary graph as a second size based on data of an experimental design; The step of placing one main auxiliary graph between adjacent feasible edges comprises placing one main auxiliary graph between adjacent feasible edges, the main auxiliary graph being equal in distance to two sides of the adjacent feasible edges, and the width of the main auxiliary graph being the second size; The distance between the main auxiliary graph and the adjacent feasible edge is obtained as a first distance; It is judged whether the first distance is greater than or equal to the minimum distance between adjacent main graphs and auxiliary graphs; When the first distance is less than the minimum distance between adjacent main graphs and auxiliary graphs, the width of the main auxiliary graph is reduced, and the step of obtaining the distance between the main auxiliary graph and the adjacent feasible edge is executed again; When the first distance is greater than or equal to the minimum distance between adjacent main graphs and auxiliary graphs, the step of placing one main auxiliary graph between adjacent feasible edges is completed.
7. The optical proximity correction method of claim 6, wherein, In the step of reducing the width of the main auxiliary graph, the width of the first preset size is reduced each time.
8. The optical proximity correction method of claim 7, wherein, The first preset size is 0.2 nm to 2 nm.
9. The optical proximity correction method of claim 3, wherein, The correction method further comprises, before adding the auxiliary graph, obtaining an optimal distance between the main auxiliary graph and the main graph as a first size and an optimal width of the auxiliary graph as a second size based on data of an experimental design; The step of placing two main auxiliary graphs between adjacent feasible edges comprises judging whether the distance between adjacent feasible edges is less than a second distance, wherein the second distance is the sum of twice the first size, twice the second size, and the minimum distance between adjacent auxiliary graphs; When the distance between adjacent feasible edges is less than the second distance, one main auxiliary graph is placed on each side of the midline of the distance between adjacent feasible edges, the distance between the two main auxiliary graphs is the minimum distance between adjacent auxiliary graphs, and the distance between the two main auxiliary graphs and the midline is equal, and the width of the main auxiliary graph is the second size; The distance between the main auxiliary graph and the adjacent feasible edge is obtained as a second distance; It is judged whether the second distance is greater than or equal to the minimum distance between adjacent main graphs and auxiliary graphs; When the second distance is less than the minimum distance between adjacent main graphs and auxiliary graphs, the width of the two main auxiliary graphs is reduced simultaneously, and the step of obtaining the distance between the main auxiliary graph and the adjacent feasible edge is executed again; When the second distance is greater than or equal to the minimum distance between adjacent main graphs and auxiliary graphs, the step of placing two main auxiliary graphs between adjacent feasible edges is completed; When the distance between adjacent feasible edges is greater than or equal to the second distance, a main auxiliary graph adjacent to the corresponding feasible edge is placed at a distance of the first size from any feasible edge, and the width of the main auxiliary graph is the second size.
10. The optical proximity correction method of claim 9, wherein, In the step of simultaneously reducing the width of the two main auxiliary graphs, the width of the second preset size is reduced for both of the two main auxiliary graphs each time. In the step of simultaneously reducing the width of the two main auxiliary graphs, the width of the second preset size is reduced for both of the two main auxiliary graphs each time.
11. The optical proximity correction method of claim 10, wherein, The second preset width is 0.2nm to 2nm.
12. The optical proximity correction method of claim 3, wherein, Before adding the auxiliary pattern, the correction method further comprises: obtaining the optimal distance between the main and auxiliary patterns and the main pattern based on the data of the experimental design as a first size, and obtaining the optimal width of the auxiliary pattern as a second size; When the distance between adjacent feasible edges is greater than or equal to a third distance, or when the side of the feasible edge of the main pattern has no adjacent main pattern, the step of adding auxiliary patterns to the side of the feasible edge of the main pattern further comprises: sequentially adding the main auxiliary pattern to the side of the feasible edge of the main pattern, and then placing other auxiliary patterns away from the feasible edge on the side of the main auxiliary pattern, wherein the third distance is the sum of twice the first size, twice the second size, twice the minimum distance between adjacent auxiliary patterns, and the minimum width of the auxiliary pattern.
13. The optical proximity correction method of claim 1, wherein, In the step of adding auxiliary patterns to the side of the feasible edge of the main pattern, the auxiliary pattern comprises a scattering bar.
14. An optical proximity correction system, characterized by, Comprise: a pattern providing module for providing a main pattern; a rule setting module for setting a forbidden edge rule according to the distance between adjacent main patterns; an auxiliary pattern adding module for adding auxiliary patterns to the side of the main pattern, wherein the number of auxiliary patterns added to the side of the main pattern is obtained based on the forbidden edge rule; wherein the pattern providing module comprises: a layout layer providing unit for providing a layout layer comprising the main pattern; the rule setting module comprises: a distance measuring unit for obtaining the distance between adjacent main patterns, and selecting an edge in the main pattern having a distance less than a minimum distance between placeable auxiliary patterns from another adjacent main pattern as a forbidden edge, and the remaining edges as feasible edges, wherein the minimum distance between placeable auxiliary patterns is the sum of the minimum width of the auxiliary pattern and twice the minimum distance between adjacent main and auxiliary patterns; a number obtaining unit for obtaining the number of feasible edges of each main pattern; the auxiliary pattern adding module is further used for adding auxiliary patterns to the side of the feasible edge of the main pattern in the layout layer, and the auxiliary pattern comprises a main auxiliary pattern closest to the feasible edge, wherein the main auxiliary pattern is sequentially added to the side of the feasible edge of the main pattern in an order of increasing number of feasible edges of each main pattern.
15. A mask, characterized in that Comprise: a pattern obtained by the optical proximity correction method according to any one of claims 1-13.
16. An apparatus, comprising: Comprise at least one memory and at least one processor, the memory stores one or more computer instructions, wherein the one or more computer instructions are executed by the processor to implement the optical proximity correction method according to any one of claims 1-13.
17. A storage medium, characterized by The storage medium stores one or more computer instructions for implementing the optical proximity correction method according to any one of claims 1-13.
Citation Information
Patent Citations
Method for correcting pattern of mask for exposure
JP2001100390A
Method for forming an auxiliary pattern in a mask for a semiconductor device and a mask for a semiconductor device manufactured by using the method
KR1020090130895A