A drive control system, method, and storage medium

Abstract

This application discloses a drive control system, method, and storage medium, relating to the field of drive technology. A drive control system includes: a power module, comprising a power board, a signal acquisition module, and a motor; a first control module, comprising a first FPGA chip and an ARM chip, wherein the first FPGA chip defines a data processing task and sends the data processing task, data processing information, and data processing results, and the ARM chip receives the data processing results and outputs a drive signal to the power board; and a second control module, which processes the data processing information according to the data processing task to obtain the data processing results and sends them to the first FPGA chip. This application can distribute and process data generated during the drive process, ensuring data processing efficiency and significantly improving response speed.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of driving, in particular to a driving control system, method and storage medium. BACKGROUND

[0002] In the related art, in order to realize driving control of a power system, a corresponding driving scheme is usually designed to control it. If the power system is relatively complex, only setting a driving module to control cannot meet the demand of driving control. Because the driving control capability of the driving module has certain deficiency, when the feedback data of the driven object which needs to be processed is relatively complex, the processing capability is insufficient. Moreover, the more complex the power system is, the faster the response degree is required. If the requirement cannot be met, the production efficiency of the related equipment is difficult to improve. Therefore, the current industrial production puts forward higher requirements for the driving scheme. In summary, how to set the driving control system to meet the demand of high response degree has become a technical problem to be solved. SUMMARY

[0003] The present application aims to at least solve one of the technical problems in the prior art. To this end, the present application provides a driving control system, method and storage medium, which can distribute and process the data generated in the driving process, ensure the data processing efficiency, and improve the response degree.

[0004] The driving control system according to the first aspect of the present application comprises:

[0005] a power module, the power module comprising a power board, a signal acquisition module and a motor, the power board and the motor being electrically connected, the power board driving the motor, and the signal acquisition module acquiring position information of the motor;

[0006] a first control module, the first control module comprising a first FPGA chip and an ARM chip, the ARM chip being electrically connected with the power board and the first FPGA chip respectively, and the first FPGA chip being electrically connected with the signal acquisition module; the first FPGA chip formulating a data processing task of vector control through the position information, and sending the data processing task, data processing information corresponding to the data processing task and data processing result corresponding to the data processing task, the ARM chip receiving the data processing result, and outputting a driving signal to the power board according to the data processing result;

[0007] A second control module receives the data processing task and the data processing information, and processes the data processing information according to the data processing task to obtain the data processing result and sends the data processing result to the first FPGA chip.

[0008] According to the driving control system, the power module is used as the drive, the first control module controls the drive, the first FPGA chip in the first control module distributes and processes the corresponding task and the related data when the position information obtained in the driving process needs to be processed, the second control module processes the distributed data processing information, a motion control data processing result is obtained, the ARM chip controls the power board according to the data processing result, and finally the motor is quickly controlled. Therefore, the driving control system can distribute and process the data generated in the driving process, ensures the data processing efficiency, and improves the response degree.

[0009] According to some embodiments of the present application, the second control module includes a DSP chip and a second FPGA chip, the DSP chip and the second FPGA chip are electrically connected, the first FPGA chip is electrically connected with the DSP chip and the second FPGA chip respectively, the DSP chip and the second FPGA chip process the data processing information according to the data processing task, and the first FPGA chip sends the data processing task and the data processing information to the DSP chip and / or the second FPGA chip.

[0010] According to some embodiments of the present application, the driving control system is provided with a CAN master station module and a CAN slave station module, the DSP chip is provided with an SPI module, the SPI module is electrically connected with the CAN master station module, the CAN master station module is electrically connected with the CAN slave station module, and the DSP chip communicates through the SPI module, the CAN master station module and the CAN slave station module.

[0011] According to some embodiments of the present application, the CAN slave station module is provided with a function board and a slave station, the CAN master station module is electrically connected with the function board, the function board is electrically connected with the slave station, and the function board controls the slave station according to the data processing result processed by the DSP chip.

[0012] According to some embodiments of the present application, the second FPGA chip is provided with a first IO module, the driving control system is provided with an expansion board, and the second FPGA chip is electrically connected with the first IO module and the expansion board. The expansion board is electrically connected with an indicator light, an access control switch or a buzzer.

[0013] According to some embodiments of the present application, the second FPGA chip is provided with a second IO module, and the DSP chip is provided with a third IO module. The second IO module and the third IO module are electrically connected through a parallel bus.

[0014] According to some embodiments of the present application, the first FPGA chip is provided with a fourth IO module. The fourth IO module is electrically connected with the third IO module and the second IO module through a parallel bus, respectively.

[0015] According to some embodiments of the present application, the signal acquisition module comprises a grating ruler displacement sensor, and the motor is a linear motor. The grating ruler displacement sensor acquires position information of the linear motor.

[0016] According to the driving control method of the second aspect of the embodiments of the present application, the driving control method is applied to a driving control system. The driving control system comprises:

[0017] a power module, the power module comprising a power board, a signal acquisition module and a motor, the power board and the motor being electrically connected;

[0018] a first control module, the first control module comprising a first FPGA chip and an ARM chip, the ARM chip being electrically connected with the power board and the first FPGA chip, respectively, and the first FPGA chip being electrically connected with the signal acquisition module;

[0019] a second control module;

[0020] The driving control method comprises:

[0021] The first FPGA chip acquires position information of the motor collected by the signal acquisition module;

[0022] The first FPGA chip formulates a data processing task of vector control through the position information, and sends the data processing task and data processing information corresponding to the data processing task to the second control module;

[0023] The second control module receives the data processing task and the data processing information, and processes the data processing information according to the data processing task to obtain a data processing result;

[0024] The second control module sends the data processing result to the first FPGA chip;

[0025] The first FPGA chip receives the data processing result and sends the data processing result to the ARM chip;

[0026] The ARM chip receives the data processing result and outputs a drive signal to the power board according to the data processing result, so that the power board drives the motor.

[0027] According to a third aspect embodiment of the present application, a computer-readable storage medium stores computer-executable instructions that cause a computer to perform the drive control method as described in the second aspect embodiment.

[0028] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0029] The present application will be further described below with reference to the accompanying drawings and embodiments, wherein:

[0030] Figure 1 This is a connection diagram of a drive control system provided in one embodiment of this application;

[0031] Figure 2 This is a connection diagram of a drive control system provided in another embodiment of this application;

[0032] Figure 3 This is a schematic diagram of the drive control system provided in another embodiment of this application.

[0033] Figure label:

[0034] Power module 100, first control module 110, first FPGA chip 111, ARM chip 112, second control module 120, DSP chip 121, second FPGA chip 122, memory 200, processor 300. Detailed Implementation

[0035] The embodiments of this application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0036] It should be noted that although functional modules are divided in the system diagram and a logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the system or the order in the flowchart. The terminology in the specification, claims, and the foregoing figures is used to distinguish similar objects and is not necessarily used to describe a specific order or sequence.

[0037] In the description of this application, "several" means one or more, "multiple" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the stated number, while "above," "below," and "within" are understood to include the stated number. The use of "first" and "second" in the description is merely for distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.

[0038] In the description of this application, unless otherwise expressly defined, terms such as "setup," "installation," and "connection" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this application in conjunction with the specific content of the technical solution.

[0039] In the description of this application, the terms "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0040] Below, according to Figures 1-2 This application describes a drive control system according to an embodiment of the present application.

[0041] It is understandable that, such as Figures 1-2 As shown, a drive control system is provided, including:

[0042] The power module 100 includes a power board, a signal acquisition module, and a motor. The power board and the motor are electrically connected. The power board drives the motor, and the signal acquisition module acquires the position information of the motor.

[0043] The first control module 110 includes a first FPGA chip 111 and an ARM chip 112. The ARM chip 112 is electrically connected to the power board and the first FPGA chip 111, and the first FPGA chip 111 is electrically connected to the signal acquisition module. The first FPGA chip 111 formulates a vector control data processing task based on the position information and sends the data processing task, the corresponding data processing information, and the corresponding data processing result. The ARM chip 112 receives the data processing result and outputs a drive signal to the power board based on the data processing result.

[0044] The second control module 120 receives data processing tasks and data processing information, processes the data processing information according to the data processing tasks, obtains data processing results, and sends them to the first FPGA chip 111.

[0045] By configuring a power module 100, a first control module 110, and a second control module 120, with the power module 100 acting as the driver and the first control module 110 controlling the driver, when it is necessary to process the position information acquired during the driving process, the first FPGA chip 111 in the first control module 110 distributes the corresponding tasks and related data for processing. The second control module 120 processes the distributed data processing information to obtain a motion control data processing result, which in turn enables the ARM chip 112 to control the power board based on the data processing result, ultimately achieving the goal of rapid motor control. Therefore, the drive control system of this application can distribute and process the data generated during the driving process, ensuring data processing efficiency and significantly improving response speed.

[0046] It should be noted that the ARM chip 112 can output drive signals according to the SVPWM method.

[0047] It is understood that the second control module 120 includes a DSP chip 121 and a second FPGA chip 122. The DSP chip 121 and the second FPGA chip 122 are electrically connected. The first FPGA chip 111 is electrically connected to the DSP chip 121 and the second FPGA chip 122 respectively. Both the DSP chip 121 and the second FPGA chip 122 process data processing information according to the data processing task. The first FPGA chip 111 sends the data processing task and data processing information to the DSP chip 121 and / or the second FPGA chip 122.

[0048] It should be noted that, for data processing tasks, the first FPGA chip 111 can distribute the data to the DSP chip 121 and the second FPGA chip 122 simultaneously for processing as needed, or it can choose to process one of them.

[0049] It is understandable that the drive control system is equipped with a CAN master module and a CAN slave module, and the DSP chip 121 is equipped with an SPI module. The SPI module is electrically connected to the CAN master module, and the CAN master module is electrically connected to the CAN slave module. The DSP chip 121 communicates with the SPI module, the CAN master module, and the CAN slave module.

[0050] It should be noted that the DSP has a built-in SPI module, which can emit signals based on the SPI protocol. However, for remote data transmission, it needs to be converted by the CAN master module to obtain signals based on the CAN protocol and then sent to the CAN slave module.

[0051] It is understandable that the CAN slave module is equipped with a function board and a slave station. The CAN master module is electrically connected to the function board, and the function board is electrically connected to the slave station. The function board controls the slave station based on the data processing results obtained by the DSP chip 121.

[0052] It is understandable that the second FPGA chip 122 is equipped with a first IO module, and the drive control system is equipped with an expansion board. The second FPGA chip 122 is electrically connected to the expansion board through the first IO module, and the expansion board is electrically connected to indicator lights, access control switches, or buzzers.

[0053] It is understandable that the second FPGA chip 122 is equipped with a second I / O module, and the DSP chip 121 is equipped with a third I / O module. The second I / O module and the third I / O module are electrically connected through a parallel bus.

[0054] It is understandable that the first FPGA chip 111 is equipped with a fourth IO module, which is electrically connected to the third IO module and the second IO module respectively via a parallel bus.

[0055] Understandably, the signal acquisition module includes a grating ruler displacement sensor, and the motor is set as a linear motor. The grating ruler displacement sensor acquires the position information of the linear motor.

[0056] It should be noted that linear motors are high-precision special motors. In order to achieve accurate feedback of linear displacement, a grating ruler, also known as a grating ruler displacement sensor, needs to be installed. The grating ruler displacement sensor is a measurement feedback device that works using the optical principle of a grating. Its measurement output signal is a digital pulse, which has the characteristics of large detection range, high detection accuracy, and fast response speed.

[0057] It is understood that this application also provides a drive control method, which drives a control system, the drive control system comprising:

[0058] Power module 100 includes a power board, a signal acquisition module, and a motor, with the power board and motor electrically connected.

[0059] The first control module 110 includes a first FPGA chip 111 and an ARM chip 112. The ARM chip 112 is electrically connected to the power board and the first FPGA chip 111, and the first FPGA chip 111 is electrically connected to the signal acquisition module.

[0060] Second control module 120;

[0061] Drive control methods include:

[0062] The first FPGA chip 111 acquires the position information of the motor collected by the signal acquisition module;

[0063] The first FPGA chip 111 uses position information to define the data processing task for vector control and sends the data processing task and the corresponding data processing information to the second control module 120.

[0064] The second control module 120 receives data processing tasks and data processing information, and processes the data processing information according to the data processing tasks to obtain data processing results.

[0065] The second control module 120 sends the data processing results to the first FPGA chip 111;

[0066] The first FPGA chip 111 receives the data processing result and sends the data processing result to the ARM chip 112;

[0067] The ARM chip 112 receives the data processing results and outputs a drive signal to the power board based on the data processing results, so that the power board can drive the motor.

[0068] The following reference Figure 3 A drive control system according to an embodiment of this application is described.

[0069] It is understandable that, such as Figure 3 As shown, the drive control system includes:

[0070] At least one memory 200;

[0071] At least one processor 300;

[0072] At least one program;

[0073] The program is stored in memory 200, and processor 300 executes at least one program to implement the drive control method described above. Figure 3 Take a processor 300 as an example.

[0074] The processor 300 and the memory 200 can be connected via a bus or other means. Figure 3 Take a bus connection as an example.

[0075] The memory 200, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs, non-transitory computer-executable programs, and signals, such as the program instructions / signals corresponding to the drive control system in the embodiments of this application. The processor 300 executes various functional applications and data processing by running the non-transitory software programs, instructions, and signals stored in the memory 200, thereby implementing the drive control method of the above-described method embodiments.

[0076] The memory 200 may include a program storage area and a data storage area. The program storage area may store the operating system and application programs required for at least one function; the data storage area may store data related to the aforementioned drive control method. Furthermore, the memory 200 may include high-speed random access memory and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, the memory 200 may optionally include memory remotely located relative to the processor 300, and these remote memories can be connected to the drive control system via a network. Examples of such networks include, but are not limited to, the Internet of Things (IoT), software-defined networks, sensor networks, the Internet, enterprise intranets, local area networks (LANs), mobile communication networks, and combinations thereof.

[0077] One or more signals are stored in memory 200, and when executed by one or more processors 300, the drive control method in any of the above method embodiments is executed. For example, the drive control method described above is executed.

[0078] The following reference Figure 3 This application describes a computer-readable storage medium according to embodiments thereof.

[0079] like Figure 3 As shown, a computer-readable storage medium stores computer-executable instructions that are executed by one or more processors 300, for example, by... Figure 3 One or more processors 300 may execute the drive control method described in the above method embodiments. For example, the drive control method described above may be executed.

[0080] The system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0081] Based on the above description of the embodiments, those skilled in the art will understand that all or some of the steps and systems in the methods disclosed above can be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all physical components can be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, which can include computer storage media and communication media. As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital multifunction disk or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, it is known to those skilled in the art that communication media typically contain computer-readable signals, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and can include any information delivery medium.

[0082] The embodiments of this application have been described in detail above with reference to the accompanying drawings. However, this application is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of this application. Furthermore, unless otherwise specified, the embodiments and features described in the embodiments of this application can be combined with each other.

Claims

1. A drive control system characterized by comprising: The drive control system comprises: a power module, the power module comprising a power board, a signal acquisition module and a motor, the power board and the motor being electrically connected, the power board driving the motor, the signal acquisition module acquiring position information of the motor; a first control module, the first control module comprising a first FPGA chip and an ARM chip, the ARM chip being electrically connected with the power board and the first FPGA chip respectively, the first FPGA chip being electrically connected with the signal acquisition module; a second control module, the second control module comprising a DSP chip and a second FPGA chip, the DSP chip and the second FPGA chip being electrically connected, the first FPGA chip being electrically connected with the DSP chip and the second FPGA chip respectively; an expansion board; wherein the first FPGA chip is configured to formulate a data processing task of vector control according to the position information of the motor, and send the data processing task and data processing information corresponding to the data processing task to at least one of the DSP chip and the second FPGA chip; the DSP chip and the second FPGA chip are configured to process the data processing information according to the received data processing task, and send a data processing result obtained by processing to the first FPGA chip; the first FPGA chip is further configured to send the processing result to the ARM chip; the ARM chip is configured to output a driving signal to the power board according to the data processing result; wherein the second FPGA chip is provided with a first IO module and a second IO module, the DSP chip is provided with a third IO module, the second IO module and the third IO module are electrically connected through a parallel bus, and the second FPGA chip is electrically connected with the expansion board through the first IO module; wherein the drive control system is provided with a CAN master station module and a CAN slave station module, the DSP chip is provided with an SPI module, the SPI module is electrically connected with the CAN master station module, the CAN master station module is electrically connected with the CAN slave station module, and the DSP chip communicates through the SPI module, the CAN master station module and the CAN slave station module.

2. The drive control system according to claim 1, characterized by The CAN slave station module is provided with a function board and a slave station, the CAN master station module is electrically connected with the function board, the function board is electrically connected with the slave station, and the function board controls the slave station according to the data processing result obtained by processing of the DSP chip.

3. The drive control system according to claim 1, characterized by The expansion board is electrically connected with an indicator light, an access control switch or a buzzer.

4. The drive control system according to claim 1, characterized by The first FPGA chip is provided with a fourth IO module, the fourth IO module is electrically connected with the third IO module and the second IO module through a parallel bus respectively.

5. The drive control system according to claim 1, characterized by The signal acquisition module comprises a grating ruler displacement sensor, the motor is a linear motor, and the grating ruler displacement sensor acquires position information of the linear motor.

6. A drive control method characterized by, The drive control method is applied to the drive control system as claimed in any one of claims 1 to 5, and the drive control method comprises: The first FPGA chip acquires position information of the motor collected by the signal acquisition module; The first FPGA chip formulates a data processing task of vector control through the position information, and sends the data processing task and data processing information corresponding to the data processing task to at least one of the DSP chip and the second FPGA chip; The DSP chip and the second FPGA receive the data processing task and the data processing information, and process the data processing information according to the data processing task to obtain a data processing result; The DSP chip and the second FPGA send the corresponding data processing result to the first FPGA chip; The first FPGA chip receives the data processing result and sends the data processing result to the ARM chip; The ARM chip receives the data processing result and outputs a driving signal to the power board according to the data processing result, so that the power board drives the motor.

7. A computer readable storage medium, characterized in that, The computer readable storage medium stores computer executable instructions, and the computer executable instructions make the computer execute the driving control method in claim 6.

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