A method and system for adjusting the grayscale of an EPD display

Abstract

The present invention provides a method and system for adjusting the display gray level of an EPD, which relates to the technical field of electronic paper module display. The method includes the following steps: Step S1: Adjust the duty cycles of the gate and the source through a preset control process; Step S2: In the powered-on state, obtain parameter status data and send the parameter status data. When the gate is at a high level, the circuit is conducted; Step S3: In the powered-on state, obtain the link for adjusting the duty cycle of the gate and the oe. When each length of the waveform is completed, the duty cycle obtains the parameter status data again, and then completes one execution until the waveform ends and enters the stop state, waiting for the start of the next round of EPD. This method can make the display gray level of the EPD reach a high gray level.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic paper module display, and in particular, to a method and system for adjusting the display gray level of an EPD. Background Art

[0002] In EPD display, the gray levels displayed are usually below 16 gray levels. The specifications of black-and-white screens are usually 2 gray levels, 4 gray levels, or 16 gray levels. The main reason is that the opening time of the gate is too long, that is, the high-level time of CKV is too long. From the perspective of the refresh speed, it is only 200k, and the speed is not fast. Moreover, during the test, the high-level time of CKV cannot be too short. If it is too short, the picture will be unevenly displayed. Summary of the Invention

[0003] The problem solved by the present invention is how to make the display gray level of the EPD reach a high gray level.

[0004] To solve the above problems, the present invention provides a method for adjusting the display gray level of an EPD, including the steps of:

[0005] S1: Adjust the duty cycles of the gate and the source through a preset control process;

[0006] S2: In the powered-on state, obtain parameter status data and send the parameter status data. When the gate is at a high level, the circuit is turned on;

[0007] S3: In the powered-on state, obtain the link for adjusting the gate and oe with the duty cycle. When each length of waveform is completed, the parameter status data is re-obtained once with the duty cycle, and then an execution is completed until the waveform ends and enters the stop state, waiting for the next start of the EPD.

[0008] In the above method, in the control mode of adjusting the gate with the duty cycle, there is an additional link for adjusting the oe duty cycle in the source. Therefore, when each length of waveform is completed, the duty cycle needs to re-obtain the parameter status data once, and then complete an execution until the waveform ends and enters the stop state, waiting for the next start of the EPD.

[0009] The parameter status data in step S2 includes the duty cycle and the gate rate.

[0010] Further, the preset control process is to complete the control of the high-level time and the oe duty cycle by adjusting the duty cycle of the gate.

[0011] Further, it further includes the steps of:

[0012] S4: Output the data that enters the stop state in step S3 to the waveform display area for display.

[0013] A system for adjusting the display grayscale of an EPD, comprising:

[0014] Adjustment module: used to adjust the duty cycles of gate and oe through a preset control process;

[0015] First acquisition module: used to acquire parameter status data in the power-on state and send the parameter status data. When the gate is at a high level, the circuit is conductive;

[0016] Second acquisition module: used to acquire the link for adjusting the duty cycles of gate and oe in the power-on state. When each length of waveform is completed, the parameter status data is re-acquired once for the duty cycle, and then an execution is completed until the waveform ends and enters the stop state, waiting for the start of the next round of EPD.

[0017] Further, the parameter status data includes duty cycle and gate rate.

[0018] Further, the preset control process is to complete the control of the high-level time of the gate and the duty cycle of oe by adjusting the duty cycle of the gate.

[0019] Further, it further includes:

[0020] Output module: used to output the data that enters the stop state in the second acquisition module to the waveform display area for display.

[0021] The present invention adopts the above technical solutions and has the following beneficial effects:

[0022] The present invention uses the duty cycle adjustment of the gate and the duty cycle adjustment of oe in the source to achieve high grayscale for the EPD display. The starting method of the gate is that when a rising edge is detected, the conduction current is in the high-level time period of the gate. When the gate is at a high level, the circuit is conductive, and when the gate is at a low level, no current flows through. Similarly, it conducts when oe is at a high level and closes when oe is at a low level. Therefore, within one gate cycle, the control of the high-level time of the gate and the duty cycle of oe can be completed by adjusting the duty cycle of the gate, and at the same time, a smaller opening time can be obtained by controlling the time. Description of the Drawings

[0023] Figure 1 It is the method flow for adjusting the display grayscale of an EPD provided by Embodiment 1 of the present invention Figure 1 ;

[0024] Figure 2The method flow for adjusting the display gray scale of EPD provided in Embodiment 1 of the present invention Figure 2 ;

[0025] Figure 3 The waveform diagram of the display effect in the case of only the gate duty ratio state provided in Embodiment 1 of the present invention;

[0026] Figure 4 The waveform diagram of the display effect in the case of adjusting the duty ratio states of the gate and the source in the method for adjusting the display gray scale of EPD provided in Embodiment 1 of the present invention;

[0027] Figure 5 The simple diagram of the preset control process in the method for adjusting the display gray scale of EPD provided in Embodiment 1 of the present invention;

[0028] Figure 6 The system structure for adjusting the display gray scale of EPD provided in Embodiment 2 of the present invention Figure 1 ;

[0029] Figure 7 The system structure for adjusting the display gray scale of EPD provided in Embodiment 2 of the present invention Figure 2 。 Detailed implementation manners

[0030] To make the above objects, features and advantages of the present invention more obvious and understandable, the following detailed description of the specific embodiments of the present invention is provided in conjunction with the accompanying drawings.

[0031] The following are the specific embodiments of the present invention and in conjunction with the accompanying drawings, the technical solutions of the present invention are further described, but the present invention is not limited to these embodiments.

[0032] Embodiment 1

[0033] This embodiment provides a method for adjusting the display gray scale of EPD. As Figure 1 and Figure 2 shown, this method includes the steps:

[0034] S1: Adjust the duty ratios of the gate and the source through a preset control process;

[0035] S2: In the powered-on state, obtain parameter status data and send the parameter status data. When the gate is at a high level, the circuit is turned on;

[0036] S3: In the powered-on state, obtain the link for adjusting the gate and the oe with the duty ratio. When each length of waveform is completed, the parameter status data is re-obtained once for the duty ratio, and then one execution is completed until the waveform ends and enters the stop state, waiting for the start of the next round of EPD.

[0037] Refer to Figure 5 As shown, the preset control process adopted by the duty cycle adjustment gate is from the power-on state, start state, duty cycle of the parameter acquisition state, gate rate of the parameter acquisition state, data transmission state to the stop state. In the control mode of the duty cycle adjustment gate, there is an additional link to obtain the duty cycles of the gate and the source. Therefore, every time a length of waveform is completed, the duty cycle needs to be obtained again, and then executed once until the waveform ends and enters the stop state, waiting for the start of the next round of EPD. Among them, ① indicates that a waveform length is completed, and the duty cycle is returned, the gate rate is obtained, and data is sent. ② indicates that all waveform lengths are completed.

[0038] Refer to Figure 3 As shown, in the case of only the duty cycle of the gate, the waveform diagram of the display effect where oe is always 1, and the waveforms corresponding to the duty cycle adjustment gate for oe and the actual conduction of the pixel points.

[0039] Refer to Figure 4 As shown, the waveform diagram of the display effect of a high-gray-level waveform of one length, where the duty cycle of the gate can be changed and oe also has a duty cycle, so that it can be satisfied that the high-level duty cycle of the gate will not be very low to complete conduction. Oe also satisfies that the high-level time is long enough. However, the actual conduction time of a single pixel point is relatively small.

[0040] Refer to Figure 2 , where the parameter state data in step S2 includes the duty cycle and the gate rate.

[0041] Among them, the preset control process is to complete the control of the high-level time and the duty cycle of oe by adjusting the duty cycle of the gate.

[0042] Among them, it also includes the steps:

[0043] S4: Output the data entering the stop state in step S3 to the waveform display area for display.

[0044] Process the front-end image data into a gray-level image, and then store it in the ddr3. When the drive starts to run, read out the brightness value. According to the read brightness value, find a suitable waveform to complete the lighting.

[0045] This method uses the duty cycle adjustment of the gate and the duty cycle adjustment of oe in the source to achieve high gray levels in the EPD display. The starting method of the gate is that when a rising edge is detected, the conduction current is in the high-level time period of the gate. When the gate is at a high level, the circuit conducts, and when the gate is at a low level, no current flows. Similarly, it conducts when oe is at a high level and turns off when oe is at a low level. Therefore, within one gate cycle, by adjusting the duty cycle of the gate, the high-level time and the duty cycle of oe can be controlled, and a smaller opening time can be obtained by controlling the time simultaneously.

[0046] Embodiment 2

[0047] This embodiment provides a system for adjusting the display gray level of an EPD, as Figure 6 and Figure 7 shown, this system includes:

[0048] Adjustment module: used to adjust the duty cycles of the gate and oe through a preset control process;

[0049] First acquisition module: used to acquire parameter status data in the powered-on state and send the parameter status data. When the gate is at a high level, the circuit conducts;

[0050] Second acquisition module: used to acquire the links for adjusting the duty cycles of the gate and oe in the powered-on state. When each length of waveform is completed, the duty cycle re-acquires the parameter status data once, and then completes one execution until the waveform ends and enters the stop state, waiting for the start of the next round of EPD.

[0051] Among them, the parameter status data includes the duty cycle and the gate rate.

[0052] Among them, the preset control process is to control the high-level time and the duty cycle of oe by adjusting the duty cycle of the gate.

[0053] Refer to Figure 7 , and further includes:

[0054] Output module: used to output the data in the stop state in the second acquisition module to the waveform display area for display.

[0055] This system uses the duty cycle adjustment of the gate and the duty cycle adjustment of oe in the source to achieve high gray levels in the EPD display.

[0056] Although the present disclosure is disclosed as above, the scope of protection of the present disclosure is not limited thereto. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present disclosure, and these changes and modifications will all fall within the scope of protection of the present invention.

Claims

1. A method for adjusting the grayscale of an EPD display, characterized in that, Including steps: S1: Adjust the duty cycles of the gate and the source through a preset control process; S2: In the powered-on state, obtain parameter status data and send the parameter status data. When the gate is at a high level, the circuit is turned on; S3: In the powered-on state, obtain the link for adjusting the gate and oe with the duty cycle. When each length of waveform is completed, the duty cycle re-obtains the parameter status data once, and then completes one execution until the waveform ends and then enters the stop state, waiting for the start of the next round of EPD.

2. The method for adjusting the grayscale of EPD display according to claim 1, wherein The parameter status data in step S2 includes the duty cycle and the gate rate.

3. The method for adjusting the display gray scale of the EPD according to claim 1, wherein, The preset control process is to complete the control of the high-level time and the duty cycle of oe by adjusting the duty cycle of the gate.

4. The method for adjusting the grayscale of an EPD display according to claim 1, characterized in that, It also includes steps: S4: Output the data in the stop state in step S3 to the waveform display area for display.

5. A system for adjusting the grayscale of an EPD display, characterized in that, Including: Adjustment module: used to adjust the duty cycles of the gate and oe through a preset control process; First acquisition module: used to obtain parameter status data and send the parameter status data in the powered-on state. When the gate is at a high level, the circuit is turned on; Second acquisition module: used to obtain the link for adjusting the gate and oe with the duty cycle in the powered-on state. When each length of waveform is completed, the duty cycle re-obtains the parameter status data once, and then completes one execution until the waveform ends and then enters the stop state, waiting for the start of the next round of EPD.

6. The system for adjusting the grayscale of an EPD display according to claim 5, characterized in that, The parameter status data includes the duty cycle and the gate rate.

7. The system for adjusting the grayscale of an EPD display according to claim 5, wherein The preset control process is to complete the control of the high-level time and the duty cycle of oe by adjusting the duty cycle of the gate.

8. The system for adjusting the display gray level of the EPD according to claim 5, characterized in that, It also includes: Output module: used to output the data in the stop state of the second acquisition module to the waveform display area for display.

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