A self-monitoring circuit for charge pump

Abstract

The present invention belongs to the technical field of power integrated circuits, and specifically relates to a self-monitoring circuit for a charge pump. Since the charge pump external capacitor is directly connected between VCP and VM, if it is not restricted, the voltage value of VCP will rise to twice the voltage value of VM. The present invention realizes V-I-V conversion by monitoring the difference between VCP and VM, converting it into a corresponding current, and then outputting a voltage linearly related to the difference between VCP and VM through an adjustable resistor. By comparing the output voltage linearly related to VCP-VM with a reference voltage, the voltage of VCP can be controlled within a certain range, and the subsequent drive module is turned on after reaching the set value, which greatly increases the reliability and safety of the design.

Description

Technical Field

[0001] The invention belongs to the technical field of power integrated circuits, and in particular relates to a self-monitoring circuit for a charge pump. Background Art

[0002] When the high-side power tube in the H-bridge is turned on, the source voltage is close to the drain voltage, and its magnitude is approximately the external power supply voltage. At this time, in order to fully turn on the power tube, the charge pump circuit needs to generate a voltage higher than the external power supply so that the high-side power tube can continue to work. Due to the limitation of the process level, the charge pump cannot boost the voltage indefinitely, otherwise the gate-source voltage difference of the device in the subsequent circuit will exceed the withstand voltage value. Therefore, in the boost stage of the charge pump, a circuit is required to monitor the charge pump voltage and stop the charge pump when it reaches the set value; during the discharge process of the charge pump, the external extraction of charge reduces the charge pump output voltage. When it is lower than the monitoring set value, the charge pump resumes work to replenish the charge. Summary of the invention

[0003] In view of the above requirements, the present invention proposes a self-monitoring circuit for a charge pump, which can meet the driving requirements for different power tubes.

[0004] The technical solution of the present invention is:

[0005] A self-monitoring circuit for a charge pump, comprising a first Zener tube, a second Zener tube, a first resistor, a second resistor, a third resistor, a first PMOS tube, a second PMOS tube, a third PMOS tube, a fourth PMOS tube, a first NMOS tube, a second NMOS tube, a third NMOS tube, a fourth NMOS tube, a fifth NMOS tube, a first comparator, a second comparator, a first inverter, a second inverter, a third inverter, and a fourth inverter; a first port of the first resistor is connected to a bus voltage, and a second port is connected to a source of the first PMOS tube; the first PMOS tube The gate and drain of the S tube are connected to the anode of the first Zener tube, the gate of the second PMOS tube and the source of the third PMOS tube; the first port of the second resistor is connected to the output voltage of the charge pump, and the second port of the second resistor is connected to the cathode of the first Zener tube, the source of the second PMOS tube and the drain of the fifth NMOS tube; the drain of the second PMOS tube is connected to the cathode of the second Zener tube and the source of the fourth PMOS tube; the gate and drain of the third PMOS tube are connected to the anode of the second Zener tube, the gate of the fourth PMOS tube and the drain of the first NMOS tube; The gate of the first NMOS tube is connected to the gate of the second NMOS tube and to the power supply, and the source is connected to the drain of the third NMOS tube; the gate of the third NMOS tube is connected to the gate of the fourth NMOS tube and to the input bias voltage, and the source is connected to the ground; the drain of the second NMOS tube is connected to the drain of the fourth PMOS tube and to the gate of the fifth NMOS tube; the drain of the fourth NMOS tube is connected to the source of the second NMOS tube, and the source of the fourth NMOS tube is connected to the ground; the first port of the third resistor is connected to the source of the fifth NMOS tube and serves as the inverting terminal input of the first comparator and the second comparator, and the second port of the third resistor is connected to the ground; the first comparator non-inverting terminal is connected to the first reference voltage, and the output of the first comparator is obtained through the first inverter and the second inverter to obtain the first output signal; the second comparator non-inverting terminal is connected to the input second reference voltage, and the output is obtained through the third inverter and the fourth inverter to obtain the second output signal; the first output signal is used to control the charge pump to establish a voltage value for the normal operation of the subsequent drive circuit, and the second output signal is used to control the shutdown of the previous charge pump so that the output voltage value of the charge pump is kept within a set safety range.

[0006] The beneficial effect of the present invention is that when a single external power supply is used to charge the charge pump capacitor, the circuit can monitor the charge pump during the boost phase, so that the charge pump output is kept within a certain safety range, thereby improving chip reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 The present invention is a structural diagram of a self-monitoring circuit for a charge pump. DETAILED DESCRIPTION

[0008] The technical solution of the present invention is described below in conjunction with the accompanying drawings:

[0009] During the charge pump charging stage, the voltage of the VCP (output voltage) node will continue to rise. Since VCP is boosted based on VM (bus voltage), and VM is not a constant value, the voltage value of VCP cannot be monitored directly. Instead, their difference is used for sampling. The sampled voltage is converted into current and then into voltage, which is sent to the comparator for comparison with the reference voltage, thereby limiting the VCP voltage.

[0010] Figure 1 A self-monitoring circuit for a charge pump, the module comprising: a first Zener tube D1, a second Zener tube D2, a first resistor R1, a second resistor R2, a third resistor R3, a first PMOS tube MP1, a second PMOS tube MP2, a third PMOS tube MP3, a fourth PMOS tube MP4, a first NMOS tube MN1, a second NMOS tube MN2, a third NMOS tube MN3, a fourth NMOS tube MN4, a fifth NMOS tube MN5, a first comparator COMP1, a second comparator COMP2, a first inverter INV1, a second inverter INV2, a third inverter INV3, and a fourth inverter INV4.

[0011] The first port of the first resistor R1 is connected to the node VM, and the second port is connected to the source of the first PMOS tube MP1; the gate and drain of the first PMOS tube MP1 are connected and connected to the anode of the first Zener tube D1, the gate of the second PMOS tube MP2, and the source of the third PMOS tube MP3; the first port of the second resistor R2 is connected to the node VCP, the second port of the second resistor R2 is connected to the cathode of the first Zener tube D1 and the source of the second PMOS tube MP2, and the output is connected to the drain of the fifth NMOS tube MN5; the drain of the second PMOS tube MP2 is connected to the cathode of the second Zener tube D2 and the source of the fourth PMOS tube MP4; the gate and drain of the third PMOS tube MP3 are connected and connected to the anode of the second Zener tube D2, the gate of the fourth PMOS tube MP4, and the drain of the first NMOS tube MN1; the gate of the first NMOS tube MN1 is connected to the gate of the second NMOS tube MN2 and connected to the input voltage Vin (to control the following two high-voltage tube switches), and the source is connected to the third NMOS tube MN5. The drain of the S transistor MN3; the gate of the third NMOS transistor MN3 is connected to the gate of the fourth NMOS transistor MN4 and to the input bias voltage node Vbias, and the source is connected to the ground; the drain of the second NMOS transistor MN2 is connected to the drain of the fourth PMOS transistor MP4 and to the gate of the fifth NMOS transistor MN5; the drain of the fourth NMOS transistor MN4 is connected to the source of the second NMOS transistor MN2, and the source is connected to the ground; the first port of the third resistor R3 is connected to the source of the fifth NMOS transistor MN5 and serves as the inverting terminal input of the first comparator COMP1 and the second comparator COMP2, and the second port of the third resistor R3 is connected to the ground; the non-inverting terminal of the first comparator COMP1 is connected to the input reference voltage node VREF1, and the output is obtained through the first inverter INV1 and the second inverter INV2 to obtain the output OUT1 node; the non-inverting terminal of the second comparator COMP2 is connected to the input reference voltage node VREF2, and the output is obtained through the third inverter INV3 and the fourth inverter INV4 to obtain the output OUT2 node.

[0012] The working principle of the present invention is:

[0013] Since the external power supply VM has a certain working range, and VCP is boosted on the basis of VM, it is not possible to control the charge pump circuit to shut down by directly monitoring the voltage of VCP. Therefore, by monitoring the difference between VCP and VM, when the difference exceeds a certain range, the entire monitoring circuit shuts down the charge pump circuit. The fifth NMOS tube MN5 provides a negative feedback loop, and the four PMOS tubes are current mirror structures, so that the currents flowing through the two main loops remain consistent. When VCP is boosted, the extra current flows through the resistor R3 and generates a voltage drop on R3, which is linearly related to VCP-VM. Two reference voltages VREF1 and VREF2 with different values ​​are used as the input voltages of the in-phase terminals of comparators COMP1 and COMP2, and the voltage drop on R3 is sent to the inverting terminals of the two comparators. The power supply VCC of the two comparators is a low-voltage power supply, and the comparators all adopt a two-stage amplification structure to make the comparator flip more accurate. Through the output of the first comparator COMP1, the charge pump circuit has established a voltage value that can enable the subsequent drive circuit to work normally; through the output of the second comparator COMP2, the previous charge pump is controlled to be turned off, so that the voltage value of VCP is maintained within a certain safety range.

Claims

1. A self-monitoring circuit for a charge pump, characterized in that: It includes a first Zener tube, a second Zener tube, a first resistor, a second resistor, a third resistor, a first PMOS tube, a second PMOS tube, a third PMOS tube, a fourth PMOS tube, a first NMOS tube, a second NMOS tube, a third NMOS tube, a fourth NMOS tube, a fifth NMOS tube, a first comparator, a second comparator, a first inverter, a second inverter, a third inverter, and a fourth inverter; the first port of the first resistor is connected to the bus voltage, and the second port is connected to the source of the first PMOS tube; the gate and drain of the first PMOS tube are connected and connected to the anode of the first Zener tube, the gate of the second PMOS tube and the source of the third PMOS tube; The first port of the second resistor is connected to the output voltage of the charge pump, and the second port of the second resistor is connected to the cathode of the first Zener tube, the source of the second PMOS tube and the drain of the fifth NMOS tube; the drain of the second PMOS tube is connected to the cathode of the second Zener tube and the source of the fourth PMOS tube; the gate and drain of the third PMOS tube are connected and connected to the anode of the second Zener tube, the gate of the fourth PMOS tube and the drain of the first NMOS tube; the gate of the first NMOS tube is connected to the gate of the second NMOS tube and the power supply, and the source is connected to the drain of the third NMOS tube; the gate of the third NMOS tube is connected to the anode of the fourth NMOS tube, and the drain of the first NMOS tube. The gate of the MOS tube is connected to the input bias voltage, and the source is connected to the ground; the drain of the second NMOS tube is connected to the drain of the fourth PMOS tube and connected to the gate of the fifth NMOS tube; the drain of the fourth NMOS tube is connected to the source of the second NMOS tube, and the source of the fourth NMOS tube is connected to the ground; the first port of the third resistor is connected to the source of the fifth NMOS tube and serves as the inverting terminal input of the first comparator and the second comparator, and the second port of the third resistor is connected to the ground; the non-inverting terminal of the first comparator is connected to the first reference voltage, and the output of the first comparator is obtained through the first inverter and the second inverter to obtain the first output signal; The non-inverting terminal of the second comparator is connected to the input of the second reference voltage, and the output is obtained through the third inverter and the fourth inverter to obtain the second output signal; the first output signal is used to control the charge pump to establish a voltage value that enables the subsequent drive circuit to work normally, and the second output signal is used to control the shutdown of the previous charge pump so that the output voltage value of the charge pump is maintained within the set safety range.

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