Quasi-peak current control method for four-switch Buck-Boost converter

Abstract

A quasi-peak current control method for a four-switch Buck-Boost converter belongs to the technical field of switch current control. The present invention aims at the problem that the quadrilateral current control method of the existing four-switch Buck-Boost converter cannot achieve a smooth transition between different working modes. It includes: setting the four inductor current working stages of the four-switch Buck-Boost converter to be input stage T1, input-output stage T2, decline stage T3 and clamping stage T4 in sequence, the cut-off point of the input stage T1 corresponds to point A, the cut-off point of the input-output stage T2 corresponds to point B, the cut-off point of the decline stage T3 corresponds to point C, and the cut-off point of the clamping stage T4 corresponds to point D; in each stage, the conduction and shutdown of the four switch tubes are controlled accordingly. The method of the present invention can realize zero-voltage turn-on of all switch devices within the full load range and the full input voltage range, and realize smooth transition of different inductor current working states.

Description

Technical Field

[0001] The invention relates to a quasi-peak current control method of a four-switch Buck-Boost converter, belonging to the technical field of switch current control. Background Art

[0002] With the rapid development of cloud computing, storage and high-bandwidth communication technologies in recent years, the scale of data centers is expanding year by year and the power they consume is also increasing year by year. Modern data centers use a 48V intermediate DC bus instead of the traditional 12V DC bus to reduce power transmission losses. As a power conversion topology with both step-up and step-down capabilities, the four-switch Buck-Boost can be used as a pre-stage pre-regulator module to cope with a wider input voltage and stabilize it at 48V. At the same time, compared with the traditional two-switch Buck-Boost topology, the four-switch Buck-Boost converter has a smaller inductor current ripple and can achieve zero voltage turn-on of all switching devices.

[0003] The traditional control method of the four-switch Buck-Boost converter is to make it work in Buck mode or Boost mode according to the input voltage. However, this control method has the problem of discontinuity. When the input voltage is close to the output voltage, the converter will repeatedly jump between the two modes. The three-mode control method of the four-switch Buck-Boost converter adds the Buck-Boost mode to the first two modes to achieve the transition. However, under this control method, the converter inductor current ripple is large, and soft switching of all switching devices cannot be achieved. Therefore, it cannot conform to the high-frequency miniaturization trend of modern converters.

[0004] The quadrilateral current control method of the four-switch Buck-Boost converter can achieve zero voltage turn-on of all switch devices and obtain a smaller inductor current ripple. However, the existing quadrilateral current control strategy has the following problems: First, the algorithm is complex and the modulation time needs to be calculated, which places extremely high demands on the real-time computing capability of the controller, and the existing controller cannot calculate in real time. The use of the table lookup rule requires a large amount of storage resources and reduces the control accuracy. Second, it is still necessary to detect the input voltage to change the working mode of the converter. Third, the existing algorithm still requires some boundary conditions to realize the switching of the converter's boost and buck modes or the algorithm switching from the heavy-load current continuous mode to the light-load current discontinuous mode. These discontinuous switches bring uncertainty to the stability of the control. Therefore, a quadrilateral current control strategy that can achieve continuous and smooth transition without changing the control logic is very necessary. Summary of the invention

[0005] Aiming at the problem that the existing quadrilateral current control method of a four-switch Buck-Boost converter cannot achieve smooth transition between different working modes, the present invention provides a quasi-peak current control method of a four-switch Buck-Boost converter.

[0006] The present invention provides a quasi-peak current control method for a four-switch Buck-Boost converter, wherein an energy storage inductor L of the four-switch Buck-Boost converter is connected between a midpoint of a first bridge arm and a midpoint of a second bridge arm, a switch tube Q1 and a switch tube Q2 of the first bridge arm are complementary turned on, and a switch tube Q3 and a switch tube Q4 of the second bridge arm are complementary turned on; the method comprises:

[0007] The four inductor current working stages of the four-switch Buck-Boost converter are set to be input stage T1, input-output stage T2, drop stage T3 and clamp stage T4, the cut-off point of the input stage T1 corresponds to point A, the cut-off point of the input-output stage T2 corresponds to point B, the cut-off point of the drop stage T3 corresponds to point C, and the cut-off point of the clamp stage T4 corresponds to point D;

[0008] At the start point of the input phase T1, the switch tubes Q1 and Q4 are turned on to collect the voltage loop error voltage V err and the inductor current of the energy storage inductor L. When the voltage loop error voltage V err When the value is equal to the inductor current, it reaches point A and determines that the current inductor current is I A , the control switch Q4 is turned off, and the input stage T1 ends; the inductor current I A The lower limit is the minimum zero voltage turn-on current I ZVS ;

[0009] At the start point of the input-output phase T2, on the basis of the switch tube Q1 continuing to be turned on, the switch tube Q3 is controlled to be turned on. After a time interval of kV err After -T1, it reaches point B and determines that the current inductor current is I B , the switch tube Q1 is turned off, and the input-output stage T2 ends; where k is the proportional coefficient; the inductor current I B The lower limit is the minimum zero voltage turn-on current I ZVS ;

[0010] At the starting point of the falling phase T3, on the basis of the switch tube Q3 continuing to be turned on, the switch tube Q2 is controlled to be turned on until the inductor current is equal to -I zvs When it reaches point C, the current inductor current is determined to be I C , the switch tube Q3 is controlled to be turned off, and the falling phase T3 ends;

[0011] If the inductor current works in a discontinuous state, the starting point of the clamping stage T4 is based on the switch tube Q2 being turned on, and the switch tube Q4 is controlled to be turned on until the duration of the four inductor current working stages meets the set minimum current working cycle T min_arti , determine point D, the clamping stage T4 ends; continue to enter the next minimum current working cycle T min_arti Input stage T1;

[0012] If the inductor current works in a continuous state, a steady-state current working cycle T is completed after the falling phase T3 ends, and the next steady-state current working cycle input phase T1 is continued.

[0013] According to the quasi-peak current control method of the four-switch Buck-Boost converter of the present invention, the error voltage V err is the expected output voltage V ref The actual value of the output voltage V o The difference is the output value after passing through the compensator.

[0014] According to the quasi-peak current control method of the four-switch Buck-Boost converter of the present invention, the minimum zero voltage turn-on current I ZVS for:

[0015]

[0016] Where C oss is the parasitic capacitance of the switch tube drain-source, V in is the input voltage, t dead is the dead time.

[0017] According to the quasi-peak current control method of the four-switch Buck-Boost converter of the present invention, the input stage T1 is determined by the following formula:

[0018]

[0019] According to the quasi-peak current control method of the four-switch Buck-Boost converter of the present invention, the inductor current I B for:

[0020]

[0021] According to the quasi-peak current control method of the four-switch Buck-Boost converter of the present invention, the falling phase T3 is determined by the following formula:

[0022]

[0023] According to the quasi-peak current control method of the four-switch Buck-Boost converter of the present invention, when the inductor current operates in a continuous state, the steady-state current working period T is:

[0024]

[0025] According to the quasi-peak current control method of the four-switch Buck-Boost converter of the present invention, the discontinuous state of the inductor current includes a non-clamped discontinuous state and a clamped discontinuous state;

[0026] In the continuous state of the inductor current, the steady-state current duty cycle T decreases as the load decreases;

[0027] When the steady-state current duty cycle T decreases to equal the minimum current duty cycle T min_arti When , the inductor current enters the non-clamped discontinuous state;

[0028] In V in <V o Under the condition, as the load is further reduced, when I B is clamped to I ZVS When , the inductor current enters the clamped discontinuous state;

[0029] When the inductor current changes from a continuous state to a discontinuous state, the current amplitude increment ΔI B And the voltage loop output increment ΔV err The relationship between them satisfies:

[0030]

[0031] The current amplitude increment ΔI B is the current inductor current I B Relative to the inductor current I in the continuous state B The amount of change;

[0032] To make ΔI B With ΔV err There is a positive correlation, and the proportional coefficient k satisfies:

[0033]

[0034] Where V in_min is the minimum input voltage;

[0035] The maximum total duration of the first three inductor current working stages in the clamped discontinuous state is T u for:

[0036]

[0037] Where f u It is the natural maximum operating frequency when boosting;

[0038] Set the current duty cycle T min_arti for:

[0039]

[0040] Where f max_arti Set an upper limit for the converter operating frequency;

[0041] The duration of the input-output phase T2 of the inductor current in the clamped discontinuous state is T 2_DCM :

[0042]

[0043] According to the quasi-peak current control method of the four-switch Buck-Boost converter of the present invention, the discontinuous state of the inductor current includes a non-clamped discontinuous state and a clamped discontinuous state;

[0044] In the continuous state of the inductor current, the steady-state current duty cycle T decreases as the load decreases;

[0045] When the steady-state current duty cycle T decreases to equal the minimum current duty cycle T min_arti When , the inductor current enters the non-clamped discontinuous state;

[0046] In V in ≥V o Under the condition, as the load is further reduced, when I A is clamped to I ZVS When , the inductor current enters the clamped discontinuous state;

[0047] Minimum current duty cycle T min_arti The shortest working cycle T n :

[0048]

[0049] Where f n It is the natural maximum operating frequency when the voltage is reduced;

[0050] The duration of the input-output phase T2 of the inductor current in the clamped discontinuous state is T′ 2_DCM :

[0051]

[0052] According to the quasi-peak current control method of the four-switch Buck-Boost converter of the present invention, the method for determining the optimal value of the proportional coefficient k is:

[0053] According to the output side load current I o The expression calculates the error voltage V corresponding to different proportional coefficients k that meet the conditions err :

[0054]

[0055] Then through each pair of proportional coefficient k and error voltage V err Calculate the effective value of the inductor current I rms :

[0056]

[0057] Where P is the intermediate variable:

[0058]

[0059] in:

[0060]

[0061] Where P o is the output power, I Amax is the inductor current I A Upper limit, f max_arti Set an upper limit for the converter operating frequency, f min_arti Set a lower limit for the converter operating frequency;

[0062] The calculated inductor current effective value I rms The proportional coefficient k corresponding to the minimum value of is taken as the optimal value of the proportional coefficient k.

[0063] Beneficial effects of the present invention: The method of the present invention is a variable frequency control strategy, which does not require input voltage detection and can achieve zero voltage switching of all switch devices within the full load range and the full input voltage range. Through the optimized design of the method of the present invention, the effective value of the inductor current can be reduced, thereby achieving high frequency, miniaturization and high efficiency of the converter.

[0064] In addition, the method of the present invention realizes the automatic and smooth transition between the voltage increase and decrease of the converter and the continuous heavy load current and the intermittent light load current without changing the control logic. Finally, the method of the present invention does not need to perform complex calculations, can be implemented using analog-digital hybrid circuits, and has good real-time performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0065] Figure 1 is a flow chart of a quasi-peak current control method of a four-switch Buck-Boost converter according to the present invention;

[0066] Figure 2 It is the circuit schematic diagram of the four-switch Buck-Boost converter of the input stage T1;

[0067] Figure 3 It is the circuit schematic diagram of the four-switch Buck-Boost converter of the input-output stage T2;

[0068] Figure 4 It is the circuit schematic diagram of the four-switch Buck-Boost converter T3 in the falling stage;

[0069] Figure 5 It is the circuit schematic diagram of the four-switch Buck-Boost converter in the clamping stage T4;

[0070] Figure 6 It is a waveform diagram showing the waveform of the inductor current of the four-switch Buck-Boost converter in the discontinuous state in the buck state, and the waveform changes with the four inductor current working stages;

[0071] Figure 7 It is a waveform diagram showing the waveform of the inductor current of the four-switch Buck-Boost converter in the discontinuous state in the boost state, and the waveform changes with the four inductor current working stages;

[0072] Figure 8 is determined under load, when V in =V o , V in <V o and V in >V o Steady-state waveform diagram of the inductor current under continuous state;

[0073] Fig. 9 This is the inductor current waveform at different loads in the boost state;

[0074] Fig.10 This is the inductor current waveform at different loads under the buck state;

[0075] Fig.11 Yes V in =V o Inductor current waveform under different loads;

[0076] Fig.12 Yes V in =40V, different load current I o Next I rms Corresponding relationship diagram with k;

[0077] Fig.13 Yes V in =40V, different load current I o Next I A Corresponding relationship diagram with k;

[0078] Fig.14 Yes V in =48V, different load current I o Next I rms Corresponding relationship diagram with k;

[0079] Fig.15 Yes V in =48V, different load current I o Next I A Corresponding relationship diagram with k;

[0080] Fig.16 Yes V in =60V, different load current I o Next I rms Corresponding relationship diagram with k;

[0081] Fig.17 Yes V in =60V, different load current I o Next I A Corresponding relationship diagram with k;

[0082] Fig.18 Schematic diagram of the control circuit implemented by the method of the present invention; V os Indicates the output voltage V o The sampling value of

[0083] Fig.19 yes Fig.18 Schematic diagram of the logic control module; in the figure, "on" means the corresponding switch is turned on, and "off" means the corresponding switch is turned off;

[0084] Fig. 20 When the input voltage of the present invention changes from 40V to 60V (slew rate 0.2V / μs), V in 、V o 、i L and V err Overall changes in

[0085] Fig.21 yes Fig. 20 A magnified waveform of

[0086] Fig. 22 The method of the present invention is the input voltage V in When the load changes from 150W to 50W, I o 、V o 、i L and V err Overall changes in

[0087] Fig.23 yes Fig. 22 A magnified waveform of

[0088] Fig.24 The input voltage is 40V, I o =1.05A, inductor current waveform;

[0089] Fig.25 The input voltage is 40V, I o =2.1A, inductor current waveform;

[0090] Fig.26 The input voltage is 40V, I o =4.2A, inductor current waveform;

[0091] Fig. 27 The input voltage is 48V, I o =1.05A, inductor current waveform;

[0092] Fig.28 The input voltage is 48V, I o =2.1A, inductor current waveform;

[0093] Fig.29 The input voltage is 48V, I o =4.2A, inductor current waveform;

[0094] Fig.30 The input voltage is 60V, I o =1.05A, inductor current waveform;

[0095] Fig.31 The input voltage is 60V, I o =2.1A, inductor current waveform;

[0096] Fig.32 The input voltage is 60V, I o =4.2A, inductor current waveform;

[0097] Fig.33 It is a test efficiency diagram of the experimental prototype built in the specific embodiment. DETAILED DESCRIPTION

[0098] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0099] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.

[0100] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but they are not intended to limit the present invention.

[0101] Specific implementation method 1. Combination Figure 1 As shown, the present invention provides a quasi-peak current control method for a four-switch Buck-Boost converter, wherein the energy storage inductor L of the four-switch Buck-Boost converter is connected between the midpoint of the first bridge arm and the midpoint of the second bridge arm, the switch tube Q1 and the switch tube Q2 of the first bridge arm are complementary turned on, and the switch tube Q3 and the switch tube Q4 of the second bridge arm are complementary turned on; comprising:

[0102] The four inductor current working stages of the four-switch Buck-Boost converter are set to be input stage T1, input-output stage T2, drop stage T3 and clamp stage T4, the cut-off point of the input stage T1 corresponds to point A, the cut-off point of the input-output stage T2 corresponds to point B, the cut-off point of the drop stage T3 corresponds to point C, and the cut-off point of the clamp stage T4 corresponds to point D;

[0103] At the start point of the input phase T1, the switch tubes Q1 and Q4 are turned on to collect the voltage loop error voltage V err and the inductor current of the energy storage inductor L. When the voltage loop error voltage V err When the value is equal to the inductor current, it reaches point A and determines that the current inductor current is I A , the control switch Q4 is turned off, and the input stage T1 ends; the inductor current I A The lower limit is the minimum zero voltage turn-on current I ZVS ;

[0104] At the start point of the input-output phase T2, on the basis of the switch tube Q1 continuing to be turned on, the switch tube Q3 is controlled to be turned on. After a time interval of kV err After -T1, it reaches point B and determines that the current inductor current is I B , the switch tube Q1 is turned off, and the input-output stage T2 ends; where k is the proportional coefficient; the inductor current I B The lower limit is the minimum zero voltage turn-on current I ZVS ;

[0105] At the starting point of the falling phase T3, on the basis of the switch tube Q3 continuing to be turned on, the switch tube Q2 is controlled to be turned on until the inductor current is equal to -I zvs When it reaches point C, the current inductor current is determined to be I C , the switch tube Q3 is controlled to be turned off, and the falling phase T3 ends;

[0106] If the inductor current works in a discontinuous state, the starting point of the clamping stage T4 is based on the switch tube Q2 being turned on, and the switch tube Q4 is controlled to be turned on until the duration of the four inductor current working stages meets the set minimum current working cycle T min_arti , determine point D, the clamping stage T4 ends; continue to enter the next minimum current working cycle T min_artiInput stage T1;

[0107] If the inductor current works in a continuous state, a steady-state current working cycle T is completed after the falling phase T3 ends, and the next steady-state current working cycle input phase T1 is continued.

[0108] In this embodiment, the error voltage V err is the expected output voltage V ref The actual value of the output voltage V o The difference is the output value after passing through the compensator.

[0109] Figures 2 to 5 The principle diagrams of four inductor current working stages of this implementation are given.

[0110] Combination Figure 2 During the input phase T1, switches Q1 and Q4 are turned on, and the inductor L is connected in parallel to the input voltage source V in , start storing energy, and wait for the inductor current i L After rising to point A, Q4 turns off, and the current in the inductor L charges and discharges the parasitic capacitance in the switching devices Q3 and Q4, preparing for the zero voltage turn-on of Q3. in is the input capacitance, C out is the output capacitor, and R is the load resistor. Then the circuit enters the input-output stage T2, as shown in Figure 3 During this period, the switches Q1 and Q3 are turned on, and the inductor L is connected to the input power supply V in The series connection transfers energy to the output side. The slope of the inductor current is positive in the buck state and negative in the boost state. When the inductor current reaches point B, Q1 is turned off. The current in the inductor L charges and discharges the parasitic capacitance of the switch tubes Q1 and Q2, respectively, to prepare for the zero voltage turn-on of Q2. Then, the circuit enters the falling stage T3. Figure 4 In this stage, the switch tubes Q2 and Q3 are turned on, and the inductor L is connected to the output terminal V o In parallel, magnetic reset begins. In order to achieve zero voltage turn-on of Q1 in the future, the inductor current needs to drop to a negative value C during this stage. Then Q3 is turned off, and the inductor current charges and discharges the parasitic capacitance of Q3 and Q4 respectively, preparing for the zero voltage turn-on of Q4. Figure 5 As shown, during the clamping stage T4, the switch tubes Q2 and Q4 are turned on, the inductor does not exchange energy with the outside world, and its internal reverse circulation discharges the parasitic capacitance before Q1 is turned on in the next cycle T1, thereby achieving zero voltage turn-on of Q1.

[0111] Figure 6 and Figure 7The discontinuous state waveform of the inductor current of the four-switch Buck-Boost converter in the buck and boost conditions is presented; in the figure, the horizontal axis t represents time, Vgs1 represents the gate drive signal of the switch tube Q1, Vgs2 represents the gate drive signal of the switch tube Q2, Vgs3 represents the gate drive signal of the switch tube Q3, and Vgs4 represents the gate drive signal of the switch tube Q4.

[0112] Furthermore, in order to ensure that the switch tubes Q1 to Q4 can completely achieve zero voltage conduction, the absolute value of the inductor current needs to be greater than or equal to the minimum zero voltage turn-on current I at the four mode switching points A to D. ZVS , minimum zero voltage turn-on current I ZVS for:

[0113]

[0114] Where C oss is the parasitic capacitance of the switch tube drain-source, V in is the input voltage, t dead is the dead time.

[0115] In this embodiment, the voltage loop output V err It is used to adjust the amplitude I at point A in the inductor current waveform. A , and the current amplitude at point B is I B At the same time, V err and the proportionality coefficient k, such as Figure 8 As shown, it is the steady-state waveform of the inductor current under the continuous state. Therefore, the sum of the input stage T1 and the input-output stage T2 time is:

[0116] T1+T2=k·V err .

[0117] Current I A and I B The value of T1 and T2 can be calculated from the relationship between k and V err To express.

[0118] Going further, the input stage T1 is determined by the following formula:

[0119]

[0120] Inductor current I B for:

[0121]

[0122] In fact, T1+T2 is also the conduction time of the switch tube Q1 in a single cycle, which determines the amount of energy input to the inductor, and when the proportional coefficient k and the input voltage V in , output voltage Vo When the value of the inductor L is constant, the current I A and I B The value of the voltage loop output V err Therefore, V err Control I A and I B The value of the output voltage V o control. Figure 8 As shown, when V in =V o When the average value of the input current is equal to the average value of the output current, this requires that the sum of the areas of S1+S2 is equal to the sum of the areas of S2+S3. Given that the absolute values ​​of the rising and falling slopes of the inductor current are equal at this time, the time T1 and T3 are equal. Now assume that the input voltage decreases, that is, V in <V o If the timing of each switch action is related to V in =V o remains unchanged, the output voltage V o In steady state, it will drop to the same level as the input voltage V in In order to make the output voltage V o Keeping it at a given value, the voltage loop will accumulate the error positively, so that its output V err The increase of T1+T2 will increase the time and the position of the inductor current point A. As a result, in the new inductor current waveform, the area S'1+S'2 will be larger than the area S'2+S'3. In other words, the average input current will be larger than the average output current. After several cycles of adjustment, the energy exchange of the inductor reaches a balance, and the output voltage V o Stable at a given value. By analogy, when V in >V o When the voltage loop accumulates the error negatively, V err becomes smaller, thereby reducing the time of T1+T2 and lowering the position of the inductor current point A. At this time, the area S"1+S"2 will be smaller than the area S"2+S"3, that is, the average value of the input current is smaller than the average value of the output current, and the converter enters the step-down state.

[0123] When the load is heavy, the inductor current works in the continuous current state. Its steady-state current working cycle T mainly includes the input stage T1, the input-output stage T2 and the falling stage T3, among which T1 and T2 are independent variables, and the duration of T3 is determined by T1, T2 and the output voltage V o Determines whether it is a non-independent variable.

[0124] The descending phase T3 is determined by the following formula:

[0125]

[0126] Furthermore, when the inductor current operates in a continuous state, the steady-state current operating cycle T is:

[0127]

[0128] It can be seen from the above formula that the operating frequency of the converter under the quasi-peak current control strategy increases with V err decreases with the increase of .

[0129] Next, the transition of the inductor current from the continuous state to the discontinuous state is divided into V in <V o and V in ≥V o Two situations are described: Fig. 9 As shown, V in <V o When , the solid line composed of ABCD represents the waveform of the inductor current when it is continuous in the boost state. The expression of T2 in the input-output stage is derived from the known relationship as follows:

[0130]

[0131] Considering that the slope of the inductor current is negative during the T2 period, as the load changes, the length of T2 may cause the position of point B to rise or fall. B And the voltage loop output increment ΔV err Only when the proportional coefficient k meets the set conditions can the current amplitude at point B increase with the increase of load. Otherwise, Fig. 9 BB will appear in x The problem is shown by the dashed line. Assume that ΔI B With ΔV err The position of point B will decrease as the load current increases, as shown in the figure. x As the load increases further, V err Increase, B x The point may fall on the x-axis or even be negative, which will reduce the energy transmitted to the output side, which is not conducive to voltage regulation under heavy load. B With ΔV err The negative correlation will also cause the position of point B to rise under light load, thereby increasing the effective value of the inductor current, which is not conducive to improving the converter efficiency under light load. B With ΔV err There is a positive correlation, so as the load decreases, the position of point B decreases. Fig. 9 When "B" is in the middle, I B Clamp to IZVS , to ensure that the switch tube Q4 is turned on at zero voltage. As the load continues to decrease, I B The value remains unchanged. At this time, the inductor current enters the clamped discontinuous state. At the same time, the clamping stage T4 is added, and the operating frequency remains stable at the natural maximum operating frequency f during boost. u When the inductor current enters the clamping state, the input-output phase time T 2_DCM The expression of is as follows, and only with V err That is to say, at this time, the quasi-peak current control strategy changes from using T1 and T2 to jointly adjust the output voltage in the continuous state to using only T1 to adjust, and it automatically degenerates into the peak current control mode. However, considering f u It may be too large, and existing switch devices and controllers are difficult to meet, so an artificial frequency upper limit f can be added max_arti , and then as the load decreases, when the converter operating frequency reaches f max_arti After that, the clamping stage T4 is added in advance, such as Fig. 9 As shown by the dotted line where A'B' is located, before point B' drops to point B", the inductor current enters the discontinuous state in advance. However, at this time, the quasi-peak current control strategy still uses T1 and T2 to jointly adjust the output voltage until point B drops to B" as the load decreases. This stage is called the non-clamped discontinuous state.

[0132] The details are as follows:

[0133] 1. Under boost conditions:

[0134] The discontinuous state of the inductor current includes an unclamped discontinuous state and a clamped discontinuous state;

[0135] In the continuous state of the inductor current, the steady-state current duty cycle T decreases as the load decreases;

[0136] When the steady-state current duty cycle T decreases to equal the minimum current duty cycle T min_arti When , the inductor current enters the non-clamped discontinuous state;

[0137] In V in <V o Under the condition, as the load is further reduced, when I B is clamped to I ZVS When , the inductor current enters the clamped discontinuous state;

[0138] When the inductor current changes from a continuous state to a discontinuous state, the current amplitude increment ΔI B And the voltage loop output increment ΔV err The relationship between them satisfies:

[0139]

[0140] The current amplitude increment ΔI B is the current inductor current I B Relative to the inductor current I in the continuous state B The amount of change;

[0141] To make ΔI B With ΔV err There is a positive correlation, and the proportional coefficient k satisfies:

[0142]

[0143] Where V in_min is the minimum input voltage;

[0144] The maximum total duration of the first three inductor current working stages in the clamped discontinuous state is T u for:

[0145]

[0146] Where f u It is the natural maximum operating frequency when boosting;

[0147] Set the current duty cycle T min_arti for:

[0148]

[0149] Where f max_arti Set an upper limit for the converter operating frequency;

[0150] The duration of the input-output phase T2 of the inductor current in the clamped discontinuous state is T 2_DCM :

[0151]

[0152] 2. Under the condition of lowering blood pressure, combined Fig.10 As shown:

[0153] The discontinuous state of the inductor current includes an unclamped discontinuous state and a clamped discontinuous state;

[0154] In the continuous state of the inductor current, the steady-state current duty cycle T decreases as the load decreases;

[0155] When the steady-state current duty cycle T decreases to equal the minimum current duty cycle T min_arti When , the inductor current enters the non-clamped discontinuous state;

[0156] In V in ≥V o Under the condition, as the load is further reduced, when I A is clamped to IZVS When , the inductor current enters the clamped discontinuous state;

[0157] The converter works in the buck state. The solid line composed of ABCD in the figure represents the waveform of the inductor current when it is continuous. Different from the boost state, the slope of the inductor current is positive during T2. err As the time of T1+T2 decreases, ΔI B With ΔV err There is always a positive correlation, such as Fig.10 As shown in B, B' and B". When the load is reduced to a light enough level, Fig.10 As shown by the dotted line, the current amplitude at point A is I A is clamped to I ZVS To ensure that Q3 is turned on at zero voltage, the inductor current enters the clamped discontinuous state. At the same time, the clamping stage T4 is added to keep the converter operating frequency stable at the highest operating frequency f during voltage reduction. n , that is, the shortest working cycle is T n At this point, the quasi-peak current control strategy degenerates into only passing V err Control input-output stage T′ 2_DCM To adjust the output voltage. Similarly, considering the natural maximum operating frequency f when stepping down n It may also be too large, and the artificially added frequency cap f max_arti This also needs to play a role. When the converter operating frequency reaches f max_arti After that, the clamping stage T4 is added in advance, such as Fig.10 As shown by the middle dotted line, before point A' drops to point A", the inductor current has entered the discontinuous state in advance, and the quasi-peak current control strategy enters the non-clamped discontinuous state. The output voltage is still regulated by T1 and T2 until point A drops to point A".

[0158] Minimum current duty cycle T min_arti The shortest working cycle T n :

[0159]

[0160] Where f n It is the natural maximum operating frequency when the voltage is reduced;

[0161] The duration of the input-output phase T2 of the inductor current in the clamped discontinuous state is T2' _DCM :

[0162]

[0163] When V in =V o When the inductor current changes from continuous to discontinuous, Vin >V o The same time, no further elaboration is needed here. Fig.11 Given V in =V o When the converter is under the quasi-peak current control strategy, the inductor current waveform changes with the load. It can be seen that when the operating frequency is less than f max_arti When the inductor current remains continuous, the operating frequency reaches f max_arti When V err >I ZVS In this case, T1 and T2 participate in the regulation of the output voltage at the same time. err Down to V er r =I ZVS After that, it enters the clamped discontinuous state, and the quasi-peak current degenerates to only use T2 to regulate the output voltage.

[0164] Finally, in this implementation, the method for determining the optimal value of the proportionality coefficient k is:

[0165] The effective value of the inductor current in the quasi-peak current control mode is I rms The current amplitude I at point A and point B A ,I B When the inductor current is continuous, the input voltage V in , output voltage V o When the inductance value L is constant, I rms The size of the proportionality factor k and the voltage loop output V err At the same time, according to the output side load current I o With k and V err The corresponding load current I can be obtained by o Under different proportional coefficients k, V err , further according to each pair (k,V err ), the effective value of the inductor current under this set of values ​​can be obtained.

[0166] According to the output side load current I o The expression calculates the error voltage V corresponding to different proportional coefficients k that meet the conditions err :

[0167]

[0168] Then through each pair of proportional coefficient k and error voltage V err Calculate the effective value of the inductor current I rms :

[0169]

[0170] Where P is the intermediate variable:

[0171]

[0172] In addition, when substituting into the solution, the value of k needs to satisfy the above V in <V o When ΔI B With ΔV err At the same time, we must also consider the boundary conditions that other physical quantities must satisfy when the inductor current is continuous. Among the constraints, the load current I o Determined by the expected values ​​of output power and output voltage; when the inductor current is continuous, I B Should always be greater than I ZVS ;I A The value should always be greater than I ZVS At the same time, it is less than the maximum limit value I of the voltage loop output Amax Finally, the converter operating frequency should always remain at the set lower limit f min_arti and the upper limit f max_arti within the range.

[0173] in:

[0174]

[0175] Where P o is the output power, I Amax is the inductor current I A Upper limit, f max_arti Set an upper limit for the converter operating frequency, f min_arti Set a lower limit for the converter operating frequency;

[0176] The calculated inductor current effective value I rms The proportional coefficient k corresponding to the minimum value of is taken as the optimal value of the proportional coefficient k.

[0177] Figures 12 to 17 The following table shows the load current I of different loads when the input voltage is 40V, 48V and 60V and the output voltage is constant at 48V. o Under this condition, the effective value of the inductor current I rms and the current amplitude at point A I A The relationship between the proportional coefficient k and the minimum current I required to achieve zero voltage switching of all switching devices ZVS Set to 1.2A, the inductance L is 1.8μH, and the lower limit of the operating frequency is f min_arti and the upper limit f max_arti They are 500kHz and 1.25MHz respectively.

[0178] Depend on Fig.12and Fig.13 It can be seen that when V in <V o When the inductor current is I rms As the proportional coefficient k increases, it tends to decrease gradually. At the same time, as the load current I o The maximum selectable k value is also reduced because I B Limitations of Boundary Conditions I B >I ZVS According to the above analysis, I o When I decreases, B As a result, the converter operating frequency increases. When the value of k is too large, the T1+T2 time is too long, which will cause I B ZVS In addition, the minimum value of k is determined by the upper limit of the current amplitude at point A, I Amax and the maximum operating frequency f max_arti Common restrictions.

[0179] according to Fig.14 Zhihe Fig.17 It can be seen that when V in ≥V o When the inductor current is I rms The change trend of the proportional coefficient k and V in <V o The difference is that the maximum value of k changes under different load currents. This is because I B ≥I A , and the minimum value of k increases with I o In summary, the following points can be drawn: First, I rms As the proportional coefficient k increases, it decreases; second, as the load current I o The maximum k value can be selected to be smaller, and the minimum k value can be selected to be larger, that is, the range of k values ​​is narrowed; third, the value of k is within a certain load current I o When the boundary condition of current continuity is not met, that is, Figures 12 to 17 If there is no solution in the above situation, the inductor current will enter the discontinuous state under the quasi-peak current control strategy; Fourth, the larger the k value, the greater the inductor current at V in <V o When the load decreases, the current will enter the discontinuous state faster. in ≥V o In addition, the k value should also be selected to give priority to the minimum effective value of the inductor current at the minimum input voltage. Therefore, based on the above analysis and trade-offs, the k value in this implementation can be selected as 2×10 -7 ​, to ensure that the effective value of the inductor current is small under different input voltages, and at the same time, it remains as continuous as possible as the load decreases, so as to reduce the circulating current loss during the clamping stage T4.

[0180] The effect of the present invention is verified below:

[0181] Fig.18 The control circuit of the implementation method of the present invention is given, wherein the control circuit mainly includes four parts: an inductor current sampling circuit, an output voltage sampling circuit, a logic control module and a drive circuit. The current sampling circuit can be composed of a ground sampling resistor R sense and a high-speed differential operational amplifier OA, which is used to sample the inductor current in real time.

[0182] The logic control module consists of four parts, such as Fig.19 The PI compensation link is used to process the output voltage error signal and generate the voltage loop output V err Subcircuit 1 is used to generate the on signal of Q1, which is also the off signal of Q2. Comparator CP1 converts the current sampling signal I sense with -I ZVS Compare to determine whether the inductor current reaches the zero voltage turn-on requirement of Q1. Counter 1 is used to realize the artificial maximum operating frequency limit f max_arti When the operating frequency is less than f max_arti When the counter 1 outputs a high level before CP1, sense =-I ZVS When , CP1 outputs a high level, and at the same time, AND gate AND1 outputs a high level, and Q1 is turned on. Counter 2 is used to limit the minimum operating frequency f of the converter. min_arti If the AND gate AND1 outputs a high level afterwards, the counter 2 will turn on Q1 and turn off Q2 in advance through the OR gate OR1. This design is to ensure that the converter can operate at the lowest operating frequency f min_arti Normal startup can prevent Q1 from being turned on all the time.

[0183] Subcircuit 2 is used to generate a shutdown signal for Q1. Comparator CP2 is used to determine the current amplitude I at point B. B Is it down to I ZVS In order to distinguish it from point A, we need to add a judgment condition—whether Q3 is conducting. B =I ZVS When , it indicates that the circuit enters the light-load current natural intermittent state under the boost state. At this time, the comparator CP2 outputs a high level, and after passing through the AND gate AND2, a shutdown signal of Q1 is generated to I B When the circuit operates in the current continuous state and the non-clamped discontinuous state, the conduction time of Q1 is determined by kV err Determine, when the counter 3 count value and kVerr When they are equal, comparator CP3 outputs a high level and Q1 is turned off. When the circuit works in the clamped discontinuous state, AND gate AND2 will output a high level before comparator CP3, so it can turn off Q1 in advance and turn on Q2 through OR gate OR2.

[0184] Subcircuit 3 is used to control the on and off of Q3 and Q4. When the converter load is heavy and the inductor current is continuous or in a non-clamped state, the current amplitude I A V err Control and greater than I ZVS At this time, comparators CP4 and CP5 simultaneously output high level, generating control signals for Q3 to turn on and Q4 to turn off. When the load is light in the buck state, the inductor current is in the clamped discontinuous state. err Less than I ZVS CP4 will output a high level before CP5, and the inductor current will reach I ZVS , CP5 outputs a high level, making the AND gate AND3 generate an opening signal for Q3, thereby turning I A Clamped at I ZVS When the inductor current reaches -I ZVS When , it indicates that enough energy has been stored in the inductor to turn on Q1 with zero voltage. At this time, comparator CP6 generates a drive signal to turn off Q3 and turn on Q4.

[0185] The PSIM circuit simulation software was used to simulate and analyze the implementation method of the present invention. Fig. 20 The input voltage V in , output voltage V o , inductor current i L And the voltage loop output V err The overall change of the amplified waveform is as follows Fig.21 As shown, it can be seen that as the input voltage V in The voltage loop output V err Reduced, and according to the inductor current i L The waveform shows that the converter can naturally transition from the boost state to the buck state.

[0186] Fig. 22 shows that when the input voltage V in When the load changes from 150W to 50W, the output current I o , output voltage V o , inductor current i L And the voltage loop output V err The overall change of the amplified waveform is as follows Fig.23 , we can see that as the load decreases, the voltage loop output Verr Reduced, and according to the inductor current i L The waveform shows that the converter can naturally transition from a heavy-load continuous state to a light-load intermittent state.

[0187] In summary, the method of the present invention can realize real-time control of the inductor current by using certain combinational logic to achieve output voltage regulation. The control process directly acts on the inductor current to avoid calculating complex modulation time, thereby improving the real-time performance of the control and simplifying the complexity of the control algorithm. Specific embodiment:

[0189] In order to verify the effectiveness of the method of the present invention, a four-switch Buck-Boost experimental prototype with a full load power of 200W was built, and its specific parameter indicators and key component selection are shown in Table 1. The designed experimental prototype includes a main power part and a control circuit part.

[0190] Table 1 Parameters of four-switch Buck-Boost prototype

[0191]

[0192] When the input voltage is 40V, the gate drive voltage V GS1 , drain-source voltage V DS1 , the drain-source voltage V of the switching device Q4 DS4 And the inductor current waveform i L The waveform is Figure 24 to Figure 26 When the output current I o =1.05A, the inductor current works in the intermittent state, and the operating frequency is the maximum value of 1.25MHz; when the output current I o =2.1A, the inductor current works in a continuous state, and the operating frequency is 919kHz; when the output current I o =4.2A, the inductor current works in a continuous state, and the operating frequency is the minimum value of 590kHz. At the same time, whether under light load or heavy load, V GS1 and V DS1 It can be seen from the relationship between the waveforms that Q1 always achieves zero-voltage turn-on.

[0193] When the input voltage is 48V, the gate drive voltage V GS1 , drain-source voltage V DS1 , the drain-source voltage V of the switching device Q4 DS4 And the inductor current waveform i L The waveform is Figure 27 to Figure 29 When the output current I o =1.05A, the inductor current works in the intermittent state, and the operating frequency is the maximum value of 1.25MHz; when the output current Io =2.1A, the inductor current works in a continuous state, and the operating frequency is 1.06MHz; when the output current I o =4.2A, the inductor current works in a continuous state, and the operating frequency is 684kHz. At the same time, whether under light load or heavy load, V GS1 and V DS1 It can be seen from the relationship between the waveforms that Q1 always achieves zero-voltage turn-on.

[0194] When the input voltage is 60V, the gate drive voltage V GS1 , drain-source voltage V DS1 , the drain-source voltage V of the switching device Q4 DS4 And the inductor current waveform i L The waveform is Figure 30 to Figure 32 When the output current I o =1.05A, the inductor current works in the intermittent state, and the operating frequency is the maximum value of 1.25MHz; when the output current I o =2.1A, the inductor current operates in the critical continuous state, and the operating frequency is 1.25MHz; when the output current I o =4.2A, the inductor current works in a continuous state, and the operating frequency is 866kHz. At the same time, whether under light load or heavy load, V GS1 and V DS1 It can be seen from the relationship between the waveforms that Q1 always achieves zero-voltage turn-on.

[0195] The overall test efficiency of the experimental prototype is given by Fig.33 It is given that, in general, under the control strategy of the method of the present invention, the efficiency curve of the prototype can remain basically consistent under different input voltages. And the light load efficiency is higher than 90% in the full input range. In addition, the prototype reaches a peak efficiency of 98.3% at an input voltage of 40V and an output power of 175W. This is due to the compromise selection of the proportional coefficient k, which prioritizes the minimum effective value of the inductor current at the lowest input voltage, which also makes the converter make a certain efficiency sacrifice when the input voltage is up to 60V.

[0196] In summary, the method of the present invention can well realize the zero voltage turn-on of all switch devices, and realize the automatic and smooth transition of the four-switch Buck-Boost topology buck-boost and the inductor current from heavy load continuous to light load intermittent without detecting the input voltage and changing the control logic. And through the given optimization design method, the effective value of the inductor current can be reduced, thereby realizing the high frequency, miniaturization and high efficiency of the converter. Finally, the method of the present invention does not require complex calculations, can be implemented using analog-digital hybrid circuits and has good real-time performance.

[0197] Although the present invention is described herein with reference to specific embodiments, it should be understood that these embodiments are merely examples of the principles and applications of the present invention. It should therefore be understood that many modifications may be made to the exemplary embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims. It should be understood that the various dependent claims and features described herein may be combined in a manner different from that described in the original claims. It should also be understood that the features described in conjunction with a single embodiment may be used in other described embodiments.

Claims

1. A quasi-peak current control method for a four-switch Buck-Boost converter, wherein the energy storage inductor L of the four-switch Buck-Boost converter is connected between the midpoint of the first bridge arm and the midpoint of the second bridge arm, the switch tube Q1 and the switch tube Q2 of the first bridge arm are complementary turned on, and the switch tube Q3 and the switch tube Q4 of the second bridge arm are complementary turned on; comprising: The four inductor current working stages of the four-switch Buck-Boost converter are set to be input stage T1, input-output stage T2, drop stage T3 and clamp stage T4, the cut-off point of the input stage T1 corresponds to point A, the cut-off point of the input-output stage T2 corresponds to point B, the cut-off point of the drop stage T3 corresponds to point C, and the cut-off point of the clamp stage T4 corresponds to point D; At the start point of the input phase T1, the switch tubes Q1 and Q4 are turned on to collect the voltage loop error voltage V err and the inductor current of the energy storage inductor L. When the voltage loop error voltage V err When the value is equal to the inductor current, it reaches point A and determines that the current inductor current is I A , the control switch Q4 is turned off, and the input stage T1 ends; the inductor current I A The lower limit is the minimum zero voltage turn-on current I ZVS ; At the start point of the input-output phase T2, on the basis of the switch tube Q1 continuing to be turned on, the switch tube Q3 is controlled to be turned on. After a time interval of kV err After -T1, it reaches point B and determines that the current inductor current is I B , the switch tube Q1 is turned off, and the input-output stage T2 ends; where k is the proportional coefficient; the inductor current I B The lower limit is the minimum zero voltage turn-on current I ZVS ; At the starting point of the falling phase T3, on the basis of the switch tube Q3 continuing to be turned on, the switch tube Q2 is controlled to be turned on until the inductor current is equal to -I zvs When it reaches point C, the current inductor current is determined to be I C , the switch tube Q3 is controlled to be turned off, and the falling phase T3 ends; If the inductor current works in a discontinuous state, the starting point of the clamping stage T4 is based on the switch tube Q2 being turned on, and the switch tube Q4 is controlled to be turned on until the duration of the four inductor current working stages meets the set minimum current working cycle T min_arti , determine point D, the clamping stage T4 ends; continue to enter the next minimum current working cycle T min_arti Input stage T1; If the inductor current works in a continuous state, a steady-state current working cycle T is completed after the falling phase T3 ends, and the next steady-state current working cycle input phase T1 is continued; The error voltage V err is the expected output voltage V ref The actual output voltage V o The output value after the difference passes through the compensator; Minimum zero voltage turn-on current I ZVS for: Where C oss is the parasitic capacitance of the switch tube drain-source, V in is the input voltage, t dead is the dead time; It is characterized in that The method to determine the optimal value of the proportional coefficient k is: According to the output side load current I o The expression calculates the error voltage V corresponding to different proportional coefficients k that meet the conditions err : Then through each pair of proportional coefficient k and error voltage V err Calculate the effective value of the inductor current I rms : Where P is the intermediate variable: in: Where P o is the output power, I Amax is the inductor current I A Upper limit, f max_arti Set an upper limit for the converter operating frequency, f min_arti Set a lower limit for the converter operating frequency; The calculated inductor current effective value I rms The proportional coefficient k corresponding to the minimum value of is taken as the optimal value of the proportional coefficient k; I A =max{V err ,I ZVS }; Inductor current I B for:

2. The quasi-peak current control method of a four-switch Buck-Boost converter according to claim 1, characterized in that: The input stage T1 is determined by the following formula:

3. The quasi-peak current control method of a four-switch Buck-Boost converter according to claim 2, characterized in that: The descending phase T3 is determined by the following formula:

4. The quasi-peak current control method of a four-switch Buck-Boost converter according to claim 3, characterized in that: When the inductor current operates in a continuous state, the steady-state current operating cycle T is:

5. The quasi-peak current control method of a four-switch Buck-Boost converter according to claim 4, characterized in that: The discontinuous state of the inductor current includes an unclamped discontinuous state and a clamped discontinuous state; In the continuous state of the inductor current, the steady-state current duty cycle T decreases as the load decreases; When the steady-state current duty cycle T decreases to equal the minimum current duty cycle T min_arti When , the inductor current enters the non-clamped discontinuous state; In V in <V o Under the condition, as the load is further reduced, when I B is clamped to I ZVS When , the inductor current enters the clamped discontinuous state; When the inductor current changes from a continuous state to a discontinuous state, the current amplitude increment ΔI B And the voltage loop output increment ΔV err The relationship between them satisfies: The current amplitude increment ΔI B is the current inductor current I B Relative to the inductor current I in the continuous state B The amount of change; To make ΔI B With ΔV err There is a positive correlation, and the proportional coefficient k satisfies: Where V in_min is the minimum input voltage; The maximum total duration of the first three inductor current working stages in the clamped discontinuous state is T u for: Where f u It is the natural maximum operating frequency when boosting; Set the current duty cycle T min_arti for: Where f max_arti Set an upper limit for the converter operating frequency; The duration of the input-output phase T2 of the inductor current in the clamped discontinuous state is T 2_DCM :

6. The quasi-peak current control method of a four-switch Buck-Boost converter according to claim 4, characterized in that: The discontinuous state of the inductor current includes an unclamped discontinuous state and a clamped discontinuous state; In the continuous state of the inductor current, the steady-state current duty cycle T decreases as the load decreases; When the steady-state current duty cycle T decreases to equal the minimum current duty cycle T min_arti When , the inductor current enters the non-clamped discontinuous state; In V in ≥V o Under the condition, as the load is further reduced, when I A is clamped to I ZVS When , the inductor current enters the clamped discontinuous state; Minimum current duty cycle T min_arti is the shortest working cycle T n : Where f n It is the natural maximum operating frequency when the voltage is reduced; The duration of the input-output phase T2 of the inductor current in the clamped discontinuous state is T2' _DCM :

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