Display module, display panel and display device
By designing the source/drain layer and the second region of the first electrode in the OLED display module as obtuse or right-angled structures to block ambient light, the problem of poor pink display in OLED displays under ambient light is solved, the display effect is improved and the ambient light transmittance is maintained.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BOE TECHNOLOGY GROUP CO LTD
- Filing Date
- 2023-01-16
- Publication Date
- 2026-06-02
AI Technical Summary
Existing OLED displays are prone to exhibiting poor pink display under ambient light.
In the display module, the source/drain layer and the first electrode are designed to include a first region and a second region. The second region extends along the outer periphery of the first region with an obtuse or right angle to block ambient light and reduce the impact of light on the semiconductor region of the active layer.
It effectively prevents the pink display defects in the active semiconductor area under ambient light, improves the display effect, and maintains the transmittance of ambient light to ensure the normal use of the ambient light sensor and fingerprint hole.
Smart Images
Figure CN116322153B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of display technology, specifically relating to a display module, a display panel, and a display device. Background Technology
[0002] With the development of electronic products, more and more electronic devices have display functions, making the display screen an important component. Organic Light-Emitting Diode (OLED) displays have attracted widespread attention due to their advantages such as high color gamut, high brightness, low power consumption, high definition, good flexibility, and high luminous efficiency. However, during use, existing OLED displays sometimes exhibit pinkish tint in certain areas when illuminated by ambient light, causing display defects and affecting the user experience. Summary of the Invention
[0003] The purpose of this invention is to provide a display module, display panel, and display device to solve the problem of pink display defects that easily occur on the display screen when exposed to ambient light.
[0004] In a first aspect, embodiments of the present invention provide a display module, comprising:
[0005] A substrate is provided with a light-emitting unit and a TFT for driving the light-emitting unit. The TFT includes an active layer, a gate, and a source / drain layer electrically connected to the active layer. The source / drain layer is disposed between the light-emitting unit and the active layer. The orthographic projection of the source / drain layer on the substrate covers the orthographic projection of the semiconductor region of the active layer on the substrate.
[0006] The source / drain layer includes a first region and a second region. The second region extends along the outer periphery of the first region. The orthographic projection of the second region on the substrate surrounds the orthographic projection of the first region on the substrate. The included angle between the second region and the first region is an obtuse angle or a right angle.
[0007] Optionally, the second region is disposed on the side of the first region closer to the substrate.
[0008] Optionally, the second region is disposed on the side of the first region away from the substrate.
[0009] Optionally, there may be multiple second regions, with at least one second region disposed on the side of the first region away from the substrate and at least one second region disposed on the side of the first region close to the substrate.
[0010] Optionally, the orthographic projection of the first region onto the substrate overlaps the orthographic projection of the semiconductor region of the active layer onto the substrate.
[0011] Optionally, the orthographic projection of the second region on the substrate is arranged around the orthographic projection of the semiconductor region of the active layer on the substrate.
[0012] Optionally, the orthographic projection of the second region on the substrate and the orthographic projection of the semiconductor region of the active layer on the substrate are spaced apart.
[0013] Optionally, the included angle is 110 to 155 degrees.
[0014] Optionally, the height of the second region perpendicular to the substrate is 0.5-2 μm.
[0015] Optionally, there may be multiple second regions, and the included angles between the multiple second regions and the first region are the same.
[0016] Optionally, the display module further includes:
[0017] A shielding layer is disposed on the substrate, and the TFT is disposed on the side of the shielding layer away from the substrate.
[0018] Optionally, a first liner is provided between the active layer and the shielding layer.
[0019] Optionally, the display module further includes:
[0020] A second liner is disposed between the source / drain layer and the active layer.
[0021] Secondly, embodiments of the present invention provide a display panel, including the display module described in the above embodiments.
[0022] Thirdly, embodiments of the present invention provide a display device, including the display panel described in the above embodiments.
[0023] In the display module of this invention, the substrate is provided with a light-emitting unit and a TFT for driving the light-emitting unit. The TFT includes an active layer, a gate, and a source / drain layer electrically connected to the active layer. The source / drain layer is disposed between the light-emitting unit and the active layer. The orthographic projection of the source / drain layer on the substrate covers the orthographic projection of the semiconductor region of the active layer on the substrate. The source / drain layer includes a first region and a second region. The second region extends along the outer periphery of the first region. The orthographic projection of the second region on the substrate surrounds the orthographic projection of the first region on the substrate. The angle between the second region and the first region is an obtuse angle or a right angle. The second region can block ambient light, reducing the amount of ambient light illuminating the semiconductor region of the active layer, reducing the influence of light on the semiconductor region of the active layer, preventing the problem of pink display defects caused by ambient light illuminating the semiconductor region of the active layer, and improving the display effect. In addition, the obtuse angle or right angle between the second region and the first region can reduce the area of the orthographic projection of the source / drain layer on the substrate, which is beneficial to ensuring the transmittance of ambient light and ensuring the normal use of the ambient light sensor and fingerprint hole. Attached Figure Description
[0024] Figure 1 A schematic diagram of a process for forming a source / drain layer on a first planarization layer;
[0025] Figure 2 This is a schematic diagram of a display module in one embodiment of the present invention;
[0026] Figure 3 This is a schematic diagram of an optical path when light passes through the source / drain layer in an embodiment of the present invention.
[0027] Figure 4 Another schematic diagram of the process for forming the source / drain layer on the first planarization layer;
[0028] Figure 5 This is a schematic diagram of a display module in another embodiment of the present invention;
[0029] Figure 6 Another schematic diagram of the process for forming the source / drain layer on the first planarization layer;
[0030] Figure 7 This is a schematic diagram of a display module in another embodiment of the present invention;
[0031] Figure 8 This is a schematic diagram of a display module in another embodiment of the present invention;
[0032] Figure 9 This is a schematic diagram of a display module in another embodiment of the present invention;
[0033] Figure 10 This is a schematic diagram of the source / drain layer structure in an existing display module;
[0034] Figure 11 This is a schematic diagram showing the structure after the area of the source and drain layers in the module is increased;
[0035] Figure 12 This is a schematic diagram of the source / drain layer in a display module according to an embodiment of the present invention;
[0036] Figure 13 for Figure 12 An enlarged schematic diagram of part A in the middle;
[0037] Figure 14 This is a schematic diagram of a display module in another embodiment of the present invention;
[0038] Figure 15 This is a schematic diagram of a display module in another embodiment of the present invention;
[0039] Figure 16 A schematic diagram of a process for forming a first electrode on a second planarization layer;
[0040] Figure 17 This is a schematic diagram of a display module in another embodiment of the present invention;
[0041] Figure 18 This is a schematic diagram of a display module in another embodiment of the present invention;
[0042] Figure 19 Another schematic diagram of the process for forming the first electrode on the second planarization layer;
[0043] Figure 20 This is a schematic diagram of a display module in another embodiment of the present invention;
[0044] Figure 21 This is a schematic diagram of a display module in another embodiment of the present invention;
[0045] Figure 22 This is a schematic diagram of a display module in another embodiment of the present invention;
[0046] Figure 23 This is a schematic diagram of a display module in another embodiment of the present invention;
[0047] Figure 24 Another schematic diagram of the process for forming the first electrode on the second planarization layer;
[0048] Figure 25 This is a schematic diagram of an optical path when light passes through the first electrode in an embodiment of the present invention.
[0049] Figure 26 This is a schematic diagram of the structure of the first electrode in an existing display module;
[0050] Figure 27 A schematic diagram of the structure after increasing the area of the first electrode in the display module;
[0051] Figure 28 This is a schematic diagram of the structure of the first electrode in a display module according to an embodiment of the present invention;
[0052] Figure 29 for Figure 28 An enlarged schematic diagram of part B in the middle.
[0053] Figure Labels
[0054] Substrate 10; substrate 11; capping layer 12; first deposition layer 13; second deposition layer 14;
[0055] First flattening layer 15; Second flattening layer 16; Pixel definition layer 17; Encapsulation layer 18;
[0056] Light-emitting unit 20; first electrode 21; light-emitting layer 23; second electrode 22;
[0057] Third regional section 211; Fourth regional section 212; Active layer 30;
[0058] Source / drain layer 40; First region 41; Second region 42; Source / drain layer 43;
[0059] Shielding layer 50; first liner 61; second liner 62. Detailed Implementation
[0060] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0061] The terms "first," "second," etc., used in the specification and claims of this invention are used to distinguish similar objects and are not used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention can be implemented in orders other than those illustrated or described herein. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.
[0062] The following is in conjunction with the appendix Figures 1 to 29As shown, the display module, display panel, and display device provided in the embodiments of the present invention will be described in detail through specific embodiments and application scenarios.
[0063] like Figures 1 to 9 As shown, the display module of this embodiment includes: a substrate 10, which has a light-emitting unit 20 and a TFT for driving the light-emitting unit 20. The substrate 10 can be a glass substrate or a polyimide substrate. The TFT includes an active layer 30, a gate, and a source / drain layer 40 electrically connected to the active layer 30. The active layer 30 may include a semiconductor region and a conductor region. The semiconductor region may be located in the middle region of the active layer 30, and the conductor region may be located in the edge region of the active layer 30. The source / drain layer 40 may be electrically connected to the conductor region. The source / drain layer 40 may be disposed between the light-emitting unit 20 and the active layer 30, and the source / drain layer 40 is spaced apart from the light-emitting unit 20 and the active layer 30. The orthogonal projection of the source / drain layer 40 on the substrate 10 covers the orthogonal projection of the semiconductor region of the active layer 30 on the substrate 10, and the orthogonal projection of the source / drain layer 40 on the substrate 10 may cover the orthogonal projection of the active layer 30 on the substrate 10. The source / drain layer 40 includes a first region 41 and a second region 42. The second region 42 extends along the outer periphery of the first region 41. The orthographic projection of the second region 42 on the substrate 10 surrounds the orthographic projection of the first region 41 on the substrate 10. The included angle between the second region 42 and the first region 41 is an obtuse angle or a right angle. The second region 42 and the first region 41 are not on the same plane. The TFT may include at least one of a driving transistor and a compensation transistor. For example, the TFT may be a driving transistor or a compensation transistor, and the specific transistor may be reasonably selected according to the actual situation.
[0064] The number of second region portions 42 can be one or more, for example, there can be two second region portions 42, which can be arranged alternately or in contact. When there are multiple second region portions 42, the included angles between the multiple second region portions 42 and the first region portion 41 can be the same or different. For example, the included angles between the multiple second region portions 42 and the first region portion 41 can be the same, which is beneficial for achieving the same light-shielding effect on the semiconductor region of the active layer. The second region portions 42 are arranged along the outer periphery of the first region portion 41, and the second region portions 42 are in an inclined state. The second region portions 42 can effectively block ambient light from reaching the semiconductor region of the active layer 30, reducing the impact of ambient light on the semiconductor region of the active layer 30. Figure 3 As shown, the source / drain layer 40 can block light from oblique viewing angles. Compared to directly increasing the area of the source / drain layer 44, the projected area of the source / drain layer 40 in this embodiment can be significantly reduced while achieving the same light-blocking effect, thereby reducing the loss of OLED transmittance from the front viewing angle.
[0065] The number of light-emitting units 20 and TFTs can both be multiple, and each TFT can drive one light-emitting unit 20. Each light-emitting unit 20 may include a first electrode 21, a light-emitting layer 23, and a second electrode 22. The first electrode 21 can be an anode, and the second electrode 22 can be a cathode. The light-emitting layer emits light through the first electrode 21 and the second electrode 22. The number of light-emitting units 20 can be multiple. At least one light-emitting unit 20 can emit light with a first wavelength, at least one light-emitting unit 20 can emit light with a second wavelength, and at least one light-emitting unit 20 can emit light with a third wavelength. The first, second, and third wavelengths can be different; for example, the first wavelength can be red light, the second wavelength can be green light, and the third wavelength can be blue light. Different light-emitting units 20 can emit light of the desired wavelength.
[0066] In the display module of this embodiment, the orthographic projection of the source / drain layer 40 onto the substrate 10 covers the orthographic projection of the semiconductor region of the active layer 30 onto the substrate 10. The second region 42 of the source / drain layer 40 extends along the outer periphery of the first region 41. The orthographic projection of the second region 42 onto the substrate 10 surrounds the orthographic projection of the first region 41 onto the substrate 10. The angle between the second region 42 and the first region 41 is an obtuse angle or a right angle. The second region 42 can block ambient light, reducing the amount of ambient light illuminating the semiconductor region of the active layer, reducing the influence of light on the semiconductor region of the active layer, preventing the problem of pink display defects caused by ambient light illuminating the semiconductor region of the active layer, and improving the display effect. In addition, the obtuse angle or right angle between the second region 42 and the first region 41 can reduce the area of the orthographic projection of the source / drain layer onto the substrate, which is beneficial to ensuring the transmittance of ambient light and ensuring the normal use of the ambient light sensor and fingerprint hole.
[0067] In some embodiments, such as Figure 2 , Figure 14 As shown, the second region 42 can be disposed on the side of the first region 41 near the substrate 10, and the second region 42 can be disposed on the same side of the first region 41. There can be multiple second regions 42; for example, there can be two second regions 42. The two second regions 42 can be disposed on the side of the first region 41 near the substrate 10, and the two second regions 42 can be symmetrically arranged to provide the same light-shielding effect on the semiconductor region of the active layer. During the fabrication process, such as... Figure 1 As shown, before fabricating the source / drain layer 40, a protrusion can be fabricated on the first planarization layer 15 corresponding to the source / drain layer 40 using an exposure process. The slope angle of the inclined edge of the protrusion can be 25 to 70 degrees, preferably 45 degrees, and the height of the protrusion can be 0.5 to 2 μm. The source / drain layer 40 is fabricated on the protrusion, and then the second planarization layer 16 can be formed, and then the subsequent processes are completed.
[0068] In other embodiments, such as Figure 5 , Figure 17 As shown, the second region 42 can be disposed on the side of the first region 41 away from the substrate 10. The second region 42 can also be disposed on the same side of the first region 41. There can be multiple second regions 42; for example, there can be two second regions 42. The two second regions 42 can be disposed on the side of the first region 41 away from the substrate 10, and the two second regions 42 can be symmetrically arranged to provide the same light-shielding effect on the semiconductor region of the active layer. During the fabrication process, such as... Figure 4 As shown, before fabricating the source / drain layer 40, grooves and protrusions can be fabricated on the first planarization layer 15 corresponding to the source / drain layer 40 using an exposure process. The slope angle of the inclined edge of the protrusion can be 25 to 70 degrees, preferably 45 degrees. The depth of the groove and the height of the protrusion can be 0.5 to 2 μm. The source / drain layer 40 is fabricated on the inner wall of the groove, and then the subsequent processes are completed.
[0069] Optionally, such as Figure 7 , Figure 9 , Figure 22 As shown, the number of second region portions 42 can be multiple. At least one second region portion 42 can be disposed on the side of the first region portion 41 away from the substrate 10, and at least one second region portion 42 can be disposed on the side of the first region portion 41 close to the substrate 10. For example, the number of second region portions 42 can be two, with one second region portion 42 disposed on the side of the first region portion 41 away from the substrate 10 and the other second region portion 42 disposed on the side of the first region portion 41 close to the substrate 10, so as to have the same light-shielding effect on the semiconductor region of the active layer. During the fabrication process, such as Figure 6 As shown, before fabricating the source / drain layer 40, grooves and protrusions can be fabricated on the first planarization layer 15 corresponding to the source / drain layer 40 using an exposure process. The slope angle of the inclined edge of the protrusion can be 25 to 70 degrees, preferably 45 degrees. The depth of the groove and the height of the protrusion can be 0.5 to 2 μm. The source / drain layer 40 is fabricated on the inner wall of the groove, and then the subsequent processes are completed. Figure 8 and Figure 9 The preparation of the intermediate source drain layer 40 can be carried out by referring to the above preparation process.
[0070] The number of light-emitting units 20 and TFTs can both be multiple. Each TFT can drive one light-emitting unit 20, and the TFT connected to each light-emitting unit 20 can be correspondingly disposed on the side of the light-emitting unit 20 closest to the substrate 10. The source / drain layers 40 in the multiple TFTs can have the same or different shapes. The source / drain layers 40 in the multiple TFTs can have the same shape, which facilitates processing and simplifies the process. For example, the number of light-emitting units 20 and TFTs can both be four. The source / drain layers 40 in the four TFTs can have the same or different shapes. The source / drain layers 40 in the four TFTs can have the same shape, which facilitates processing and simplifies the process.
[0071] like Figure 2 As shown, the second region 42 of the source / drain layer 40 in the four TFTs can be disposed on the side of the first region 41 near the substrate 10. Figure 5 As shown, the second region 42 of the source / drain layer 40 in the four TFTs can be disposed on the side of the first region 41 away from the substrate 10. Figure 7 , Figure 9 As shown, in the four TFTs, each TFT's source / drain layer 40 has two second regions 42. One second region 42 of the source / drain layer 40 can be disposed on the side of the first region 41 near the substrate 10, and the other second region 42 of the source / drain layer 40 can be disposed on the side of the first region 41 near the substrate 10. Figure 8 As shown, the second region 42 of the source and drain layers 40 in the two TFTs can be disposed on the side of the first region 41 close to the substrate 10, and the second region 42 of the source and drain layers 40 in the other two TFTs can be disposed on the side of the first region 41 away from the substrate 10.
[0072] In some embodiments, the orthographic projection of the first region 41 on the substrate 10 covers the orthographic projection of the semiconductor region of the active layer 30 on the substrate 10. This can increase the coverage area of the first region 41, allowing the first region 41 to block ambient light from reaching the semiconductor region of the active layer 30. This also allows the second region 42, located at the outer periphery of the first region 41, to more effectively block ambient light from reaching the semiconductor region of the active layer 30, thereby reducing the impact of ambient light on the semiconductor region of the active layer 30.
[0073] In an embodiment of the present invention, the orthographic projection of the second region 42 on the substrate 10 is arranged around the orthographic projection of the semiconductor region of the active layer 30 on the substrate 10. The orthographic projection of the second region 42 on the substrate 10 may also be arranged around the orthographic projection of the active layer 30 on the substrate 10. The inner edge of the orthographic projection of the second region 42 on the substrate 10 can be in contact with the outer edge of the orthographic projection of the semiconductor region of the active layer 30 on the substrate 10, so that the second region 42 can more effectively block ambient light from illuminating the semiconductor region of the active layer 30 and reduce the influence of ambient light on the semiconductor region of the active layer 30.
[0074] In some embodiments, the orthographic projection of the second region 42 on the substrate 10 and the orthographic projection of the semiconductor region of the active layer 30 on the substrate 10 can be spaced apart. The orthographic projection of the second region 42 on the substrate 10 and the orthographic projection of the active layer 30 on the substrate 10 can also be spaced apart. The inner edge of the orthographic projection of the second region 42 on the substrate 10 and the outer edge of the orthographic projection of the semiconductor region of the active layer 30 on the substrate 10 can be spaced apart, so that the second region 42 can more effectively block ambient light from shining on the semiconductor region of the active layer 30 and reduce the influence of ambient light on the semiconductor region of the active layer 30.
[0075] In embodiments of the present invention, the angle between the second region 42 and the first region 41 is 110 to 155 degrees, for example, the angle between the second region 42 and the first region 41 is 135 degrees. When the angle between the second region 42 and the first region 41 is small, it cannot effectively block ambient light; when the angle between the second region 42 and the first region 41 is large, the second region 42 and the first region 41 are nearly on the same plane. While blocking ambient light, the area of the second region 42 is large, and the area of the orthographic projection of the second region 42 on the substrate 10 is large. This makes it easy to block ambient light in the direction perpendicular to the substrate 10, which is not conducive to ensuring the transmittance of ambient light and affects the normal use of the ambient light sensor and the fingerprint hole. Therefore, the angle between the second region 42 and the first region 41 is 110 to 155 degrees. The specific angle can be selected according to the actual situation, so that the second region 42 can effectively block ambient light from shining on the semiconductor region of the active layer 30, reduce the influence of ambient light on the semiconductor region of the active layer 30, and at the same time reduce the area of the orthogonal projection of the second region 42 on the substrate, which is conducive to ensuring the transmittance of ambient light and ensuring the normal use of the ambient light sensor and fingerprint hole.
[0076] In some embodiments, the height of the second region 42 perpendicular to the substrate 10 can be 0.5-2 μm. For example, the height of the second region 42 perpendicular to the substrate 10 can be 0.5 μm or 2 μm. If the height of the second region 42 perpendicular to the substrate 10 is small, it cannot effectively block ambient light from illuminating the semiconductor region of the active layer 30. If the height of the second region 42 perpendicular to the substrate 10 is large, although it can effectively block ambient light from illuminating the semiconductor region of the active layer 30, the large area wastes material and increases the difficulty of the fabrication process. Therefore, the height of the second region 42 perpendicular to the substrate 10 can be 0.5-2 μm, so that the second region 42 can effectively block ambient light from illuminating the semiconductor region of the active layer 30, while reducing the difficulty of fabrication. In embodiments of the present invention, there can be multiple second regions 42, and the included angle between the multiple second regions 42 and the first region 41 can be the same. For example, the included angle between the multiple second regions 42 and the first region 41 can be 135 degrees, so as to have the same light-shielding effect on the semiconductor region of the active layer.
[0077] In some embodiments, the display module may further include a shielding layer 50. The shielding layer 50 may be made of a conductive material or a metallic material, such as molybdenum or aluminum. The shielding layer 50 may be disposed on the substrate 10, and the TFT may be disposed on the side of the shielding layer 50 away from the substrate 10. The active layer 30 and the shielding layer 50 may be spaced apart. The shielding layer 50 provides a shielding effect, blocking external electromagnetic signals and reducing their impact on the module. Optionally, a first liner 61 may be provided between the active layer 30 and the shielding layer 50. The first liner 61 may be an insulating layer, supporting the active layer 30 and isolating it from the shielding layer 50.
[0078] Optionally, the display module may further include a second substrate 62, which may be disposed between the source / drain layer 40 and the active layer 30. The second substrate 62 may be an insulating layer, and the source / drain layer 40 and the active layer 30 may be connected through vias on the second substrate 62, thereby isolating the active layer 30 from the shielding layer 50. A source / drain layer 43 may also be provided in the display module, which may be connected in parallel with the source / drain layer 40, and the source / drain layer 43 may help reduce signal voltage. The source / drain layer 43 can be disposed between the source / drain layer 40 and the active layer 30. The orthogonal projection of the source / drain layer 40 on the substrate 10 can cover the orthogonal projection of the source / drain layer 43 on the substrate 10. The area of the source / drain layer 43 can be smaller than the area of the source / drain layer 40. The orthogonal projection of the source / drain layer 43 on the substrate 10 can cover the orthogonal projection of the semiconductor region of the active layer 30 on the substrate 10. The source / drain layer 43 can also help block ambient light from shining on the semiconductor region of the active layer 30, thereby reducing the impact of ambient light on the semiconductor region of the active layer 30.
[0079] like Figure 2 , Figure 5 , Figures 7 to 9 As shown, a substrate 11 can be disposed on the substrate 10, a shielding layer 50 can be disposed on the substrate 11, a first liner 61 can be disposed on the shielding layer 50, an active layer 30 can be disposed on the first liner 61, a cover layer 12 covering the active layer 30 can be disposed on the first liner 61, the cover layer 12 can be an insulating layer, a second liner 62 can be disposed on the cover layer 12, a source / drain layer 43 can be disposed on the second liner 62, a first deposition layer 13 covering the source / drain layer 43 can be disposed on the second liner 62, a second deposition layer 14 can be disposed on the first deposition layer 13, the first deposition layer 13 and the second deposition layer 14 can be insulating layers, a first planarization layer 15 can be disposed on the second deposition layer 14, and a source / drain layer 40 can be disposed on the first planarization layer 15. The source / drain layer 40 can be electrically connected to the active layer 30 through vias. A second planarization layer 16 covering the source / drain layer 40 can be disposed on the first planarization layer 15. A pixel defining layer 17 can be disposed on the second planarization layer 16. A light-emitting unit 20 can be disposed in the opening of the pixel defining layer 17. The light-emitting unit includes a first electrode 21, a light-emitting layer 23, and a second electrode 22 stacked together. The first electrode 21 can be an anode, and the second electrode 22 can be a cathode. An encapsulation layer 18 can be disposed above the light-emitting unit 20 to protect the light-emitting unit and the film layer.
[0080] like Figure 10 As shown, this is a schematic diagram of the source / drain layer structure in an existing display module. Figure 11 The diagram shown is a schematic of the increased source / drain layer area. Figure 12 The diagram shown is a schematic representation of the source / drain layer in an embodiment of the present invention. The layer will have... Figure 10As a comparative example 1, the display module with the central source drain layer will have Figure 11 As a comparative example 2, the display module with the central source drain layer will have Figure 12 As an example, the display module with the central source drain layer was illuminated with light at a 45-degree tilt angle to test the light transmittance and the powder emission of the display module, as shown in Table 1.
[0081] Table 1. Transmittance and powder distribution of different display modules
[0082]
[0083] As shown in Table 1, the display module of the present invention does not exhibit pink tint, and its light transmittance meets the requirements, which is beneficial for ensuring the transmittance of ambient light and the normal operation of the ambient light sensor and fingerprint hole. It can be seen that, while achieving the same light-shielding effect, the transmittance of Example 1 is significantly improved compared to the scheme in Comparative Example 2 that directly increases the area of the source and drain layers.
[0084] In embodiments of the present invention, the light-emitting unit 20 may include a first electrode 21, a light-emitting layer 23, and a second electrode 22. The first electrode 21 may be an anode, and the second electrode 22 may be a cathode. The light-emitting layer is driven to emit light through the first electrode 21 and the second electrode 22. Figures 14 to 25 As shown, the first electrode 21 includes a third region 211 and a fourth region 212. The fourth region 212 extends along the outer periphery of the third region 211. The orthographic projection of the fourth region 212 on the substrate 10 is arranged around the orthographic projection of the third region 211 on the substrate 10. The included angle between the third region 211 and the fourth region 212 is an obtuse angle or a right angle. The third region 211 and the fourth region 212 are not on the same plane.
[0085] The number of fourth region portions 212 can be one or more. For example, there can be two fourth region portions 212, which can be spaced apart or connected in contact. When there are multiple fourth region portions 212, the included angles between the multiple fourth region portions 212 and the third region portion 211 can be the same or different. For example, the included angles between the multiple fourth region portions 212 and the third region portion 211 can be the same, which is beneficial for providing the same light-shielding effect to the semiconductor region of the active layer. The fourth region portions 212 are arranged on the outer periphery of the third region portion 211, and the fourth region portions 212 are in an inclined state. The fourth region portions 212 can effectively block ambient light from shining on the semiconductor region of the active layer 30, reducing the impact of ambient light on the semiconductor region of the active layer 30. Figure 25As shown, the first electrode 21 can block light from oblique angles. Compared with directly increasing the area of the first electrode 24, the projected area of the first electrode 21 in this embodiment can be significantly reduced while producing the same light-blocking effect, thereby reducing the loss of OLED transmittance from the front viewing angle.
[0086] In the display module of this embodiment, the orthographic projection of the first electrode 21 onto the substrate 10 covers the orthographic projection of the semiconductor region of the active layer 30 onto the substrate 10. The fourth region 212 of the first electrode 21 extends along the outer periphery of the third region 211. The orthographic projection of the fourth region 212 onto the substrate 10 surrounds the orthographic projection of the third region 211 onto the substrate 10. The angle between the fourth region 212 and the third region 211 is an obtuse angle or a right angle. The fourth region 212 can block ambient light, reducing the amount of ambient light illuminating the semiconductor region of the active layer, reducing the influence of light on the semiconductor region of the active layer, preventing the problem of pink display defects caused by ambient light illuminating the semiconductor region of the active layer, and improving the display effect. In addition, the obtuse angle or right angle between the fourth region 212 and the third region 211 can reduce the area of the orthographic projection of the source / drain layer onto the substrate, which is beneficial to ensuring the transmittance of ambient light and ensuring the normal use of the ambient light sensor and fingerprint hole.
[0087] In some embodiments, such as Figure 14 and Figure 15 As shown, the fourth region 212 can be disposed on the side of the third region 211 near the substrate 10, and the fourth region 212 can be disposed on the same side of the third region 211. There can be multiple fourth region 212s; for example, there can be two fourth region 212s. The two fourth region 212s can be disposed on the side of the third region 211 near the substrate 10, and the two fourth region 212s can be symmetrically arranged to provide the same light-shielding effect on the semiconductor region of the active layer. During the fabrication process, such as... Figure 16 As shown, before fabricating the first electrode 21, a protrusion can be fabricated on the second planarization layer 16 corresponding to the first electrode 21 using an exposure process. The slope angle of the inclined edge of the protrusion can be 25 to 70 degrees, preferably 45 degrees, and the height of the protrusion can be 0.5 to 2 μm. The first electrode 21 is fabricated on the protrusion, and then the subsequent processes are completed.
[0088] In other embodiments, such as Figure 17 and Figure 18As shown, the fourth region 212 can be disposed on the side of the third region 211 away from the substrate 10. The fourth region 212 can be disposed on the same side of the third region 211. There can be multiple fourth regions 212; for example, there can be two fourth regions 212. The two fourth regions 212 can be disposed on the side of the third region 211 away from the substrate 10, and the two fourth regions 212 can be symmetrically arranged to provide the same light-shielding effect on the semiconductor region of the active layer. During the fabrication process, such as... Figure 19 As shown, before fabricating the first electrode 21, a protrusion can be fabricated on the second planarization layer 16 corresponding to the first electrode 21 using an exposure process. The slope angle of the inclined edge of the protrusion can be 25 to 70 degrees, preferably 45 degrees, and the height of the protrusion can be 0.5 to 2 μm. The first electrode 21 is fabricated on the protrusion, and then the subsequent processes are completed.
[0089] Optionally, such as Figure 22 and Figure 23 As shown, the number of fourth region portions 212 can be multiple. At least one fourth region portion 212 can be disposed on the side of the third region portion 211 away from the substrate 10, and at least one fourth region portion 212 can be disposed on the side of the third region portion 211 close to the substrate 10. For example, the number of fourth region portions 212 can be two. One fourth region portion 212 can be disposed on the side of the third region portion 211 away from the substrate 10, and the other fourth region portion 212 can be disposed on the side of the third region portion 211 close to the substrate 10, so as to have the same light-shielding effect on the semiconductor region of the active layer. During the fabrication process, such as Figure 24 As shown, before fabricating the first electrode 21, a protrusion can be fabricated on the second planarization layer 16 corresponding to the first electrode 21 using an exposure process. The slope angle of the inclined edge of the protrusion can be 25 to 70 degrees, preferably 45 degrees, and the height of the protrusion can be 0.5 to 2 μm. The first electrode 21 is fabricated on the protrusion, and then subsequent processes are completed. There can be multiple light-emitting units 20 and TFTs, with each TFT driving one light-emitting unit 20. The shapes of the first electrodes 21 in multiple light-emitting units 20 can be the same or different. The shapes of the first electrodes 21 in multiple light-emitting units 20 can be the same, which facilitates manufacturing and simplifies the process. For example, there can be four light-emitting units 20 and four TFTs. The shapes of the first electrodes 21 in the four light-emitting units 20 can be the same or different, which facilitates manufacturing and simplifies the process.
[0090] like Figure 14 and Figure 15 As shown, the fourth region 212 of the first electrode 21 in the four light-emitting units 20 can be disposed on the side of the third region 211 near the substrate 10. Figure 17 and Figure 18 As shown, the fourth region 212 of the source / drain layer 40 in the four light-emitting units 20 can be disposed on the side of the third region 211 away from the substrate 10. Figure 22 and Figure 23 As shown, in the four light-emitting units 20, the first electrode 21 of each light-emitting unit 20 has two fourth region portions 212. One fourth region portion 212 of the first electrode 21 can be disposed on the side of the third region portion 211 near the substrate 10, and the other fourth region portion 212 of the first electrode 21 can be disposed on the side of the third region portion 211 near the substrate 10. Figure 20 and Figure 21 As shown, in the two light-emitting units 20, the fourth region 212 of the first electrode 21 can be disposed on the side of the third region 211 close to the substrate 10, and in the other two light-emitting units 20, the fourth region 212 of the first electrode 21 can be disposed on the side of the third region 211 away from the substrate 10.
[0091] In some embodiments, the orthographic projection of the third region 211 on the substrate 10 covers the orthographic projection of the semiconductor region of the active layer 30 on the substrate 10. This can increase the coverage area of the third region 211, allowing it to block ambient light from reaching the semiconductor region of the active layer 30. This also allows the fourth region 212, located at the outer periphery of the third region 211, to more effectively block ambient light from reaching the semiconductor region of the active layer 30, thereby reducing the impact of ambient light on the semiconductor region of the active layer 30.
[0092] In an embodiment of the present invention, the orthographic projection of the fourth region 212 on the substrate 10 is arranged around the orthographic projection of the semiconductor region of the active layer 30 on the substrate 10. The orthographic projection of the fourth region 212 on the substrate 10 may also be arranged around the orthographic projection of the active layer 30 on the substrate 10. The inner edge of the orthographic projection of the fourth region 212 on the substrate 10 can be in contact with the outer edge of the orthographic projection of the semiconductor region of the active layer 30 on the substrate 10, so that the fourth region 212 can more effectively block ambient light from illuminating the semiconductor region of the active layer 30 and reduce the influence of ambient light on the semiconductor region of the active layer 30.
[0093] In some embodiments, the orthographic projection of the fourth region 212 on the substrate 10 and the orthographic projection of the semiconductor region of the active layer 30 on the substrate 10 can be spaced apart. The orthographic projection of the fourth region 212 on the substrate 10 and the orthographic projection of the active layer 30 on the substrate 10 can also be spaced apart. The inner edge of the orthographic projection of the fourth region 212 on the substrate 10 and the outer edge of the orthographic projection of the semiconductor region of the active layer 30 on the substrate 10 can be spaced apart, so that the fourth region 212 can more effectively block ambient light from shining on the semiconductor region of the active layer 30 and reduce the influence of ambient light on the semiconductor region of the active layer 30.
[0094] In embodiments of the present invention, the angle between the fourth region 212 and the third region 211 is 110 to 155 degrees, for example, 135 degrees. When the angle between the fourth region 212 and the third region 211 is small, it cannot effectively block ambient light; when the angle between the fourth region 212 and the third region 211 is large, the fourth region 212 and the third region 211 are nearly on the same plane. While blocking ambient light, the area of the fourth region 212 is large, and the area of its orthographic projection on the substrate 10 is large. This easily blocks ambient light in the direction perpendicular to the substrate 10, which is detrimental to ensuring ambient light transmittance and affects the normal use of the ambient light sensor and fingerprint hole. Therefore, the angle between the fourth region 212 and the third region 211 is 110 to 155 degrees. The specific angle can be selected according to the actual situation, so that the fourth region 212 can effectively block ambient light from shining on the semiconductor region of the active layer 30, reduce the influence of ambient light on the semiconductor region of the active layer 30, and at the same time reduce the area of the orthogonal projection of the fourth region 212 on the substrate, which is conducive to ensuring the transmittance of ambient light and ensuring the normal use of the ambient light sensor and fingerprint hole.
[0095] In some embodiments, the height of the fourth region 212 perpendicular to the substrate 10 can be 0.5-2 μm. For example, the height of the fourth region 212 perpendicular to the substrate 10 can be 0.5 μm or 2 μm. If the height of the fourth region 212 perpendicular to the substrate 10 is small, it cannot effectively block ambient light from illuminating the semiconductor region of the active layer 30. If the height of the fourth region 212 perpendicular to the substrate 10 is large, although it can effectively block ambient light from illuminating the semiconductor region of the active layer 30, the large area wastes material and increases the difficulty of the fabrication process. Therefore, the height of the fourth region 212 perpendicular to the substrate 10 can be 0.5-2 μm, so that the fourth region 212 can effectively block ambient light from illuminating the semiconductor region of the active layer 30, and reduce the difficulty of fabrication.
[0096] In embodiments of the present invention, the number of fourth region portions 212 can be multiple, and the included angle between the multiple fourth region portions 212 and the third region portion 211 can be the same. For example, the included angle between the multiple fourth region portions 212 and the third region portion 211 can be 135 degrees, so as to have the same light-shielding effect on the semiconductor region of the active layer. Figure 26 As shown, a schematic diagram of the structure of the first electrode in an existing display module is presented. Figure 27 The diagram shown is a schematic of the increased area of the first electrode. Figure 28 The diagram shown is a schematic representation of the structure of the first electrode in an embodiment of the present invention. The electrode having... Figure 26 As a comparative example 3, the display module with the first electrode in the middle is used to display modules with the following characteristics. Figure 27 As a comparative example 4, the display module with the first electrode in the middle is used to display modules with the following characteristics. Figure 28 As Example 2, the display module with the first electrode was illuminated with light at a 45-degree angle to test the light transmittance and the powder emission of the display module, as shown in Table 2.
[0097] Table 2 Transmittance and Powder Generation of Different Display Modules
[0098]
[0099] As shown in Table 2, the display module of the present invention does not exhibit pink tint, and its light transmittance meets the requirements, which is beneficial for ensuring the transmittance of ambient light and the normal operation of the ambient light sensor and fingerprint hole. It can be seen that, while achieving the same light-shielding effect, the transmittance of Example 2 is significantly improved compared to the scheme in Comparative Example 4 that directly increases the area of the first electrode.
[0100] In embodiments of the present invention, the source / drain layer 40 may include a first region 41 and a second region 42, and the source / drain layer 40 may be configured as the source / drain layer structure described in the above embodiments. The first electrode 21 may include a third region 211 and a fourth region 212, and the first electrode 21 may be configured as the first electrode structure described in the above embodiments. Alternatively, both the source / drain layer 40 and the first electrode 21 may be configured as described in the above embodiments.
[0101] This invention provides a display panel including the display module described in the above embodiments. The display panel having the display module described in the above embodiments can prevent the appearance of pinkish tint caused by ambient light irradiating the semiconductor area of the active layer, thereby improving the display effect.
[0102] This invention provides a display device including the display panel described in the above embodiments. The display device having the display panel described in the above embodiments can prevent the appearance of pinkish tint caused by ambient light irradiating the semiconductor region of the active layer, thereby improving the display effect.
[0103] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other modifications under the guidance of the present invention without departing from the spirit and scope of the claims, and all of these modifications are within the protection scope of the present invention.
Claims
1. A display module, characterized in that, include: A substrate is provided with a light-emitting unit and a TFT for driving the light-emitting unit. The TFT includes an active layer, a gate, and a source / drain layer electrically connected to the active layer. The source / drain layer is disposed between the light-emitting unit and the active layer. The orthographic projection of the source / drain layer on the substrate covers the orthographic projection of the semiconductor region of the active layer on the substrate. The source / drain layer includes a first region and a second region. The second region extends along the outer periphery of the first region. The orthographic projection of the second region on the substrate is arranged around the orthographic projection of the first region on the substrate. The included angle between the second region and the first region is an obtuse angle or a right angle. The source / drain layer and the active layer are spaced apart; The orthogonal projection of the first region onto the substrate covers the orthogonal projection of the semiconductor region of the active layer onto the substrate. The orthographic projection of the second region on the substrate is arranged around the orthographic projection of the semiconductor region of the active layer on the substrate.
2. The display module according to claim 1, characterized in that, The second region is disposed on the side of the first region closest to the substrate.
3. The display module according to claim 1, characterized in that, The second region is located on the side of the first region away from the substrate.
4. The display module according to claim 1, characterized in that, The number of second regions is multiple, at least one second region is disposed on the side of the first region away from the substrate, and at least one second region is disposed on the side of the first region close to the substrate.
5. The display module according to claim 1, characterized in that, The orthographic projection of the second region on the substrate and the orthographic projection of the semiconductor region of the active layer on the substrate are spaced apart.
6. The display module according to claim 1, characterized in that, The included angle is 110 to 155 degrees.
7. The display module according to claim 1, characterized in that, The second region has a height of 0.5-2 μm perpendicular to the substrate.
8. The display module according to claim 1, characterized in that, There are multiple second regions, and the included angles between the multiple second regions and the first region are the same.
9. The display module according to claim 1, characterized in that, Also includes: A shielding layer is disposed on the substrate, and the TFT is disposed on the side of the shielding layer away from the substrate.
10. The display module according to claim 9, characterized in that, A first liner is provided between the active layer and the shielding layer.
11. The display module according to claim 1, characterized in that, Also includes: A second liner is disposed between the source / drain layer and the active layer.
12. A display panel, characterized in that, The display module includes any one of claims 1-11.
13. A display device, characterized in that, Includes the display panel as described in claim 12.