SSB enhancement for NR CDRX and DRX operations

By introducing the QCL relationship between SSB and TRS in NR and adjusting the SSB period, the problem of decoding performance degradation caused by frequency and timing errors in DRX and CDRX operations is solved, and fast synchronization and low-power timing frequency estimation are achieved.

CN116325973BActive Publication Date: 2025-09-12APPLE INC
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Patent Information

Application Number
CN202080105780.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-10-02
Publication Date
2025-09-12
Estimated Expiration
2040-10-02

AI Technical Summary

Technical Problem

In NR, frequency and timing errors in user equipment during DRX or CDRX operation lead to degraded decoding performance of downlink control information and physical downlink shared channels, and the lack of support for cell-specific reference signals increases the challenges of timing and frequency estimation.

Method used

By introducing quasi-co-location (QCL) types between different synchronization signal blocks and configuring the relationship between SSB and TRS, user equipment is allowed to combine measurements to estimate frequency and timing errors, and adjust the SSB period before DRX wake-up to improve synchronization accuracy.

Benefits of technology

The invention realizes fast frequency and timing synchronization of user equipment during DRX and CDRX operation, reduces power consumption and improves decoding performance of downlink information.

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Abstract

A user equipment (UE) is configured to receive a synchronization signal block (SSB) from a wireless network to estimate frequency and timing errors. The UE receives a quasi-co-location (QCL) configuration between the synchronization signal block (SSB) and at least one of another SSB or a tracking reference signal (TRS), receives the SSB and the at least one of the another SSB or the TRS, and estimates the frequency and timing errors of the SSB by combining measurements for the SSB and measurements for the at least one of the another SSB or the TRS based on the QCL configuration.
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Description

Technical Field

[0001] The present application relates generally to wireless communication systems, and more particularly to SSB enhancement for NR CDRX and DRX operations. Background Art

[0002] In NR, discontinuous reception (DRX) and connected mode DRX (CRDX) operations are supported for user equipment (UE) power conservation. When a UE sleeps for a long period of time during DRX or CDRX operation, the UE may have large frequency and timing errors when waking up. Large frequency and timing offsets may affect the UE's decoding of downlink control information (DCI) and physical downlink shared channel (PDSCH). In addition, the "always on" signals used in LTE (e.g., cell-specific reference signals (CRS)) are removed in NR, which introduces further challenges for the UE to obtain timing and frequency estimates. Summary of the Invention

[0003] Some example embodiments relate to one or more processors configured to perform operations including receiving a quasi co-location (QCL) configuration between a synchronization signal block (SSB) and at least one of another SSB or a tracking reference signal (TRS), receiving the SSB and at least one of the another SSB or the TRS, and estimating frequency and timing errors for the SSB by combining measurements for the SSB and measurements for at least one of the another SSB or the TRS based on the QCL configuration.

[0004] Other exemplary embodiments relate to a user equipment (UE) having a transceiver configured to connect to a base station and one or more processors communicatively coupled to the transceiver and configured to perform operations including receiving a quasi-co-location (QCL) configuration between a synchronization signal block (SSB) and at least one of another SSB or a tracking reference signal (TRS), receiving the SSB and at least one of the another SSB or the TRS, and estimating frequency and timing errors for the SSB by combining measurements for the SSB and measurements for at least one of the another SSB or the TRS based on the QCL configuration.

[0005] Still other example embodiments relate to one or more processors configured to perform operations including: receiving a synchronization signal block (SSB) transmitted with a first period when a predetermined period has passed since one of a discontinuous reception (DRX) wakeup or a connected DRX (CDRX) wakeup; receiving an SSB transmitted with a second period more frequent than the first period when a predetermined period has passed since the DRX wakeup or the CDRX wakeup; and estimating frequency and timing errors for the SSB by combining measurements of the received SSBs. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 Exemplary network arrangements are shown according to various exemplary embodiments.

[0007] Figure 2 An exemplary UE according to various exemplary embodiments is shown.

[0008] Figure 3 Exemplary network cells are shown according to various exemplary embodiments.

[0009] Figure 4a A tank diagram including four SSBs with a QCL-TypeX configuration is shown according to various exemplary embodiments.

[0010] Figure 4b A tank diagram including four SSBs is shown, wherein a first pair of SSBs has a QCL-TypeX configuration and a second pair of SSBs has a QCL-TypeX configuration, according to various exemplary embodiments.

[0011] Figure 5a An exemplary map illustrating the QCL relationship between SBS and TRS according to various exemplary embodiments.

[0012] Figure 5b An exemplary one-to-one mapping diagram of the QCL relationship between SBS and TRS is shown according to various exemplary embodiments.

[0013] Figure 5c An exemplary one-to-many mapping diagram illustrating the QCL relationship between SBS and TRS according to various exemplary embodiments.

[0014] Figure 6 Methods for performing UE synchronization according to various exemplary embodiments are shown, including QCL relationships of synchronization signal blocks (SSBs) with further SSBs and / or tracking reference signals (TRSs).

[0015] Figure 7 SSB timing diagrams illustrating non-uniform SSB periods according to various exemplary embodiments are shown. DETAILED DESCRIPTION

[0016] The exemplary embodiments may be further understood with reference to the following description and associated drawings, wherein similar elements are numbered the same. The exemplary embodiments describe quasi-co-location (QCL) configurations between different synchronization signal blocks (SSBs) and between tracking reference signals (TRSs) and SSBs, enabling user equipment (UE) to better estimate the frequency and timing offset of received signals. In additional exemplary embodiments, non-uniform SSB periods are supported.

[0017] Timing and carrier synchronization are essential for the proper operation of wireless communication systems. Timing synchronization is the process by which a receiver node determines the correct moment to sample an incoming signal. Carrier synchronization is the process by which a receiver adapts the frequency and phase of its local carrier oscillator to that of the received signal. UEs can use the Primary and Secondary Synchronization Signals (PSS and SSS) in the SSB to achieve synchronization in the downlink.

[0018] According to the exemplary embodiments described herein, a UE can quickly update its timing and frequency error estimates to achieve synchronization with a network cell, such as a next-generation Node B (gNB) in a New Radio (NR) communication system. Fast synchronization allows the UE to save power and more efficiently decode downlink control information (DCI) and the physical downlink shared channel (PDSCH).

[0019] Network / Device

[0020] Figure 1 An exemplary network arrangement 100 according to various exemplary embodiments is shown. The exemplary network arrangement 100 includes a plurality of UEs 110, 112. Those skilled in the art will appreciate that a UE may be any type of electronic component configured to communicate via a network, such as a component of a connected car, a mobile phone, a tablet computer, a smartphone, a phablet, an embedded device, a wearable device, an Internet of Things (IoT) device, etc. It should also be understood that an actual network arrangement may include any number of UEs used by any number of users. Therefore, the example with two UEs 110, 112 is provided for illustrative purposes only. In some exemplary embodiments described below, a group of UEs may be employed to perform corresponding channel measurements.

[0021] UE 110, 112 can communicate directly with one or more networks. In the example of network configuration 100, the networks with which UE 110, 112 can wirelessly communicate are 5G NR radio access network (5G NR-RAN) 120, LTE radio access network (LTE-RAN) 122, and wireless local area network (WLAN) 124. Therefore, UE 110, 112 can include a 5G NR chipset for communicating with 5G NR-RAN 120, an LTE chipset for communicating with LTE-RAN 122, and an ISM chipset for communicating with WLAN 124. However, UE 110, 112 can also communicate with other types of networks (e.g., traditional cellular networks), and UE 110 can also communicate with the network via a wired connection. Referring to the exemplary embodiment, UE 110, 112 can establish a connection with 5G NR-RAN 120 and / or LTE-RAN 122.

[0022] 5G NR-RAN 120 and LTE-RAN 122 may be part of a cellular network that may be deployed by a cellular provider (e.g., Verizon, AT&T, T-Mobile, etc.). These networks 120, 122 may include, for example, cells or base stations (NodeB, eNodeB, HeNB, eNBS, gNB, gNodeB, macrocell base stations, microcell base stations, small cell base stations, femtocell base stations, etc.) configured to send and receive traffic from UEs equipped with appropriate cellular chipsets. WLAN 124 may include any type of wireless local area network (WiFi, hotspot, IEEE 802.11x network, etc.).

[0023] UEs 110 and 112 may be connected to 5G NR-RAN 120 via at least one of next-generation Node B (gNB) 120A and / or gNB 120B. Reference to two gNBs 120A and 120B is for illustrative purposes only. The exemplary embodiments are applicable to any suitable number of gNBs. For example, UEs 110 and 112 may be simultaneously connected to and exchange data with multiple gNBs in a multi-cell carrier aggregation configuration. UEs 110 and 112 may also be connected to LTE-RAN 122 via either or both eNBs 122A and 122B, or to any other type of RAN, as described above. In network arrangement 100, UE 110 is shown as having a connection to gNB 120A, while UE 112 is shown as having a connection to gNB 120B.

[0024] In addition to networks 120, 122, and 124, network arrangement 100 includes a cellular core network 130, the Internet 140, an IP Multimedia Subsystem (IMS) 150, and a network service backbone 160. Cellular core network 130 (e.g., 5GC for NR) can be considered an interconnected collection of components that manage the operation and traffic of a cellular network. Cellular core network 130 also manages traffic flowing between the cellular network and the Internet 140.

[0025] The IMS 150 can be generally described as an architecture for delivering multimedia services to the UE 110 using the IP protocol. The IMS 150 can communicate with the cellular core network 130 and the Internet 140 to provide multimedia services to the UE 110. The network service backbone 160 communicates directly or indirectly with the Internet 140 and the cellular core network 130. The network service backbone 160 can be generally described as a set of components (e.g., servers, network storage arrangements, etc.) that implement a set of services that can be used to extend the functionality of the UE 110 to communicate with various networks.

[0026] Figure 2 An exemplary UE 110 is shown according to various exemplary embodiments. Figure 1 10. The UE 110 may represent any electronic device and may include a processor 205, a memory arrangement 210, a display device 215, an input / output (I / O) device 220, a transceiver 225, and other components 230. The other components 230 may include, for example, an audio input device, an audio output device, a battery providing a limited power source, a data acquisition device, a port for electrically connecting the UE 110 to other electronic devices, sensors for detecting conditions of the UE 110, and the like. Figure 2 The UE 110 shown may also represent UE 112.

[0027] The processor 205 may be configured to execute multiple engines of the UE 110. For example, the engines may include a synchronization engine 235 for synchronizing frequency and timing error offsets of network connections. The synchronization engine 235 may perform operations such as receiving QCL relationships between SSBs and / or between SSBs and TRSs and estimating frequency and timing error offsets by combining estimates from various signals, as will be described in further detail below.

[0028] The engine described above as an application (e.g., a program) executed by the processor 205 is merely exemplary. The functionality associated with the engine may also be represented as a standalone integrated component of the UE 110, or may be a modular component coupled to the UE 110, such as an integrated circuit with or without firmware. For example, an integrated circuit may include input circuitry for receiving signals and processing circuitry for processing signals and other information. The engine may also be embodied as one application or multiple separate applications. In addition, in some UEs, the functionality described for the processor 205 is shared between two or more processors, such as a baseband processor and an application processor. The exemplary embodiments may be implemented in any of these or other configurations of the UE.

[0029] The memory 210 may be a hardware component configured to store data related to operations performed by the UE 110. The display device 215 may be a hardware component configured to display data to a user, and the I / O device 220 may be a hardware component that enables user input. The display device 215 and the I / O device 220 may be separate components or may be integrated together (such as a touch screen). The transceiver 225 may be a hardware component configured to establish a connection with the 5G-NR RAN 120, the LTE RAN 122, etc. Thus, the transceiver 225 may operate on a variety of different frequencies or channels (e.g., a contiguous frequency group). For example, when NR-U is configured, the transceiver 225 may operate on an unlicensed spectrum.

[0030] Figure 3 An exemplary network cell, in this case a gNB 120A, is shown according to various exemplary embodiments. As described above with reference to UE 110, gNB 120A may represent a cell that provides service as a PCell or SCell or is configured independently from UE 110. gNB 120A may represent any access node of a 5G NR network through which UEs 110, 112 may establish connections and manage network operations. Figure 3 The gNB 120A shown may also represent gNB 120B.

[0031] The gNB 120A may include a processor 305, a memory arrangement 310, an input / output (I / O) device 320, a transceiver 325, and other components 330. The other components 330 may include, for example, an audio input device, an audio output device, a battery, a data acquisition device, ports for electrically connecting the gNB 120A to other electronic devices, and the like.

[0032] The processor 305 may be configured to execute multiple engines of the gNB 120A. For example, the engines may include the QCL engine 235 for performing operations including determining QCL relationships between SSBs and / or between an SSB and a TRS and configuring the UE with the QCL relationships, as described in detail below.

[0033] The engines described above, each as an application (e.g., a program) executed by processor 305, are exemplary only. The functionality associated with the engines may also be represented as a standalone, integrated component of gNB 120A, or as a modular component coupled to gNB 120A, such as an integrated circuit with or without firmware. For example, an integrated circuit may include input circuitry for receiving signals and processing circuitry for processing signals and other information. Furthermore, in some gNBs, the functionality described for processor 305 is split among multiple processors (e.g., a baseband processor, an application processor, etc.). The exemplary embodiments may be implemented in any of these or other configurations of the gNB.

[0034] Memory 310 may be a hardware component configured to store data related to operations performed by UE 110, 112. I / O device 320 may be a hardware component or port that enables a user to interact with gNB 120A. Transceiver 325 may be a hardware component configured to exchange data with UE 110, 112 and any other UE in system 100. Transceiver 325 may operate on a variety of different frequencies or channels (e.g., a set of contiguous frequencies). For example, when NR-U functionality is configured, transceiver 325 may operate on an unlicensed bandwidth. Thus, transceiver 325 may include one or more components (e.g., radio components) to enable data exchange with various networks and UEs.

[0035] Used for NR of DRX and CDRX

[0036] In NR, for user equipment (UE) power conservation, discontinuous reception (DRX) and connected mode DRX (CDRX) operations are supported. CDRX operation is supported for UEs in RRC connected mode and includes on periods during which the UE monitors the PDCCH for data scheduling. DRX operation is supported for UEs in RRC idle mode and includes on periods during which the UE monitors downlink control information (DCI) during paging opportunities.

[0037] In NR, when a UE sleeps for a long period during DRX or CDRX operation, the UE may have large frequency and timing errors when waking up (entering its on period). Large frequency and timing offsets may affect the UE's decoding of DCI and PDSCH. In addition, the "always on" signals used in LTE (e.g., cell-specific reference signals (CRS)) are removed in NR, which introduces further challenges for the UE to obtain timing and frequency estimates.

[0038] Tracking Reference Signal (TRS) is introduced in NR to help UE perform frequency and timing estimation. The TRS design is similar to the CRS design, however, TRS cannot be configured in RRC idle mode. Before CDRX / DRX wake-up, in order to prepare for DCI and PDSCH demodulation, the UE may need to perform pre-processing for frequency and timing tracking. If dense RS is not configured before CDRX / DRX wake-up, it may lead to a significant increase in UE power consumption.

[0039] SSB timing frequency QCL enhancement

[0040] According to various exemplary embodiments described herein, additional QCL types are introduced between different synchronization signal blocks (SSBs) to define situations where the timing and frequency errors estimated from different SSBs are similar. This allows the UE to securely combine timing and frequency error estimates from multiple SSBs to improve estimation accuracy. The SSBs include the primary synchronization signal (PSS), the secondary synchronization signal (SSS), the physical broadcast channel (PBCH) demodulation reference signal (DMRS), and PBCH data transmitted via specific beams radiated in specific directions.

[0041] Existing quasi-co-location (QCL) types defined in 3GPP TS 38.214 include QCL-Type A, QCL-Type B, QCL-Type C, and QCL-Type D. QCL-Type A addresses Doppler shift, Doppler spread, average delay, and delay spread. QCL-Type B addresses Doppler shift and Doppler spread. QCL-Type C addresses Doppler shift and average delay. QCL-Type D addresses spatial Rx parameters.

[0042] According to various exemplary embodiments described herein, a new QCL type, referred to herein as QCL-TypeX, is defined for the timing and frequency relationships between different reference signals. SSBs defined with a QCL-TypeX relationship are assumed to share the same timing and frequency errors and are grouped together. Therefore, a UE can combine measurements for SSBs in an SSB group to better determine the timing and frequency errors of the SSBs in the group. Figure 4aA slot diagram 400 is shown including four SSBs 405a-d having a QCL-Type X configuration according to various exemplary embodiments. Thus, frequency and timing error estimates for each of the SSBs 405a-d may be shared.

[0043] Different groups of SSBs may share different timing and frequency errors. For example, one group may transmit from a different antenna panel than another group and have a different frequency error. In another example, one group may transmit from a different transmit and receive point (TRP) than another group and have an even greater difference in timing and frequency error. Figure 4b A slot diagram 450 is shown that includes four SSBs 455a-d, where SSBs 455a and 455b have a QCL-Type X configuration, and SSBs 455c and 455b have a QCL-Type X configuration. Thus, the frequency and timing error estimates of SSBs 405a-b can be shared, and the frequency and timing error estimates of SSBs 405c-d can be shared.

[0044] The QCL configuration between different SSBs may be configured for the UE in system information (e.g., system information block (SIB)), and in some embodiments, may be used for the UE in RRC idle, RRC inactive, or RRC connected state (e.g., for DRX or CDRX). The QCL configuration may also be configured via RRC configuration after an RRC connection is established, in which case the UE is in the RRC connected state and the QCL configuration may be used for CDRX.

[0045] For each SSB, a QCL-TypeX reference signal (RS) can be configured. The source of the QCL-TypeX reference signal can be the SSB. When the QCL-TypeX reference signal source is not configured for the SSB, the SSB can be QCL-TypeX to itself, and the SSB uses itself as the QCL-TypeX source.

[0046] The SSB timing and frequency QCL configuration can be configured in various ways. For example, out of a total of N SSBs, M segments of SSBs can be configured, each with K SSBs (N=M*K). In a first example, for each of the consecutive K SSBs in the same segment, the SSBs can be grouped to share the same timing and frequency errors. All N SSBs are segmented into M segments of SSBs, each with K consecutive SSBs. For example, when M=2 and K=4 (N=8 SSBs), the SSB configuration for 8 SSBs can be (T / F1, T / F1, T / F1, T / F1, T / F2, T / F2, T / F2).

[0047] In the second example, within each of the M consecutive SSBs, each SSB has a different timing and frequency error assumption. For each of the M SSBs, the SSBs share the same timing and frequency error when they are M separate SSBs. For example, when M = 2 and K = 4 (N = 8 SSBs), the SSB configuration for the 8 SSBs can be (T / F1, T / F2, T / F1, T / F2, T / F1, T / F2, T / F1, T / F2).

[0048] According to another exemplary embodiment, TRS may be configured as QCL to SSB. In the current standard, aperiodic TRS (AP-TRS) may be configured as QCL only to periodic TRS (P-TRS). In one exemplary embodiment, AP-TRS may be configured as QCL to SSB. In another exemplary embodiment, P-TRS and semi-persistent TRS (SP-TRS) may be configured as QCL to SSB. SSB is typically transmitted periodically with a period of 20ms, while TRS may be transmitted with a smaller or larger period. Therefore, using the QCL relationship between TRS and SSB may allow the UE to perform faster synchronization with the TRP.

[0049] Figure 5a An exemplary mapping diagram 500 illustrates the QCL relationship between SBSs and TRSs. In this example, TRS1 510a is QCLed to SSB1 505a, TRS2 510b is QCLed to SSB2 505b, TRS3 510c is QCLed to SSB3 505c, and TRS4 510d is QCLed to SSB4 505d. Measurements for QCLTRS can also be used when the UE performs frequency and timing error estimation for SSBs.

[0050] The QCL mapping between TRS and SSB can be one-to-one. Figure 5b An exemplary one-to-one mapping diagram 520 similar to the diagram 500 discussed above is shown. In this example, one TRS can be QCLed to a single SSB, e.g., TRS1 530a is QCLed to SSB1 525a, TRS2 530b is QCLed to SSB2 525b, TRS3 530c is QCLed to SSB3 525c, and TRS4 530d is QCLed to SSB4 525d. To reduce TRS overhead, the QCL mapping between TRSs and SSBs can be one-to-many. Figure 5cAn exemplary one-to-many mapping diagram 540 is shown. In a one-to-many configuration, one TRS may be QCLed to more than one SSB, for example, TRS1 550a is QCLed to SSB1 545a and SSB2 545b, and TRS2 550b is QCLed to SSB3 545c and SSB4 545d.

[0051] Figure 6 A method 600 for performing UE synchronization is shown, including determining the QCL relationship of a synchronization signal block (SSB) with another SSB and / or a tracking reference signal (TRS). At 605, the gNB determines the QCL relationship of the SSB with one or more other SSBs and / or TRSs. For example, as described above, multiple SSBs with the same TRP can be grouped together and share a QCL relationship. Additionally, a TRS can be associated with one or more SSBs and share a QCL relationship.

[0052] In 610, the gNB configures the UE with the determined QCL relationship. For example, as described above, the gNB can configure the QCL relationship via SIB or RRC signaling. In 615, the gNB transmits the SSB to the UE, and in some embodiments, transmits the TRS.

[0053] In 620, the UE determines frequency and timing error estimates for each of the received signals and combines the estimates for signals with defined QCL relationships. Thus, by using combined measurements from multiple signals with QCL relationships, the UE can synchronize to various TRPs more quickly and accurately.

[0054] According to another exemplary embodiment, for enhanced DRX idle mode operation, non-uniform SSB periodicity is supported. As described above, a typical SSB periodicity may be 20 ms. When the UE is not nearing DRX wakeup, e.g., within a certain minimum period from wakeup, the UE may assume a nominal SSB periodicity, e.g., every 20 ms. However, when the UE is nearing DRX wakeup, e.g., within a certain minimum period from wakeup, the UE may assume a more frequent SSB periodicity, e.g., every 5 ms.

[0055] Figure 7 An SSB timing diagram 700 is shown for a non-uniform SSB period. Synchronization signals 705a, 705b, and 705c are transmitted with a nominal SSB period (e.g., 20 ms between transmissions). As the UE approaches wakeup, the SSB period may be more frequent, e.g., 5 ms. Consequently, synchronization signals 705d, 705e, and 705f are transmitted with a shorter period until DRX wakeup 710.

[0056] The transition between the nominal and more frequent SSB cycles can be defined based on a window before DRX wakeup. This window can be a period of Xms. Figure 7 In the example of , if time periods are used, the window within which the period is more frequent is 20ms. In another embodiment, the window can be based on the number of SSBs (with a nominal period). Figure 7 In the example of FIG, if a window defined by SSB is used, the window can be based on the last SSB to be transmitted at a nominal period. After the SSB is transmitted, the period can be changed to a more frequent period.

[0057] Example

[0058] In a first embodiment, one or more processors are configured to perform operations comprising configuring a quasi-co-location (QCL) configuration between a synchronization signal block (SSB) and at least one of another SSB or a tracking reference signal (TRS) for a user equipment (UE), and transmitting the SSB and at least one of the another SSB or the TRS, wherein the UE estimates a frequency and timing error of the SSB by combining measurements of the SSB and measurements of at least one of the another SSB or the TRS.

[0059] In a second embodiment, the one or more processors according to the first embodiment, wherein the SSB and at least one of the additional SSB or TRS are transmitted from the same transmission and reception point (TRP).

[0060] In a third embodiment, the one or more processors according to the first embodiment, wherein the QCL configuration includes a set of SSBs.

[0061] In a fourth embodiment, the one or more processors according to the third embodiment, wherein the QCL configuration is transmitted in a system information block (SIB) or via radio resource control (RRC) signaling.

[0062] In a fifth embodiment, the one or more processors according to the third embodiment, wherein the QCL reference signal source is SSB.

[0063] In a sixth embodiment, the one or more processors according to the third embodiment, wherein consecutive SSBs share a QCL configuration.

[0064] In a seventh embodiment, the one or more processors are according to the third embodiment, wherein every M SSBs share a QCL configuration.

[0065] In an eighth embodiment, the one or more processors according to the first embodiment, wherein the QCL configuration includes TRS and one or more SSBs.

[0066] In a ninth embodiment, one or more processors according to the eighth embodiment, wherein one TRS is mapped to one SSB.

[0067] In a tenth embodiment, one or more processors according to the eighth embodiment, wherein a TRS is mapped to more than one SSB.

[0068] In an eleventh embodiment, a base station includes a transceiver configured to be connected to a user equipment (UE) and one or more processors configured to perform operations including: configuring a quasi-co-location (QCL) configuration between a synchronization signal block (SSB) and at least one of another SSB or a tracking reference signal (TRS) for the UE, and transmitting the SSB and at least one of the another SSB or the TRS, wherein the UE estimates a frequency and timing error of the SSB by combining measurements for the SSB and measurements for at least one of the another SSB or the TRS.

[0069] In a twelfth embodiment, the base station according to the eleventh embodiment, wherein the SSB and at least one of the additional SSB or TRS are transmitted from the same transmission and reception point (TRP).

[0070] In a thirteenth embodiment, the base station according to the eleventh embodiment, wherein the QCL configuration includes a group of SSBs.

[0071] In a fourteenth embodiment, the base station according to the thirteenth embodiment, wherein the QCL configuration is transmitted in a system information block (SIB) or via radio resource control (RRC) signaling.

[0072] In a fifteenth embodiment, the base station according to the thirteenth embodiment, wherein the QCL reference signal source is SSB.

[0073] In a sixteenth embodiment, the base station is according to the thirteenth embodiment, wherein consecutive SSBs share a QCL configuration or every M SSBs share a QCL configuration.

[0074] In a seventeenth embodiment, the base station according to the eleventh embodiment, wherein the QCL configuration includes the TRS and one or more SSBs, wherein one TRS is mapped to one SSB or one TRS is mapped to more than one SSB.

[0075] In an eighteenth embodiment, one or more processors are configured to perform operations including: sending a synchronization signal block (SSB) with a first period when a predetermined period has passed since a discontinuous reception (DRX) wake-up or a connected DRX (CDRX) wake-up of a user equipment (UE), and sending the SSB with a second period more frequent than the first period when the predetermined period has passed since the DRX wake-up or the CDRX wake-up, wherein the UE estimates a frequency and timing error of the SSB by combining measurements of the received SSB.

[0076] In a nineteenth embodiment, the one or more processors according to the eighteenth embodiment, wherein the predetermined period is a time period.

[0077] In a twentieth embodiment, the one or more processors according to the eighteenth embodiment, wherein the predetermined period is based on a number of SSBs.

[0078] Those skilled in the art will appreciate that the exemplary embodiments described above can be implemented with any suitable software configuration or hardware configuration or combination thereof. Exemplary hardware platforms for implementing the exemplary embodiments may include, for example, Intel x86-based platforms with compatible operating systems, Windows OS, Mac platforms and MAC OS, mobile devices with operating systems such as iOS, Android, etc. In other examples, the exemplary embodiments of the above methods may be embodied as a program comprising lines of code stored on a non-transitory computer-readable storage medium, which, when compiled, can be executed on a processor or microprocessor.

[0079] Although this patent application describes various combinations of various aspects each having different features, those skilled in the art will understand that any feature of one aspect may be combined with features of other aspects in any manner not publicly denied or that is not functionally or logically inconsistent with the operation or function of the device of the disclosed aspects of the present invention.

[0080] It is understood that the use of personally identifiable information should be subject to privacy policies and practices that are generally recognized to meet or exceed industry or government requirements for maintaining user privacy. Specifically, personally identifiable information data should be managed and processed to minimize the risk of unintentional or unauthorized access or use, and the nature of authorized use should be clearly stated to users.

[0081] It will be apparent to those skilled in the art that various modifications may be made to the present disclosure without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure is intended to cover modifications and variations of the present disclosure provided that these modifications and variations are within the scope of the appended claims and their equivalents.

Claims

1. One or more processors configured to perform operations comprising: receiving a quasi co-location (QCL) configuration between a synchronization signal block (SSB) and a tracking reference signal (TRS), wherein the QCL configuration includes the TRS and one or more SSBs; receiving the SSB and the TRS; and Frequency and timing errors of the SSB are estimated by combining measurements for the SSB and measurements for the TRS based on the QCL configuration.

2. The one or more processors of claim 1, wherein the SSB and the TRS are transmitted from the same transmit and receive point (TRP).

3. The one or more processors of claim 1, wherein the QCL configuration comprises a set of SSBs.

4. The one or more processors of claim 3, wherein the QCL configuration is received in a system information block (SIB) or via radio resource control (RRC) signaling.

5. The one or more processors of claim 3, wherein the QCL reference signal source is the SSB.

6. The one or more processors of claim 3, wherein consecutive SSBs share the QCL configuration.

7. The one or more processors of claim 3, wherein every M SSBs share the QCL configuration.

8. The one or more processors of claim 1, wherein one TRS is mapped to one SSB.

9. The one or more processors of claim 1, wherein a TRS is mapped to more than one SSB.

10. A user equipment (UE), comprising: a transceiver configured to connect to a base station; and One or more processors communicatively coupled to the transceiver and configured to perform operations including: receiving a quasi co-location (QCL) configuration between a synchronization signal block (SSB) and a tracking reference signal (TRS), wherein the QCL configuration includes the TRS and one or more SSBs; receiving the SSB and the TRS; as well as Frequency and timing errors of the SSB are estimated by combining measurements for the SSB and measurements for the TRS based on the QCL configuration.

11. The UE of claim 10, wherein the SSB and the TRS are transmitted from the same transmission and reception point (TRP).

12. The UE of claim 10, wherein the QCL configuration comprises a set of SSBs.

13. The UE of claim 12, wherein the QCL configuration is received in a system information block (SIB) or via radio resource control (RRC) signaling. The UE according to claim 12 , wherein the QCL reference signal source is the SSB.

15. The UE according to claim 12, wherein consecutive SSBs share the QCL configuration or every M SSBs share the QCL configuration.

16. The UE of claim 10, wherein one TRS is mapped to one SSB or one TRS is mapped to more than one SSB.