Optical sensor and method of forming the same, and electronic device

Abstract

An optoelectronic sensor, a method for forming the same, and an electronic device, the optoelectronic sensor comprising: a connecting structure in a dielectric layer of a preset pixel unit region and in contact with an interconnection layer and a pixel base under a normal projection of a photosensitive region respectively; a metal grid on an isolation structure and in contact with a conductive layer; a first opening in the pixel base of a lead region and exposing the dielectric layer; a second opening in the dielectric layer at the bottom of the first opening and exposing the interconnection layer; a pad layer in the first opening and the second opening and in contact with the interconnection layer; the height of the pad layer in the first opening is lower than the height of the first opening; a passivation layer on the first surface of the photosensitive region and covering the metal grid, the passivation layer is on the sidewall and bottom surface of the first opening of the lead region and the pad layer and exposes the top surface of the pad layer. The embodiments of the present application are beneficial to improve the interface state of the sidewall of the isolation structure, reduce the dark current, and improve the height consistency of the pad layer of the optoelectronic sensor, and optimize the performance of the optoelectronic sensor.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing, and more particularly to a photoelectric sensor and a method for forming the same, as well as an electronic device. Background Technology

[0002] A photoelectric sensor is a device that converts light signals into electrical signals. Its working principle is based on the photoelectric effect, which refers to the phenomenon where electrons in a substance absorb the energy of photons and produce corresponding electrical effects when light shines on them.

[0003] For example, CCD (Charge Coupled Device) image sensors and CMOS image sensors, widely used in digital cameras and other electro-optical devices, both utilize photoelectric conversion to convert optical images into electrical signals and output digital images. ToF (Time of Flight) distance sensors, such as DTOF (Direct Time of Flight) sensors, record the time between the emission and detection of a light pulse, converting the time difference into distance information. This technology can be used in various ranging scenarios, including autonomous driving, robotic vacuum cleaners, and VR (Virtual Reality) / AR (Augmented Reality) modeling.

[0004] However, the performance of photoelectric sensors still needs to be improved. Summary of the Invention

[0005] The problem addressed by the embodiments of the present invention is to provide a photoelectric sensor and a method for forming the same, as well as an electronic device, thereby optimizing the performance of the photoelectric sensor.

[0006] To address the aforementioned problems, embodiments of the present invention provide a photoelectric sensor, comprising: a pixel substrate including a first surface and a second surface opposite to each other; the pixel substrate including a photosensitive area and a lead area surrounding the photosensitive area; the photosensitive area including an array of pixel unit areas; one of the pixel unit areas serving as a preset pixel unit area; an isolation structure penetrating the pixel substrate between adjacent pixel unit areas; the isolation structure including a conductive layer, the top surface of which is exposed on the first surface; a dielectric layer located on the second surface of the pixel substrate; an interconnect layer located within the dielectric layer below the orthographic projection of the photosensitive area and the lead area in the pixel substrate; and a connection structure located within the dielectric layer of the preset pixel unit area and respectively connected to the layer below the orthographic projection of the photosensitive area. An interconnect layer is in contact with the pixel substrate; a metal mesh is located on the isolation structure and in contact with the conductive layer; a first opening is located within the pixel substrate of the lead area and exposes the top surface of the dielectric layer; a second opening is located within the dielectric layer at the bottom of the first opening and exposes the top surface of the interconnect layer; a pad layer is located within the first and second openings and in contact with the interconnect layer of the lead area; the height of the pad layer within the first opening is lower than the height of the first opening; a passivation layer is located on the first surface of the photosensitive area in the pixel substrate and covers the metal mesh, the passivation layer is located on the sidewalls and bottom surface of the first opening of the lead area and on the pad layer, and exposes the top surface of the pad layer.

[0007] Accordingly, embodiments of the present invention also provide a method for forming a photoelectric sensor, comprising: providing a pixel substrate, including a first surface and a second surface opposite to each other, the pixel substrate including a photosensitive area and a lead area surrounding the photosensitive area, the photosensitive area including an array of pixel unit areas, one of which is used as a preset pixel unit area, an isolation structure penetrating the pixel substrate being formed between the pixel unit areas, the isolation structure including a conductive layer, the top surface of the conductive layer being exposed on the first surface; a dielectric layer being formed on the second surface, an interconnect layer being formed in the dielectric layer; and a connection structure being formed in the dielectric layer of the preset pixel unit area. The connection structure contacts the interconnect layer and the pixel substrate below the orthographic projection of the photosensitive area, respectively; a metal mesh is formed on the isolation structure and in contact with the conductive layer; a first passivation layer is formed on the first surface, the first passivation layer covering the metal mesh; an opening is formed penetrating the dielectric layer, the pixel substrate, and the first passivation layer above the interconnect layer of the lead area, the opening including a first opening located in the pixel substrate and the first passivation layer of the lead area and a second opening located in the dielectric layer at the bottom of the first opening, the second opening exposing the interconnect layer; a solder pad layer is formed in the opening, the solder pad layer contacting the interconnect layer of the lead area.

[0008] Accordingly, embodiments of the present invention also provide an electronic device, including: a photoelectric sensor provided in embodiments of the present invention.

[0009] Compared with the prior art, the technical solution of the embodiments of the present invention has the following advantages:

[0010] In the photoelectric sensor provided in this embodiment of the invention, the connection structure is located in the dielectric layer of the preset pixel unit area and is in contact with the interconnect layer below the orthogonal projection of the photosensitive area and the pixel substrate, respectively. Accordingly, by electrically connecting the metal mesh to the pixel substrate of the preset pixel unit area, a negative potential can be applied to the pad layer when the photoelectric sensor is working, thereby connecting the conductive layer to a negative potential. This facilitates the adsorption of positive charges on the sidewalls of the isolation structure, thereby improving the interface state of the sidewalls of the isolation structure and reducing the dark current of the pixel unit. Furthermore, this embodiment of the invention can connect the conductive layer of the isolation structure to a negative potential by applying a negative potential to the pad layer, thus eliminating the need to additionally provide a pad layer for electrical connection with the metal mesh on the passivation layer of the first surface. This ensures the high consistency of the pad layer of the photoelectric sensor, thereby reducing the complexity of packaging and testing.

[0011] In an optional embodiment, the thickness of the passivation layer on the first surface of the photosensitive area is greater than the thickness at the first opening of the lead area. This is because during the formation of the photoelectric sensor, after the metal mesh is formed, a first passivation layer covering the metal mesh is formed on the first surface. Then, a first opening and a second opening are formed. After a pad layer is formed in the first and second openings, a second passivation layer exposing the pad layer is formed on the first passivation layer and on the bottom and sidewalls of the first opening. The second passivation layer and the first passivation layer constitute the passivation layer. Compared with forming the opening first, filling the opening and the passivation layer on the first surface, and the pad layer at the bottom of the opening, the embodiment of the present invention does not require etching the passivation layer on the top of the isolation structure, nor does it require etching the passivation layer on the side of the opening. This saves on the photomask and simplifies the process, thereby reducing the cost of the photoelectric sensor.

[0012] In the method for forming a photoelectric sensor provided in this embodiment of the invention, a metal mesh is formed and located on an isolation structure and in contact with a conductive layer. An opening is formed penetrating above the interconnect layer of the lead area, encompassing a dielectric layer, a pixel substrate, and a first passivation layer. A pad layer in contact with the interconnect layer is formed within the opening. Therefore, when the photoelectric sensor is working, it is easy to electrically connect the pad layer, the second interconnect layer, the first interconnect layer, the connection structure, the pixel substrate, and the metal mesh to the conductive layer sequentially by electrically connecting the metal mesh to the pixel substrate of the preset pixel unit area. Correspondingly, it is easy to apply a negative potential to the pad layer, thereby allowing the conductive layer of the isolation structure to be connected to a negative potential. This facilitates the adsorption of positive charges on the sidewalls of the isolation structure, thereby improving the interface state of the sidewalls of the isolation structure and reducing... The dark current of the pixel unit; moreover, the embodiments of the present invention can make the conductive layer of the isolation structure connected to a negative potential by applying a negative potential to the pad layer, thereby eliminating the need to form an additional pad layer for electrical connection with the metal mesh on the first passivation layer of the first surface, thus ensuring the high consistency of the pad layer of the photoelectric sensor, which in turn helps to reduce the complexity of subsequent packaging processes and testing; in addition, the embodiments of the present invention form the metal mesh first, and then form the first passivation layer and the pad layer. Compared with forming the opening first, and filling the opening and the passivation layer on the first surface, and the pad layer at the bottom of the opening, the embodiments of the present invention do not need to etch the passivation layer on the top of the isolation structure, nor do they need to etch the passivation layer material on the first surface of the opening side, thus saving the photomask and simplifying the process flow. Attached Figure Description

[0013] Figures 1 to 6 This is a schematic diagram of the structure corresponding to each step in a method for forming a photoelectric sensor;

[0014] Figures 7 to 8 This is a schematic diagram of the structure of an embodiment of the photoelectric sensor of the present invention;

[0015] Figures 9 to 21 This is a schematic diagram of the structure corresponding to each step in one embodiment of the method for forming the photoelectric sensor of the present invention. Detailed Implementation

[0016] As the background technology shows, the performance of current photoelectric sensors needs improvement. This paper analyzes the reasons why the performance of photoelectric sensors needs improvement, using a method for forming a photoelectric sensor as an example.

[0017] Figures 1 to 6 This is a schematic diagram of the structure corresponding to each step in the formation method of a photoelectric sensor.

[0018] refer to Figure 1A pixel substrate is provided, including a first surface 11 and a second surface 12 opposite to each other. The pixel substrate includes a photosensitive region 10P and a lead region 10N surrounding the photosensitive region 10P. The photosensitive region 10P includes an array of pixel unit regions (not shown). An isolation structure 13 is formed in the pixel substrate 10 between the pixel unit regions. The top surface of the isolation structure 13 is exposed on the first surface 11. A dielectric layer 14 is formed on the second surface 12. An interconnect layer 15 is formed in the dielectric layer 14 of the lead region 10N. A logic substrate is also bonded on the dielectric layer 14 of the second surface 12.

[0019] refer to Figure 2 An opening 16 is formed in the pixel substrate 10 that extends through the lead area 10N and the dielectric layer 14 above the interconnect layer 15, the opening 16 exposing a portion of the top of the interconnect layer 15 facing the first surface 11.

[0020] refer to Figure 3 A pad layer 17 is formed at the bottom of the opening 16 to contact the interconnect layer 15.

[0021] refer to Figure 4 This forms a filling opening 16 and a passivation layer 18 located on the first surface 11, the passivation layer 18 covering the pad layer 17 and the top surface of the isolation structure 13.

[0022] refer to Figure 5 A metal mesh 19 is formed on the passivation layer 18 at the top of the isolation structure 13.

[0023] refer to Figure 6 After the metal mesh 19 is formed, interconnect trenches 20 are formed that penetrate the passivation layer 18 above the pad layer 17, exposing the pad layer 17.

[0024] In the aforementioned method for forming a photoelectric sensor, the step of forming an isolation structure typically includes: forming an isolation trench within a pixel substrate between adjacent pixel unit regions; and forming an isolation structure within the isolation trench. Typically, an etching process is used to form the isolation trench, and a filling process is used to form the isolation structure within the trench. After the etching and filling processes, interface states are usually generated on the sidewalls of the isolation structure. The surfaces of these interface states adsorb inverted negatively charged electron layers, and the presence of these interface states increases the dark current of the pixel unit.

[0025] To prevent dark current caused by interface states, p-type ion implantation is typically performed on the pixel substrate before bonding it to the logic substrate. P-type ion implantation neutralizes the negatively charged electron layer of the interface states, thus mitigating the dark current problem caused by these states.

[0026] However, in the field of photoelectric sensors, the absorption thickness and optical path are usually increased by increasing the thickness of the pixel substrate, thereby increasing the photon detection efficiency and thus improving the photon detection sensitivity.

[0027] As the thickness of the pixel substrate gradually increases, when the thickness of the pixel substrate exceeds the maximum depth of ion implantation, the sidewalls of the isolation structure cannot be completely surrounded by P-type ions. When the photoelectric sensor is working, the sidewalls of the isolation structure that are not surrounded by P-type ions will increase the dark current of the pixel.

[0028] Furthermore, when the first surface is the back side of the pixel substrate, since the front-end device has already been fabricated during ion implantation, in order to prevent adverse effects on the electrical performance of the front-end device, even if ion implantation can be performed, the implanted ions cannot be activated by high temperature. Ion implantation that cannot be activated cannot play its corresponding role.

[0029] To address the technical issues, this invention provides a photoelectric sensor in which the connection structure is located in the dielectric layer of the preset pixel unit area and is in contact with the interconnect layer below the orthogonal projection of the photosensitive area and the pixel substrate, respectively. Accordingly, by electrically connecting the metal mesh to the pixel substrate of the preset pixel unit area, a negative potential can be applied to the pad layer when the photoelectric sensor is working, thereby connecting the conductive layer to a negative potential. This facilitates the adsorption of positive charges on the sidewalls of the isolation structure, thereby improving the interface state of the sidewalls of the isolation structure and reducing the dark current of the pixel unit. Furthermore, this invention can connect the conductive layer of the isolation structure to a negative potential by applying a negative potential to the pad layer, thus eliminating the need for an additional pad layer on the passivation layer of the first surface for electrical connection with the metal mesh. This ensures the high consistency of the pad layer of the photoelectric sensor and helps reduce the complexity of packaging and testing.

[0030] To make the above-mentioned objects, features, and advantages of the embodiments of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. (Reference) Figure 7 and Figure 8 , Figure 7 This is a cross-sectional view. Figure 8 for Figure 7 The corresponding top view shows a structural schematic diagram of an embodiment of the photoelectric sensor of the present invention.

[0031] As an example, this embodiment uses a TOF (Time of Flight) sensor as the photoelectric sensor for illustration. More specifically, the photoelectric sensor can be a DTOF (Direct Time of Flight) sensor. In other embodiments, the photoelectric sensor can also be an iTOF (Indirect Time of Flight) sensor.

[0032] In other embodiments, the photoelectric sensor may also be other types of photoelectric sensors such as CCD (Charge Coupled Device) image sensors and CMOS image sensors.

[0033] like Figure 7 and Figure 8 As shown, in this embodiment, the photoelectric sensor includes: a pixel substrate 100, including a first surface 101 and a second surface 102 facing each other; the pixel substrate 100 includes a photosensitive area 100P and a lead area 100N surrounding the photosensitive area 100P; the photosensitive area 100P includes an array of pixel unit areas (not shown), one of which is used as a preset pixel unit area 100px; and an isolation structure penetrating the pixel substrate 100 between adjacent pixel unit areas, the isolation structure including a conductive layer 110, the top surface of which is exposed. First surface 101; dielectric layer 120, located on the second surface 102 of pixel substrate 100; interconnect layer, located within dielectric layer 120 below the orthographic projection of photosensitive area 100P and lead area 100N in pixel substrate 100; connection structure 115, located within dielectric layer 120 of preset pixel unit area 100px and in contact with interconnect layer 111 below orthographic projection of photosensitive area 100P and pixel substrate 100 respectively; metal mesh 210, located on isolation structure and in contact with conductive layer 110; first opening 141 (refer to reference). Figure 17 The second opening 142 is located within the pixel substrate 100 of the lead region 100N and exposes the top surface of the dielectric layer 120; Figure 17 The following structures are defined as follows: a dielectric layer 120 located at the bottom of the first opening 141 and exposing the top surface of the interconnect layer; a pad layer 150 located within the first opening 141 and the second opening 142 and in contact with the interconnect layer of the lead region 100N, wherein the height of the pad layer 150 within the first opening 141 is lower than the height of the first opening 141; and a passivation layer located on the first surface 101 of the photosensitive area 100P in the pixel substrate 100 and covering the metal mesh 210, wherein the passivation layer is located on the sidewalls and bottom surface of the first opening 141 of the lead region 100N and on the pad layer, and exposing the top surface of the pad layer.

[0034] The pixel substrate 100 is used to provide an operating platform for the formation of photoelectric sensors.

[0035] In this embodiment, the pixel substrate 100 includes a substrate (not shown). Specifically, the substrate material may include one or more of silicon, germanium, silicon germanide, silicon carbide, gallium arsenide, and indium gallium dihydrogen phosphate. As an example, the substrate is a silicon substrate. In other embodiments, the substrate may also be other types of substrates such as a silicon-on-insulator substrate or a germanium-on-insulator substrate.

[0036] In this embodiment, the first surface 101 is the back surface of the pixel substrate 100, and the second surface 102 is the front surface of the pixel substrate 100. Specifically, the pixel substrate 100 is a backside illumination (BSI) pixel wafer, and the first surface 101 of the pixel substrate 100 is the light-receiving surface.

[0037] The pixel substrate 100 includes a photosensitive area 100P, which is used to receive optical signals and convert them into electrical signals. In this embodiment, the photosensitive area 100P includes an array of pixel unit areas, in which pixel units (not shown) are formed. The pixel units are used to receive optical signals and convert them into electrical signals.

[0038] The pixel base 100 of the preset pixel unit area of ​​100px is used to connect to the connection structure 115 and the ground line 220.

[0039] The lead area 100N is used for wiring and forming leads to achieve electrical connection between pixel units or other device structures and external circuits.

[0040] The isolation structure is used to reduce optical and electrical crosstalk between adjacent pixel units. The isolation structure extends through the pixel substrate 100 of adjacent pixel unit areas, thereby achieving electrical isolation between the pixel substrate 100 of adjacent pixel unit areas. This prevents leakage current from occurring in the pixel substrate 100 of adjacent pixel unit areas when the pixel substrate 100 is powered through the pad layer 150, the second interconnect layer 112, the first interconnect layer 111, and the connection structure 115.

[0041] In this embodiment, the isolation structure is a deep trench isolation (DTI) structure.

[0042] In this embodiment, the isolation structure includes a conductive layer 110, so that when the photoelectric sensor is working, a voltage is applied to the conductive layer 110, which can adsorb positive charges on the sidewall of the isolation structure, thereby improving the interface state of the sidewall of the isolation structure and reducing the dark current of the pixel unit.

[0043] The end of the conductive layer 110 is exposed on the first surface 101 so that the metal mesh 210 can be located on the first surface 101 and in contact with the conductive layer 110, thereby conducting out the electrical properties of the conductive layer 110 through the metal mesh 210.

[0044] In this embodiment, the conductive layer 110 is made of a metallic material. Metallic materials have good electrical conductivity, and since they are typically opaque, they can also act as light-blocking agents between adjacent pixel units.

[0045] In this embodiment, the conductive layer 110 is made of one or more of tungsten, aluminum, titanium, titanium nitride, tantalum nitride, and copper. As one embodiment, the conductive layer 110 is made of tungsten. Tungsten is not easily diffused and has excellent hole-filling ability, thereby improving the filling effect of the conductive layer 110 in deep trenches. Furthermore, tungsten is an opaque metal material, which can act as a light barrier, making the reduction of optical crosstalk between adjacent pixel units by the isolation structure more significant.

[0046] In this embodiment, the isolation structure further includes an insulating layer 105 located between the conductive layer 110 and the pixel substrate 100, and between the conductive layer 105 and the dielectric layer 120. The insulating layer 105 is also located on the first surface 101 on the side of the conductive layer 110.

[0047] The insulating layer 105 is used to insulate the conductive layer 110 from the pixel substrate 100. The insulating layer 105 is also located on the first surface 101 on the side of the conductive layer 110, thereby protecting the first surface 101 of the pixel substrate 100.

[0048] In this embodiment, the material of the insulating layer 105 includes any one or more of silicon nitride, silicon oxide, aluminum oxide, titanium oxide, hafnium oxide, zirconium oxide, magnesium oxide, calcium oxide, yttrium oxide, tantalum oxide, strontium oxide, lanthanum oxide, and barium oxide.

[0049] In this embodiment, the insulating layer 105 includes a negatively charged dielectric layer (not shown). The negatively charged dielectric layer has a more comprehensive negative charge than the conventional dielectric layer. The negative charge can increase the accumulation of holes at the interface of the negatively charged dielectric layer, and correspondingly, holes can be accumulated at the bottom and sidewalls of the isolation structure to form a P-type protective structure, which is beneficial to improving the leakage problem of the sidewalls of the isolation structure.

[0050] More specifically, the material of the negatively charged dielectric layer includes high-k dielectric materials. As one embodiment, the high-k dielectric material includes any one or more of aluminum oxide, titanium oxide, hafnium oxide, zirconium oxide, magnesium oxide, calcium oxide, yttrium oxide, tantalum oxide, strontium oxide, lanthanum oxide, and barium oxide.

[0051] The dielectric layer 120 is used to achieve isolation between interconnect layers. The material of the dielectric layer 120 is a dielectric material, such as one or more of silicon oxide, silicon nitride, silicon oxynitride, low-k dielectric materials, and ultra-low-k dielectric materials.

[0052] The interconnect layer is used to realize electrical connections between pixel units, and also to realize electrical connections between pixel units and external circuits or other interconnect structures. Specifically, the interconnect layer includes one or more interconnect lines.

[0053] In this embodiment, the interconnect layer includes a first interconnect layer 111 located within the dielectric layer 100P of the photosensitive region 100P, and a second interconnect layer 112 located within the dielectric layer 120 of the lead region 100N. The second interconnect layer 112 is electrically connected to the first interconnect layer 111. The first interconnect layer 111 and the second interconnect layer 112 are used to realize the electrical connection between the pixel unit and the pad layer 150, so as to realize the electrical connection between the pixel unit and the external circuit.

[0054] The materials of the first interconnect layer 111 and the second interconnect layer 112 are metals, such as one or more of copper, aluminum, tungsten, cobalt, nickel, titanium, tantalum, titanium nitride, and tantalum nitride.

[0055] In this embodiment, the connection structure 115 is in contact with the first interconnect layer 111 and with the pixel substrate 100 of the preset pixel unit area 100px, thereby realizing the electrical connection between the pixel substrate 100 of the preset pixel unit area 100px and the first interconnect layer 111.

[0056] In this embodiment, the interconnect layer further includes: a third interconnect layer 113 located in the dielectric layer 120 of the photosensitive area 100P and the lead area 100N, the third interconnect layer 113 being located on the side of the first interconnect layer 111 away from the second surface 102 and on the side of the second interconnect layer 112 away from the second surface; a first conductive plug 121 located between the first interconnect layer 111 and the third interconnect layer 113, and a second conductive plug 122 located between the second interconnect layer 112 and the third interconnect layer 113, the first conductive plug 121 being used to realize the electrical connection between the first interconnect layer 111 and the third interconnect layer 113, and the second conductive plug 122 being used to realize the electrical connection between the second interconnect layer 112 and the third interconnect layer 113.

[0057] Electrical connection between the first interconnect layer 111 and the second interconnect layer 112 is achieved through the third interconnect layer 113, the first conductive plug 121, and the second conductive plug 122.

[0058] The third interconnect layer 113, the first conductive plug 121, and the second conductive plug 122 are made of metals, such as one or more of copper, aluminum, tungsten, cobalt, nickel, titanium, tantalum, titanium nitride, and tantalum nitride.

[0059] The connection structure 115 is located in the dielectric layer 120 below the pixel substrate 100 of the preset pixel unit area 100px, and is in contact with the first interconnect layer 111 and the pixel substrate 100 respectively, thereby realizing the electrical connection between the first interconnect layer 111 and the pixel substrate 100 of the preset pixel unit area 100px.

[0060] In this embodiment, the connection structure 115 is formed in a later-stage process. In this embodiment, the material of the connection structure 115 is the same as the material of the first conductive plug 121 and the second conductive plug 122, such as one or more of copper, aluminum, tungsten, cobalt, nickel, titanium, tantalum, titanium nitride, and tantalum nitride.

[0061] In this embodiment, the photoelectric sensor further includes: a logic substrate 200 or a memory chip or a sensor chip, bonded to a dielectric layer 120 on the second surface 102 of the pixel substrate 100.

[0062] In this embodiment, the logical substrate 200 is bonded to the dielectric layer 120 of the second surface 102 of the pixel substrate 100 as an example for illustration.

[0063] The logic substrate 200 serves as a logic wafer, used to analyze and process the electrical signals provided by the pixel substrate 100. Specifically, logic devices are formed within the logic substrate 200, and these logic devices are used to analyze and process the electrical signals provided by the pixel substrate 100.

[0064] By setting the pixel area (i.e., photosensitive area 100P) and the logic area on different substrates, and bonding the pixel substrate 100 and the logic substrate 200 together, it is beneficial to increase the pixel area, shorten the path of light to the photoelectric element, reduce light scattering, and make the light more focused, thereby improving the photoelectric sensor's light-sensing ability in low-light environments and reducing system noise and crosstalk.

[0065] As one embodiment, the bonding between the logic substrate 200 and the dielectric layer 120 of the second surface 102 of the pixel substrate 100 is achieved by hybrid bonding.

[0066] The metal mesh 210 corresponds to the position and shape of the isolation structure, and the area enclosed by the metal mesh 210 corresponds to each pixel unit area, thereby preventing optical crosstalk between adjacent pixel units.

[0067] Specifically, the metal mesh 210 is a mesh structure and is located on the first surface 101 of the pixel substrate 100, that is, the metal mesh 210 is located on the back side of the pixel substrate 100, and the metal mesh 210 is a back metal mesh.

[0068] In this embodiment, the metal mesh 210 is in contact with a portion of the top surface of the conductive layer 110, or the metal mesh 210 is in contact with the top surface of all the conductive layers 110. Since the conductive layers 110 in each isolation structure are interconnected, even if the metal mesh 210 only contacts a portion of the top surface of the conductive layers 110, electrical connection between all the conductive layers 110 and the external circuit can be achieved through the metal mesh 210.

[0069] In this embodiment, the metal mesh 210 is made of a metallic material, including one or both of aluminum and tungsten. As an example, the metal mesh 210 is made of aluminum. Aluminum is an easily etchable material, facilitating the patterning process for forming the metal mesh 210. Furthermore, aluminum has good electrical conductivity, which helps improve the electrical connectivity of the metal mesh 210. In addition, aluminum is opaque, thus ensuring that the metal mesh 210 reduces optical crosstalk between adjacent pixel units.

[0070] In this embodiment, the photoelectric sensor further includes a grounding wire 220, located on the first surface 101 and in contact with the pixel substrate 100 of the preset pixel unit area 100px, the grounding wire being connected to the metal mesh 210. Correspondingly, in this embodiment, the passivation layer is located on the first surface 101 and covers the metal mesh 210 and the grounding wire 220.

[0071] The grounding wire 220 is used to establish an electrical connection between the metal mesh 210 and the pixel substrate 100 of the preset pixel unit area 100px. Furthermore, during the formation of the metal mesh 210, a significant amount of charge is typically generated. The grounding wire 230, in contact with the pixel substrate 100, is used to release this charge through the pixel substrate 100 during the formation of the metal mesh 210, preventing charge accumulation on the first surface 101 of the pixel substrate 100 and thus preventing arcing during the formation of the metal mesh 210.

[0072] In this embodiment, the grounding wire 220 is made of a metallic material. As one embodiment, the grounding wire 220 is made of one or both of aluminum and tungsten.

[0073] In this embodiment, the grounding wire 220 is made of the same material as the metal mesh 210.

[0074] More specifically, in this embodiment, the grounding wire 220 and the metal mesh 210 are formed in the same step, and the grounding wire 220 and the metal mesh 210 are an integral structure, which not only helps to simplify the process flow, but also improves the electrical connection performance between the grounding wire 220 and the metal mesh 210.

[0075] In this embodiment, the grounding wire 220 penetrates the insulating layer 105 of the preset pixel unit area of ​​100px. As an embodiment, the grounding wire 220 also penetrates a portion of the thickness of the pixel substrate 100 of the preset pixel unit area of ​​100px.

[0076] Reference Figure 8 As one embodiment, the grounding wire 220 is a ring-shaped structure surrounding multiple pixel unit areas, thereby increasing the area of ​​the grounding wire 220 and correspondingly reducing its resistance. The shape of the grounding wire 220 is not limited to this. In other embodiments, the grounding wire can also be other shapes, for example, it can be a strip structure.

[0077] The first opening 141 and the second opening 142 are used to provide space for forming the pad layer 150, and the second opening 142 exposes the interconnect layer so that the pad layer 150 can contact the interconnect layer, thereby realizing the electrical connection between the pad layer 150 and the interconnect layer.

[0078] Specifically, the second opening 142 exposes a portion of the top of the second interconnect layer 112 facing the first surface 101, so that the pad layer 150 is electrically connected to the second interconnect layer 112.

[0079] In this embodiment, the first opening 141 and the second opening 142 are connected to form the opening 140.

[0080] In this embodiment, the solder pad layer 150 is used to connect to a negative potential.

[0081] The pad layer 150 contacts the interconnect layer to enable electrical connection between the interconnect layer and external circuitry or other interconnect structures.

[0082] More specifically, the pad layer 150 is in contact with the second interconnect layer 112, the second interconnect layer 112 is connected to the first interconnect layer 111, the first interconnect layer 111 is electrically connected to the pixel substrate 100 through the connection structure 115, and the pixel substrate 100 is electrically connected to the conductive layer 110 through the ground wire 220 and the metal mesh 210 in sequence. Accordingly, when the photoelectric sensor is working, through the sequentially connected pad layer 150, second interconnect layer 112, first interconnect layer 111, connection structure 115, pixel substrate 100 and ground wire, the conductive layer 110 of the isolation structure can be connected to a negative potential by applying a negative potential to the pad layer 150. This is beneficial for adsorbing positive charges on the sidewall of the isolation structure, thereby improving the interface state of the sidewall of the isolation structure and reducing the dark current of the pixel unit.

[0083] Furthermore, this embodiment applies a negative potential to the pad layer 150, thereby connecting the conductive layer 110 of the isolation structure to a negative potential. This eliminates the need to form an additional pad layer electrically connected to the metal mesh on the first surface, thus ensuring the high consistency of the pad layer 150 of the photoelectric sensor and helping to reduce the complexity of subsequent packaging processes and testing.

[0084] The pad layer 150 is made of a conductive material. In this embodiment, the material of the pad layer 150 includes one or more of aluminum, titanium, gold, and indium tin oxide. As one embodiment, the material of the pad layer 150 is aluminum. Aluminum has good electrical conductivity and is an easily etchable material, thus making it easy to form the first pad layer 150 in a patterned manner.

[0085] The solder pad 150 is located within the opening 140, and the top surface of the solder pad 150 is lower than the first surface 101.

[0086] The passivation layer 160 is used to protect the metal mesh 210 and the grounding wire 220 from the influence of the external environment.

[0087] In this embodiment, the passivation layer 160 is made of an insulating material, including one or more of silicon oxide, silicon oxynitride, and silicon nitride. As one embodiment, the passivation layer 160 is made of silicon oxide.

[0088] In this embodiment, the thickness of the passivation layer 160 on the first surface 101 of the photosensitive area 100P is greater than the thickness of the passivation layer 160 at the location of the first opening 141 of the lead area 100N. This is because during the formation of the photoelectric sensor, after the metal mesh 210 is formed, a first passivation layer 160 covering the metal mesh 210 is formed on the first surface 101, followed by the formation of the first opening 141 and the second opening 142. After the solder pad layer 150 is formed within the first opening 141 and the second opening 142, the first passivation layer 160 is formed on the first surface 101. A second passivation layer 155 is formed on the passivation layer 160 and on the bottom and sidewalls of the first opening 142, exposing the pad layer 150. The second passivation layer 155 and the first passivation layer 160 constitute a passivation layer. Compared with forming the opening first, filling the opening and the passivation layer on the first surface, and the pad layer at the bottom of the opening, this embodiment does not require etching the passivation layer on the top of the isolation structure, nor does it require etching the passivation layer on the side of the opening. This saves the photomask and simplifies the process flow, thereby saving the cost of the photoelectric sensor.

[0089] Specifically, in this embodiment, the passivation layer includes: a first passivation layer 160, located on the first surface 101 of the side of the opening 140 and covering the metal mesh 210 and the grounding wire 220; and a second passivation layer 155, conformally covering the sidewall and bottom surface of the first opening 141, the solder pad layer 150, and the first passivation layer 160, wherein the second passivation layer 155 exposes the solder pad layer 150.

[0090] More specifically, the first passivation layer 160 is located on the insulating layer 105 of the first surface 101 and covers the metal mesh 210 and the ground wire 220.

[0091] In this embodiment, the first passivation layer 160 is located on the first surface 101 on the side of the opening 140 and covers the metal mesh 210 and the grounding wire 220. This is because during the formation of the photoelectric sensor, the first passivation layer 160 is formed after the metal mesh 210 and the grounding wire 220 are formed, and before the opening 140 and the pad layer 150 are formed. Accordingly, the first passivation layer 160 only needs to be formed on the first surface 101 and does not need to be filled in the opening. Accordingly, the first passivation layer 160 is formed on a relatively flat surface, and the top surface height of the first passivation layer 160 has good consistency. During the formation of the first passivation layer 160, it is not necessary to etch the passivation layer material on the first surface on the side of the opening, which helps to save photomasks and reduces the process complexity and simplifies the process flow of forming the first passivation layer 160.

[0092] The second passivation layer 155 serves to protect the solder pad layer 150. The second passivation layer 155 exposes the solder pad layer 150 to enable electrical connection between the solder pad layer 150 and external circuitry, such as facilitating packaging and testing processes.

[0093] In this embodiment, the material of the second passivation layer 155 is silicon oxide. In other embodiments, the material of the second passivation layer may also be silicon nitride or silicon oxynitride.

[0094] Specifically, the second passivation layer 155 conformally covers the sidewall and bottom surface of the first opening 141, the solder pad layer 150, and the first passivation layer 160.

[0095] In this embodiment, during the formation of the photoelectric sensor, after the metal mesh 210 and ground wire 220 are formed, a passivation layer 160 is formed, followed by the formation of the opening 140 and the second passivation layer 155. Accordingly, during the formation of the second passivation layer 155, the second passivation layer 155 does not need to fill the opening 140. The second passivation layer 155 conformally covers the sidewalls and bottom surface of the opening 140, the pad layer 150, and the passivation layer 160. The second passivation layer 155 can be relatively thin, which helps to simplify the process complexity of forming the second passivation layer 155.

[0096] As one embodiment, the passivation layer thickness of the sidewall and bottom surface of the first opening 141 and the pad layer 150 is 10nm to 10000nm, that is, the thickness of the second passivation layer 155 is 10nm to 10000nm. In this way, while ensuring the protective effect of the second passivation layer 155 on the pad layer 150, the thickness of the second passivation layer 155 is reduced, so as to simplify the process complexity and save materials.

[0097] In this embodiment, the passivation layer further includes: an isolation layer 145 located between the first passivation layer 160 and the second passivation layer 155, between the pixel substrate 100 and the second passivation layer 155, and between the dielectric layer 120 and the second passivation layer 155 on the first passivation layer 160 located on the side of the opening 140, the sidewall of the first opening 141, and the top surface of the dielectric layer 120 at the bottom of the first opening 141.

[0098] The isolation layer 145 serves to protect the pixel substrate 100 and also to isolate the pixel substrate 100 from the bonding pad layer 150. In this embodiment, the material of the isolation layer 145 is silicon oxide.

[0099] To address the aforementioned problems, the present invention also provides a method for forming a photoelectric sensor. Figures 9 to 21 This is a schematic diagram of the structure corresponding to each step in one embodiment of the method for forming the photoelectric sensor of the present invention.

[0100] As an example, this embodiment uses a TOF (Time of Flight) sensor as the photoelectric sensor for illustration. More specifically, the photoelectric sensor can be a DTOF (Direct Time of Flight) sensor. In other embodiments, the photoelectric sensor can also be an iTOF (Indirect Time of Flight) sensor.

[0101] In other embodiments, the photoelectric sensor may also be other types of photoelectric sensors such as CCD (Charge Coupled Device) image sensors and CMOS image sensors.

[0102] The method for forming the photoelectric sensor in this embodiment will be described in detail below with reference to the accompanying drawings.

[0103] refer to Figure 9A pixel substrate 100 is provided, including a first surface 101 and a second surface 102 opposite to each other. The pixel substrate 100 includes a photosensitive area 100P and a lead area 100N surrounding the photosensitive area 100P. The photosensitive area 100P includes an array of pixel unit areas (not shown), one of which is used as a preset pixel unit area 100px. An isolation structure is formed between the pixel unit areas that penetrates the pixel substrate 100. The isolation structure includes a conductive layer 110, the top surface of which is exposed on the first surface 101. A dielectric layer 120 is formed on the second surface 102, and an interconnect layer is formed in the dielectric layer 120. A connection structure 115 is also formed in the dielectric layer 120 of the preset pixel unit area 100px. The connection structure 115 is in contact with the interconnect layer and the pixel substrate 100 below the orthographic projection of the photosensitive area 100P, respectively.

[0104] The pixel substrate 100 provides an operating platform for subsequent process technology. In this embodiment, the pixel substrate 100 includes a substrate (not shown). Specifically, the substrate material includes one or more of silicon, germanium, silicon germanide, silicon carbide, gallium arsenide, and indium gallium dihydrogen phosphate. As an example, the substrate is a silicon substrate. In other embodiments, the substrate may also be other types of substrates such as a silicon-on-insulator substrate or a germanium-on-insulator substrate.

[0105] In this embodiment, the first surface 101 is the back surface of the pixel substrate 100, and the second surface 102 is the front surface of the pixel substrate 100. Specifically, the pixel substrate 100 is a backside illumination (BSI) pixel wafer, and the first surface 101 of the pixel substrate 100 is the light-receiving surface.

[0106] The pixel substrate 100 includes a photosensitive area 100P, which is used to receive optical signals and convert them into electrical signals. In this embodiment, the photosensitive area 100P includes an array of pixel unit areas, in which pixel units (not shown) are formed. The pixel units are used to receive optical signals and convert them into electrical signals.

[0107] The pixel base 100 of the preset pixel unit area of ​​100px is used to connect to the connection structure 115 and the subsequent grounding wire.

[0108] The lead area 100N is used for wiring and forming leads to achieve electrical connection between pixel units or other device structures and external circuits.

[0109] The isolation structure is used to reduce optical and electrical crosstalk between adjacent pixel units. The isolation structure extends through the pixel substrate 100 to achieve electrical isolation between the pixel substrate 100 of adjacent pixel unit areas, so that leakage current can be prevented in the pixel substrate 100 of adjacent pixel unit areas when the pixel substrate 100 is powered through the pad layer, the second interconnect layer 112, the first interconnect layer 111 and the connection structure 115.

[0110] In this embodiment, the isolation structure is a deep trench isolation (DTI) structure.

[0111] In this embodiment, the isolation structure includes a conductive layer 110 so that a voltage can be applied to the conductive layer 110 to adsorb positive charges on the sidewall of the isolation structure, thereby improving the interface state of the sidewall of the isolation structure and reducing the dark current of the pixel unit.

[0112] The end of the conductive layer 110 is exposed on the first surface 101 so that a metal mesh in contact with the conductive layer 110 can be formed on the first surface 101, thereby allowing the electrical properties of the conductive layer 110 to be brought out through the metal mesh.

[0113] In this embodiment, the conductive layer 110 is made of a metallic material. Metallic materials have good electrical conductivity, and since they are typically opaque, they can also act as light-blocking agents between adjacent pixel units.

[0114] In this embodiment, the conductive layer 110 is made of one or more of tungsten, aluminum, titanium, titanium nitride, tantalum nitride, and copper. As one embodiment, the conductive layer 110 is made of tungsten. Tungsten is not easily diffused and has excellent hole-filling ability, thereby improving the filling effect of the conductive layer 110 in deep trenches. Furthermore, tungsten is an opaque metal material, which can act as a light barrier, making the reduction of optical crosstalk between adjacent pixel units by the isolation structure more significant.

[0115] In this embodiment, an insulating layer 105 is also formed between the conductive layer 110 and the pixel substrate 100, and between the conductive layer 110 and the dielectric layer 120.

[0116] The insulating layer 105 is used to achieve insulation between the conductive layer 110 and the pixel substrate 100, and the conductive layer 110 and the insulating layer 105 located on the bottom and sidewalls of the conductive layer 110 are also used to form an isolation structure.

[0117] In this embodiment, the material of the insulating layer 105 includes any one or more of silicon nitride, silicon oxide, aluminum oxide, titanium oxide, hafnium oxide, zirconium oxide, magnesium oxide, calcium oxide, yttrium oxide, tantalum oxide, strontium oxide, lanthanum oxide, and barium oxide.

[0118] In this embodiment, the insulating layer 105 is also formed on the first surface 101 on the side of the conductive layer 110, thereby protecting the first surface 101 of the pixel substrate 100.

[0119] In this embodiment, the insulating layer 105 includes a negatively charged dielectric layer (not shown). The negatively charged dielectric layer has a more comprehensive negative charge than the conventional dielectric layer. The negative charge can increase the accumulation of holes at the interface of the negatively charged dielectric layer, and correspondingly, holes can be accumulated at the bottom and sidewalls of the isolation structure to form a P-type protective structure, which is beneficial to improving the leakage problem of the sidewalls of the isolation structure.

[0120] More specifically, the material of the negatively charged dielectric layer includes high-k dielectric materials. As one embodiment, the high-k dielectric material includes any one or more of aluminum oxide, titanium oxide, hafnium oxide, zirconium oxide, magnesium oxide, calcium oxide, yttrium oxide, tantalum oxide, strontium oxide, lanthanum oxide, and barium oxide.

[0121] The dielectric layer 120 is used to achieve isolation between interconnect layers. The material of the dielectric layer 120 is a dielectric material, such as one or more of silicon oxide, silicon nitride, silicon oxynitride, low-k dielectric materials, and ultra-low-k dielectric materials.

[0122] The interconnect layer is used to realize electrical connections between pixel units, and also to realize electrical connections between pixel units and external circuits or other interconnect structures. Specifically, the interconnect layer includes one or more interconnect lines.

[0123] In this embodiment, the interconnect layer includes a first interconnect layer 111 located within the dielectric layer 100P of the photosensitive region, and a second interconnect layer 112 located within the dielectric layer 120 of the lead region 100N. The second interconnect layer 112 is electrically connected to the first interconnect layer 111. The first interconnect layer 111 and the second interconnect layer 112 are used to realize the electrical connection between the pixel unit and the subsequent pad layer, thereby realizing the electrical connection between the pixel unit and the external circuit.

[0124] The materials of the first interconnect layer 111 and the second interconnect layer 112 are metals, such as one or more of copper, aluminum, tungsten, cobalt, nickel, titanium, tantalum, titanium nitride, and tantalum nitride.

[0125] In this embodiment, the connection structure 115 is in contact with the first interconnect layer 111 and with the pixel substrate 100 of the preset pixel unit area 100px, thereby realizing the electrical connection between the pixel substrate 100 of the preset pixel unit area 100px and the first interconnect layer 111.

[0126] It should be noted that, in this embodiment, the interconnect layer further includes: a third interconnect layer 113 located in the dielectric layer 120 of the photosensitive area 100P and the lead area 100N, the third interconnect layer 113 being located on the side of the first interconnect layer 111 away from the second surface 102 and on the side of the second interconnect layer 112 away from the second surface; and a first conductive plug 121 located between the first interconnect layer 111 and the third interconnect layer 113, and a second conductive plug 122 located between the second interconnect layer 112 and the third interconnect layer 113, the first conductive plug 121 being used to realize the electrical connection between the first interconnect layer 111 and the third interconnect layer 113, and the second conductive plug 122 being used to realize the electrical connection between the second interconnect layer 112 and the third interconnect layer 113.

[0127] Electrical connection between the first interconnect layer 111 and the second interconnect layer 112 is achieved through the third interconnect layer 113, the first conductive plug 121, and the second conductive plug 122.

[0128] The third interconnect layer 113, the first conductive plug 121, and the second conductive plug 122 are made of metals, such as one or more of copper, aluminum, tungsten, cobalt, nickel, titanium, tantalum, titanium nitride, and tantalum nitride.

[0129] The connection structure 115 is located in the dielectric layer 120 below the pixel substrate 100 of the preset pixel unit area 100px, and is in contact with the first interconnect layer 111 and the pixel substrate 100 respectively, thereby realizing the electrical connection between the first interconnect layer 111 and the pixel substrate 100 of the preset pixel unit area 100px.

[0130] In this embodiment, the connection structure 115 is formed in a later-stage process to provide process compatibility. Specifically, in this embodiment, the connection structure 115 is formed during the formation of the interconnect layer and the conductive plug. The material of the connection structure 115 is the same as the material of the first conductive plug 121 and the second conductive plug 122, such as one or more of copper, aluminum, tungsten, cobalt, nickel, titanium, tantalum, titanium nitride, and tantalum nitride.

[0131] In this embodiment, a logic substrate 200, a memory chip, or a sensor chip is also bonded to the dielectric layer 120 of the second surface 102 of the pixel substrate 100.

[0132] In this embodiment, a logic substrate 200 is bonded to the dielectric layer 120 of the second surface 102 of the pixel substrate 100 as an example. The logic substrate 200 serves as a logic wafer and is used to analyze and process the electrical signals provided by the pixel substrate 100. Specifically, logic devices are formed within the logic substrate 200, and these logic devices are used to analyze and process the electrical signals provided by the pixel substrate 100.

[0133] By setting the pixel area (i.e., photosensitive area 100P) and the logic area on different substrates, and bonding the pixel substrate 100 and the logic substrate 200 together, it is beneficial to increase the pixel area, shorten the path of light to the photoelectric element, reduce light scattering, and make the light more focused, thereby improving the photoelectric sensor's light-sensing ability in low-light environments and reducing system noise and crosstalk.

[0134] As one embodiment, the bonding between the logic substrate 200 and the dielectric layer 120 of the second surface 102 of the pixel substrate 100 is achieved by hybrid bonding.

[0135] As an example, the steps of providing a pixel substrate 100 bonded with a logic substrate include: providing a pixel substrate 100; providing a logic substrate 200; implementing a bonding between a dielectric layer 120 of the second surface 102 of the pixel substrate 100 and the logic substrate 200; after implementing the bonding, thinning a first surface 101 of the pixel substrate 100; and after the thinning process, forming an isolation structure penetrating the pixel substrate 100 within the pixel substrate 100 between adjacent pixel unit regions.

[0136] In this embodiment, the step of forming the isolation structure includes: forming an isolation trench (not shown) in the pixel substrate 100 between adjacent pixel unit areas, with the bottom of the isolation trench exposing the dielectric layer 120; forming an insulating layer 105 on the sidewalls and bottom of the isolation trench, and a conductive layer 110 on the insulating layer 105 and filling the isolation trench.

[0137] In this embodiment, the process for forming the isolation trench includes an anisotropic dry etching process. The anisotropic dry etching process possesses the characteristics of anisotropic etching, and has high process controllability and etching precision. It easily achieves isolation trenches with high aspect ratios, which is beneficial for maintaining high dimensional accuracy and profile control even when the isolation trench penetrates the pixel substrate 100. Furthermore, the dry etching process easily achieves a high etching selectivity, making it easier for the bottom of the isolation trench to stop on the dielectric layer 120 and reducing the probability of damage to the dielectric layer 120.

[0138] In this embodiment, the step of forming an isolation structure in the isolation trench includes: forming an insulating layer 105 on the sidewall and bottom of the isolation trench, the insulating layer 105 also being formed on the first surface 101; filling the isolation trench with the insulating layer 105 with a conductive material layer (not shown), the conductive material layer also being formed on the insulating layer of the first surface 101; removing the conductive material layer on the first surface 101, the remaining conductive material layer filled in the isolation trench being used as a conductive layer 110, and the insulating layer 105 and the conductive layer 110 in the isolation trench being used to constitute the isolation structure.

[0139] In this embodiment, the process for forming the insulating layer 105 includes one or more of oxidation, chemical vapor deposition, and atomic layer deposition. The oxidation process may include a decoupled plasma oxidation process.

[0140] In this embodiment, the process of filling the isolation trench with a conductive material layer includes one or more of chemical vapor deposition, physical vapor deposition, and electrochemical plating.

[0141] In this embodiment, a planarization process is used to remove the conductive material layer located on the first surface 101. Specifically, the planarization process may include a chemical mechanical planarization process.

[0142] In the process of removing the conductive material layer on the first surface 101, the insulating layer 105 on the first surface 101 is retained, so that the insulating layer 105 can protect the first surface 101 and prevent the process of removing the conductive material layer on the first surface 101 from damaging the surface of the pixel substrate 100.

[0143] refer to Figures 10 to 13 A metal mesh 210 is formed on the isolation structure and in contact with the conductive layer 110.

[0144] By forming a metal mesh 210 in contact with the conductive layer 110, it is easy to electrically connect the pad layer 150, interconnect layer, connection structure 115, pixel substrate 100, and metal mesh 210 to the conductive layer 110 by electrically connecting the metal mesh 210 to the pixel substrate 100 of the preset pixel unit area 100px. By applying a negative potential to the pad layer 150, the conductive layer 110 of the isolation structure can be connected to a negative potential, which is beneficial for adsorbing positive charges on the sidewall of the isolation structure, thereby improving the interface state of the sidewall of the isolation structure and reducing the dark current of the pixel unit.

[0145] Moreover, compared with improving the interface states of the isolation structure sidewalls by doping the pixel substrate with P-type ions, this embodiment is also advantageous in avoiding the limitation of ion doping depth. Accordingly, it is easier to increase the light absorption thickness and optical path by increasing the thickness of the pixel substrate by 100, thereby improving the photon detection efficiency of the photosensitive area and improving the photon detection sensitivity performance of the photoelectric sensor.

[0146] Furthermore, in this embodiment, a metal mesh 210 is formed before the passivation layer and the solder pad layer are formed. Compared with forming the opening first, filling the opening, the passivation layer on the first surface, and the solder pad layer at the bottom of the opening, this embodiment does not require etching the passivation layer on the top of the isolation structure, nor does it require etching the passivation layer material on the first surface of the opening side. This saves photomask and simplifies the process flow.

[0147] In summary, this embodiment optimizes the performance of the photoelectric sensor.

[0148] The metal mesh 210 corresponds to the position and shape of the isolation structure, and the area enclosed by the metal mesh 210 corresponds to each pixel unit area, thereby preventing optical crosstalk between adjacent pixel units.

[0149] Specifically, the metal mesh 210 is a mesh structure and is located on the first surface 101 of the pixel substrate 100, that is, the metal mesh 210 is located on the back side of the pixel substrate 100, and the metal mesh 210 is a back metal mesh.

[0150] The metal mesh 210 is in contact with the conductive layer 110 to achieve electrical connection between the conductive layer 110 and the pixel substrate 100 of the preset pixel unit area 100px.

[0151] In this embodiment, the metal mesh 210 is in contact with a portion of the top surface of the conductive layer 110, or the metal mesh 210 is in contact with the top surface of all the conductive layers 110. Since the conductive layers 110 in each isolation structure are interconnected, even if the metal mesh 210 only contacts a portion of the top surface of the conductive layers 110, electrical connection between all the conductive layers 110 and the external circuit can be achieved through the metal mesh 210.

[0152] In this embodiment, the metal mesh 210 is made of a metallic material, including one or both of aluminum and tungsten. As an example, the metal mesh 210 is made of aluminum. Aluminum is an easily etchable material, facilitating the patterning process for forming the metal mesh 210. Furthermore, aluminum has good electrical conductivity, which helps improve the electrical connectivity of the metal mesh 210. In addition, aluminum is opaque, thus ensuring that the metal mesh 210 reduces optical crosstalk between adjacent pixel units.

[0153] In this embodiment, the forming method further includes: in the step of forming the metal mesh 210, forming a grounding wire 220 that contacts the pixel substrate 100 of the preset pixel unit area 100px, and the grounding wire 220 is electrically connected to the metal mesh 210.

[0154] The grounding wire 220 is used to realize the electrical connection between the metal mesh 210 and the pixel substrate 100 of the preset pixel unit area 100px.

[0155] Specifically, by forming a metal mesh 210 in contact with the conductive layer 110 and a ground wire 220 in contact with the pixel substrate 100 of the preset pixel unit area 100px, the ground wire 220 is electrically connected to the metal mesh 10. Accordingly, when the photoelectric sensor is working, by sequentially connecting the pad layer 150, the second interconnect layer 112, the first interconnect layer 111, the connection structure 115, the pixel substrate 100, and the ground wire 220, the conductive layer 110 of the isolation structure can be connected to a negative potential by applying a negative potential to the pad layer 150. This is beneficial for adsorbing positive charges on the sidewall of the isolation structure, thereby improving the interface state of the sidewall of the isolation structure and reducing the dark current of the pixel unit.

[0156] Furthermore, during the formation of the metal mesh 210, a significant amount of charge is typically generated. The grounding wire 230 contacts the pixel substrate 100 to release the charge through the pixel substrate 100 during the formation of the metal mesh 210, preventing the charge from accumulating on the first surface 101 of the pixel substrate 100, thereby preventing the arcing phenomenon from occurring during the formation of the metal mesh 210.

[0157] In this embodiment, the grounding wire 220 is made of a metallic material. As one embodiment, the grounding wire 220 is made of one or both of aluminum and tungsten.

[0158] In this embodiment, the grounding wire 220 is made of the same material as the metal mesh 210. More specifically, in this embodiment, the grounding wire 220 and the metal mesh 210 are formed in the same step, and the grounding wire 220 and the metal mesh 210 are an integral structure, which not only simplifies the process flow, but also improves the electrical connection performance between the grounding wire 220 and the metal mesh 210.

[0159] Reference Figure 13 As one embodiment, the grounding wire 220 is a ring-shaped structure surrounding multiple pixel unit areas, thereby increasing the area of ​​the grounding wire 220 and correspondingly reducing its resistance. The shape of the grounding wire 220 is not limited to this. In other embodiments, the grounding wire can also be other shapes, for example, it can be a strip structure.

[0160] The specific steps for forming the metal mesh 210 and the grounding wire 220 in this embodiment will be described in detail below with reference to the accompanying drawings.

[0161] like Figure 10As shown, a grounding trench 180 is formed in an insulating layer 105 that extends through a preset pixel unit area of ​​100px, and the grounding trench 180 exposes the pixel substrate 100.

[0162] The grounding trench 180 provides space for forming a grounding wire. The grounding trench 180 exposes the pixel substrate 100 so that the grounding wire can contact the pixel substrate 100.

[0163] In this embodiment, during the formation of the grounding trench 180, an etching process is also performed to prevent the grounding trench from failing to expose the pixel substrate 100 due to the insulation layer 105 located in the preset pixel unit area of ​​100px not being completely removed. Therefore, the grounding trench 180 also penetrates a portion of the thickness of the pixel substrate 100.

[0164] In other embodiments, the second trench may also penetrate only the insulating layer.

[0165] like Figures 11 to 13 As shown, a grounding wire 220 is formed within the grounding trench 180 and in contact with the pixel substrate 100, and a metal mesh 210 is formed on the isolation structure and in contact with the conductive layer 110.

[0166] Specifically, such as Figure 11 As shown, a metal material layer 190 is formed on the insulating layer 105, the metal material layer 190 covers the conductive layer 110 and fills the grounding trench 180; as Figure 12 and Figure 13 As shown, Figure 12 This is a sectional view. Figure 13 for Figure 12 In the corresponding top view, the graphical metal material layer 190 is reserved on the top of the isolation structure as a metal mesh 210, and the metal material layer 190 is reserved in the grounding trench 180 as a grounding wire 220, which is connected to the metal mesh 210.

[0167] The metal material layer 190 is used to form the metal mesh and grounding wire. In this embodiment, the metal material layer 190 is formed using a physical vapor deposition (PVD) process.

[0168] The first surface 101 of the pixel substrate 100 is an insulating surface composed of an insulating layer 105. Before the metal material layer 190 is formed, the conductive layer 110 is electrically isolated from the pixel substrate 100. During the formation of the metal material layer 190 using a physical vapor deposition process, a large amount of charge can easily accumulate on the first surface 101. The metal material layer 190 is also formed in the grounding trench 180 and is in contact with the pixel substrate 100, thereby releasing the charge through the pixel substrate 100 to prevent arc discharge problems caused by charge accumulation on the first surface 101.

[0169] In this embodiment, an etching process is used to pattern the metal material layer 190. Specifically, an anisotropic dry etching process is used to pattern the metal material layer 190.

[0170] refer to Figure 14 A first passivation layer 160 is formed on the first surface 101, and the first passivation layer 160 covers the metal mesh 210. In this embodiment, the first passivation layer 160 also covers the ground wire 220.

[0171] The first passivation layer 160 is used to protect the metal mesh 210 and the grounding wire 220 from the influence of subsequent process steps.

[0172] In this embodiment, after forming the metal mesh 210 and the grounding wire 220, and before forming the opening and the pad layer, a first passivation layer 160 is formed. The first passivation layer 160 only needs to be formed on the first surface 101, without filling the opening. Accordingly, the first passivation layer 160 is formed on a relatively flat surface, and the top surface of the first passivation layer 160 has good uniformity. During the formation of the first passivation layer 160, it is not necessary to etch the passivation layer material on the first surface of the opening side, which helps to save photomasks and reduces the process complexity and simplifies the process flow of forming the first passivation layer 160.

[0173] In this embodiment, the material of the first passivation layer 160 is an insulating material, including one or more of silicon oxide, silicon oxynitride, and silicon nitride. As an example, the material of the first passivation layer 160 is silicon oxide.

[0174] In this embodiment, the step of forming the first passivation layer 160 includes: using a deposition process to form a passivation material layer (not shown) on the first surface 101, the passivation material layer covering the metal mesh 210 and the ground wire 220; performing planarization on the passivation material layer, and using the remaining passivation material layer located on the first surface 101 and covering the metal mesh 210 and the ground wire 220 as the first passivation layer 160.

[0175] By planarizing the passivation material layer after the deposition process, the flatness and height consistency of the top surface of the first passivation layer 160 are improved, so as to provide a flat surface for subsequent process steps.

[0176] As one embodiment, the deposition process can be chemical vapor deposition (CVD), which has strong coverage capabilities, low cost, and high process compatibility. As another embodiment, chemical mechanical planarization (CMP) is used for the planarization treatment.

[0177] In other embodiments, the step of forming the passivation layer may also include only: forming a passivation layer on the first surface using a deposition process, the passivation layer covering the metal mesh and the grounding wire, which correspondingly simplifies the process flow.

[0178] refer to Figures 15 to 17 An opening 140 is formed that penetrates the dielectric layer 120, the pixel substrate 100, and the first passivation layer 160 above the second interconnect layer 112 (e.g., ...). Figure 17 As shown), the opening 140 includes a first opening 141 located within the pixel substrate 100 and the first passivation layer 160 of the lead region 100N, and a second opening 142 located within the dielectric layer 120 at the bottom of the first opening 141, the second opening 142 exposing the interconnect layer.

[0179] In this embodiment, the second opening 142 exposes the second interconnect layer 112. Specifically, the opening 140 exposes the top portion of the second interconnect layer 112 facing the first surface 101.

[0180] The opening 140 provides space for the subsequent formation of the solder pad layer, and the opening 140 exposes the second interconnect layer 112 so that the solder pad layer subsequently formed at the bottom of the opening 140 can contact the second interconnect layer 112, thereby achieving an electrical connection between the solder pad layer and the second interconnect layer 112.

[0181] The steps for forming the opening 140 in this embodiment will be described in detail below with reference to the accompanying drawings.

[0182] like Figure 15 As shown, a first opening 141 is formed in the pixel substrate 100 that penetrates the lead area 100N, and the first opening 141 exposes the dielectric layer 120.

[0183] As an example, an anisotropic dry etching process is used to form the first opening 141. The anisotropic dry etching process has high control over the etching profile, which is beneficial for precise control of the profile morphology of the first opening 141.

[0184] In this embodiment, as Figure 16As shown, after forming the first opening 141, the forming method further includes forming an isolation layer 145 on the sidewalls and bottom of the first opening 141 and on the first passivation layer 160.

[0185] The isolation layer 145 serves to protect the pixel substrate 100 and also isolates the pixel substrate 100 from the subsequent bonding pad layer. In this embodiment, the material of the isolation layer 145 is silicon oxide. In this embodiment, the isolation layer 145 conformally covers the sidewalls and bottom of the first opening 141 and the first passivation layer 160.

[0186] like Figure 17 As shown, a second opening 142 is formed within the dielectric layer 120 below the first opening 141. The second opening 142 exposes the second interconnect layer 112. The second opening 142 and the first opening 141 together form an opening 140.

[0187] Specifically, the second opening 142 exposes a portion of the top of the second interconnect layer 112 facing the first surface 101. In this embodiment, the second opening 142 also extends through a portion of the isolation layer 145 above the second interconnect layer 112.

[0188] As an example, an anisotropic dry etching process is used to form a second opening 142 that penetrates the dielectric layer 120 below the first opening 141. The anisotropic dry etching process has high control over the etching profile, which is beneficial for precise control of the profile morphology of the second opening 142 and reduces the probability of mis-etching the second interconnect layer 112.

[0189] refer to Figure 18 A solder pad layer 150 is formed within the opening 140, and the solder pad layer 150 is in contact with the interconnect layer of the lead region 100N. In this embodiment, the solder pad layer 150 is in contact with the second interconnect layer 112.

[0190] In this embodiment, the solder pad layer 150 is used to connect to a negative potential.

[0191] In this embodiment, the pad layer 150 is in contact with the second interconnect layer 112 to realize the electrical connection between the second interconnect layer 112 and external circuits or other interconnect structures.

[0192] More specifically, the pad layer 150 is in contact with the second interconnect layer 112, the second interconnect layer 112 is connected to the first interconnect layer 111, the first interconnect layer 111 is electrically connected to the pixel substrate 100 through the connection structure 115, and the pixel substrate 100 is electrically connected to the conductive layer 110 through the ground wire 220 and the metal mesh 210 in sequence. Accordingly, when the photoelectric sensor is working, through the sequentially connected pad layer 150, second interconnect layer 112, first interconnect layer 111, connection structure 115, pixel substrate 100 and ground wire, the conductive layer 110 of the isolation structure can be connected to a negative potential by applying a negative potential to the pad layer 150. This is beneficial for adsorbing positive charges on the sidewall of the isolation structure, thereby improving the interface state of the sidewall of the isolation structure and reducing the dark current of the pixel unit.

[0193] Furthermore, this embodiment applies a negative potential to the pad layer 150, thereby connecting the conductive layer 110 of the isolation structure to a negative potential. This eliminates the need to form an additional pad layer electrically connected to the metal mesh on the first surface, thus ensuring the high consistency of the pad layer 150 of the photoelectric sensor and helping to reduce the complexity of subsequent packaging processes and testing.

[0194] The pad layer 150 is made of a conductive material. In this embodiment, the material of the pad layer 150 includes one or more of aluminum, titanium, gold, and indium tin oxide. As one embodiment, the material of the pad layer 150 is aluminum. Aluminum has good electrical conductivity and is an easily etchable material, thus making it easy to form the first pad layer 150 in a patterned manner.

[0195] The solder pad 150 is located within the opening 140, and the top surface of the solder pad 150 is lower than the first surface 101.

[0196] In this embodiment, the step of forming the pad layer 150 includes: forming a pad material layer (not shown) on the bottom and sidewalls of the opening 140 and on the isolation layer 145; removing a portion of the pad material layer located on the first surface 101 and at the bottom of the opening 140, and using the remaining pad material layer located at the bottom of the opening 140 and in contact with the second interconnect layer 112 as the pad layer 150.

[0197] refer to Figure 19 In this embodiment, the forming method further includes: after forming the solder pad layer 150, forming a second passivation layer 155 on the top surface and sidewalls of the solder pad layer 150, on the sidewalls and bottom surface of the first opening 141, and on the first passivation layer 160.

[0198] In this embodiment, since the first passivation layer 160 and the opening 140 are formed sequentially after the metal mesh 210 and the ground wire 220 are formed, and the pad layer 150 that contacts the second interconnect layer 112 is formed in the opening 140, the second passivation layer 155 does not need to fill the first opening 141 during the formation of the second passivation layer 155, thereby reducing the formation difficulty of the second passivation layer 155 and simplifying the process complexity.

[0199] Specifically, the second passivation layer 155 conformally covers the sidewalls and bottom surface of the first opening 141, the solder pad layer 150, and the first passivation layer 160. More specifically, the second passivation layer 155 conformally covers the isolation layer 145 and the solder pad layer 150.

[0200] The second passivation layer 155 serves to protect the solder pad layer 150. In this embodiment, the material of the second passivation layer 155 is silicon oxide. In other embodiments, the material of the second passivation layer may also be silicon nitride or silicon oxynitride.

[0201] In this embodiment, since the second passivation layer 155 does not need to fill the first opening 141 during the formation of the second passivation layer 155, the second passivation layer 155 conformally covers the sidewalls and bottom surface of the first opening 141, the pad layer 150, and the first passivation layer 160. The second passivation layer 155 can be relatively thin, which helps to simplify the process complexity of forming the second passivation layer 155. As one embodiment, the thickness of the second passivation layer 155 is 10nm to 10000nm, thereby ensuring the protective effect of the second passivation layer 155 on the pad layer 150 while reducing the thickness of the second passivation layer 155, so as to simplify the process complexity and save materials. It also helps to reduce the difficulty of subsequent etching of the second passivation layer 155 to expose the pad layer 150.

[0202] In this embodiment, a chemical vapor deposition (CVD) process is used to form the second passivation layer 155. CVD has high coverage capability and is a mature and highly compatible process. In other embodiments, atomic layer deposition (ALD), or a combination of ALD and CVD, can also be used to form the second passivation layer.

[0203] refer to Figure 20 and Figure 21 , Figure 20 This is a sectional view. Figure 21 for Figure 20 In the corresponding top view, a portion of the second passivation layer 155 located on the top surface of the solder pad layer 150 is removed, exposing the solder pad layer 150. The remaining second passivation layer 155 and the first passivation layer 160 are used to form a passivation layer.

[0204] The pad layer 150 is exposed to enable electrical connection between the pad layer 150 and external circuitry, such as for facilitating packaging and testing processes.

[0205] In this embodiment, the second passivation layer 155 conformally covers the pad layer 150. Compared with the second passivation layer filling and covering the pad layer and filling the opening 140, the thickness of the second passivation layer 155 is thinner. Correspondingly, it is easier to remove part of the second passivation layer 155 located on the top surface of the pad layer 150 to expose the pad layer 150, which helps to reduce the complexity of the process.

[0206] In this embodiment, an anisotropic dry etching process is used to remove part of the second passivation layer 155 located on the top surface of the pad layer 150.

[0207] To address this issue, embodiments of the present invention also provide an electronic device, including the photoelectric sensor provided in embodiments of the present invention.

[0208] The electronic device in this embodiment can be any electronic product or device with photoelectric sensing function, such as a mobile phone, tablet computer, laptop computer, navigator, camera, camcorder, robot vacuum cleaner, virtual reality device, augmented reality device, etc., or any intermediate product including the aforementioned photoelectric sensor.

[0209] As can be seen from the foregoing description, the photoelectric sensor provided in this embodiment has excellent performance. By using the photoelectric sensor provided in this embodiment, it is beneficial to improve the performance of electronic devices and enhance the user experience.

[0210] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A photoelectric sensor, characterized in that, include: A pixel substrate includes opposing first and second surfaces, the pixel substrate including a photosensitive area and a lead area surrounding the photosensitive area, the photosensitive area including an array of pixel units; One of the pixel unit areas is used as a preset pixel unit area; An isolation structure extends through the pixel substrate between adjacent pixel unit regions, the isolation structure including a conductive layer, the top surface of the conductive layer being exposed on the first surface; A dielectric layer is located on the second surface of the pixel substrate; The interconnect layer is located within the dielectric layer below the orthographic projection of the photosensitive area and the lead area in the pixel substrate; The connection structure is located in the dielectric layer of the preset pixel unit area and is in contact with the interconnect layer below the orthographic projection of the photosensitive area and the pixel substrate, respectively. A metal mesh is located on the isolation structure and is in contact with the conductive layer; The first opening is located within the pixel substrate of the lead area and exposes the top surface of the dielectric layer; The second opening is located within the dielectric layer at the bottom of the first opening and exposes the top surface of the interconnect layer; A solder pad layer is located within the first and second openings and is in contact with the interconnect layer of the lead area; The height of the pad layer within the first opening is lower than the height of the first opening; A passivation layer is located on the first surface of the photosensitive area in the pixel substrate and covers the metal mesh. The passivation layer is located on the sidewall and bottom surface of the first opening of the lead area and on the pad layer, and exposes the top surface of the pad layer. The thickness of the passivation layer on the first surface of the photosensitive area is greater than the thickness of the passivation layer at the first opening of the lead area.

2. The photoelectric sensor as described in claim 1, characterized in that, The photoelectric sensor further includes: a grounding wire located on the first surface and in contact with the pixel substrate of the preset pixel unit area, the grounding wire being connected to the metal mesh; The passivation layer is located on the first surface and covers the metal mesh and the grounding wire.

3. The photoelectric sensor as described in claim 1, characterized in that, The pad layer is used to connect to a negative potential.

4. The photoelectric sensor as described in claim 2, characterized in that, The grounding wire and the metal mesh are an integral structure.

5. The photoelectric sensor as described in claim 1, characterized in that, The metal mesh is in contact with a portion of the top surface of the conductive layer, or with the top surface of all of the conductive layer.

6. The photoelectric sensor as described in claim 1, characterized in that, The photoelectric sensor further includes: a logic substrate, a memory chip, or a sensor chip, bonded to a dielectric layer on the second surface of the pixel substrate.

7. The photoelectric sensor as described in claim 1 or 6, characterized in that, The first surface is the back side of the pixel substrate, and the second surface is the front side of the pixel substrate.

8. The photoelectric sensor as described in claim 1 or 3, characterized in that, The passivation layer thickness located on the sidewalls and bottom surface of the first opening and the pad layer is 10 nm to 10,000 nm.

9. The photoelectric sensor as described in claim 1, characterized in that, The pixel substrate material includes one or more of silicon, germanium, silicon germanide, silicon carbide, gallium arsenide, and indium gallium ionide; The conductive layer is made of one or more of the following materials: tungsten, aluminum, titanium, titanium nitride, tantalum nitride, and copper. The interconnect layer is made of one or more of the following materials: copper, aluminum, tungsten, cobalt, nickel, titanium, tantalum, titanium nitride, and tantalum nitride. The material of the connecting structure includes one or more of copper, tungsten, cobalt, nickel, titanium, tantalum, titanium nitride, and tantalum nitride; The material of the solder pad layer includes one or more of aluminum, titanium, gold, and tin-doped indium oxide; The material of the passivation layer includes one or more of silicon oxide, silicon oxynitride, and silicon nitride. The material of the metal mesh includes one or both of aluminum and tungsten.

10. A method for forming a photoelectric sensor, characterized in that, include: A pixel substrate is provided, including a first surface and a second surface opposite to each other. The pixel substrate includes a photosensitive area and a lead area surrounding the photosensitive area. The photosensitive area includes an array of pixel unit areas, one of which is used as a preset pixel unit area. An isolation structure is formed between the pixel unit areas, penetrating the pixel substrate. The isolation structure includes a conductive layer, the top surface of which is exposed on the first surface. A dielectric layer is formed on the second surface, and an interconnect layer is formed in the dielectric layer. A connection structure is also formed in the dielectric layer of the preset pixel unit area, and the connection structure is in contact with the interconnect layer and the pixel substrate below the orthographic projection of the photosensitive area, respectively. A metal mesh is formed on the isolation structure and in contact with the conductive layer; A first passivation layer is formed on the first surface, the first passivation layer covering the metal mesh; An opening is formed that extends through the interconnect layer above the lead area, the dielectric layer, the pixel substrate, and the first passivation layer. The opening includes a first opening located within the pixel substrate and the first passivation layer of the lead area, and a second opening located within the dielectric layer at the bottom of the first opening. The second opening exposes the interconnect layer. A solder pad layer is formed within the opening, and the solder pad layer is in contact with the interconnect layer of the lead area.

11. The method for forming a photoelectric sensor as described in claim 10, characterized in that, The pad layer is used to connect to a negative potential.

12. The method for forming a photoelectric sensor as described in claim 10, characterized in that, The forming method further includes: in the step of forming the metal mesh, a grounding wire is also formed that is in contact with the pixel substrate of the preset pixel unit area, and the grounding wire is electrically connected to the metal mesh.

13. The method for forming a photoelectric sensor as described in claim 12, characterized in that, In the step of providing the pixel substrate, an insulating layer is further formed between the conductive layer and the pixel substrate, and between the conductive layer and the dielectric layer, and the insulating layer is further formed on a first surface on the side of the conductive layer; The steps of forming the metal mesh and the grounding wire include: forming a grounding trench that penetrates the insulating layer of the preset pixel unit area, the grounding trench exposing the pixel substrate; A grounding wire is formed within the grounding trench and in contact with the pixel substrate, and a metal mesh is formed on the isolation structure and in contact with the conductive layer.

14. The method for forming a photoelectric sensor as described in claim 10, characterized in that, The step of forming the first passivation layer includes: using a deposition process to form a first passivation layer on the first surface, wherein the first passivation layer covers the metal mesh and the grounding wire; or; The step of forming the first passivation layer includes: using a deposition process to form a passivation material layer on the first surface, the passivation material layer covering the grounding wire; planarizing the passivation material layer, and using the remaining passivation material layer on the first surface covered with a metal mesh as the first passivation layer.

15. The method for forming a photoelectric sensor as described in claim 10, characterized in that, In the step of providing the pixel substrate, a logic substrate, a memory chip, or a sensor chip is also bonded to the dielectric layer of the second surface of the pixel substrate.

16. The method for forming a photoelectric sensor as described in claim 10 or 15, characterized in that, The first surface is the back side of the pixel substrate, and the second surface is the front side of the pixel substrate.

17. The method for forming a photoelectric sensor as described in claim 10, characterized in that, The method for forming the photoelectric sensor further includes: after forming the pad layer, forming a second passivation layer on the top surface and sidewalls of the pad layer, on the sidewalls and bottom surface of the first opening, and on the first passivation layer; removing a portion of the second passivation layer located on the top surface of the pad layer to expose the pad layer, and using the remaining second passivation layer and the first passivation layer to form a passivation layer.

18. The method for forming a photoelectric sensor as described in claim 17, characterized in that, The process for forming the second passivation layer includes one or both of atomic layer deposition and chemical vapor deposition.

19. An electronic device, characterized in that, include: The photoelectric sensor as described in any one of claims 1 to 9.

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