Semiconductor device and method of manufacturing the same, electronic device

Abstract

The application discloses a semiconductor device and a preparation method thereof and electronic equipment. The semiconductor device is provided with a depletion type region and a reinforcement type region on an epitaxial wafer. The depletion type region is a region integrated by using a depletion type process, and the reinforcement type region is a region integrated by using a reinforcement type process. The epitaxial wafer adopts a PHEMT structure. The vertical structures of the depletion type region and the reinforcement type region are different. The cross-sectional shapes of the gate electrodes of the depletion type region and the reinforcement type region are the same, and are all T-shaped. In the application, the gate electrodes of the depletion type region and the gate electrodes of the reinforcement type region on the epitaxial wafer of the semiconductor device are all T-shaped gates. The substrates of the depletion type region and the reinforcement type region can be customized differently, so that the performance of the semiconductor device is improved. Further, by customizing the substrate regions corresponding to each device in the semiconductor device differently, the performance of each device can be improved, and the overall performance of the semiconductor device is improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a semiconductor device and its fabrication method, as well as an electronic device. Background Technology

[0002] Existing semiconductor chip substrates are isotropic on both the substrate and epitaxial wafer surfaces, meaning that the vertical structure and electrical properties are identical at all locations on different substrate surfaces. This is primarily due to cost considerations. During MOCVD (Metal-Organic Chemical Vapor Deposition) or MBE (Molecular Beam Epitaxy) epitaxial growth, multiple substrates are placed in a reactor for simultaneous growth. Because the epitaxial growth produced by the chemical reaction of the growth gas is essentially the same on all substrate surfaces within the reactor, the resulting epitaxial wafers also have identical structures.

[0003] Chip manufacturing processes consistently strive for higher integration density to achieve higher performance, lower prices, and greater reliability. Taking the PHEMT (Pseudomorphic HEMT) structure as an example, which integrates D-mode (depletion-mode) and E-mode (enhancement-mode) processes on a single epitaxial substrate, as an example... Figure 1 In the PHEMT structure using a GaAs substrate shown, the Dmode switch gate has both a Dmode Schottky layer and an Emode Schottky layer, while the Emode switch gate only has an Emode Schottky layer. Due to different manufacturing processes, the gate heights of Emode and Dmode on isotropic epitaxial wafers fabricated using existing technologies differ. The Schottky layer under the Dmode gate is thicker, resulting in a "depletion region" within this layer, where no active electron charge exists. This structure causes the Dmode gate threshold voltage to be below 0V, meaning the source and drain of the Dmode transistor are in the on state when no gate voltage is applied. Conversely, the Schottky layer under the Emode gate is thinner, resulting in the absence of a "depletion region" within this layer. This structure causes the Dmode gate threshold voltage to be above 0V, meaning the source and drain of the Emode transistor are in the off state when no gate voltage is applied. The band structure of an epitaxial wafer integrated using existing Dmode processes is shown below. Figure 2 As shown in (a), the band structure of the epitaxial wafer integrated by the Emode process is as follows: Figure 2 As shown in (b).

[0004] Typically, for ease of fabrication, existing technologies use materials with the same chemical composition for the Schottky layer under the gate in both the D-mode and E-mode applications. When fabricating the E-mode gate, a portion of the Schottky layer is etched away; however, when fabricating the D-mode gate, the Schottky layer is not etched. This results in a mismatch between the D-mode and E-mode gate heights, making it difficult to fabricate a "T-gate" for the lower E-mode gate.

[0005] For pHEMT structures, both theory and experiments demonstrate that T-gates significantly improve chip performance. Therefore, current heterogeneous integration of Dmode and Emode chips fabricated on horizontally isotropic substrate epitaxial wafers involves a performance trade-off, making simultaneous optimization of both Dmode and Emode regions difficult. Typically, the Dmode region is prioritized, with a T-gate implemented in the higher Dmode region, while the lower Emode region is sacrificed. In the lower Emode region, a trapezoidal gate is used instead of a T-gate. This approach presents the following problems:

[0006] First, the increased complexity of the process and the extremely high process requirements lead to a decrease in yield and reliability.

[0007] Current epitaxial wafer fabrication technologies require etching away substrates from other processes while retaining the substrate structure of the fabricated process. This not only increases process complexity but also reduces reliability. For example, when fabricating Emode gates, the Dmode Schottky layer must be etched away from the current substrate integrating Emode and Dmode, and the Emode gate must be grown at different heights. This increases process complexity and requires high-quality etch interfaces. Not only are the etching process requirements extremely high, shielding certain high-speed and efficient etching techniques such as dry etching that struggle to create high-quality interfaces, but it may also necessitate additional polishing processes, severely reducing the yield and reliability of Emode gates.

[0008] Second, performance degradation;

[0009] Because the Emode gate is deposited between the Dmode Schottky layers, it is difficult to fabricate a fieldplate structure similar to the T-gate of the Dmode gate. Simulations and experiments have demonstrated that the fieldplate structure can effectively reduce the noise figure of low-noise amplifiers (LNAs), improve gain, reduce power consumption, and increase efficiency. While existing technologies have developed separate fieldplate structures similar to the T-gate of the Emode gate, these are complex to manufacture and difficult to integrate with Dmode processes.

[0010] Third, increased costs and decreased cost-effectiveness affect market application;

[0011] Existing technologies for fabricating uniform substrate epitaxial wafers increase process complexity, demand higher process requirements, and reduce yield and reliability, all of which negatively impact cost. In consumer electronics markets such as 5G, Wi-Fi 6, CV2X, and NB-IoT communication systems, cost and performance are crucial. The aforementioned drawbacks of chips fabricated using existing technologies severely hinder market applications. Summary of the Invention

[0012] The technical problem to be solved by the present invention is to overcome the above-mentioned defects in the prior art and provide a semiconductor device and its preparation method, and an electronic device.

[0013] The present invention solves the above-mentioned technical problems through the following technical solution:

[0014] A first aspect of the present invention provides a semiconductor device, wherein an epitaxial wafer of the semiconductor device is provided with a depletion-type region and an enhancement-type region, the depletion-type region being a region integrated using a depletion-type process, and the enhancement-type region being a region integrated using an enhancement-type process;

[0015] The epitaxial wafer adopts a PHEMT structure. The vertical structures of the depletion-type region and the enhancement-type region are different. The gate electrode of the depletion-type region and the gate electrode of the enhancement-type region have the same cross-sectional shape, which is T-shaped.

[0016] Optionally, the Schottky base layer of the depletion region and the Schottky base layer of the enhancement region are arranged side by side.

[0017] Optionally, the Schottky base layer of the depletion region and the Schottky base layer of the reinforcement region have the same height.

[0018] Optionally, the doping concentration of the δ-doped donor layer in the depletion region is different from the doping concentration of the δ-doped donor layer in the enhancement region.

[0019] Optionally, the target chemical component content of the isolation layer in the depletion region is different from the target chemical component content of the isolation layer in the enhancement region.

[0020] Optionally, the content of the target chemical components in the Schottky base layer in the depletion region is different from the content of the target chemical components in the Schottky base layer in the enhancement region.

[0021] Optionally, the semiconductor device includes a radio frequency switch located in the depletion-type region, the radio frequency switch including a transmit channel and a receive channel;

[0022] The doping concentration of the δ-doped donor layer in the substrate region corresponding to the transmitting channel is different from the doping concentration of the δ-doped donor layer in the substrate region corresponding to the receiving channel; and / or,

[0023] The target chemical composition content of the isolation layer in the substrate region corresponding to the transmitting channel is different from the target chemical composition content of the isolation layer in the substrate region corresponding to the receiving channel; and / or,

[0024] The target chemical component content of the Schottky layer in the substrate region corresponding to the transmitting channel is different from the target chemical component content of the Schottky layer in the substrate region corresponding to the receiving channel.

[0025] Optionally, the semiconductor device includes a first device located in the depletion region, a second device located in the enhancement region, and a third device located in both the depletion region and the enhancement region;

[0026] The target chemical component content of the isolation layer in the depletion-type region corresponding to the third device is different from the target chemical component content of the isolation layer in the depletion-type region corresponding to the first device; and / or,

[0027] The target chemical component content of the Schottky layer in the depletion region corresponding to the third device is different from the target chemical component content of the Schottky layer in the enhancement region corresponding to the first device; and / or,

[0028] The doping concentration of the δ-doped donor layer in the enhancement region corresponding to the third device is different from the doping concentration of the δ-doped donor layer in the enhancement region corresponding to the second device.

[0029] Optionally, the first device is a radio frequency switch or a power amplifier.

[0030] Optionally, the second device is a low-noise amplifier.

[0031] Optionally, the third device is a logic circuit.

[0032] A second aspect of the present invention provides a method for fabricating a semiconductor device, wherein the semiconductor device is the semiconductor device described in the first aspect; the fabrication method includes the following steps:

[0033] Provide substrate;

[0034] The depletion region and the enhancement region are formed by epitaxial growth and doping on the substrate.

[0035] In this process, during epitaxial growth and / or implantation doping, a preset mask is inserted so that the blocked patterned area cannot continue epitaxial growth and / or implantation doping.

[0036] A third aspect of the present invention provides an electronic device comprising the semiconductor device described in the first aspect.

[0037] The positive and progressive effects of this invention are that both the gate electrode of the depletion region and the gate electrode of the enhancement region on the epitaxial wafer of the semiconductor device have T-type gates. Specifically, the substrates of the depletion region and the enhancement region can be customized differently to improve the performance of the semiconductor device.

[0038] Furthermore, based on the different operating requirements of the first, second, and third devices in a semiconductor device, the performance of each device can be improved by customizing the substrate region corresponding to each device, thereby improving the overall performance of the semiconductor device. Attached Figure Description

[0039] Figure 1 This is a schematic diagram of an existing epitaxial wafer structure using the PHEMT structure.

[0040] Figure 2 (a) is a schematic diagram of the band structure of an epitaxial wafer integrated using the existing Dmode process.

[0041] Figure 2 (b) is a schematic diagram of the band structure of an epitaxial wafer integrated using the existing Emode process.

[0042] Figure 3 This is a schematic diagram of an epitaxial wafer structure using a PHEMT structure provided in Embodiment 1 of the present invention.

[0043] Figure 4 This is a schematic diagram of the band structure of a depletion-type region on an epitaxial wafer provided in Embodiment 1 of the present invention. Detailed Implementation

[0044] The present invention will be further illustrated by way of embodiments below, but the present invention is not limited to the scope of the embodiments described herein.

[0045] Example 1

[0046] This embodiment provides a semiconductor device. The epitaxial wafer of the semiconductor device has a depletion-type region and an enhancement-type region. The epitaxial wafer adopts a PHEMT structure. The vertical structures of the depletion-type region and the enhancement-type region are different. The gate electrode of the depletion-type region and the gate electrode of the enhancement-type region have the same cross-sectional shape, which is T-shaped.

[0047] Wherein, the depletion-mode region is the region integrated using a depletion-mode process, and the enhancement-mode region is the region integrated using an enhancement-mode process. In some examples, the depletion-mode process may also be called the Dmode process, and the depletion-mode region may also be called the Dmode region; the enhancement-mode process may also be called the Emode process, and the enhancement-mode region may also be called the Emode region.

[0048] The gate electrode in the depletion region and the gate electrode in the enhancement region have the same cross-sectional shape, both being T-shaped. Therefore, the gate electrode in the depletion region and the gate electrode in the enhancement region can also be called T-shaped gates. The gate root at the bottom, which contacts the semiconductor surface, is very narrow, thereby increasing the cutoff frequency of the semiconductor device, while the gate cap at the top is very wide, which reduces the resistance of the gate.

[0049] In this embodiment, the vertical structures of the depletion region and the enhancement region are different, that is, the substrate of the epitaxial wafer is a non-uniform substrate.

[0050] In one optional embodiment, the Schottky base layer of the depletion-type region and the Schottky base layer of the enhancement-type region are arranged side by side. In specific implementations, the heights of the Schottky base layers of the depletion-type region and the enhancement-type region can also be set to be approximately the same or identical. In this embodiment, by arranging the Schottky base layers of the depletion-type region and the enhancement-type region side by side, rather than stacking them, the gate heights of the depletion-type region and the enhancement-type region can be made approximately the same, thereby facilitating the simultaneous fabrication of T-shaped gates in both the depletion-type region and the enhancement-type region.

[0051] Compared with existing technologies, when fabricating the Emode gate in the semiconductor device provided in this embodiment, it is not necessary to etch away the Dmode Schottky layer, which can reduce process complexity and eliminate the additional requirement for a high-quality etching interface. This allows the application of high-speed and efficient etching technologies such as dry etching, which are difficult to form a high-quality interface, to greatly improve the yield and reliability of the Emode gate and even the entire semiconductor device.

[0052] Figure 3 This is a schematic diagram illustrating an epitaxial wafer structure employing a PHEMT structure provided in this embodiment. Figure 3 In the epitaxial wafer structure shown, the substrate is GaAs (gallium arsenide). It should be noted that the epitaxial wafer of the above semiconductor device can also use other substrates, such as GaN (gallium nitride), InP (indium phosphide), SiC (silicon carbide), or silicon-based semiconductors such as bulk silicon CMOS (Complementary Metal Oxide Semiconductor) and SOI (Silicon-On-Insulator) substrates.

[0053] In the semiconductor device provided in this embodiment, the performance of the semiconductor device can be improved by customizing the substrates of the depletion region and the enhancement region differently to achieve T-gates in both the depletion region and the enhancement region.

[0054] In one optional implementation, the doping concentration of the delta-doped donor layer in the depletion region differs from that in the enhancement region. In a specific example, the doping concentration of the delta-doped donor layer in the depletion region can be set higher than that in the enhancement region, resulting in a higher delta-doping concentration in the substrate of the depletion region. This ensures that a depletion region can still be formed under the gate of the depletion region even when the gates in the depletion region and the enhancement region have the same height.

[0055] In a specific example, the doping concentration range in the delta-doped donor layer in the depletion region is: 1e 12 / cm 2 ~1e 14 / cm 2 The doping concentration range in the δ-doped donor layer of the enhancement region is: 1e 11 / cm 2 ~1e 12 / cm 2 .

[0056] In one optional implementation, the target chemical composition content of the isolation layer in the depletion region differs from that in the isolation layer in the enhancement region. In a specific example, the target chemical composition content of the isolation layer in the depletion region can be set to be higher than that in the isolation layer in the enhancement region. By increasing the target chemical composition content of the isolation layer in the depletion region, the quantum well's ability to confine electrons can be improved, noise can be reduced, electron mobility can be increased, and static power consumption can be reduced.

[0057] In a specific example, the Al component content in the AlGaAs isolation layer in the depletion region ranges from 0.25% to 0.35%, where the Al component content is Al... x Ga 1-x In As, x is dimensionless; the Al component content in the AlGaAs isolation layer in the enhanced region ranges from 0.2 to 0.3.

[0058] In one optional implementation, the content of the target chemical component of the Schottky base layer in the depletion region differs from the content of the target chemical component of the Schottky base layer in the enhancement region. In a specific example, the content of the target chemical component of the Schottky base layer in the depletion region can be set to be higher than that in the enhancement region. By increasing the content of the target chemical component of the Schottky base layer in the depletion region, the quantum well's ability to confine electrons can be improved, noise can be reduced, electron mobility can be increased, and static power consumption can be reduced.

[0059] In a specific example, the Al content in the Schott substrate in the depletion region ranges from 0.25 to 0.35; the Al content in the Schott substrate in the reinforcement region ranges from 0.2 to 0.3.

[0060] Figure 4 This paper illustrates the band structure of a depletion-mode region on an epitaxial wafer. By increasing the δ-doping concentration of the substrate in the depletion-mode region, and by increasing the target chemical composition content of the AlGaAs isolation layer and / or Schottky layer in the depletion-mode region, it is possible to obtain a band structure such as... Figure 4 The band structure of the depletion-type region is shown.

[0061] In one optional embodiment, the semiconductor device includes a radio frequency (RF) switch located in the depletion-type region, the RF switch including a transmit channel and a receive channel. The RF switch may also be referred to as a microwave switch.

[0062] Specifically, the substrate regions corresponding to the emission channel and the receiving channel can be customized differently. Specifically, the doping concentration of the δ-doped donor layer in the substrate region corresponding to the emission channel can differ from the doping concentration of the δ-doped donor layer in the substrate region corresponding to the receiving channel, and the target chemical composition content of the isolation layer and / or Schottky layer in the substrate region corresponding to the emission channel can also differ from the target chemical composition content of the isolation layer and / or Schottky layer in the substrate region corresponding to the receiving channel.

[0063] In practical applications, the transmitting channel is responsible for sending the high-power amplifier output signal to the antenna, requiring high power capacity but not high requirements for isolation and noise. The receiving channel is responsible for receiving the lower-power antenna signal to the low-noise amplifier while shielding the low-noise amplifier from interference from the transmitted signal. In this embodiment, compared to the substrate region corresponding to the receiving channel, the above requirements can be met by increasing the concentration of the target chemical component in the isolation layer and / or Schottky layer and / or the doping concentration of the δ-doped donor layer in the substrate region corresponding to the transmitting channel.

[0064] In a specific example, the doping concentration of the δ-doped donor layer in the substrate region corresponding to the emitter channel is higher than that in the substrate region corresponding to the receiver channel. For example, the range of doping concentration in the δ-doped donor layer in the substrate region corresponding to the emitter channel can be: 1e 12 / cm 2 ~1e 14 / cm 2 The doping concentration range in the δ-doped donor layer in the substrate region corresponding to the receiving channel can be: 1e 11 / cm 2 ~1e 12 / cm 2 .

[0065] In another specific example, the target chemical composition content of the isolation layer in the substrate region corresponding to the emission channel is higher than that of the isolation layer in the substrate region corresponding to the receiving channel. For example, the Al content in the AlGaAs isolation layer in the substrate region corresponding to the emission channel ranges from 0.25% to 0.35%, where the Al content is Al... x Ga 1-x In As, x is dimensionless; the Al content in the AlGaAs isolation layer in the substrate region corresponding to the receiving channel ranges from 0.15 to 0.25.

[0066] In another specific example, the target chemical component content of the Schottky layer in the substrate region corresponding to the transmitting channel is higher than that of the Schottky layer in the substrate region corresponding to the receiving channel. For example, the Al component content in the Schottky layer in the substrate region corresponding to the transmitting channel ranges from 0.25 to 0.35; the Al component content in the Schottky layer in the substrate region corresponding to the receiving channel ranges from 0.15 to 0.25.

[0067] In the semiconductor device provided in this embodiment, not only can the depletion-mode region and the enhancement-mode region be optimized simultaneously, but the transmit channel and the receive channel can also be optimized separately in the RF switch of the depletion-mode region, thereby improving the performance of the semiconductor device.

[0068] In an alternative embodiment, the semiconductor device includes a first device located in the depletion-type region, a second device located in the enhancement-type region, and a third device located in both the depletion-type and enhancement-type regions. In a specific implementation, the first device may be a radio frequency switch or a power amplifier. The second device may be a low-noise amplifier. The third device may be a logic circuit.

[0069] In this embodiment, by customizing the substrate region corresponding to each device differently according to the different operating requirements of the first device, the second device, and the third device, the performance of each device can be improved, thereby improving the overall performance of the semiconductor device.

[0070] In one specific example, the target chemical component content of the isolation layer in the depletion-type region corresponding to the third device differs from the target chemical component content of the isolation layer in the depletion-type region corresponding to the first device. In this example, the target chemical component content of the isolation layers in different depletion-type regions corresponding to the first and third devices is customized respectively, thereby improving the performance of the first and third devices.

[0071] In another specific example, the target chemical component content of the Schottky layer in the depletion-type region corresponding to the third device differs from the target chemical component content of the Schottky layer in the depletion-type region corresponding to the first device. In this example, the target chemical component content of the Schottky layer in different depletion-type regions corresponding to the first and third devices is customized respectively, thereby improving the performance of the first and third devices.

[0072] In another specific example, the doping concentration of the δ-doped donor layer in the enhancement-mode region corresponding to the third device differs from the doping concentration of the δ-doped donor layer in the enhancement-mode region corresponding to the second device. In this example, the doping concentrations of the δ-doped donor layers in the different depletion-mode regions corresponding to the second and third devices are customized respectively, thereby improving the performance of the second and third devices.

[0073] In examples where the third device is a logic circuit, the logic circuit needs to be as small as possible in area, fast in speed, and low in power consumption, but does not require very high power output and is not very sensitive to noise. Therefore, the optimization direction of the depletion-mode region corresponding to the logic circuit is different from that of the depletion-mode region corresponding to RF switches and power amplifiers. Since the logic circuit does not require high power capacity, the Al composition concentration in the AlGaAs isolation layer and / or Schottky layer is relatively low, typically 0.15–0.25%. At the same time, the depletion-mode transistor corresponding to the logic circuit needs better depletion effect to achieve low power consumption, so the doping concentration of the δ-doped donor layer is relatively high, typically 1e 12 / cm 2 ~1e 14 / cm 2 .

[0074] Similarly, the optimization direction of the enhancement region corresponding to logic circuits differs from that of the enhancement region corresponding to low-noise amplifiers. Since logic circuits do not require low noise, the Al component concentration in the AlGaAs isolation layer and / or Schottky layer is relatively low, typically 0.15–0.25%. Simultaneously, the enhancement region corresponding to logic circuits requires higher mobility to improve transconductance, thereby reducing the area of ​​the enhancement region. Therefore, the doping concentration of the δ-doped donor layer is relatively high, typically 1e⁻¹. 13 / cm 2 ~1e 15 / cm 2 .

[0075] In the semiconductor device provided in this embodiment, the Dmode gate and Emode gate are approximately the same height. The Emode gate can also be fabricated into a field plate structure similar to the T-shaped gate of the Dmode gate, thereby effectively reducing the noise figure of the low-noise amplifier and logic circuit, increasing gain, reducing power consumption, and improving efficiency.

[0076] It should be noted that the semiconductor device provided in this embodiment can be applied to various circuits and various communication fields, such as 5G (fifth-generation mobile communication technology), Wi-Fi (wireless communication technology), C-V2X (vehicle-to-everything wireless communication technology), NB-IoT (Narrow Band Internet of Things), etc.

[0077] Example 2

[0078] This embodiment provides a method for fabricating a semiconductor device according to Embodiment 1, including the following steps:

[0079] Step S101: Provide a substrate. In specific implementations, the substrate can be a three-dimensional semiconductor such as GaAs, GaN, InP, or SiC, or a silicon-based semiconductor such as bulk silicon CMOS and SOI substrates.

[0080] Step S102: Epitaxial growth and doping are performed on the substrate to form the depletion-type region and the enhancement-type region. During the epitaxial growth and / or doping process, a pre-set mask is inserted to prevent further epitaxial growth and / or doping in the blocked patterned areas, thereby forming depletion-type regions and enhancement-type regions with different vertical structures.

[0081] It should be noted that the aforementioned preset mask is used to control epitaxial growth and doping concentration. Unlike the mask used in the photolithography process for fabricating semiconductor devices, it only requires defining the boundaries of the depletion-mode region, enhancement-mode region, passive device region, and switching region within the preset mask; it does not require defining more detailed information about the semiconductor device. Therefore, the resolution of the preset mask can be set relatively low, and the processing precision can also be relatively low, allowing for the use of low-cost manufacturing processes.

[0082] Example 3

[0083] This embodiment provides an electronic device, including the semiconductor device provided in Embodiment 1.

[0084] In practice, the aforementioned electronic devices can be various devices such as computers, mobile phones, wearable devices, air conditioners, televisions, washing machines, refrigerators, etc.

[0085] While specific embodiments of the present invention have been described above, those skilled in the art should understand that these are merely illustrative examples, and the scope of protection of the present invention is defined by the appended claims. Those skilled in the art can make various changes or modifications to these embodiments without departing from the principles and essence of the present invention, but all such changes and modifications fall within the scope of protection of the present invention.

Claims

1. A semiconductor device, characterized in that, The semiconductor device has a depletion-type region and an enhancement-type region on its epitaxial wafer. The depletion-type region is integrated using a depletion-type process, and the enhancement-type region is integrated using an enhancement-type process. The depletion-type region and the enhancement-type region each have a Schottky layer and a delta-doped donor layer, with the Schottky layer located above the delta-doped donor layer; the Schottky layers of the depletion-type region and the Schottky layers of the enhancement-type region are arranged side by side, and the delta-doped donor layers of the depletion-type region and the delta-doped donor layers of the enhancement-type region are arranged side by side; The epitaxial wafer adopts a PHEMT structure. The vertical structures of the depletion-type region and the enhancement-type region are different. The gate electrode of the depletion-type region and the gate electrode of the enhancement-type region have the same cross-sectional shape, which is T-shaped. The doping concentration of the δ-doped donor layer in the depletion region is higher than that in the enhancement region.

2. The semiconductor device as claimed in claim 1, characterized in that, The Schottky base layer in the depletion region and the Schottky base layer in the reinforcement region have the same height.

3. The semiconductor device as described in claim 1, characterized in that, The content of the target chemical components in the isolation layer in the depletion region is different from the content of the target chemical components in the isolation layer in the enhancement region.

4. The semiconductor device as claimed in claim 1, characterized in that, The content of the target chemical components in the depleted region of the Schott basal layer is different from the content of the target chemical components in the enhanced region of the Schott basal layer.

5. The semiconductor device according to any one of claims 1-4, characterized in that, The semiconductor device includes a radio frequency switch located in the depletion-type region, and the radio frequency switch includes a transmit channel and a receive channel; The doping concentration of the δ-doped donor layer in the substrate region corresponding to the transmitting channel is different from the doping concentration of the δ-doped donor layer in the substrate region corresponding to the receiving channel; and / or, The target chemical composition content of the isolation layer in the substrate region corresponding to the transmitting channel is different from the target chemical composition content of the isolation layer in the substrate region corresponding to the receiving channel; and / or, The target chemical component content of the Schottky layer in the substrate region corresponding to the transmitting channel is different from the target chemical component content of the Schottky layer in the substrate region corresponding to the receiving channel.

6. The semiconductor device as claimed in claim 1 or 2, characterized in that, The semiconductor device includes a first device located in the depletion region, a second device located in the enhancement region, and a third device located in both the depletion region and the enhancement region; The target chemical component content of the isolation layer in the depletion-type region corresponding to the third device is different from the target chemical component content of the isolation layer in the depletion-type region corresponding to the first device; and / or, The target chemical component content of the Schottky layer in the depletion region corresponding to the third device is different from the target chemical component content of the Schottky layer in the enhancement region corresponding to the first device; and / or, The doping concentration of the δ-doped donor layer in the enhancement region corresponding to the third device is different from the doping concentration of the δ-doped donor layer in the enhancement region corresponding to the second device.

7. The semiconductor device as claimed in claim 6, characterized in that, The first device is a radio frequency switch or a power amplifier, and / or, The second device is a low-noise amplifier, and / or, The third device is a logic circuit.

8. A method for fabricating a semiconductor device, characterized in that, The semiconductor device is the semiconductor device as described in any one of claims 1-7; the preparation method includes the following steps: Provide substrate; The depletion region and the enhancement region are formed by epitaxial growth and doping on the substrate. In this process, during epitaxial growth and / or implantation doping, a preset mask is inserted so that the blocked patterned area cannot continue epitaxial growth and / or implantation doping.

9. An electronic device, characterized in that, Includes the semiconductor device as described in any one of claims 1-7.

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