Silicon-based cavity circulator / isolator and method of processing the same

Abstract

The application discloses a silicon-based cavity circulator / isolator and a processing method thereof. The structure comprises a permanent magnet, an upper silicon wafer, a first circuit film layer, a lower silicon wafer, a second circuit film layer and a bottom plate packaging layer arranged in sequence from top to bottom. The second circuit film layer is provided with a through hole penetrating through the lower silicon wafer. The through hole is provided with a ferrite. The upper surface and the lower surface of the first circuit film layer and the upper surface of the lower silicon wafer are respectively provided with an adhesive transition layer. The adhesive transition layer is made of Ti and W alloy material. The first circuit film layer and the second circuit film layer are thickened by electroplating metal layers. The metal layer material is the same as the material of the first circuit film layer and the second circuit film layer. The application can greatly improve the film adhesion of the conductive metal layer, enhance the reliability of the device, effectively block the mutual diffusion of the upper and lower layers in various environments, keep the device in a stable state and improve the performance of the microwave device unit.

Description

Technical Field

[0001] This invention relates to a circulator / isolator and its fabrication method, and more particularly to a silicon-based cavity circulator / isolator and its fabrication method. Background Technology

[0002] In recent years, with the rapid development of electronic technology, higher requirements have been placed on microwave communication systems in terms of reliability, power carrying capacity, and loss. To meet these increasingly stringent performance requirements, microwave communication systems need to develop towards high-density integration, which necessitates the miniaturization of communication transceiver components. To keep pace with this miniaturization trend, circulators and isolators, as front-end devices in communication systems, need to be improved in terms of device size, line precision, device integration, and production efficiency.

[0003] Existing silicon-based cavity circulators and isolators fabricated using MEMS technology have achieved miniaturization and high performance of device units. However, the selection of materials and the preparation process of various film layers, such as circuit film layers, adhesion layers, or transition layers, are relatively simple. This results in problems such as film adhesion, interpenetration of film materials, and interfacial effects between film layers. Consequently, these device units suffer from poor reliability and high losses. Summary of the Invention

[0004] The purpose of this invention is to provide a silicon-based cavity circulator / isolator and its processing method that solves the above-mentioned problems, greatly improves the thin film adhesion of the conductive metal layer, and enhances the reliability of the device.

[0005] To achieve the above objectives, the technical solution adopted by the present invention is as follows: a silicon-based cavity circulator / isolator, comprising a permanent magnet, an upper silicon wafer, a first circuit film layer, a lower silicon wafer, a second circuit film layer and a base plate encapsulation layer arranged sequentially from top to bottom, wherein the bottom of the second circuit film layer is provided with a through hole extending to the top of the lower silicon wafer, and ferrite is provided in the through hole;

[0006] An adhesion transition layer is provided on the upper and lower surfaces of the first circuit film layer and on the upper surface of the lower silicon wafer. The adhesion transition layer is made of an alloy material of Ti and W with an atomic ratio of Ti:W=1:9 and a thickness of 10 nanometers to 100 nanometers.

[0007] The first circuit film layer and the second circuit film layer are thickened by electroplating a metal layer, the thickness of which is 1 micrometer to 5 micrometers, and the material of the metal layer is the same as that of the first circuit film layer and the second circuit film layer.

[0008] Preferably, the first circuit film layer and the second circuit film layer are Au films, the metal layer is an Au layer, and the Au film and the Au layer constitute a thick gold layer.

[0009] Preferably, the upper and lower silicon wafers are silicon wafers with a bulk resistance of 10,000 ohms.

[0010] Preferably, the base plate encapsulation layer is made of low-resistivity silicon wafer or industrial pure iron plate with gold plating.

[0011] A method for fabricating a silicon-based cavity circulator / isolator includes the following steps;

[0012] (1) Select the upper and lower silicon wafers and clean them;

[0013] (2) Place the upper and lower silicon wafers in a magnetron sputtering apparatus, and first deposit an adhesion transition layer on the upper surface of the upper silicon wafer and the upper and lower surfaces of the lower silicon wafer, and then deposit an Au film layer; the adhesion transition layer is Ti. 10 W 90 membrane;

[0014] (3) Using electroplating, an Au layer is electroplated on the surface of the Au film layer, wherein the Au film and the Au layer constitute a thick gold layer;

[0015] (4) The upper and lower silicon wafers processed in steps (2) and (3) are used as upper and lower samples, respectively. Using micro-nano technology, metal circuit patterns are processed on the lower surface of the upper sample and the upper surface of the lower sample.

[0016] (5) Using wafer bonding process, the upper sample and lower sample processed in step (4) are hot-pressed together to obtain semi-finished product A1; wherein, the thick gold layer on the lower surface of the upper sample and the thick gold layer on the upper surface of the lower sample are combined together to form the first circuit film layer.

[0017] (6) Using deep silicon etching process, a through hole is etched at the bottom of the semi-finished product A1 to obtain the semi-finished product A2. The top of the through hole is flush with the upper surface of the lower silicon wafer, and the size of the through hole matches the size of the ferrite.

[0018] (7) Assemble the ferrite into the through hole of the semi-finished product A2 to obtain the semi-finished product A3;

[0019] (8) Fix the bottom plate sealing layer at the bottom of the semi-finished product A3, specifically as follows;

[0020] Au is placed between the semi-finished product A3 and the base plate encapsulation layer. 80 Sn 20 The solder pads are welded together using a eutectic welding process to fix the semi-finished product A3 and the base plate encapsulation layer together, resulting in semi-finished product A4.

[0021] Alternatively, an Au film layer can be prepared on the lower surface of the sample and the upper surface of the base plate encapsulation layer, respectively. A hot-press bonding process can be used to fix the semi-finished product A3 and the base plate encapsulation layer together to obtain the semi-finished product A4.

[0022] (9) The semi-finished product A4 is diced and cut to obtain a single silicon-based cavity circulator / isolator.

[0023] A method for fabricating a silicon-based cavity circulator / isolator, wherein the thickness of the adhesive transition layer is 10 nanometers to 100 nanometers.

[0024] As a preferred option: in step (3), the Au film thickness is 300 nanometers and the electroplated Au layer thickness is 5 micrometers.

[0025] As a preferred option: in step (8), the base plate encapsulation layer is a low-resistivity silicon wafer, which is stably bonded by using thermo-bonding, ball grid array encapsulation, or eutectic bonding.

[0026] Preferably, magnetron sputtering, chemical vapor deposition, atomic layer deposition, electron beam evaporation, electroplating, or electroless plating are used when depositing Au films and / or adhering transition layers.

[0027] As a preferred option, step (4) specifically involves applying adhesive, photolithography, exposure, development, hardening, etching, removing adhesive, and drying the upper and lower sample sheets to create a metal circuit pattern.

[0028] Compared with the prior art, the advantages of the present invention are as follows:

[0029] This invention deposits an adhesion transition layer on a silicon wafer, which greatly improves the adhesion of the conductive metal layer and enhances the reliability of the device. This invention provides a Ti... 10 W 90 The selection of membrane layers offers great flexibility for different application scenarios and process conditions.

[0030] The Ti given in this invention 10 W 90 The film layer can effectively block the diffusion between the upper and lower layers of materials in various environments, keeping the device in a stable state.

[0031] The invention provides a packaging method using eutectic bonding and thermo-press bonding, which can reduce the contact gap between the substrate and the ferrite material, thereby improving the performance of microwave device units. Attached Figure Description

[0032] Figure 1 This is a schematic diagram of the structure of the product of the present invention;

[0033] Figure 2 This is a schematic diagram of the product prepared by the method of the present invention after step (1);

[0034] Figure 3 This is a schematic diagram of the product prepared by the method of the present invention after step (2);

[0035] Figure 4 This is a schematic diagram of the product prepared by the method of the present invention after step (3);

[0036] Figure 5 This is a schematic diagram of the product prepared by the method of the present invention after step (4);

[0037] Figure 6 This is a schematic diagram of the product prepared by the method of the present invention after step (5);

[0038] Figure 7 This is a schematic diagram of the product prepared by the method of the present invention after step (6);

[0039] Figure 8 This is a schematic diagram of the product prepared by the method of the present invention after step (7);

[0040] Figure 9 This is a schematic diagram of the product prepared by the method of the present invention after step (8);

[0041] In the diagram: 1. Permanent magnet; 2. Upper silicon wafer; 3. Adhesion transition layer; 4. First circuit film layer; 5. Lower silicon wafer; 6. Second circuit film layer; 7. Ferrite; 8. Base plate encapsulation layer; 9. Au film layer. Detailed Implementation

[0042] The invention will now be further described with reference to the accompanying drawings.

[0043] Example 1: See Figures 1 to 9 A silicon-based cavity circulator / isolator includes, from top to bottom, a permanent magnet 1, an upper silicon wafer 2, a first circuit film layer 4, a lower silicon wafer 5, a second circuit film layer 6, and a base plate encapsulation layer 8. The bottom of the second circuit film layer 6 is provided with a through hole extending to the top of the lower silicon wafer 5, and a ferrite 7 is provided in the through hole. An adhesion transition layer 3 is provided on the upper and lower surfaces of the first circuit film layer 4 and on the upper surface of the lower silicon wafer 5.

[0044] The adhesion transition layer 3 is made of an alloy of Ti and W with an atomic ratio of Ti:W = 1:9, and the thickness of the adhesion transition layer 3 is 10 nanometers to 100 nanometers.

[0045] The first circuit film layer 4 and the second circuit film layer 6 are thickened by electroplating a metal layer, the thickness of which is 1 micrometer to 5 micrometers, and the material of the metal layer is the same as that of the first circuit film layer 4 and the second circuit film layer 6.

[0046] The first circuit film layer 4 and the second circuit film layer 6 are Au films, the metal layer is an Au layer, and the Au film and the Au layer constitute a thick gold layer.

[0047] The upper silicon wafer 2 and the lower silicon wafer 5 are silicon wafers with a bulk resistance of 10,000 ohms.

[0048] The base plate encapsulation layer 8 is made of low-resistivity silicon wafers or industrial pure iron plates with gold plating.

[0049] A method for fabricating a silicon-based cavity circulator / isolator includes the following steps;

[0050] (1) Select the upper silicon wafer 2 and the lower silicon wafer 5 and clean them;

[0051] (2) Place the upper silicon wafer 2 and the lower silicon wafer 5 in a magnetron sputtering apparatus, and first deposit an adhesion transition layer 3 on the upper surface of the upper silicon wafer 2 and the upper and lower surfaces of the lower silicon wafer 5, and then deposit an Au film layer 9; the adhesion transition layer 3 is Ti 10 W 90 membrane;

[0052] (3) Using electroplating, an Au layer is electroplated on the surface of the Au film layer 9, wherein the Au film and the Au layer constitute a thick gold layer;

[0053] (4) The upper silicon wafer 2 and the lower silicon wafer 5 processed in steps (2) and (3) are used as upper and lower samples, respectively. Using micro-nano technology, metal circuit patterns are processed on the lower surface of the upper sample and the upper surface of the lower sample.

[0054] (5) Using wafer bonding process, the upper sample and lower sample processed in step (4) are hot-pressed together to obtain semi-finished product A1; wherein, the thick gold layer on the lower surface of the upper sample and the thick gold layer on the upper surface of the lower sample are combined together to form the first circuit film layer 4.

[0055] (6) Using deep silicon etching process, through holes are etched at the bottom of semi-finished product A1 to obtain semi-finished product A2. The top of the through hole is flush with the upper surface of the lower silicon wafer 5, and the size of the through hole matches the size of the ferrite 7.

[0056] (7) Assemble ferrite 7 into the through hole of semi-finished product A2 to obtain semi-finished product A3;

[0057] (8) Fix the bottom plate sealing layer 8 at the bottom of the semi-finished product A3, specifically as follows:

[0058] Au is placed between the semi-finished product A3 and the base plate encapsulation layer 8. 80 Sn 20 The solder pads are welded together using a eutectic welding process to fix the semi-finished product A3 and the base plate encapsulation layer 8 together, resulting in the semi-finished product A4.

[0059] Alternatively, an Au film layer 9 can be prepared on the lower surface of the sample and the upper surface of the base plate encapsulation layer 8, respectively. A hot-press bonding process can be used to fix the semi-finished product A3 and the base plate encapsulation layer 8 together to obtain the semi-finished product A4.

[0060] (9) The semi-finished product A4 is diced and cut to obtain a single silicon-based cavity circulator / isolator.

[0061] The thickness of the adhesion transition layer 3 is 10 nanometers to 100 nanometers.

[0062] In step (3), the thickness of Au film layer 9 is 300 nanometers, and the thickness of electroplated Au layer is 5 micrometers.

[0063] In step (8), the base plate encapsulation layer 8 is a low-resistivity silicon wafer, which is stably bonded by using thermo-bonding, ball grid array encapsulation, or eutectic bonding.

[0064] When depositing Au film layer 9 and / or adhesion transition layer 3, magnetron sputtering, chemical vapor deposition, atomic layer deposition, electron beam evaporation, electroplating, or chemical plating are employed.

[0065] Step (4) specifically involves applying adhesive, photolithography, exposure, development, hardening, etching, removing adhesive, and drying the upper and lower sample sheets to create a metal circuit pattern.

[0066] In step (5) of this embodiment, when the thick gold layer on the lower surface of the upper sample is bonded together with the thick gold layer on the upper surface of the lower sample, it will not affect the metal circuit pattern, because the circuit patterns and positions of the upper and lower samples are different in the micro-nano fabrication in step (4). The bonding area of ​​the thermo-press bonding is a non-circuit area, where the upper and lower silicon wafers 5 have reserved Au film layers 9 at the same position.

[0067] This invention significantly improves the adhesion of conductive metal layers to thin films, enhancing device reliability. The adhesion of the conductive metal layer prepared according to this invention was verified using a cross-cut test: the film layer was cut with a cutting tool to form a grid pattern on the substrate, then completely adhered with adhesive tape and peeled off; no significant peeling was observed on the film surface. According to ASTM's grading method, a 0% peel area is sufficient to classify the film adhesion as level 5B.

[0068] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1.A silicon-based cavity circulator / isolator, comprising, from top to bottom, a permanent magnet, an upper silicon wafer, a first circuit film layer, a lower silicon wafer, a second circuit film layer, and a bottom plate packaging layer, wherein the second circuit film layer is provided with a through hole penetrating to the top of the lower silicon wafer, and the through hole is provided with a ferrite, characterized in that: the upper surface and the lower surface of the first circuit film layer and the upper surface of the lower silicon wafer are respectively provided with an adhesion transition layer, the adhesion transition layer is made of an alloy material of Ti and W, the atomic ratio of Ti: W is 1: 9, and the thickness of the adhesion transition layer is 10 nm ~ 100 nm; the first circuit film layer and the second circuit film layer are thickened by electroplating a metal layer, the thickness of the metal layer is 1 μm ~ 5 μm, and the material of the metal layer is the same as that of the first circuit film layer and the second circuit film layer; the first circuit film layer and the second circuit film layer are Au films, the metal layer is an Au layer, and the Au film and the Au layer form a thick gold layer; the upper silicon wafer and the lower silicon wafer are made of a silicon wafer with a bulk resistance of 10,000 Ω; and the bottom plate packaging layer is made of a low-resistance silicon wafer or an industrial pure iron plate with a surface plated with gold. The silicon-based cavity circulator / isolator further comprises the following steps: (1) selecting and cleaning the upper silicon wafer and the lower silicon wafer; 2. A silicon-based cavity circulator / isolator according to claim 1, wherein: (3) electroplating an Au layer on the surface of the Au film layer by using an electroplating method, wherein the Au film and the Au layer form a thick gold layer; 3. A silicon-based cavity circulator / isolator according to claim 1, wherein: (4) using a micro-nano process to process a metal circuit pattern on the lower surface of the upper sample wafer and the upper surface of the lower sample wafer, respectively, after the upper sample wafer and the lower sample wafer processed in steps (2) and (3) are used as the upper sample wafer and the lower sample wafer, respectively, wherein the metal circuit pattern penetrates the Au film layer and the adhesion transition layer at the corresponding positions; 4. A silicon-based cavity circulator / isolator according to claim 1, wherein: (5) using a wafer bonding process to heat-press bond the upper sample wafer and the lower sample wafer processed in step (4) to obtain a semi-finished product A1, wherein the thick gold layer on the lower surface of the upper sample wafer is combined with the thick gold layer on the upper surface of the lower sample wafer to form the first circuit film layer; 5. The method of claim 1, wherein: (6) using a deep silicon etching process to etch a through hole at the bottom of the semi-finished product A1 to obtain a semi-finished product A2, wherein the top of the through hole is flush with the upper surface of the lower silicon wafer, and the size of the through hole matches the size of the ferrite; (7) assembling the ferrite into the through hole of the semi-finished product A2 to obtain a semi-finished product A3; (2) Put the upper silicon wafer and the lower silicon wafer in a magnetron sputtering device, and first deposit an adhesion transition layer on the upper surface of the upper silicon wafer and the upper and lower surfaces of the lower silicon wafer, and then deposit an Au film layer; the adhesion transition layer is Ti 10 W 90 film layer; (8) fixing the bottom plate packaging layer at the bottom of the semi-finished product A3, specifically as follows: or preparing an Au film layer on the lower surface of the lower sample wafer and the upper surface of the bottom plate packaging layer, respectively, using a heat-press bonding process to fix the semi-finished product A3 and the bottom plate packaging layer together to obtain a semi-finished product A4; (9) slicing and cutting the semi-finished product A4 to obtain a single silicon-based cavity circulator / isolator. The thickness of the adhesion transition layer is 10 nm ~ 100 nm. In step (3), the thickness of the Au film layer is 300 nm, and the thickness of the electroplated Au layer is 5 μm. In step (8), the bottom plate packaging layer is a low-resistance silicon wafer, which is stably combined by using a heat-press bonding method, a ball grid array packaging method, or a eutectic soldering method. Au is placed between the semi-finished product A3 and the bottom plate packaging layer 80 Sn 20 The soldering piece is used to solder and fix the semi-finished product A3 and the bottom plate packaging layer together by using a eutectic soldering process, and a semi-finished product A4 is obtained. In the deposition of the Au film layer and / or the adhesion transition layer, a magnetron sputtering method, a chemical vapor deposition method, an atomic layer deposition method, an electron beam evaporation method, an electroplating method, or a chemical plating method is used. ​ 6. The method of claim 5, wherein: ​ 7. The method of claim 5, wherein: the substrate is a silicon substrate; the first and second waveguides are formed in the silicon substrate; the first and second waveguides are formed by etching the silicon substrate; and the first and second waveguides are formed by dry etching the silicon substrate. ​ 8. The method of claim 5, wherein: the substrate is a silicon substrate; the first and second waveguides are formed in the silicon substrate; the first and second waveguides are formed by etching the silicon substrate; and the first and second waveguides are formed by dry etching the silicon substrate. ​ 9. The method of claim 5, wherein: the substrate is a silicon substrate; the first and second waveguides are formed in the silicon substrate; the first and second waveguides are formed by etching the silicon substrate; and the first and second waveguides are formed by dry etching the silicon substrate. ​ 10. The method of claim 5, wherein: The step (4) is specifically to make the metal circuit pattern after the upper sample piece and the lower sample piece are coated, photoetched, exposed, developed, hardened, etched, removed, and dried. ​

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