A high-efficiency implementation method and device for a DPU scenario elastic network card

Abstract

The application discloses a DPU scene elastic network card efficient implementation method and device and electronic equipment, and relates to the technical field of cloud computing.The DPU scene elastic network card efficient implementation method adds a message header when the hardware of the DPU receives a message sent by a VM, and uploads the message to the SOC of the DPU; the SOC of the DPU analyzes and strips the message header, and transfers the message to the OVS; when the SOC of the DPU receives a message to be forwarded, a custom header is added, the message is sent to the hardware of the DPU, and the hardware of the DPU analyzes and forwards the message.This scheme does not need to create a representative port on the SOC side of the DPU, but adds a custom message header in the message interaction between the software and the hardware to indicate the information of the elastic network card and its queue, so that the SOC of the DPU and the hardware of the DPU realize the transmission of vport information, solve the problems of huge resource consumption and low message transceiving performance in the prior art, can save the software and hardware resources of the intelligent network card, and can improve the efficiency of message transceiving.

Description

Technical Field

[0001] This invention relates to the field of cloud computing technology, and in particular to a method, apparatus and electronic device for efficiently implementing elastic network interface cards (NICs) in DPU scenarios. Background Technology

[0002] In a standard network interface card (NIC) scenario, the tenant VM's virtio elastic NIC (hereinafter referred to as vport) is implemented based on vhost-user. The Virtio backend resides on the host, and OVS also runs on the host. Therefore, OVS can directly detect the tenant's vport devices and send and receive packets directly from these devices. In a DPU scenario, the VM's virtio elastic NIC backend is implemented on the DPU, the vport's virtio backend terminates on the DPU hardware, and OVS runs on the DPU's SOC within the DPU intelligent network. In this case, OVS is unaware of the VM's vport devices. However, for OVS to perform network forwarding, it must be aware of these vport devices. The traditional solution is to create a representative port on the DPU's SOC, mapping the DPU's representative port to the hardware's PVF ports one-to-one. The DPU hardware is responsible for the packet forwarding and receiving mapping between the PVF ports and the representative port. The software on the DPU's SOC indirectly operates the PVF ports by manipulating the representative port, thus achieving the logical operation of the vport.

[0003] The traditional approach of creating representative ports on the DPU's SoC has significant drawbacks: creating and associating representative ports with vports consumes substantial DPU resources. This is especially true in virtual machine and container scenarios, where a single host machine often needs to create a massive number (several kilobytes) of vports, resulting in enormous resource consumption. Therefore, the number of vports supported by the host machine is often limited in this approach. Furthermore, the software on the DPU's SoC, particularly DPDK packet sending and receiving, needs to poll a large number of representative ports, leading to poor packet transmission and reception performance.

[0004] However, in the process of implementing the inventive technical solution in the embodiments of this application, the inventors of this application discovered that the above-mentioned technology has at least the following technical problems:

[0005] Creating representative ports on the DPU's SOC consumes a lot of resources, thus limiting the number of vports and resulting in low packet transmission and reception efficiency. Summary of the Invention

[0006] This application provides a method, apparatus, and electronic device for efficiently implementing elastic network interface cards (NICs) in DPU scenarios. This solves the problems of high resource consumption and low message transmission and reception performance in the prior art, thereby reducing the cost of smart NICs and improving the efficiency of message transmission and reception.

[0007] This application provides an efficient method for implementing elastic network interface cards (NICs) in DPU scenarios, including the following steps:

[0008] S1 and DPU hardware receive messages sent by VM, add message headers, and send the messages to DPU's SOC. DPU's SOC parses and removes the message headers, and then forwards them to OVS.

[0009] When the S2 and DPU SOCs receive the message to be forwarded, they add a custom header and send the message to the DPU hardware. The DPU hardware then parses and forwards the message.

[0010] Furthermore, the hardware upload of the message from the DPU to the DPU's SOC in S1 specifically includes the following steps:

[0011] After receiving the message sent by the VM, the hardware of S11 and DPU generates vport and vqueue information according to the message source, and inserts the vport and vqueue information as the message header into the message.

[0012] S12. Determine if the message needs to be sent to the DPU's SOC, and send the message with the added header in S11 to the DPU's SOC through a fixed PF port.

[0013] Furthermore, the process of parsing and stripping the message header by the DPU's SOC in S1 is as follows: the dpdk program on the DPU's SOC initializes, polls the PF port, receives messages sent by the DPU's hardware, strips the message header, and parses and stores the vport and vqueue information.

[0014] Furthermore, in S2, the DPU's SOC sends a message to the DPU's hardware as follows: the dpdk program on the DPU's SOC generates custom header information and inserts it into the message. The custom header information is vport and vqueue information, which is sent to the DPU's hardware through a fixed PF port.

[0015] Furthermore, the hardware parsing and forwarding of messages by the DPU in S2 is specifically as follows: after receiving the message sent by the DPU's SOC, the hardware of the DPU removes the custom header, parses the vport and vqueue information, and sends the message to the vqueue of the VM's vport.

[0016] Furthermore, before S1, the process also includes: creating a vport, where the DPU hardware and DPDK agree on a vport number and align the physical meaning of the number.

[0017] Furthermore, in S1, OVS includes TMI and PKT, where TMI is Tianyi Meta Info, which includes portid and queue.

[0018] This invention also provides an efficient implementation device for elastic network interface cards (NICs) in DPU scenarios, comprising a first packet transceiver module and a second packet transceiver module, wherein:

[0019] The first packet receiving module is used by the DPU hardware to receive messages sent by the VM, add message headers, and send the messages to the DPU's SOC. The DPU's SOC parses and removes the message headers and forwards them to OVS.

[0020] The second packet transceiver module is used by the DPU's SOC to receive the message to be forwarded, add a custom header, and send the message to the DPU's hardware. The DPU's hardware then parses and forwards the message.

[0021] The present invention also provides an electronic device, comprising:

[0022] Processor; and

[0023] A memory storing computer program instructions, which, when executed by the processor, cause the processor to perform any of the methods described above for efficiently implementing a DPU scenario elastic network interface card.

[0024] The present invention also provides a computer-readable storage medium storing computer program instructions thereon, which, when executed by a processor, cause the processor to execute any of the methods described above for efficiently implementing a DPU scenario elastic network interface card.

[0025] One or more technical solutions provided in the embodiments of this application have at least the following technical effects or advantages:

[0026] 1. By adding a custom message header to the software and hardware interaction message, the vport information transmission between the DPU's SOC and the DPU's hardware is realized. It is not necessary to create and associate representative ports and vport ports, which saves network card software and hardware resources, reduces network card costs, increases the number of supported vports, and makes it easier for smart network cards to support more vports.

[0027] 2. The DPDK packet sending and receiving program on the DPU's SOC polls a fixed PF port. It only needs to poll one device, instead of polling hundreds or thousands of devices simultaneously, which efficiently completes the transmission of vport information, solves the packet sending and receiving problem, enhances packet sending and receiving performance, and improves packet sending and receiving efficiency. Attached Figure Description

[0028] Figure 1 Flowchart of the method for efficient implementation of elastic network interface card in DPU scenario provided by the present invention;

[0029] Figure 2This invention provides a standard network interface card (VHAT) vhost-user architecture diagram;

[0030] Figure 3 This invention provides a diagram of the virtio network interface card and component architecture for a DPU scenario.

[0031] Figure 4 This is a representative port structure diagram of the virtio network card in the DPU scenario provided by the present invention;

[0032] Figure 5 A structural diagram illustrating the OVS field and its meaning for a DPU scenario virtio network interface card provided by this invention;

[0033] Figure 6 This invention provides a flowchart of the VM packet sending DPU's SOC packet receiving process.

[0034] Figure 7 The flowchart of the DPU's SOC packet sending and VM packet receiving provided by the present invention;

[0035] Figure 8 A schematic diagram of an electronic device provided by the present invention. Detailed Implementation

[0036] This invention proposes an efficient implementation method, device, and electronic device for elastic network interface cards (NICs) in DPU scenarios. This solution eliminates the need to create a representative port on the DPU's SOC side. Instead, it uses a custom header added to the hardware-software interaction messages to indicate the elastic NIC and its queue information, enabling the DPU's SOC and hardware to transmit vport information. This solution not only saves hardware and software resources for the smart NIC and facilitates support for more vports, but also improves the efficiency of message transmission and reception.

[0037] To better understand the above technical solutions, the following will provide a detailed explanation of the technical solutions in conjunction with the accompanying drawings and specific implementation methods.

[0038] A method for efficiently implementing elastic network interface cards (NICs) in DPU scenarios includes the following steps:

[0039] S1 and DPU hardware receive messages sent by VM, add message headers, and send the messages to DPU's SOC. DPU's SOC parses and removes the message headers, and then forwards them to OVS.

[0040] When the S2 and DPU SOCs receive the message to be forwarded, they add a custom header and send the message to the DPU hardware. The DPU hardware then parses and forwards the message.

[0041] In this embodiment, as Figure 2As shown, in a standard network interface card (NIC) scenario, the virtio elastic NIC on the VM is implemented through vhost-user. The virtio backend is on the host, OVS runs on the host, and OVS can directly detect the vport device. OVS directly sends and receives packets from the vport device.

[0042] like Figure 3 As shown, in a DPU scenario, the virtio elastic network interface card on the VM is implemented on the DPU, the virtio backend is on the DPU, and OVS runs on the DPU's SoC. OVS is unaware of vport devices; to achieve network forwarding, it needs to be aware of these vport devices, such as... Figure 4 As shown, the traditional solution to this problem is to create a representative port on the DPU's SOC, and map the representative port to the PVF port on the hardware. The DPU's hardware maps the transmission and reception of packets between the PVF port and the representative port. The DPU's SOC operates the PVF port indirectly by operating the representative port, thereby operating the vport.

[0043] The traditional method of creating a representative port on the DPU's SOC has the problems of consuming a lot of resources and affecting the efficiency of message transmission and reception: creating and associating the representative port and vport requires a lot of DPU resources. Since a large number of vports need to be created, the resource consumption is huge. In the representative port mode, the number of vports supported by the host machine will be limited. The software on the DPU's SOC needs to poll a large number of representative ports, resulting in poor message transmission and reception performance.

[0044] The present invention does not create a representative port on the DPU's SOC, but uses other methods to detect the existence of vport. By adding custom messages to the software and hardware interaction messages, the vport information of the DPU's SOC and the DPU's hardware can be transmitted, which can save software and hardware resources, facilitate the network card to support more vports, and improve the efficiency of message transmission and reception.

[0045] like Figure 1As shown, when the VM sends a message, the DPU hardware receives the message and knows which vport and vqueue the message came from. The DPU hardware inserts this information into the message header and sends it to the DPU's SOC. The DPDK program on the DPU's SOC receives packets from a fixed PF. After receiving the message, it parses the custom header added by the hardware to obtain the vport and vqueue information, removes the custom header, and hands it over to OVS for processing. When the VM receives a message, the DPU's SOC adds a custom header to the message before forwarding it to a certain vport and vqueue, carrying the vport and vqueue information, and sends it to the hardware through a fixed PF port. The hardware parses this information and forwards the message to the queue of the corresponding vport.

[0046] The hardware-to-message transmission of messages from the DPU to the DPU's SOC in S1 specifically includes the following steps:

[0047] After receiving the message sent by the VM, the hardware of S11 and DPU generates vport and vqueue information according to the message source, and inserts the vport and vqueue information as the message header into the message.

[0048] S12. Determine if the message needs to be sent to the DPU's SOC, and send the message with the added header in S11 to the DPU's SOC through a fixed PF port.

[0049] In S1, the DPU's SOC parsing and header stripping process involves the following steps: the dpdk program on the DPU's SOC initializes, polls the PF port, receives messages sent by the DPU's hardware, strips the message header, and parses and stores the vport and vqueue information.

[0050] Before S1, it also includes: creating vports, the DPU hardware and DPDK agree on vport numbers, and unify the physical meaning of the numbers.

[0051] In S1, OVS includes TMI and PKT. TMI is Tianyi Meta Info, which includes portid and queue.

[0052] In this embodiment, as Figure 6As shown, vports are created, and the software and hardware agree on vport numbers, ensuring that the physical meaning of the numbers on both sides is consistent. When the VM sends a packet and the DPU's SOC receives the packet, the DPU hardware receives the packet from the host, generates vport and vqueue information based on the packet source, and inserts it as a packet header. If the DPU hardware determines that the packet needs to be sent to the DPU's SOC, it sends the packet with the added header to the DPU's SOC through a fixed PF port. The DPDK program on the DPU's SOC initializes and polls the PF port on the DPU's SOC that sends packets, receives the sent packets, strips the packet header, parses and stores the vport and vqueue information, and then hands the packet and vport and vqueue information over to OVS for processing. Figure 5 As shown, the dpdk program on OVS includes TMI and PKT. TMI contains portid and queue. When the VM sends a packet and the DPU's SOC receives the packet, portid is the source port of the packet. When the DPU's SOC sends a packet and the VM receives the packet, portid is the destination port of the packet, and queue is the queue from which the packet comes.

[0053] In S2, the DPU's SOC sends a message to the DPU's hardware as follows: the dpdk program on the DPU's SOC generates custom header information and inserts it into the message. The custom header information is vport and vqueue information, which is sent to the DPU's hardware through a fixed PF port.

[0054] In S2, the hardware parsing and forwarding of messages by the DPU is as follows: After receiving a message sent by the DPU's SOC, the DPU hardware removes the custom header, parses the vport and vqueue information, and sends the message to the vqueue of the VM's vport.

[0055] In this embodiment, as Figure 7 As shown, when the DPU's SOC sends a packet and the VM receives a packet, the DPU's SOC needs to forward the packet to the vqueue corresponding to a specific vport. The DPDK program generates the corresponding custom header information and inserts it into the original packet, then sends the packet to the hardware via a fixed PF. After receiving the packet, the DPU's hardware removes the custom header, parses the vport and vqueue information, and sends the packet to the vqueue of the VM's vport corresponding to the host. Traditional methods of creating representative ports require virtualizing actual network interfaces, which consumes a lot of hardware resources. Using the representative port mode often results in a limited number of supported vports, usually below 512. To meet the large-scale vport requirements of 4K to 16K in virtual machine or container scenarios, the technical solution of this invention is required.

[0056] A device for efficiently implementing elastic network interface cards (NICs) in DPU scenarios includes a first packet transceiver module and a second packet transceiver module, wherein:

[0057] The first packet receiving module is used by the DPU hardware to receive messages sent by the VM, add message headers, and send the messages to the DPU's SOC. The DPU's SOC parses and removes the message headers and forwards them to OVS.

[0058] The second packet transceiver module is used by the DPU's SOC to receive the message to be forwarded, add a custom header, and send the message to the DPU's hardware. The DPU's hardware then parses and forwards the message.

[0059] In this embodiment, the hardware of the DPU and the DPU smart network interface card of the DPU SOC are used. The hardware and SOC of the DPU communicate with each other through a custom header to transmit the host's vport and queue information. A custom header is added to the packet to indicate the elastic network interface card and its queue information, enabling the DPU SOC and hardware to transmit vport information. When the VM sends a packet, the DPU hardware inserts the vport and queue information into the packet and passes it to the DPU SOC. The DPU SOC parses and removes the packet header and passes it to OVS for processing. When the VM receives a packet, the DPU SOC adds a custom header to the packet and transmits the vport and queue information to the DPU hardware. The DPU hardware parses and forwards the packet information, thereby realizing the transmission of vport information.

[0060] An electronic device, comprising:

[0061] Processor; and

[0062] A memory storing computer program instructions, which, when executed by the processor, cause the processor to perform any of the methods described above for efficiently implementing a DPU scenario elastic network interface card.

[0063] A computer-readable storage medium storing computer program instructions thereon, which, when executed by a processor, cause the processor to perform any of the methods described above for efficiently implementing a DPU-based resilient network interface card.

[0064] In this embodiment, as Figure 8 As shown, the electronic device 10 includes one or more processors 11 and memory 12.

[0065] The processor 11 may be a central processing unit (CPU) or other form of processing unit with data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device 10 to perform desired functions.

[0066] The memory 12 may include one or more computer program products, which may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, random access memory (RAM) and / or cache memory. The non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage medium, and the processor 11 may execute the program instructions to implement the efficient implementation method of the DPU scenario elastic network interface card in the various embodiments of this application described above, and / or other desired functions.

[0067] In one example, the electronic device 10 may also include an input device 13 and an output device 14, which are interconnected via a bus system and / or other forms of connection mechanism (not shown).

[0068] In addition to the methods and devices described above, embodiments of this application may also be computer program products, which include computer program instructions that, when executed by a processor, cause the processor to perform the steps in the efficient implementation method of DPU scenario elastic network interface card according to various embodiments of this application described in the "Exemplary Methods" section of this specification.

[0069] The computer program product can be written in any combination of one or more programming languages ​​to perform the operations of the embodiments of this application. The programming languages ​​include object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computing device, partially on the user's computing device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0070] Furthermore, embodiments of this application may also be computer-readable storage media storing computer program instructions thereon, which, when executed by a processor, cause the processor to perform the steps in the efficient implementation method of DPU scenario elastic network interface card according to various embodiments of this application described in the "Exemplary Methods" section above.

[0071] The computer-readable storage medium may be any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may, for example, include, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: electrical connections having one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0072] The technical solutions described in the embodiments of this application have at least the following technical effects or advantages:

[0073] 1. The DPU's SOC does not need to create a representative port. It can detect the existence of the vport through other means, which solves the problems of consuming a lot of DPU resources and the limited number of vports that can be supported. This saves the hardware and software resources of the smart network card, greatly reduces the cost of the smart network card, and improves performance.

[0074] 2. The DPDK packet sending and receiving program on the DPU's SOC only needs to poll one device, avoiding polling hundreds or thousands of devices simultaneously. This solves the problems of low packet sending and receiving efficiency and high resource consumption, greatly improving the performance of packet sending and receiving, and improving the efficiency of vport information transmission between the DPU's SOC and the DPU's hardware.

[0075] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0076] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxesFigure 1 A device that provides the functions specified in one or more boxes.

[0077] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0078] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0079] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0080] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A method for efficiently implementing elastic network interface cards (NICs) in DPU scenarios, characterized in that, Includes the following steps: S1 and DPU hardware receive messages sent by VM, add message headers, and send the messages to DPU's SOC. DPU's SOC parses and removes the message headers, and then forwards them to OVS. When the S2 and DPU SOCs receive the message to be forwarded, they add a custom header and send the message to the DPU hardware. The DPU hardware then parses and forwards the message. Specifically, the hardware transmission of the message from the DPU to the DPU's SOC in S1 includes the following steps: After receiving the message sent by the VM, the hardware of S11 and DPU generates vport and vqueue information according to the message source, and inserts the vport and vqueue information as the message header into the message. S12. Determine if the message needs to be sent to the DPU's SOC, and send the message with the message header added in S11 to the DPU's SOC through a fixed PF port; Specifically, the process of parsing and stripping the message header of the DPU's SOC in S1 is as follows: the dpdk program on the DPU's SOC initializes, polls the fixed PF port, receives the messages sent by the DPU's hardware, strips the message header, and parses and stores the vport and vqueue information. Specifically, in S2, the DPU's SOC sends a message to the DPU's hardware as follows: the dpdk program on the DPU's SOC generates custom header information and inserts it into the message. The custom header information is vport and vqueue information, which is sent to the DPU's hardware through a fixed PF port. Specifically, in S2, the hardware parsing and forwarding of messages by the DPU is as follows: after receiving the message sent by the DPU's SOC, the hardware of the DPU removes the custom header, parses the vport and vqueue information, and sends the message to the vqueue of the VM's vport.

2. The method for efficiently implementing a flexible network interface card (NIC) in a DPU scenario as described in claim 1, characterized in that, Before S1, the process also includes: creating a vport, where the DPU hardware and DPDK agree on the vport number and align the physical meaning of the number.

3. The method for efficiently implementing a flexible network interface card (NIC) in a DPU scenario as described in claim 1, characterized in that, In S1, OVS includes TMI and PKT. TMI is Tianyi Meta Info, which includes portid and queue.

4. A device for efficiently implementing elastic network interface cards (NICs) in DPU scenarios, comprising a first packet transceiver module and a second packet transceiver module, wherein: The first packet receiving module is used by the DPU hardware to receive messages sent by the VM, add message headers, and send the messages to the DPU's SOC. The DPU's SOC parses and removes the message headers and hands them over to OVS. The second packet transceiver module is used by the DPU's SOC to receive the message to be forwarded, add a custom header, and send the message to the DPU's hardware. The DPU's hardware then parses and forwards the message. Specifically, the hardware transmission of messages from the DPU to the DPU's SOC in the first packet sending and receiving module includes the following steps: After receiving the message sent by the VM, the hardware of S11 and DPU generates vport and vqueue information according to the message source, and inserts the vport and vqueue information as the message header into the message. S12. Determine if the message needs to be sent to the DPU's SOC, and send the message with the message header added in S11 to the DPU's SOC through a fixed PF port; Specifically, in the first packet receiving module, the DPU's SOC parses and removes the packet header as follows: the dpdk program on the DPU's SOC initializes, polls a fixed PF port, receives packets sent by the DPU's hardware, removes the packet header, and parses and stores vport and vqueue information. Specifically, in the second packet receiving module, the DPU's SOC sends a message to the DPU's hardware as follows: the dpdk program on the DPU's SOC generates custom header information and inserts it into the message. The custom header information is vport and vqueue information, which is sent to the DPU's hardware through a fixed PF port. Specifically, in the second packet receiving module, the hardware parsing and forwarding of packets by the DPU is as follows: after receiving the packet sent by the DPU's SOC, the DPU hardware removes the custom header, parses the vport and vqueue information, and sends the packet to the vqueue of the VM's vport.

5. An electronic device, comprising: processor; as well as A memory storing computer program instructions, which, when executed by the processor, cause the processor to perform an efficient implementation method for a DPU scenario elastic network interface card as described in any one of claims 1-3.

6. A computer-readable storage medium having stored thereon computer program instructions, which, when executed by a processor, cause the processor to perform a method for efficiently implementing a DPU-based resilient network interface card as described in any one of claims 1-3.

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