Display substrate, display panel and display device

Abstract

The embodiments of the present disclosure provide a display substrate, a display panel and a display device. The display substrate comprises a plurality of pixel units arranged in an array, each of the pixel units comprising a light emitting element and a pixel driving circuit for driving the light emitting element to emit light, the pixel driving circuit comprising at least a driving transistor and a storage capacitor, a first end of the storage capacitor being connected to a control electrode of the driving transistor, and a second end of the storage capacitor being connected to a first electrode of the light emitting element; the plurality of pixel units comprise at least a first pixel unit emitting light of a first color and a second pixel unit emitting light of a second color, wherein the storage capacitor comprised by the first pixel unit is a first storage capacitor, the storage capacitor comprised by the second pixel unit is a second storage capacitor; and a capacitance value of the first storage capacitor is different from a capacitance value of the second storage capacitor.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of display, in particular to a display substrate, a display panel and a display device. BACKGROUND

[0002] In recent years, due to the excellent display effect of organic light-emitting diode (OLED) display, the rapid development of OLED industry at home and abroad, various pixel driving circuits of OLED panel have been developed. The organic light-emitting diode panel can emit light driven by the current generated by the driving transistor in the pixel driving circuit in the saturation state. SUMMARY

[0003] The present disclosure provides a display substrate, a display panel and a display device.

[0004] In a first aspect, the present disclosure provides a display substrate comprising a plurality of pixel units arranged in an array, each pixel unit comprising a light-emitting element and a pixel driving circuit for driving the light-emitting element to emit light, the pixel driving circuit comprising at least a driving transistor and a storage capacitor, a first terminal of the storage capacitor being connected to a control electrode of the driving transistor, and a second terminal of the storage capacitor being connected to a first electrode of the light-emitting element.

[0005] The plurality of pixel units comprises at least a first pixel unit emitting light of a first color and a second pixel unit emitting light of a second color, wherein the storage capacitor comprised by the first pixel unit is a first storage capacitor, and the storage capacitor comprised by the second pixel unit is a second storage capacitor.

[0006] The first storage capacitor has a different capacitance value from the second storage capacitor.

[0007] In some embodiments, the light-emitting element comprised by the first pixel unit is a first light-emitting element, and the light-emitting element comprised by the second pixel unit is a second light-emitting element.

[0008] The first light-emitting element has a lower light-emitting efficiency than the second light-emitting element, and the first storage capacitor has a larger capacitance value than the second storage capacitor.

[0009] In some embodiments, the pixel units further comprise a third pixel unit emitting light of a third color.

[0010] The third pixel unit comprises a third storage capacitor, and the third storage capacitor comprised by the third pixel unit is a third storage capacitor.

[0011] The third storage capacitor has a capacitance value different from the capacitance value of the first storage capacitor and the capacitance value of the second storage capacitor.

[0012] In some embodiments, the light emitting element included in the third pixel unit is a third light emitting element.

[0013] The first light emitting element has a light emitting efficiency less than that of the second light emitting element, and the second light emitting element has a light emitting efficiency less than that of the third light emitting element.

[0014] The first storage capacitor has a capacitance value greater than that of the second storage capacitor, and the second storage capacitor has a capacitance value greater than that of the third storage capacitor.

[0015] In some embodiments, the first color light is blue light, the second color light is green light, and the third color light is red light.

[0016] In some embodiments, at least some of the pixel units are configured with a compensation capacitor, a first end of the compensation capacitor is connected to a first electrode of the light emitting element, and a second end of the compensation capacitor is connected to a first working voltage terminal.

[0017] For the pixel units configured with the compensation capacitor, a ratio between a sum of an intrinsic capacitance of the light emitting element and a capacitance value of the compensation capacitor and a capacitance value of the storage capacitor is 1 / 5-5.

[0018] For the pixel units not configured with the compensation capacitor, a ratio between a capacitance value of the intrinsic capacitance of the light emitting element and the capacitance value of the storage capacitor is 1 / 5-5.

[0019] In some embodiments, the plurality of pixel units further include a third pixel unit emitting a third color light.

[0020] An area of an opening region corresponding to the second pixel unit is less than an area of an opening region corresponding to the third pixel unit, and the area of the opening region corresponding to the second pixel unit is less than an area of an opening region corresponding to the first pixel unit.

[0021] The second pixel unit is configured with the compensation capacitor.

[0022] In some embodiments, an area of an opening region corresponding to the pixel unit configured with the compensation capacitor is less than 1500 μm 2 .

[0023] In some embodiments, the capacitance value of the storage capacitor is 100 fF-300 fF.

[0024] In some embodiments, the display substrate further comprises a plurality of data lines extending in a first direction and a plurality of gate lines extending in a second direction, the plurality of data lines and the plurality of gate lines intersecting to define the plurality of pixel units.

[0025] The first electrode of the drive transistor is connected to a second working voltage terminal, the second electrode of the drive transistor is connected to the first electrode of the light emitting element, and the second electrode of the light emitting element is connected to a third working voltage terminal.

[0026] The pixel driving circuit further comprises a data write transistor, the control electrode of the data write transistor is connected to the gate line, the first electrode of the data write transistor is connected to the data line, and the second electrode of the data write transistor is connected to the first terminal of the storage capacitor.

[0027] In some embodiments, the capacitance value of the storage capacitor satisfies the following formula:

[0028]

[0029] wherein I off is the leakage current generated when the data write transistor is in the off state, f is the refresh frequency of the display substrate, and AV is the maximum withstand voltage value of the storage capacitor.

[0030] In some embodiments, at least part of the pixel units are configured with a compensation capacitor, the first terminal of the compensation capacitor is connected to the first electrode of the light emitting element, and the second terminal of the compensation capacitor is connected to the first working voltage terminal.

[0031] The first working voltage terminal and the second working voltage terminal are the same signal terminal.

[0032] Alternatively, the first working voltage terminal and the third working voltage terminal are the same signal terminal.

[0033] In some embodiments, the pixel driving circuit further comprises at least one of a first reset transistor, a second reset transistor, and a light emitting control transistor.

[0034] The control electrode of the first reset transistor is connected to a first control signal line, the first electrode of the first reset transistor is connected to a first reset voltage terminal, and the second electrode of the first reset transistor is connected to the first terminal of the storage capacitor.

[0035] The control electrode of the second reset transistor is connected to a second control signal line, the first electrode of the second reset transistor is connected to the second electrode of the drive transistor, and the second electrode of the second reset transistor is connected to a second reset voltage terminal.

[0036] The control electrode of the light-emitting control transistor is connected to a light-emitting control signal line, the first electrode of the light-emitting control transistor is connected to the second operating voltage terminal, and the second electrode of the light-emitting control transistor is connected to the first electrode of the driving transistor.

[0037] In a second aspect, the display panel provided by the embodiments of the present disclosure includes the display substrate provided by the first aspect.

[0038] In a third aspect, the display device provided by the embodiments of the present disclosure includes the display panel provided by the second aspect.

[0039] In some embodiments, the display device further includes a source driver configured to generate data voltages for providing to the pixel units based on the same gamma voltage.

[0040] The display substrate provided by the embodiments of the present disclosure configures different storage capacitors for pixel units corresponding to different light-emitting colors, accurately controls the gray scale loss of each pixel unit by matching appropriate storage capacitors, ensures that the number of gray scales that can be covered by all pixel units when the gray scales are expanded in the operating voltage range is consistent, and the same brightness gradient can be presented, thereby avoiding display defects such as uneven brightness and color deviation. BRIEF DESCRIPTION OF DRAWINGS

[0041] The accompanying drawings are included to provide a further understanding of the present disclosure and constitute a part of the specification, and are used together with the following detailed description to explain the present disclosure, but do not constitute a limitation on the present disclosure. In the drawings:

[0042] Figure 1 A structural schematic diagram of a pixel driving circuit provided by the embodiments of the present disclosure.

[0043] Figure 2 A structural schematic diagram of a pixel driving circuit provided by the embodiments of the present disclosure. Figure 1 A timing diagram of the operation of the pixel driving circuit.

[0044] Figure 3 A structural schematic diagram of another pixel driving circuit provided by the embodiments of the present disclosure.

[0045] Explanation of reference signs:

[0046] Data line Data, gate line Gate, data voltage Vdata, first operating voltage terminal V0, second operating voltage terminal ELVDD, third operating voltage terminal ELVSS, first reset voltage terminal Vref, second reset voltage terminal Vinit, first control signal line G1, second control signal line G2, light-emitting control signal line EM;

[0047] The drive transistor DTFT, the data writing transistor T1, the first reset transistor T2, the second reset transistor T3, and the light emitting control transistor T4.

[0048] The storage capacitor Cst includes a first storage capacitor Cst1, a second storage capacitor Cst2, and a third storage capacitor Cst3; an intrinsic capacitor Coled and a compensation capacitor C0. DETAILED DESCRIPTION

[0049] The specific embodiments of the present disclosure will be described below in detail with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are merely intended to illustrate and explain the present disclosure, and are not intended to limit the present disclosure.

[0050] To make the objectives, technical solutions, and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be described clearly and completely below with reference to the accompanying drawings of the embodiments of the present disclosure. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all the embodiments of the present disclosure. Based on the described embodiments of the present disclosure, all other embodiments obtained by a person of ordinary skill in the art without creative effort belong to the scope of protection of the present disclosure.

[0051] Unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should be understood as the common meanings of the terms by those having ordinary skills in the art to which the present disclosure belongs. The terms “first”, “second”, and similar terms used in the present disclosure do not represent any order, quantity, or importance, but are only used to distinguish different components. Similarly, the terms “include”, “contain”, and similar terms mean that the elements or objects before the terms encompass the elements or objects listed after the terms and their equivalents, without excluding other elements or objects. The terms “connect” or “connected” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “up”, “down”, “left”, “right”, and the like are only used to represent relative positional relationships, and when the absolute positions of the described objects change, the relative positional relationships can also change accordingly.

[0052] In recent years, thanks to the excellent display effect of organic light-emitting diode (OLED) displays, the rapid development of the OLED industry at home and abroad, various pixel driving circuits of OLED panels have been developed. The organic light-emitting diode panel can emit light, which is driven by the current generated by the drive transistor in the pixel driving circuit in the saturation state.

[0053] The transistors in this disclosure can be thin-film transistors, field-effect transistors, or other switching devices with similar characteristics. A transistor generally includes three terminals: a gate, a source, and a drain. The source and drain of a transistor are structurally symmetrical and can be interchanged as needed. In this disclosure, the control terminal refers to the gate of the transistor, and one of the first and second terminals is the source, while the other is the drain.

[0054] Furthermore, based on their characteristics, transistors can be classified into N-type transistors and P-type transistors. When a transistor is N-type, its on-state voltage is a high-level voltage, and its off-state voltage is a low-level voltage. When a transistor is P-type, its on-state voltage is a low-level voltage, and its off-state voltage is a high-level voltage. In this invention, "effective level" refers to the voltage that controls the corresponding transistor to turn on, and "ineffective level" refers to the voltage that controls the corresponding transistor to turn off. Therefore, when the transistor is N-type, the effective level is high, and the ineffective level is low; when the transistor is P-type, the effective level is low, and the ineffective level is high.

[0055] In the following description of embodiments of the present invention, exemplified by the example where all transistors (including driving transistors) are N-type transistors, an effective level refers to a high level, and correspondingly, an effective level state refers to a high level state. Ineffective level refers to a low level, and correspondingly, an ineffective level state refers to a low level state. Those skilled in the art should understand that the transistors in the following embodiments of the present invention can also be P-type transistors.

[0056] In this disclosure, the case where all transistors in the pixel circuit are simultaneously N-type transistors or simultaneously P-type transistors is only a preferred embodiment. In this case, all transistors in the pixel circuit can be fabricated simultaneously based on the same process, which is beneficial to shorten the fabrication cycle.

[0057] It should be understood that when fabricating OLEDs that emit different colors of light, factors such as the luminescent material and film thickness result in different luminous efficiencies. Generally speaking, red OLEDs have higher luminous efficiency than green OLEDs, and green OLEDs have higher luminous efficiency than blue OLEDs; that is, when the same driving current is applied, red OLEDs have higher luminous brightness than green OLEDs, and green OLEDs have higher luminous brightness than blue OLEDs.

[0058] Taking grayscale unfolding processing of an RGB OLED display device as an example, the specific process is as follows:

[0059] First, the required voltages for red, green, and blue OLEDs to display a preset maximum brightness (set as needed, e.g., 150 nits) are determined through testing and denoted as Vr_max, Vg_max, and Vb_max, respectively. These voltages serve as the maximum operating voltages for pixel units containing red OLEDs (referred to as red pixel units), green OLEDs (referred to as green pixel units), and blue OLEDs (referred to as blue pixel units). Specifically, the operating voltage range for red pixel units is 0 to Vr_max, for green pixel units it is 0 to Vg_max, and for blue pixel units it is 0 to Vb_max. Since the luminous efficiency of red OLEDs is greater than that of green OLEDs, and the luminous efficiency of green OLEDs is greater than that of blue OLEDs, the measured Vr_max < Vg_max < Vb_max, meaning the operating voltage range for blue pixel units is the largest.

[0060] Next, based on the operating voltage range of the blue light pixel unit: 0 to Vg_max, grayscale division is performed. Taking 8-bit grayscale representation as an example, it can be divided into 2... 8 =256 gray levels (L0~L255), that is, 256 brightness levels. The richer the brightness gradient that can be displayed, the more delicate the picture will be. Then, based on a preset algorithm, the voltage corresponding to each gray level L0~L255 in the working voltage range of 0~Vg_max is determined according to the gamma voltage. For example, the voltage corresponding to L0 is 0V, and the voltage corresponding to L255 is Vg_max.

[0061] After grayscale expansion based on the operating voltage range of the blue pixel unit, because the maximum operating voltage Vr_max of the red pixel unit and the maximum operating voltage Vg_max of the green pixel unit are both lower than the maximum operating voltage Vb_max of the blue pixel unit, the red and green pixel units cannot display some grayscale levels, resulting in grayscale loss. Specifically, the greater the voltage difference between Vr_max and Vb_max, the more grayscale levels are lost by the red pixel unit; similarly, the greater the voltage difference between Vg_max and Vb_max, the more grayscale levels are lost by the green pixel unit. This not only causes brightness loss in monochrome display but also leads to color deviation during color mixing.

[0062] In related technologies, a source driver chip generates data voltage, and by providing different data voltages to each pixel unit, the grayscale voltage of each pixel unit is achieved. Taking an 8-bit source driver chip as an example, a gamma reference voltage source provides eight gamma reference voltages and outputs them to the source driver chip through a gamma voltage signal port, generating 256 grayscale voltages. At this point, to avoid grayscale loss between pixel units, a separate gamma reference voltage needs to be configured for each pixel unit corresponding to the three colors of light; that is, three sets of gamma reference voltages are required, which increases cost and driving power consumption.

[0063] To address at least one of the aforementioned technical problems, this disclosure provides a display substrate that reduces grayscale loss during the driving process by matching a suitable storage capacitor to each pixel unit.

[0064] Figure 1 This is a schematic diagram of a pixel driving circuit provided in an embodiment of the present disclosure.

[0065] The display substrate provided in this embodiment includes multiple pixel units arranged in an array. Each pixel unit includes a light-emitting element and a pixel driving circuit for driving the light-emitting element to emit light, such as... Figure 1 As shown, the pixel driving circuit includes at least a driving transistor DTFT and a storage capacitor Cst. The first end of the storage capacitor Cst is connected to the control electrode of the driving transistor DTFT, and the second end of the storage capacitor Cst is connected to the first electrode of the light-emitting element.

[0066] The plurality of pixel units include at least a first pixel unit that emits a first color light and a second pixel unit that emits a second color light, wherein the storage capacitor Cst included in the first pixel unit is a first storage capacitor Cst1, and the storage capacitor Cst included in the second pixel unit is a second storage capacitor Cst2; the capacitance value of the first storage capacitor Cst1 is different from the capacitance value of the second storage capacitor Cst2.

[0067] In the display substrate provided in this embodiment, different storage capacitors are configured for pixel units corresponding to different light-emitting colors. By matching appropriate storage capacitors, the grayscale loss of each pixel unit is precisely controlled. This reduces grayscale loss while ensuring that all pixel units can cover the same number of grayscale levels when performing grayscale expansion within the working voltage range, thus presenting the same brightness gradient and avoiding display defects such as uneven brightness and color mixing deviation.

[0068] In some embodiments, the display substrate further includes a plurality of data lines (Data) extending along a first direction and a plurality of gate lines (Gate) extending along a second direction, the data lines (Data) and the gate lines (Gate) intersecting to define a plurality of pixel units. The data lines (Data) provide a data voltage (Vdata) to the corresponding pixel unit, and the gate lines (Gate) provide a gate voltage to the corresponding pixel unit.

[0069] like Figure 1 As shown, the pixel driving circuit is a 2T1C type circuit. The first electrode of the driving transistor DTFT is connected to the second operating voltage terminal ELVDD, the second electrode of the driving transistor DTFT is connected to the first electrode of the light-emitting element, and the second electrode of the light-emitting element is connected to the third operating voltage terminal ELVSS. The pixel driving circuit also includes a data writing transistor T1, the control electrode of the data writing transistor T1 is connected to the gate line Gate, the first electrode of the data writing transistor T1 is connected to the data line Data, and the second electrode of the data writing transistor T1 is connected to the first terminal of the storage capacitor Cst. The first operating voltage terminal V0 provides the first voltage VDD, and the second operating voltage terminal ELVDD provides the second voltage VSS.

[0070] In one example, such as Figure 1 As shown, the first terminal of the storage capacitor Cst is connected to the second terminal of the data writing transistor T1 at node N, and the second terminal of the storage capacitor Cst is connected to the first electrode of the light-emitting element at node S.

[0071] Figure 2 for Figure 1 The timing diagram of the middle pixel driving circuit is shown below. Figure 2 As shown, a display cycle in the operation of the pixel driving circuit includes at least three phases: a data voltage writing phase, a holding phase, and a light-emitting phase. During the data voltage writing phase, the control data writing transistor T1 is turned on, writing the data voltage Vdata provided by the data line Data to the control electrode of the driving transistor DTFT. During the holding phase, the drain of the driving transistor DTFT is connected to the light-emitting element, enabling the driving transistor DTFT to output driving current to the light-emitting element. During the light-emitting phase, the Vdd voltage is written to node S through the driving transistor DTFT. At this time, due to the effect of the storage capacitor Cst, the gate-source voltage of the driving transistor DTFT maintains its previous state, ensuring that the light-emitting element maintains a stable voltage and emits light.

[0072] In this process, the pixel driving circuit suffers from three types of grayscale loss, as follows:

[0073] 1. During the data writing phase, the data line Data provides a high-level signal to the first terminal of the data writing transistor T1, and the gate line Gate provides a high-level signal to the control terminal of the data writing transistor T1, controlling the data writing transistor T1 to conduct. The data voltage Vdata is written to the control terminal of the driving transistor DTFT, i.e., node N. The voltage change at node N during the data writing phase is ΔVN1. Since the light-emitting element has an intrinsic capacitance Colled, coupling occurs between the storage capacitor Cst and the intrinsic capacitance Colled of the light-emitting element, causing a voltage change at node S. The voltage change at node S, ΔVS1, can be expressed by Equation 1.

[0074]

[0075] Wherein, Cgs_t2 is the parasitic capacitance between the gate and drain of the driving transistor DTFT, and C0 is the compensation capacitor C0. Whether to add the compensation capacitor C0, its location, and its size are described in detail in other embodiments, and will not be repeated here.

[0076] According to Formula 1, the voltage change ΔVS1 at node S is obviously less than the voltage change ΔVN1 at node N. The smaller ΔVS1 / ΔVN1 is, the closer the voltage written to point N is to the data voltage Vdata, and the less grayscale loss there will be.

[0077] 2. At time t2, the data line Data provides a high-level signal to the first terminal of the data writing transistor T1, and the gate line Gate provides a low-level signal to the control terminal of the data writing transistor T1, controlling the data writing transistor T1 to turn off. At this time, the first terminal of the storage capacitor Cst is in a floating state, and the driving transistor DTFT is in a conducting state. The driving current output by the driving transistor DTFT will charge the second terminal of the storage capacitor Cst, causing the voltage at the second terminal of the storage capacitor Cst to change, thereby causing leakage at node N. The voltage change ΔVN2 caused by the pull-down of node N can be expressed by formula 2.

[0078]

[0079] Where Cgs_t1 is the parasitic capacitance between the gate and drain of the data writing transistor T1, and ΔVgate is the voltage difference between the high-level signal and the low-level signal provided by the gate line.

[0080] According to Formula 2, the magnitude of ΔVN2 is negatively correlated with the capacitance value of the storage capacitor Cst, and the smaller ΔVN2 is, the less grayscale loss there will be.

[0081] 3. During the holding phase, the second working voltage terminal ELVDD provides the first voltage VDD, and the driving transistor DTFT is in the on state. The first voltage VDD is written to node S through the driving transistor DTFT, and the voltage of node S rises. The voltage change of node S is ΔVS2. Due to the bootstrap effect of the storage capacitor Cst, the voltage at node N also rises. The voltage change of node S, ΔVN3, can be expressed by formula 3.

[0082]

[0083] Where Cgd_t2 is the parasitic capacitance between the gate and source of the data writing transistor T1.

[0084] As shown in Equation 3, the gate-source voltage of the driving transistor DTFT (the difference between the voltage at node N and the voltage at node S, which is also the voltage difference across the storage capacitor Cst) generally shows a decreasing trend. This means that due to the coupling of the storage capacitor Cst, a voltage divider occurs at node N when the driving transistor DTFT outputs its gate-source voltage, resulting in grayscale loss. The voltage change at node S, ΔVN3, is related to the capacitance value of the storage capacitor Cst, and the smaller ΔVN3 is, the less grayscale loss occurs.

[0085] Based on the above, it can be seen that the three types of grayscale loss generated during the driving process of the light-emitting element are all related to the capacitance value of the storage capacitor Cst. Although during the data writing stage, the larger the capacitance value of the storage capacitor Cst, the smaller the voltage change ΔVS1 at node S, for the entire display cycle, the larger the capacitance value of the storage capacitor Cst, the less the total grayscale loss generated in a display cycle. That is, the sum of the three types of grayscale loss is smaller. In other words, there is a negative correlation between the capacitance value of the storage capacitor Cst and the total grayscale loss.

[0086] In some embodiments, the light-emitting element included in the first pixel unit is a first light-emitting element, and the light-emitting element included in the second pixel unit is a second light-emitting element; the luminous efficiency of the first light-emitting element is less than the luminous efficiency of the second light-emitting element, and the capacitance value of the first storage capacitor Cst1 is greater than the capacitance value of the second storage capacitor Cst2.

[0087] It should be understood that the lower the luminous efficiency of the light-emitting element, the greater the required driving current / voltage. Therefore, when the data voltage Vdata supplied to each light-emitting element is the same, and the luminous efficiency of the first light-emitting element is less than that of the second light-emitting element, the grayscale loss corresponding to the first light-emitting element is less than that corresponding to the second light-emitting element. Since the capacitance value of the storage capacitor Cst is negatively correlated with the amount of grayscale loss, the capacitance value of the first storage capacitor Cst1 is greater than that of the second storage capacitor Cst2.

[0088] In some embodiments, the pixel unit further includes a third pixel unit that emits a third color light; the storage capacitor Cst included in the third pixel unit is a third storage capacitor Cst3; the capacitance value of the third storage capacitor Cst3 is different from the capacitance value of the first storage capacitor Cst1 and the capacitance value of the second storage capacitor Cst2.

[0089] Since the luminous efficiency of the first pixel unit, the second pixel unit, and the third pixel unit are all different, their saturation voltages are also different. By matching the corresponding first storage capacitor Cst1, second storage capacitor Cst2, and third storage capacitor Cst3, the grayscale loss of the first pixel unit, the second pixel unit, and the third pixel unit can be precisely controlled, so that the same data voltage can be used to drive each pixel unit.

[0090] In one example, the first color light is blue, the second color light is green, and the third color light is red. The first light-emitting element is a blue light-emitting element, the second light-emitting element is a green light-emitting element, and the third light-emitting element is a red light-emitting element.

[0091] The luminous efficiency of the blue light-emitting element is lower than that of the green light-emitting element, and the luminous efficiency of the green light-emitting element is lower than that of the red light-emitting element. Therefore, assuming the same data voltage is supplied to each pixel unit, the grayscale loss corresponding to the blue light-emitting element must be less than that corresponding to the green light-emitting element, and the grayscale loss corresponding to the green light-emitting element must be less than that corresponding to the red light-emitting element. Correspondingly, the capacitance value of the first storage capacitor Cst1 is greater than the capacitance value of the second storage capacitor Cst2, and the capacitance value of the second storage capacitor Cst2 is greater than the capacitance value of the third storage capacitor Cst3.

[0092] It should also be noted that the storage capacitor Cst of each pixel unit has a minimum value, and the minimum value of the storage capacitor Cst satisfies the following formula 4:

[0093]

[0094] Among them, I off ΔV is the leakage current generated when the data writing transistor T1 is turned off, f is the refresh frequency of the display substrate, and ΔV is the maximum withstand voltage of the storage capacitor Cst.

[0095] Furthermore, the capacitance value of the storage capacitor Cst is also limited by the size of the storage capacitor Cst. Typically, the pixel driving circuit is located in the spacing area between adjacent pixel units. In high PPI display substrates, the openings of the pixel units are small and dense, and the spacing area is correspondingly reduced. At this time, the placement space for the pixel driving circuit of each pixel unit is limited, and the device size of the storage capacitor Cst is also limited. Consequently, the capacitance value of the storage capacitor Cst will be affected by the device size.

[0096] In some embodiments, the capacitance value of the storage capacitor Cst is 100-300fF.

[0097] The compensation capacitor C0 will be described in detail below with reference to specific embodiments.

[0098] In some embodiments, such as Figure 2 As shown, during the data writing stage, when the PPI of the display substrate is high, the aperture area of ​​the pixel unit is small, resulting in a small intrinsic capacitance (Coled) of the light-emitting element. According to Equation 1, when the intrinsic capacitance (Coled) of the light-emitting element is very small, the voltage change ΔVS1 at node S is nearly the same as the voltage change ΔVN1 at node N. This is equivalent to the voltage difference across the storage capacitor Cst being nearly constant, leading to significant grayscale loss and data writing failure. In this case, a compensation capacitor C0 needs to be added to reduce grayscale loss during this stage and ensure that the data voltage can be written to the gate of the driving transistor DTFT.

[0099] However, it should be noted that since the opening size of the pixel unit that emits different colors of light is different, the intrinsic capacitance Coled of the light-emitting element is different. That is, the intrinsic capacitance Coled corresponding to the first light-emitting element, the second light-emitting element and the third light-emitting element are not the same. Therefore, not every pixel unit is equipped with a compensation capacitor C0.

[0100] In some embodiments, at least some pixel units are equipped with a compensation capacitor C0. The first terminal of the compensation capacitor C0 is connected to the first electrode of the light-emitting element, and the second terminal of the compensation capacitor C0 is connected to the first operating voltage terminal V0. For pixel units equipped with the compensation capacitor C0, the ratio between the sum of the intrinsic capacitance Coled of the light-emitting element and the capacitance of the compensation capacitor C0 and the capacitance of the storage capacitor Cst is 1 / 5 to 5. For pixel units without the compensation capacitor C0, the ratio between the intrinsic capacitance Coled of the light-emitting element and the capacitance of the storage capacitor Cst is 1 / 5 to 5. By adding the compensation capacitor C0 to the pixel unit, the effectiveness of the write data operation is ensured, and grayscale loss during the data writing stage is reduced.

[0101] Since the aperture size of the pixel unit in the display substrate limits the size of the light-emitting element, and the size of the light-emitting element affects the capacitance value of the intrinsic capacitor Coled, a storage capacitor C0 is required when Coled is small to ensure the effectiveness of data writing operations. Therefore, whether or not a compensation capacitor is configured depends on the area of ​​the aperture region of the pixel unit. In some embodiments, the area of ​​the aperture region of the pixel unit configured with the compensation capacitor is less than 1500 μm. 2 .

[0102] Each pixel unit has a corresponding opening area, which is the area where light emitted from the pixel unit can be emitted from the display panel.

[0103] In one example, when the grayscale brightness of the display substrate is 255 grayscale, the brightness required by the red pixel unit, green pixel unit and blue pixel unit is different. For example, the brightness ratio required by the red pixel unit, green pixel unit and blue pixel unit is 3:6:1. Even though the brightness requirement of the green pixel unit is the highest, the area of ​​the opening region corresponding to the green pixel unit is the smallest because the green light-emitting element has high efficiency and long life.

[0104] Based on this, in some embodiments, the pixel unit that emits green light on the display substrate, namely the second pixel unit, is equipped with a compensation capacitor C0.

[0105] In some embodiments, the first terminal of the compensation capacitor C0 is connected to the first electrode of the light-emitting element, and the second terminal of the compensation capacitor C0 is connected to the first operating voltage terminal V0. The first operating voltage terminal V0 and the second operating voltage terminal ELVDD are the same signal terminal; alternatively, the first operating voltage terminal V0 and the third operating voltage terminal ELVSS are the same signal terminal, to save on manufacturing costs and simplify the manufacturing process. Of course, the three operating voltage terminals can also be different, and this disclosure does not limit this.

[0106] Figure 3 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present disclosure, as shown below. Figure 3 As shown, the pixel driving circuit also includes a first reset transistor T2, a second reset transistor T3, and a light-emitting control transistor T4.

[0107] In this configuration, the control electrode of the first reset transistor T2 is connected to the first control signal line G1, the first terminal of the first reset transistor T2 is connected to the first reset voltage terminal Vref, and the second terminal of the first reset transistor T2 is connected to the first terminal of the storage capacitor Cst. The control electrode of the second reset transistor T3 is connected to the second control signal line G2, the first terminal of the second reset transistor T3 is connected to the second terminal of the driving transistor DTFT, and the second terminal of the second reset transistor T3 is connected to the second reset voltage terminal Vinit. The control electrode of the light-emitting control transistor T4 is connected to the light-emitting control signal line EM, the first terminal of the light-emitting control transistor T4 is connected to the second operating voltage terminal ELVDD, and the second terminal of the light-emitting control transistor T4 is connected to the first terminal of the driving transistor DTFT. The first reset voltage terminal Vref provides the first reset voltage, which can be equal to or slightly less than the first voltage VDD.

[0108] The pixel driving circuit provided in this embodiment, during the reset phase, responds to the signal control of the first control signal line G1, turns on the first reset transistor T2, and writes the first reset voltage provided by the first reset voltage terminal Vref to node N to reset node N. Responding to the signal control of the second control signal line G2, the second reset transistor T3 turns on, and writes the second reset voltage provided by the second reset voltage terminal Vinit to the first electrode of the light-emitting element to reset the first electrode of the light-emitting element. Furthermore, the signal control of the light-emitting control signal line EM controls the turn-off of the light-emitting control transistor T4 to control the on / off state between the driving transistor DTFT and the first electrode of the light-emitting element.

[0109] Similarly, based on the relationship between the capacitance value of the storage capacitor Cst and the intrinsic capacitance value of the light-emitting element Coled, it is determined whether to add a compensation capacitor C0 to ensure the validity of data writing.

[0110] Based on the same inventive concept, this disclosure also provides a display panel, including a display substrate, which includes an array substrate as provided in the previous embodiments. For a description of the display substrate, please refer to the content in the previous embodiments, and it will not be repeated here.

[0111] This disclosure also provides a display device, including the above-described display panel.

[0112] In some embodiments, the display device further includes a source driver configured to generate a data voltage for supplying to each pixel unit based on the same gamma voltage.

[0113] The display device provided in this disclosure generates a data voltage for each pixel unit based on the same gamma voltage. In other words, the data voltage supplied to each pixel unit is identical. By matching appropriate storage capacitors to each pixel unit, the grayscale loss of each pixel unit during the light-emitting driving process is reduced. Furthermore, under the premise that the data voltage of each pixel unit is the same, the grayscale loss of each pixel unit is precisely controlled so that the voltage margin after removing the lost grayscale voltage can meet the saturation voltage of the driving transistor corresponding to the light-emitting element of each pixel unit. This avoids the phenomenon of grayscale loss affecting the color gamut accuracy of the displayed image and improves the display effect.

[0114] Compared to related technologies that generate different data voltages based on different gamma voltages and provide the required grayscale voltage to each pixel unit based on essentially the same grayscale loss, the embodiments of this disclosure generate the same data voltage based on the same gamma voltage. By adjusting the capacitance value of the storage capacitor, the grayscale loss of each pixel unit is adjusted to provide the required grayscale voltage to each pixel unit. Based on this, the present disclosure generates the data voltage for each pixel unit based on the same gamma voltage, which can reduce the logic power consumption of the source starter and reduce the driving cost.

[0115] It should also be noted that the determination of the data voltage is related to the number of gray levels in the display device and the precision of the source driver chip, which will not be elaborated here.

[0116] The display device provided in this embodiment can be any product or component with display function, such as wearable devices, mobile phones, tablet computers, televisions, monitors, laptops, digital photo frames, and navigators. Other essential components of this display device are those that should be understood by those skilled in the art and will not be described in detail here, nor should they be construed as limiting this disclosure.

[0117] It is understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of this disclosure, and this disclosure is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and substance of this disclosure, and these modifications and improvements are also considered to be within the scope of protection of this disclosure.

Claims

1. A display substrate, characterized in that, The display substrate includes multiple pixel units arranged in an array, each pixel unit including a light-emitting element and a pixel driving circuit for driving the light-emitting element to emit light; the display substrate also includes multiple data lines extending along a first direction and multiple gate lines extending along a second direction, the multiple data lines and multiple gate lines intersecting to define the multiple pixel units; The pixel driving circuit includes at least a data writing transistor, a driving transistor, and a storage capacitor. The control electrode of the data writing transistor is connected to the gate line, the first electrode of the data writing transistor is connected to the data line, and the second electrode of the data writing transistor is connected to the first terminal of the storage capacitor. The first electrode of the driving transistor is connected to a second operating voltage terminal, the second electrode of the driving transistor is connected to the first electrode of the light-emitting element, and the second electrode of the light-emitting element is connected to a third operating voltage terminal. The first terminal of the storage capacitor is connected to the control electrode of the driving transistor, and the second terminal of the storage capacitor is connected to the first electrode of the light-emitting element. The plurality of pixel units include at least a first pixel unit emitting a first color light and a second pixel unit emitting a second color light, wherein the storage capacitor included in the first pixel unit is a first storage capacitor, and the storage capacitor included in the second pixel unit is a second storage capacitor; the capacitance value of the first storage capacitor is different from the capacitance value of the second storage capacitor; the light-emitting element included in the first pixel unit is a first light-emitting element, and the light-emitting element included in the second pixel unit is a second light-emitting element; the luminous efficiency of the first light-emitting element is less than the luminous efficiency of the second light-emitting element, and the capacitance value of the first storage capacitor is greater than the capacitance value of the second storage capacitor; The area of ​​the opening region corresponding to the second pixel unit is smaller than the area of ​​the opening region corresponding to the first pixel unit; the second pixel unit is equipped with a compensation capacitor; the first end of the compensation capacitor is electrically connected to the first electrode of the second light-emitting element, and the second end of the compensation capacitor is connected to the first working voltage terminal.

2. The display substrate according to claim 1, characterized in that, The plurality of pixel units further include a third pixel unit that emits a third color of light; The storage capacitor included in the third pixel unit is a third storage capacitor. The capacitance value of the third storage capacitor is different from the capacitance values ​​of the first storage capacitor and the second storage capacitor.

3. The display substrate according to claim 2, characterized in that, The light-emitting element included in the third pixel unit is a third light-emitting element; The luminous efficiency of the first light-emitting element is less than that of the second light-emitting element, and the luminous efficiency of the second light-emitting element is less than that of the third light-emitting element; The capacitance value of the first storage capacitor is greater than the capacitance value of the second storage capacitor, and the capacitance value of the second storage capacitor is greater than the capacitance value of the third storage capacitor.

4. The display substrate according to claim 3, characterized in that, The first color light is blue light, the second color light is green light, and the third color light is red light.

5. The display substrate according to claim 1, characterized in that, At least some of the pixel units are equipped with compensation capacitors; For a pixel unit equipped with the compensation capacitor, the ratio between the sum of the intrinsic capacitance of the light-emitting element and the capacitance value of the compensation capacitor and the capacitance value of the storage capacitor is 1 / 5 to 5. For a pixel unit that is not equipped with the compensation capacitor, the ratio between the intrinsic capacitance of the light-emitting element and the capacitance of the storage capacitor is 1 / 5 to 5.

6. The display substrate according to claim 5, characterized in that, The plurality of pixel units further include a third pixel unit that emits a third color of light; The area of ​​the opening region corresponding to the second pixel unit is smaller than the area of ​​the opening region corresponding to the third pixel unit.

7. The display substrate according to claim 5, characterized in that, The area of ​​the opening region corresponding to the pixel unit equipped with the compensation capacitor is less than 1500 μm. 2 .

8. The display substrate according to claim 1, characterized in that, The capacitance value of the storage capacitor is 100fF~300fF.

9. The display substrate according to claim 1, characterized in that, The capacitance value of the storage capacitor satisfies the following formula: Among them, I off f is the leakage current generated when the data writing transistor is in the off state, f is the refresh frequency of the display substrate, and ΔV is the maximum withstand voltage of the storage capacitor.

10. The display substrate according to claim 1, characterized in that, At least some of the pixel units are equipped with a compensation capacitor, the first end of which is connected to the first electrode of the light-emitting element, and the second end of which is connected to the first operating voltage terminal. The first operating voltage terminal and the second operating voltage terminal are the same signal terminal; Alternatively, the first working voltage terminal and the third working voltage terminal may be the same signal terminal.

11. The display substrate according to claim 1, characterized in that, The pixel driving circuit further includes at least one of a first reset transistor, a second reset transistor, and a light-emitting control transistor; The control electrode of the first reset transistor is connected to the first control signal line, the first electrode of the first reset transistor is connected to the first reset voltage terminal, and the second electrode of the first reset transistor is connected to the first terminal of the storage capacitor. The control electrode of the second reset transistor is connected to the second control signal line, the first electrode of the second reset transistor is connected to the second electrode of the driving transistor, and the second electrode of the second reset transistor is connected to the second reset voltage terminal. The control electrode of the light-emitting control transistor is connected to the light-emitting control signal line, the first electrode of the light-emitting control transistor is connected to the second operating voltage terminal, and the second electrode of the light-emitting control transistor is connected to the first electrode of the driving transistor.

12. A display panel, characterized in that, include: The display substrate as described in any one of claims 1 to 11.

13. A display device, characterized in that, include: The display panel as described in claim 12.

14. The display device according to claim 13, characterized in that, It also includes source drivers; The source driver is configured to generate a data voltage for each pixel unit based on the same gamma voltage.

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