Signal detection apparatus and method for multiple-input multiple-output systems

Abstract

The application provides a signal detection device and method for a multiple-input multiple-output system, which can improve the throughput rate of MIMO signal detection of a receiver, and reduce the hardware cost of signal detection through processing structure optimization. Through complete systolic array design and data stream design, the intermediate matrix MEM in calculation is avoided, the hardware consumption is reduced, and complete high-speed MIMO signal detection processing is realized. Through the full systolic array design of MMSE detection, optimization of the structure and hardware resources is realized to realize high-speed array processing.

Description

Technical Field

[0001] This invention relates to the field of wireless communication technology, and more specifically to a signal detection device and method for multiple-input multiple-output systems. Background Technology

[0002] In mobile communication systems, multiple antennas can be used to suppress channel fading, thereby improving system capacity, coverage, and data transmission rates. Multiple Input Multiple Output (MIMO) is a typical multi-antenna technology. Introduced in LTE (Long Term Evolution) Release 8, MIMO technology and functionality have been continuously enhanced and evolved. Due to the application of MIMO technology, the receiver needs to perform channel estimation, signal detection, demodulation, and other processing on the received multi-layered signals. This involves complex calculations such as matrix operations and iterations, making it the most complex part of the receiver's baseband processing.

[0003] Compared to LTE, 5G NR (5th Generation New Radio) increases the number of transmission layers and ports supported by MIMO, and defines a variety of configurable frequency bands, bandwidths, and subcarrier spacings, posing significant challenges to UE (User Equipment) receivers. In particular, when there are many subcarrier configurations with large spacing, higher requirements are placed on the receiver's MIMO signal detection throughput, latency, and hardware consumption.

[0004] MIMO signal detection algorithms are mainly divided into three categories: optimal detection, linear detection, and nonlinear detection. Optimal detection is rarely used in practice due to its high complexity. Nonlinear detection has certain performance advantages over linear detection, but its complexity varies with the channel and interference, resulting in variable throughput and making it difficult to adapt to scenarios with high processing speed requirements. Linear detection mainly includes two types: ZF (Zero Forcing) and MMSE (Minimum Mean Square Error) detection. Among them, the MMSE algorithm makes a trade-off between noise amplification and interference cancellation, achieving suboptimal performance. It is easy to balance complexity and parallelism, making it highly practical for UE receivers that pursue high throughput.

[0005] However, current research on MIMO signal detection has revealed that the complexity of the MMSE detection algorithm mainly lies in matrix inversion and multiple matrix multiplication operations. The latency of matrix operations limits the processing speed, and once the bottleneck is reached, the throughput can only be improved by increasing the area, requiring additional large-block caches to store intermediate variable matrices. Furthermore, due to the residual interlayer interference in linear detection, it is necessary to calculate the LLR (Log Likelihood Ratio) adjustment factor to scale the LLR of the soft demodulation output to improve decoding performance. This calculation also involves a large number of matrix and vector operations.

[0006] Existing technologies include combining MMSE detection with the K-Best detection algorithm to improve soft detection performance by slightly increasing complexity. However, these methods only address the algorithm level and do not consider the specific hardware implementation. Other solutions utilize LDLT decomposition to calculate the inverse matrix of the MMSE detection matrix and specially design the reciprocal module to reduce complexity. However, these solutions do not provide a complete design for MMSE detection. Alternatively, some simplify the inversion of MMSE detection using LDL decomposition and employ steepest descent iteration, reducing computational complexity but requiring the calculation of the intermediate matrix MEM, which increases hardware consumption. Summary of the Invention

[0007] In view of this, the present invention proposes a signal detection device and method for multiple-input multiple-output systems, which can improve the throughput rate of receiver MIMO signal detection, and at the same time reduce the hardware overhead of signal detection through processing structure optimization.

[0008] To achieve the above objectives, the technical solution of the present invention is as follows:

[0009] A signal detection device for a multiple-input multiple-output system includes a first matrix multiplication module, a matrix inversion module, a second matrix multiplication module, a third matrix multiplication module, a first multiplication module, a second multiplication module, a first subtraction module, a second subtraction module, and a reciprocal calculation module.

[0010] The first matrix multiplication module uses the channel matrix H and noise power σ estimated by the receiver. 2 Calculate matrix T = H H H+σ 2 I, where I is the identity matrix, H H Indicates the conjugate transpose of H;

[0011] The matrix inversion module is used to invert matrix T to obtain the inverse matrix W;

[0012] The second matrix multiplication module is used to calculate the signal detection matrix G = WH. H Output the columns in ascending order;

[0013] The third matrix multiplication module is used to calculate the product of the detection matrix G and the received signal Y to obtain the estimated signal. vector;

[0014] The first multiplication module performs multiplication on the diagonal elements w of matrix W. ii With noise power σ 2 Perform multiplication operations and output the calculation result σ in descending order of row size. 2 w ii The data enters the first subtraction module and is subtracted from 1. The first subtraction module outputs the calculation result 1-σ in descending order of row size. 2 w ii The data enters the reciprocal calculation module to calculate 1-σ. 2 w ii The reciprocal of the product is the normalization coefficient μ. i , forming the normalized coefficient vector μ;

[0015] The second multiplication module estimates the signal. The vector and the normalized coefficient vector μ are multiplied by a scalar to obtain the final detection output.

[0016] The matrix inversion module includes a matrix decomposition module, a unit lower triangular matrix inversion module, a special matrix chain multiplication module, and a timing adjustment output module. The matrix decomposition module is used to implement the LDL decomposition of matrix T, i.e., T = LDL. H Where D is a positive real diagonal matrix and L is a unit lower triangular matrix; the unit lower triangular matrix inversion module is used to calculate L. -1 The special matrix chain multiplication module is used to calculate T. -1 =(L -1 ) H D -1 L -1 D -1 The matrix is ​​calculated and generated during the processing of the matrix decomposition module; the timing adjustment output module is used to adjust the timing of the output of the inverse result to obtain the inverse matrix W that meets the input timing requirements of the second matrix multiplication module.

[0017] The reciprocal calculation module employs a pipelined processing method, where 1-σ is calculated for different rows. 2 w ii The process involves sequential inflow, calculation, and outflow; the result σ is calculated using the first multiplication module. 2 w ii First, enter the reciprocal calculation module to calculate 1 / σ. 2 w ii Then proceed to the second subtraction module to subtract 1, i.e., 1 / σ. 2 w ii-1, the output result is the LLR adjustment factor; the calculation of the LLR adjustment factor and the normalization coefficient are interleaved using the reciprocal calculation module.

[0018] The first matrix multiplication module is implemented using a pulsating array structure of multiply-accumulate units, and the calculation result T flows directly into the matrix inversion module.

[0019] Among them, the matrix decomposition module, the unit lower triangular matrix inversion module, the special matrix chain multiplication module, and the timing adjustment output module are all implemented through a pulsating array structure.

[0020] The present invention provides a signal detection method for a multiple-input multiple-output system, comprising the following steps:

[0021] Channel estimation is performed on the subcarriers carrying the pilot signal. The channel matrix H of all subcarriers is estimated by frequency domain interpolation, and the noise power σ at the current moment is estimated. 2 ;

[0022] Using the estimated channel matrix H and noise power σ 2 Calculate matrix T = H H H+σ 2 I, where I is an M×M identity matrix, H H This represents the conjugate transpose of matrix H. Matrix multiplication is implemented using a systolic array, and the calculation results are output in ascending order column by column.

[0023] The matrix T is inverted using the LDL decomposition-based pulsating array inversion method to obtain the inverse matrix W. The calculation results are output in descending order of row size.

[0024] The signal detection matrix G = WH is calculated using a pulsating array. H The output is arranged column-wise from smallest to largest. Due to the conjugate symmetry of the W matrix, its input is equivalent to an output arranged column-wise from largest to smallest, and the corresponding H... H Input the matrix in descending row order;

[0025] The estimated signal is obtained by multiplying the detection matrix G and the received signal Y using a pulsating array. vector;

[0026] For the diagonal elements w of matrix W ii With noise power σ 2 Perform multiplication operations and output the calculation result σ in descending order of row size. 2 w ii The data is subtracted from 1, and the results (1-σ) are output in descending order of row size. 2 w ii Calculate 1-σ 2 w ii The reciprocal of the product is the normalization coefficient μ.i , forming the normalized coefficient vector μ;

[0027] For the estimated signal The vector and the normalized coefficient vector μ are multiplied by a scalar to obtain the final detection output.

[0028] Beneficial effects:

[0029] 1. Based on research on matrix pulsating array processing, this invention combines a pulsating array structure to enable the data stream of MMSE detection processing to flow internally, eliminating the need for large data buffers and achieving full pipelined processing with only a few registers added, thus significantly improving the processing rate of MIMO detection. At the same time, it simplifies the calculation structure of the LLR adjustment factor and reduces the overall hardware consumption by reusing the hardware resources of MMSE detection.

[0030] 2. This invention uses a full-pulse array structure to process matrix operations in MMSE detection, reducing data buffering in intermediate operations and improving pipeline processing speed.

[0031] 3. This invention reuses the MMSE detection processing unit to calculate the LLR adjustment factor, reducing overall hardware overhead.

[0032] 4. This invention can be implemented by changing the direction, bus array structure design, or data flow method, and has various forms, strong variability, and wide applicability.

[0033] 5. This invention can use various matrix decomposition pulsating arrays to achieve matrix inversion, which is robust and has a wide range of applications. Attached Figure Description

[0034] Figure 1 This is an overall structural diagram of the signal detection device for a multiple-input multiple-output system according to the present invention.

[0035] Figure 2 This is a schematic diagram of the implementation structure of the first matrix multiplication module in an embodiment of the device of the present invention, taking M=N=4 as an example.

[0036] Figure 3 This is a schematic diagram of the overall processing architecture of the matrix inversion module in an embodiment of the present invention.

[0037] Figure 4 The diagram below shows the array structure of the matrix decomposition module in an embodiment of the present invention, with M=4 as an example.

[0038] Figure 5 The schematic diagram of the array structure of the unit lower triangular matrix inversion module in the embodiment of the present invention, taking M=4 as an example.

[0039] Figure 6The schematic diagram of the array structure of the special matrix multiplication module in the embodiment of the present invention, taking M=4 as an example.

[0040] Figure 7 The schematic diagram of the implementation structure of the second matrix multiplication module in the embodiment of the present invention, taking M=N=4 as an example.

[0041] Figure 8 The schematic diagram of the implementation structure of the third matrix multiplication module in the embodiment of the present invention, taking M=N=4 as an example.

[0042] Figure 9 This is a schematic diagram of the staggered multiplexing processing timing of the reciprocal calculation module of the device of the present invention. Detailed Implementation

[0043] The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0044] This invention proposes a complete high-speed processing structure for the MMSE algorithm. The invention includes matrix multiplication at each stage, normalization coefficient calculation, and LLR adjustment factor calculation. Specifically, through a complete systolic array design and dataflow design, it avoids the intermediate matrix MEM calculation, reduces hardware consumption, and achieves complete high-speed MIMO signal detection and processing. The full-systolic array design for MMSE detection optimizes the structure and hardware resources to achieve high-speed array processing. This invention uses a full-systolic array for MMSE detection, avoiding the processing throughput bottleneck caused by the large latency of complex matrix operations, significantly improving the processing speed of MIMO detection. Simultaneously, it reduces large data buffering during computation and reduces overall hardware overhead by reusing computational units for LLR adjustment factor calculation.

[0045] This embodiment provides a signal detection device for a multiple-input multiple-output (MIMO) system. Considering an M×N spatial multiplexing MIMO system model, where the number of transmit antennas is M and the number of receive antennas is N, and N≥M, the corresponding frequency-domain MIMO system model is: Y=HX+N, where X is the M×1 normalized frequency-domain transmit signal, H is the N×M complex channel matrix, and N is a matrix with a mean of 0 and a variance of σ. 2 The signal is Gaussian white noise, and Y is an N×1 frequency domain received signal. For OFDM systems, each subcarrier can be described using this model. The overall architecture of the signal detection device for a multiple-input multiple-output system in this embodiment is as follows: Figure 1 As shown.

[0046] The receiver first performs channel estimation on the subcarriers carrying the pilot signal, estimating the channel matrix H of all subcarriers through frequency domain interpolation, and then estimating the noise power σ at the current moment. 2 .

[0047] The first matrix multiplication module utilizes the estimated channel matrix H and noise power σ 2 Calculate matrix T = H H H+σ 2 I, where I is an M×M identity matrix, H H This represents the conjugate transpose of the H matrix.

[0048] The first matrix multiplication module is implemented using a pulsating array structure of multiply-accumulate units, because H H H has conjugate symmetry properties, so only the multiplication and accumulation operation of the lower triangular matrix needs to be performed. Furthermore, the matrix inversion module designed in this embodiment only needs to input the lower triangular matrix data of the conjugate symmetric matrix, so the calculation and output of the upper triangular matrix can be omitted. Figure 2 The implementation structure of the first matrix multiplication module of this embodiment is given as an example, with M=N=4 (when M≠N, the number of row / column processing units can be adjusted; when M>4, the corresponding array units can be added, the same below). The black arrows indicate the data flowing into the array units and flowing forward cycle by cycle. For example, the data flowing into the 2nd row and 1st column multiplication and accumulation unit in cycle 1. In cycle 2, the data flows to the multiply-accumulate unit in row 2, column 2; the hollow wide arrow indicates a shared data bus, where array units on the bus can simultaneously acquire bus data. For example, the multiply-accumulate unit in column 1 can simultaneously read bus data h in cycle 1. 11 During calculation, the multiply-accumulate unit in column 2 can simultaneously read the bus data h delayed by one cycle in cycle 2. 12 The calculation is performed, and so on; the accumulator of the diagonal element is initialized to σ at each calculation. 2 .

[0049] As can be seen from the processing structure of the first matrix multiplication module, its calculation results are output in ascending order of columns, that is, in the order of the first column, the second column, the third column, and so on of the product matrix. This timing just meets the input timing requirements of the matrix inversion module, so there is no need for buffering, and the results can be directly fed into the matrix inversion module.

[0050] Since matrix T has conjugate symmetry, an inversion method based on LDL decomposition is adopted. The overall processing architecture of the matrix inversion module is as follows: Figure 3 As shown. The matrix decomposition module is used to implement the LDL decomposition of matrix T, i.e., T = LDL. H Where D is a positive real diagonal matrix and L is a unit lower triangular matrix; the unit lower triangular matrix inversion module is used to calculate L. -1 The special matrix chain multiplication module is used to calculate T. -1 =(L -1 ) H D -1 L -1 D -1The matrix factorization module calculates and generates the inversion result during processing; the timing adjustment output module is used to adjust the timing of the inversion result output to adapt to... Figure 1 The input timing requirements for the second matrix multiplication module. All of the above modules are implemented using a systolic array structure, which will be explained in detail below.

[0051] The matrix factorization module calculates L and D after LDL decomposition according to the following formula:

[0052]

[0053] Figure 4 The array structure of the matrix decomposition module with M=4 is given. Its processing units are divided into two categories: L processing units and D processing units. The L processing units are used for iterative calculation and circulation of matrix L data, while the D processing units perform reciprocal calculation and distribute the data to the L processing units in the same column through a shared data bus.

[0054] The D processing unit in row i and column i is based on the inflow... calculate

[0055] The iterative process of the L processing unit in the i-th row and j-th column is implemented as follows:

[0056] (1) First calculate and Complex number multiplication;

[0057] (2) The product obtained by complex multiplication and the 1 / 3 distributed by the D processing unit i Perform real number multiplication;

[0058] (3) Row data flowing into this L processing unit Subtracting the result from the multiplication of the real numbers, we get =j+1,+2,…, as the input of the L processing unit / D processing unit in the (j+1)th column.

[0059] The unit lower triangular matrix inversion module calculates the inverse matrix R of matrix L according to the following formula:

[0060]

[0061] The matrix factorization module outputs matrix L in ascending column order, i.e., column 1, column 2, ..., and so on. Based on the formula above, after inputting the value of column i (l), the value of row i (+1) can be calculated. Figure 5 The array structure of the unit lower triangular matrix inversion module is given as an example with M=4. Since the diagonal inputs and outputs are all 1, the array is of order M-1=3. The R processing unit only needs to perform simple multiplication and accumulation operations. The accumulator of the R processing unit in the i-th row and j-th column is initialized with l. ijAfter performing ji multiplication and accumulation calculations, the R processing unit distributes the results to the array below after completing all calculations within its unit. Since the R matrix is ​​a unit lower triangular matrix, D... -1 The matrix is ​​a diagonal matrix, and T -1 It possesses conjugate symmetry properties, and the special matrix multiplication module is calculated using the formula W = T. -1 =(L -1 ) H D -1 L -1 Expanding, we obtain the following iterative formula:

[0062]

[0063] 1 / i As can be seen in the matrix factorization module, when implementing special matrix multiplication using a systolic array processing structure, each processing unit only needs to perform a multiplication-accumulation operation. Figure 6 The array structure of a special matrix chain multiplication module with M=4 is given.

[0064] Because of D -1 The calculation of matrix R is completed before the calculation of matrix W, therefore the processing unit in row i and column j calculates r first. ij With 1 / i The product p ij The multiplication delay time is used to complete the parallel entry of the i-th row of data r. i,x Serial-to-parallel conversion and conjugation, and then calculate p in sequence. ij and After performing two multiplication operations in the W processing unit, the calculation result is distributed to the array units above. The R matrix calculation output is output row by row, so for each row r output, one multiplication-accumulation operation can be performed. The W processing unit performs four accumulations for the first row, three accumulations for the second row, and so on, until r... 4,x After inputting the information, the entire calculation is complete.

[0065] from Figure 6 The data flow shows that the array data flow of the special matrix multiplication module is upward. Therefore, the output sequence of the inverse matrix W is from bottom to top, that is, output sequentially according to row M, row M-1... row 1. Data in the same row passes through... Figure 3 The timing adjustment output module in the middle adjusts the alignment.

[0066] The second matrix multiplication module uses the W matrix output by the matrix inversion module and the channel matrix H to calculate the signal detection matrix G = WH. H H H Represents the conjugate transpose of matrix H. Figure 7The implementation structure of the second matrix multiplication module, taking M=N=4 as an example, is given. Similar to the first matrix multiplication module, it features horizontal data pipeline and shared vertical data bus. Since the W matrix is ​​conjugate symmetric, outputting the Mth row of data is equivalent to outputting the Mth column of data. Therefore, the W matrix is ​​input into the second matrix multiplication module in descending column order. The corresponding H... H Input the matrix into the second matrix multiplication module in descending order of row size.

[0067] The second matrix multiplication module outputs matrix G in ascending order of columns. Without adjusting the timing of this output, it is directly input into the third matrix multiplication module.

[0068] The third matrix multiplication module is used to calculate the product of the detection matrix G and the received signal Y. Figure 8 The implementation structure of the third matrix multiplication module is given as an example of M=N=4. Since Y is an N×1 vector, the processing unit array has only one column and the vertical data bus is also used for sharing.

[0069] The estimated signal output by the third matrix multiplication module The vector and the normalized coefficient vector μ are multiplied by a scalar multiplication in the second multiplication module, and the result is used as the final detection output. The scalar multiplication in the second multiplication module is processed in a pipelined manner, reusing multiplier resources. The calculation process of the normalized coefficient μ is explained in detail below.

[0070] As explained above, the matrix inversion module outputs the calculated matrix W in descending row order, and then extracts the diagonal elements w of the matrix W sequentially. ii With noise power σ 2 Enter the first multiplication module to perform multiplication operations.

[0071] The first multiplication module outputs the calculation results σ in descending order of row size. 2 w ii The data is input into the first subtraction module and subtracted from 1, i.e., 1-σ. 2 w ii The first subtraction module outputs the calculation results 1-σ in descending order of row size. 2 w ii The data enters the reciprocal calculation module to calculate 1-σ. 2 w ii The reciprocal of the product is the normalization coefficient μ. i The reciprocal calculation module uses a pipelined processing method, handling 1-σ from different rows. 2 w ii The process involves sequential inflow, calculation, and outflow, and can be reused to calculate the LLR adjustment factor. Figure 1 (The dashed data stream in the diagram) The following details the process of reusing the calculation of the LLR adjustment factor.

[0072] The calculation of the LLR adjustment factor is similar to the calculation of the normalized coefficient μ, using the first multiplication module to calculate the result σ. 2 w ii First, enter the reciprocal calculation module to calculate 1 / σ. 2 w ii Then proceed to the second subtraction module to subtract 1, i.e., 1 / σ. 2 w ii -1, the output result is the LLR adjustment factor. Since the reciprocal calculation module is designed for pipelined processing, the normalization coefficient μ is calculated. i The subtraction is performed first, taking one cycle. Therefore, the calculation of the LLR adjustment factor and the normalization coefficient can be interleaved using the reciprocal calculation module, and the processing timing is as follows: Figure 9 As shown.

[0073] Furthermore, the present invention can be implemented by changing the direction, bus array structure design, or data flow method, and has diverse forms, strong variability, and wide applicability.

[0074] Furthermore, the present invention can use various matrix decomposition pulsating arrays to achieve matrix inversion, which is robust and has a wide range of applications.

[0075] The present invention also provides a signal detection method for a multiple-input multiple-output system, comprising the following steps:

[0076] Channel estimation is performed on the subcarriers carrying the pilot signal. The channel matrix H of all subcarriers is estimated by frequency domain interpolation, and the noise power σ at the current moment is estimated. 2 ;

[0077] Using the estimated channel matrix H and noise power σ 2 Calculate matrix T = H H H+σ 2 I, where I is an M×M identity matrix, H H This represents the conjugate transpose of matrix H. Matrix multiplication is implemented using a systolic array, and the calculation results are output in ascending order column by column.

[0078] The matrix T is inverted using the LDL decomposition-based pulsating array inversion method to obtain the inverse matrix W. The calculation results are output in descending order of row size.

[0079] The signal detection matrix G = WH is calculated using a pulsating array. H The output is arranged column-wise from smallest to largest. Due to the conjugate symmetry of the W matrix, its input is equivalent to an output arranged column-wise from largest to smallest, and the corresponding H... H Input the matrix in descending row order;

[0080] The estimated signal is obtained by multiplying the detection matrix G and the received signal Y using a pulsating array. vector;

[0081] For the diagonal elements w of matrix W ii With noise power σ 2 Perform multiplication operations and output the calculation result σ in descending order of row size. 2 w ii The data is subtracted from 1, and the results (1-σ) are output in descending order of row size. 2 w ii Calculate 1-σ 2 w ii The reciprocal of the product is the normalization coefficient μ. i , forming the normalized coefficient vector μ;

[0082] For the estimated signal The vector and the normalized coefficient vector μ are multiplied by a scalar to obtain the final detection output.

[0083] In summary, the above are merely preferred embodiments of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A signal detection device for a multiple-input multiple-output system, characterized in that, It includes a first matrix multiplication module, a matrix inversion module, a second matrix multiplication module, a third matrix multiplication module, a first multiplication module, a second multiplication module, a first subtraction module, a second subtraction module, and a reciprocal calculation module; The first matrix multiplication module uses the channel matrix H and noise power σ estimated by the receiver. 2 Calculate matrix T = H H H+σ 2 I, where I is the identity matrix, H H This represents the conjugate transpose of H; The matrix inversion module is used to invert matrix T to obtain the inverse matrix W; The second matrix multiplication module is used to calculate the signal detection matrix G = WH. H Output the columns in ascending order; The third matrix multiplication module is used to calculate the product of the detection matrix G and the received signal Y to obtain the estimated signal. vector; The first multiplication module performs multiplication on the diagonal elements w of matrix W. ii With noise power σ 2 Perform multiplication operations and output the calculation result σ in descending order of row size. 2 w ii The data enters the first subtraction module and is subtracted from 1. The first subtraction module outputs the calculation result 1-σ in descending order of row size. 2 w ii The data enters the reciprocal calculation module to calculate 1-σ. 2 w ii The reciprocal of the product is the normalization coefficient μ. i , forming the normalized coefficient vector μ; The second multiplication module estimates the signal. The vector and the normalized coefficient vector μ are multiplied by a scalar to obtain the final detection output.

2. The apparatus as claimed in claim 1, characterized in that, The matrix inversion module includes a matrix decomposition module, a unit lower triangular matrix inversion module, a special matrix chain multiplication module, and a timing adjustment output module; wherein, the matrix decomposition module is used to implement the LDL decomposition of matrix T, i.e., T = LDL. H Where D is a positive real diagonal matrix and L is a unit lower triangular matrix; the unit lower triangular matrix inversion module is used to calculate L. -1 The special matrix chain multiplication module is used to calculate T. -1 =(L -1 ) H D -1 L -1 D -1 The matrix is ​​calculated and generated during the processing of the matrix decomposition module; the timing adjustment output module is used to adjust the timing of the output of the inverse result to obtain the inverse matrix W that meets the input timing requirements of the second matrix multiplication module.

3. The apparatus as described in claim 1 or 2, characterized in that, The reciprocal calculation module uses a pipelined processing method, with 1-σ in different rows... 2 w ii The process involves sequential inflow, calculation, and outflow; the result σ is calculated using the first multiplication module. 2 w ii First, enter the reciprocal calculation module to calculate 1 / σ. 2 w ii Then proceed to the second subtraction module to subtract 1, i.e., 1 / σ. 2 w ii -1, the output result is the LLR adjustment factor; the calculation of the LLR adjustment factor and the normalization coefficient are interleaved using the reciprocal calculation module.

4. The apparatus as described in claim 1 or 2, characterized in that, The first matrix multiplication module is implemented using a pulsating array structure of multiply-accumulate units, and the calculation result T flows directly into the matrix inversion module.

5. The apparatus as described in claim 2, characterized in that, The matrix decomposition module, the unit lower triangular matrix inversion module, the special matrix chain multiplication module, and the timing adjustment output module are all implemented through a pulsating array structure.

6. A signal detection method for a multiple-input multiple-output system, characterized in that, Includes the following steps: Channel estimation is performed on the subcarriers carrying the pilot signal. The channel matrix H of all subcarriers is estimated by frequency domain interpolation, and the noise power σ at the current moment is estimated. 2 ; Using the estimated channel matrix H and noise power σ 2 Calculate matrix T = H H H+σ 2 I, where I is an M×M identity matrix, H H This represents the conjugate transpose of matrix H. Matrix multiplication is implemented using a systolic array, and the calculation results are output in ascending order column by column. The matrix T is inverted using the LDL decomposition-based pulsating array inversion method to obtain the inverse matrix W. The calculation results are output in descending order of row size. The signal detection matrix G = WH is calculated using a pulsating array. H The output is arranged column-wise from smallest to largest. Due to the conjugate symmetry of the W matrix, its input is equivalent to an output arranged column-wise from largest to smallest, and the corresponding H... H Input the matrix in descending row order; The estimated signal is obtained by multiplying the detection matrix G and the received signal Y using a pulsating array. vector; For the diagonal elements w of matrix W ii With noise power σ 2 Perform multiplication operations and output the calculation result σ in descending order of row size. 2 w ii The data is subtracted from 1, and the results (1-σ) are output in descending order of row size. 2 w ii Calculate 1-σ 2 w ii The reciprocal of the product is the normalization coefficient μ. i , forming the normalized coefficient vector μ; For the estimated signal The vector and the normalized coefficient vector μ are multiplied by a scalar to obtain the final detection output.

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