Display device

Abstract

A display apparatus includes a display panel on which a plurality of pixels are disposed, a timing controller configured to receive Nth frame data and (N+1)th frame data and output a brightness control signal, and a power supply configured to output a reference voltage from among a plurality of reference voltages each having a different level in response to the brightness control signal, wherein output brightness of the plurality of pixels is determined according to the level of the reference voltage, thereby maximizing an HDR effect.

Description

Technical Field

[0001] This disclosure relates to a display device, and more specifically, to a display device capable of achieving high dynamic range (HDR) effects. Background Technology

[0002] As display devices used for computer monitors, televisions (TVs), mobile phones, etc., there are organic light-emitting display devices (OLEDs) that are configured to emit light automatically, and liquid crystal display devices (LCDs) that require an independent light source to emit light.

[0003] Among various display devices, an organic light-emitting display device includes a display panel comprising multiple sub-pixels and a driving unit configured to operate the display panel. The driving unit includes a gating driving section configured to provide gating signals to the display panel and a data driving section configured to provide data voltages. When signals such as the gating signals and data voltages are provided to the sub-pixels of the organic light-emitting display device, the selected sub-pixels can emit light, thereby displaying an image.

[0004] In addition, in order to clearly present the brightness difference between multiple frames in an image with large brightness variations, such as twinkling stars, a high dynamic range (HDR) effect is required. Summary of the Invention

[0005] One objective of this disclosure is to provide a display device that maximizes the effect of high dynamic range (HDR).

[0006] Another objective of this disclosure is to provide a display device capable of changing the drive current of a drive transistor by controlling a reference voltage.

[0007] The purpose of this disclosure is not limited to those mentioned above, and those skilled in the art will clearly understand from the following description other purposes not mentioned above.

[0008] In one embodiment, the display device includes: a display panel including a plurality of pixels; a timing controller configured to receive Nth frame data and N+1th frame data, and to output a brightness control signal based on the Nth frame data and the N+1th frame data; and a power supply configured to generate a plurality of reference voltages, each having a different level, and to output one of the plurality of reference voltages in response to the brightness control signal, wherein the output brightness of the plurality of pixels is determined according to the level of the output reference voltage, and N is a natural number of 1 or greater.

[0009] In one embodiment, the display device includes: a display panel comprising a plurality of pixels configured to display an image; a data driver configured to generate a data voltage for the image; and a gating driver configured to generate a scan signal, wherein at least one of the plurality of pixels includes: a driving transistor including a first electrode of the driving transistor connected to a first node to which a power supply voltage is applied, a gate electrode of the driving transistor connected to a second node to which the data voltage is applied, and a second electrode of the driving transistor connected to a third node; a light-emitting element including an anode electrode connected to the third node; a first switching element configured to provide the data voltage to the second node in response to the scan signal being applied to the first switching element; and a second switching element connected to the second node and configured to apply one of a plurality of reference voltages, each having a different level, to the second node, wherein the output brightness of the pixel is based on the level of the reference voltage output to the second node.

[0010] In one embodiment, the display device includes: a display panel including a plurality of pixels; and a timing controller including a data comparator configured to simultaneously receive a first frame of data and a second frame of data, and to output a brightness control signal based on a comparison between the simultaneously received first frame of data and the second frame of data, wherein the output brightness of the plurality of pixels is based on the brightness control signal.

[0011] Other aspects of the exemplary implementation are included in the detailed implementation and the accompanying drawings.

[0012] According to this disclosure, multiple frames of data can be applied simultaneously, thereby improving the speed of data comparison processing.

[0013] According to this disclosure, the level of the reference voltage can be changed based on the data comparison value, thereby maximizing the HDR effect.

[0014] The effects of this disclosure are not limited to those illustrated above, and many more different effects are included in this specification. Attached Figure Description

[0015] The above and other aspects, features, and other advantages of this disclosure will become clearer from the following detailed description taken in conjunction with the accompanying drawings, in which...

[0016] Figure 1 This is a schematic diagram of a display device according to one embodiment of the present disclosure;

[0017] Figure 2This is a circuit diagram illustrating the pixels of a display device according to an embodiment of the present disclosure;

[0018] Figure 3 This is a block diagram of a timing controller for a display device according to an embodiment of the present disclosure;

[0019] Figure 4 This is a diagram used to explain the operation of the data sampler of the display device according to an embodiment of the present disclosure;

[0020] Figure 5 This is a circuit diagram illustrating the power supply of a display device according to an embodiment of the present disclosure; and

[0021] Figure 6 This is a signal timing diagram for the operation of a display device according to an embodiment of the present disclosure. Detailed Implementation

[0022] The advantages and features of this disclosure, as well as methods for achieving these advantages and features, will become clear from reference to the exemplary embodiments described in detail below with reference to the accompanying drawings. However, this disclosure is not limited to the exemplary embodiments disclosed herein, but will be implemented in various forms. These exemplary embodiments are provided by way of example only to enable those skilled in the art to fully understand the disclosure and scope of this disclosure. Therefore, this disclosure will be defined only by the scope of the appended claims.

[0023] The shapes, dimensions, scales, angles, quantities, etc., illustrated in the accompanying drawings to describe exemplary embodiments of this disclosure are merely examples, and this disclosure is not limited thereto. Throughout the specification, the same reference numerals generally denote the same elements. Furthermore, in the following description of this disclosure, detailed explanations of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of this disclosure. Unless used with the term "only," terms such as "comprising," "having," and "including" as used herein are generally intended to allow for the addition of other components. Unless explicitly stated otherwise, any reference to the singular may include the plural.

[0024] Even if not explicitly stated, components are interpreted as including the normal error range.

[0025] When using terms such as “up,” “above,” “below,” and “next” to describe the positional relationship between two parts, one or more parts may be located between the two parts unless used with the terms “exactly” or “directly.”

[0026] When one element or layer is placed "on" another element or layer, the element may be directly on the other element or the other layer or another element may be inserted between them.

[0027] Although the terms "first," "second," etc., are used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from others. Therefore, the first component mentioned below can be a second component in the technical concept of this disclosure.

[0028] Throughout the specification, the same reference numerals generally denote the same elements.

[0029] The dimensions and thicknesses of each component shown in the accompanying drawings are illustrative for ease of description, and this disclosure is not limited to the dimensions and thicknesses of the components shown.

[0030] The features of the various embodiments of this disclosure may be partially or wholly dependent on or combined with each other, may be linked and operated in various technical ways, and the embodiments may be performed independently or in association with each other.

[0031] The transistor used in the display device according to this disclosure can be implemented as one or more of an n-channel transistor (NMOS) and a p-channel transistor (PMOS). The transistor can be implemented as an oxide semiconductor transistor having an active layer made of oxide semiconductor or a low-temperature polycrystalline silicon (LTPS) transistor having an active layer made of low-temperature polycrystalline silicon (LTPS). The transistor can include at least a gate electrode, a source electrode, and a drain electrode. The transistor can be implemented as a thin-film transistor (TFT) on a display panel. In the transistor, charge carriers flow from the source electrode to the drain electrode. Since the charge carriers in an n-channel transistor (NMOS) are electrons, the source voltage is less than the drain voltage, thus causing electrons to flow from the source electrode to the drain electrode. In an n-channel transistor (NMOS), current can flow from the drain electrode to the source electrode, and the source electrode can be an output terminal. Since the charge carriers in a p-channel transistor (PMOS) are positively charged holes, the source voltage is greater than the drain voltage, thus causing positively charged holes to flow from the source electrode to the drain electrode. In a p-channel transistor (PMOS), positively charged holes flow from the source electrode to the drain electrode, allowing current to flow from the source to the drain, and the drain electrode can be the output terminal. Therefore, it is important to note that the source and drain of a transistor are not fixed, as they can change depending on the applied voltage. This specification is described under the assumption that the transistor is an n-channel transistor (NMOS). However, this disclosure is not limited thereto. P-channel transistors can also be used. Therefore, circuit configurations can be varied.

[0032] The selection signal of a transistor used as a switching element oscillates between a turn-on voltage and a turn-off voltage. The turn-on voltage is set to a voltage greater than the transistor's threshold voltage Vth. The turn-off voltage is set to a voltage less than the transistor's threshold voltage Vth. The transistor turns on in response to the turn-on voltage. Conversely, the transistor turns off in response to the turn-off voltage. In the case of NMOS, the turn-on voltage can be high and the turn-off voltage can be low. In the case of PMOS, the turn-on voltage can be low and the turn-off voltage can be high.

[0033] In the following, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0034] Figure 1 This is a schematic diagram of a display device according to one embodiment of the present disclosure.

[0035] Reference Figure 1 The display device 100 includes a display panel 110, a gating drive unit 120, a data drive unit 130, a timing controller 140, and a power supply 150.

[0036] Display panel 110 is a panel configured to display images. Display panel 110 may include various circuits, lines, and light-emitting elements disposed on a substrate. Display panel 110 may include a plurality of pixels PX defined by multiple intersecting data lines DL and multiple gate lines GL. The plurality of pixels PX are connected to the multiple data lines DL and multiple gate lines GL. Display panel 110 may include a display area defined by the plurality of pixels PX and a non-display area in which various types of signal lines or various types of pads are formed. Display panel 110 can be implemented as a display panel 110 for various different display devices such as liquid crystal display devices, organic light-emitting display devices, and electrophoretic display devices. In the following description, in the configuration described below, display panel 110 is a panel for an organic light-emitting display device. However, this disclosure is not limited thereto.

[0037] The timing controller 140 receives timing signals such as vertical synchronization signals, horizontal synchronization signals, data enable signals, and point clock signals via a receiving circuit such as an LVDS or TMDS interface connected to a host system. Based on the input timing signals, the timing controller 140 generates data control signals for controlling the data drive unit 130 and gating control signals for controlling the gating drive unit 120.

[0038] Additionally, the timing controller 140 processes the frame data DATA(Nth Frame & (N+1)th Frame) input from the outside for each frame, thereby adapting the frame data to the size and resolution of the display panel 110. The timing controller 140 converts the frame data into image data RGB and provides the image data RGB to the data driver unit 130.

[0039] Furthermore, the timing controller 140 senses the characteristic values ​​(mobility, threshold voltage) of the driving transistors disposed on each PX in the plurality of pixels, and generates compensation data for the characteristic values ​​(mobility, threshold voltage) of the driving transistors. In addition, the timing controller 140 can compensate for the RGB image data using the compensation data.

[0040] The data driving unit 130 provides data voltage Vdata to multiple sub-pixels. The data driving unit 130 may include a source printed circuit board and multiple source driver integrated circuits. Each of the multiple source driver integrated circuits can receive image data RGB and data control signals from the timing controller 140 through the source printed circuit board.

[0041] The data driving unit 130 can generate a data voltage by converting image data RGB into gamma voltage in response to a data control signal. The data driving unit 130 can provide the data voltage via the data line DL of the display panel 110.

[0042] Additionally, the data driving unit 130 can receive sensing voltages from multiple pixels PX and convert the sensing voltages into sensing data regarding the characteristic values ​​(mobility, threshold voltage) of the driving transistors. Furthermore, the data driving unit 130 can output the sensing data to the timing controller 140.

[0043] Multiple source driver integrated circuits can be arranged in the form of chip-on-film (COF) and connected to the data lines DL of the display panel 110. More specifically, each of the multiple source driver integrated circuits can be arranged as a chip on a connecting film. Lines connecting to the chip-shaped source driver integrated circuits can be formed on the connecting film. However, the arrangement of the multiple source driver integrated circuits is not limited to this. The multiple source driver integrated circuits can be connected to the data lines DL of the display panel 110 using either chip-on-glass (COG) or tape-on-brush (TAB) processes.

[0044] The gating drive unit 120 provides gating signals to multiple sub-pixels. The gating drive unit 120 may include a level shifter and a shift register. The level shifter can convert the level of a clock signal input from the timing controller 140 at a transistor-to-transistor logic (TTL) level and provide the clock signal to the shift register. The shift register may be formed in the non-display area of ​​the display panel 110 using a gate-in-panel (GIP) method. However, this disclosure is not limited thereto. The shift register may include multiple stages configured to convert the gating signals into signals corresponding to the clock signal and the drive signal, and output the gating signals. The multiple stages included in the shift register may sequentially output the gating signals through multiple output ports.

[0045] Display panel 110 may include a plurality of subpixels. The plurality of subpixels may be subpixels that emit beams of different colors. For example, the plurality of subpixels may include red subpixels, green subpixels, blue subpixels, and white subpixels. However, this disclosure is not limited thereto. The plurality of subpixels may constitute a pixel PX. That is, red subpixels, green subpixels, blue subpixels, and white subpixels may constitute a single pixel PX. Display panel 110 may include a plurality of pixel PXs.

[0046] In the following text, reference will be made to Figure 2 A more detailed description of the driving circuitry used to operate a pixel.

[0047] Figure 2 This is a circuit diagram illustrating the pixels of a display device according to an embodiment of the present disclosure.

[0048] Figure 2 This is a circuit diagram illustrating one of the multiple pixels of the display device 100.

[0049] Reference Figure 2 In one embodiment, a pixel may include a switching transistor SWT, a sensing transistor SET, a driving transistor DT, a storage capacitor SC, and a light-emitting element LED.

[0050] A light-emitting element (LED) may include an anode, an organic layer, and a cathode. The organic layer may include various organic layers such as hole injection layers, hole transport layers, organic light-emitting layers, electron transport layers, and electron injection layers. The anode of the LED can be connected to the output terminal of the driving transistor DT. A low-potential voltage VSS can be applied to the cathode via a low-potential voltage line VSSL. Figure 2 An example of a light-emitting element, an LED, is an organic light-emitting element. However, this disclosure is not limited thereto.

[0051] A low-potential voltage line (VSSL) is a constant power line used to apply a low-potential voltage. The low-potential voltage line (VSSL) can also be referred to as a grounding terminal.

[0052] Reference Figure 2 The switching transistor SWT is a transistor used to transfer the data voltage Vdata to a first node N1 corresponding to the gate electrode of the driving transistor DT. The switching transistor SWT may include a drain electrode connected to the data line DL, a gate electrode connected to the gating line GL, and a source electrode connected to the gate electrode of the driving transistor DT. The switching transistor SWT can be turned on in response to a scan signal SCAN applied from the gating line GL, and transfer the data voltage Vdata provided from the data line DL to the first node N1 corresponding to the gate electrode of the driving transistor DT.

[0053] Reference Figure 2 A driver transistor DT is a transistor that operates an LED by providing a drive current to the LED. The driver transistor DT may include a gate electrode corresponding to a first node N1, a source electrode corresponding to a second node N2 and an output terminal, and a drain electrode corresponding to a third node N3 and an input terminal. The gate electrode of the driver transistor DT can be connected to a switching transistor SWT. The drain electrode can receive a high-potential voltage VDD (e.g., a power supply voltage) through a high-potential voltage line VDDL. The source electrode can be connected to the anode of the LED.

[0054] Reference Figure 2 The storage capacitor SC is a capacitor used to maintain a voltage corresponding to the data voltage Vdata during a frame. The first electrode of the storage capacitor SC can be connected to the first node N1. The second electrode of the storage capacitor SC can be connected to the second node N2.

[0055] Furthermore, in the case of display device 100, as the operating time of each pixel increases, circuit elements such as the driving transistor DT may degrade. Therefore, the inherent characteristic values ​​of the circuit elements such as the driving transistor DT may change. In this case, the inherent characteristic values ​​of the circuit elements may include: the threshold voltage Vth of the driving transistor DT, the mobility α of the driving transistor DT, etc. Changes in the characteristic values ​​of the circuit elements can cause changes in the brightness of the corresponding pixel. Therefore, changes in the characteristic values ​​of the circuit elements can be considered as the same concept as changes in pixel brightness.

[0056] Furthermore, the degree of change in characteristic values ​​between the circuit elements of each pixel can vary depending on the difference in the degree of degradation between the circuit elements. Differences in the degree of change in characteristic values ​​between circuit elements can lead to brightness deviations between pixels. Therefore, characteristic value deviations between circuit elements can be used as the same concept as brightness deviations between pixels. Changes in characteristic values ​​of circuit elements (e.g., changes in pixel brightness) and / or characteristic value deviations between circuit elements (e.g., brightness deviations between pixels) can cause problems such as deterioration in pixel brightness rendering accuracy or screen anomalies.

[0057] Therefore, a sensing function for sensing the feature values ​​of a pixel and a compensation function for compensating the feature values ​​of a pixel by applying the sensing results can be provided to the pixels of the display device 100 according to the embodiments of the present disclosure.

[0058] Therefore, as Figure 2 As shown, in addition to the switching transistor SWT, the driving transistor DT, the storage capacitor SC, and the light-emitting element LED, the pixel PX may also include: a sensing transistor SET, which is used to effectively control the voltage state of the source electrode of the driving transistor DT.

[0059] Reference Figure 2 The sensing transistor SET is connected to a reference voltage line RVL, which provides a reference voltage Vref to the source electrode of the driving transistor DT at the second node N2. The gate electrode of the sensing transistor SET is connected to a gating line GL. Therefore, the sensing transistor SET can be turned on in response to a sensing signal SENSE applied through the gating line GL, and provides the reference voltage Vref provided through the reference voltage line RVL to the source electrode of the driving transistor DT. Additionally, the sensing transistor SET can be used as one of the voltage sensing paths for sensing the source electrode of the driving transistor DT.

[0060] Reference Figure 2 In this configuration, the switching transistor SWT and the sensing transistor SET of a pixel can share a single gate line GL. That is, the switching transistor SWT and the sensing transistor SET can be connected to the same gate line GL and receive the same gate signal. However, for ease of description, the voltage applied to the gate electrode of the switching transistor SWT is called the scan signal SCAN, and the voltage applied to the gate electrode of the sensing transistor SET is called the sensing signal SENSE. However, the scan signal SCAN and the sensing signal SENSE applied to a single pixel are the same signals transmitted from the gate line GL.

[0061] However, this disclosure is not limited thereto. In one embodiment, the switching transistor SWT can be connected to the gating line GL, and the sensing transistor SET can be connected to a separate sensing line. Therefore, the scan signal SCAN can be applied to the switching transistor SWT via the gating line GL. The sensing signal SENSE can be applied to the sensing transistor SET via the sensing line.

[0062] Therefore, the reference voltage Vref is applied to the source electrode of the driving transistor DT through the sensing transistor SET. Furthermore, the threshold voltage Vth or the mobility α of the driving transistor DT is detected via the reference voltage line RVL. Additionally, the data driving unit 130 can compensate the data voltage Vdata based on the detected change in the threshold voltage Vth or the detected change in the mobility α of the driving transistor DT.

[0063] As described above, the display device 100 according to embodiments of the present disclosure can detect the characteristic value or change in the characteristic value of the driving transistor DT in the pixel PX from the sensing voltage of the reference voltage line RVL during the sensing period. Therefore, the reference voltage line RVL can not only be used to transmit the reference voltage Vref, but also as a sensing line for sensing the characteristic value of the driving transistor DT in the pixel PX. Therefore, the reference voltage line RVL can be referred to as a sensing line.

[0064] Specifically, refer to Figure 2 and Figure 3 During sensing by the display device 100 according to an embodiment of the present disclosure, the characteristic value or change of the characteristic value of the driving transistor DT can be achieved by the voltage of the second node N2 of the driving transistor DT (e.g., Vdata-Vth).

[0065] When the sensing transistor SET is in the ON state, the voltage at the second node N2 of the driving transistor DT can correspond to the sensed voltage of the reference voltage line RVL. Additionally, the line capacitor Cline on the reference voltage line RVL can be charged by the voltage at the second node N2 of the driving transistor DT. The reference voltage line RVL with the charged line capacitor Cline can then have a sensed voltage corresponding to the voltage at the second node N2 of the driving transistor DT.

[0066] According to an embodiment of the present disclosure, the display device 100 performs on / off control on the switching transistor SWT and the sensing transistor SET in the pixel PX to be sensed, and controls the provision of the data voltage Vdata and the reference voltage Vref. Therefore, the display device 100 can be operated to realize a voltage state that causes the second node N2 of the driving transistor DT to reflect the characteristic value (threshold voltage, mobility) of the driving transistor DT or a change in the characteristic value.

[0067] The display device 100 according to an embodiment of the present disclosure may further include: an analog-to-digital converter (ADC) configured to measure a sensing voltage of a reference voltage line RVL corresponding to the voltage of a second node N2 of a driving transistor DT and to convert the sensing voltage into a digital value; a switching circuit SAM and SPRE for sensing characteristic values; and a switch RPRE for operating an image.

[0068] The switching circuits SAM and SPRE used to control the sensing operation may include: a sensing reference switch SPRE configured to control the connection between the reference voltage line RVL and the sensing reference voltage providing node Npres for providing the reference voltage Vref; and a sampling switch SAM configured to control the connection between the reference voltage line RVL and the analog-to-digital converter ADC.

[0069] In this configuration, the sensing reference switch SPRE is used to control the sensing operation. The reference voltage Vref supplied to the reference voltage line RVL via the sensing reference switch SPRE is the sensing reference voltage VpreS.

[0070] The image-driven reference switch RPRE controls the connection between the reference voltage line RVL and the image-driven reference voltage supply node Nprer, which provides the reference voltage Vref. The image-driven reference switch RPRE is a switch used for image operation. The reference voltage Vref supplied to the reference voltage line RVL via the image-driven reference switch RPRE corresponds to the image-driven reference voltage VpreR.

[0071] In other words, the sensing reference switch SPRE, acting as the first voltage switch, can apply a sensing reference voltage VpreS to the reference voltage line RVL. Furthermore, the image driving reference switch RPRE, acting as the second voltage switch, can apply an image driving reference voltage VpreR to the reference voltage line RVL.

[0072] In this case, the display device 100 according to the embodiments of the present disclosure can change to various different levels in response to the brightness control signal image driving reference voltage VpreR. Hereinafter, for ease of description, the image driving reference voltage VpreR will be referred to as the reference voltage.

[0073] Figure 3 This is a block diagram of a timing controller for a display device according to an embodiment of the present disclosure.

[0074] Figure 4 This is a diagram used to explain the operation of the data sampler of the display device according to an embodiment of the present disclosure.

[0075] The timing controller 140 includes a data sampler 141 (e.g., circuitry) configured to sample frame data and a data comparator 142 (e.g., circuitry) configured to compare data and output a brightness control signal.

[0076] In addition, data sampler 141 samples a portion of the (N+1th)th frame data DATA. Specifically, as follows... Figure 4 As shown, the (N+1)th frame data DATA (N+1th Frame) of 7580×4320 pixels is transmitted to the data sampler 141. Furthermore, the data sampler 141 samples random 4×4 pixels from the 32×32 pixels of the (N+1)th frame data DATA (N+1th Frame). Therefore, the data sampler 141 can extract the (N+1)th sampled data SD (N+1th Frame) of 960×540 pixels by sampling the (N+1)th frame data DATA (N+1th Frame) using the mechanism mentioned above.

[0077] However, although the data sampler 141 has been described as being included in the timing controller 140, this disclosure is not limited thereto. The data sampler 141 may be located in a separately configured circuit connected to the output port of the timing controller 140.

[0078] In addition, the data comparator 142 compares the N+1th sampled data SD (N+1th Frame) and the Nth frame data DATA (Nth Frame), and outputs the brightness control signal LCS.

[0079] Specifically, data comparator 142 calculates a first average image level (e.g., average brightness level) from the (N+1)th sampled data SD (N+1th Frame), and calculates a second average image level (e.g., average brightness level) from the Nth frame data DATA (Nth Frame). Furthermore, data comparator 142 outputs the difference between the first average image level and the second average image level as a brightness control signal LCS.

[0080] In other words, data comparator 142 can calculate frame complexity based on average image level (APL) and thereby generate a brightness control signal LCS for controlling brightness. Alternatively, data comparator 142 can calculate the average image level based on image motion (MovingAVG) or based on scene change detection. However, this disclosure is not limited thereto.

[0081] Alternatively, data comparator 142 calculates a first average current brightness from the (N+1)th sampled data SD (N+1th Frame) and a second average current brightness from the Nth frame data DATA (Nth Frame). Furthermore, data comparator 142 can output the difference between the first average current brightness and the second average current brightness as a brightness control signal LCS.

[0082] In other words, data comparator 142 can calculate frame complexity based on the average current luminance (ACL) of each frame, and thereby generate a luminance control signal LCS for controlling the luminance. Furthermore, data comparator 142 can count the frequency of representative luminance values ​​by analyzing the histogram of the frame data, and calculate a representative current for each representative luminance value using peak luminance. Then, data comparator 142 can multiply the representative current by the counted representative values, sum the results, and calculate the total current for each frame to obtain the total estimated current for each frame. However, this disclosure is not limited thereto.

[0083] In other words, when the difference between the (N+1)th sampled data SD (N+1th Frame) and the Nth frame data DATA (Nth Frame) is relatively large, the luminance control signal LCS is at a high level. In this case, due to the large data difference between the current frame and the next frame, a high dynamic range (HDR) effect needs to be added.

[0084] Conversely, when the difference between the (N+1)th sample data SD (N+1th Frame) and the Nth frame data DATA (Nth Frame) is relatively small, the level of the luminance control signal LCS can be low. In this case, since there is a small data difference between the current frame and the next frame, there is no need to add a high dynamic range (HDR) effect.

[0085] As a result, the level of the luminance control signal LCS can be determined based on the difference between the (N+1)th sampled data SD (N+1th Frame) and the Nth frame data DATA (Nth Frame).

[0086] In addition, the N+1th sampled data SD (N+1th Frame) and the Nth frame data DATA (Nth Frame) can be simultaneously input to the data comparator 142.

[0087] Similar to display devices in the prior art, if the (N+1)th sample data SD (N+1th Frame) is applied after the Nth frame data DATA (Nth Frame), the data comparator 142 needs to be in standby mode for one frame in order to perform its operation. Furthermore, while the data comparator is in standby mode, a separate memory may also be needed to store the Nth frame data DATA (Nth Frame).

[0088] However, in the display device according to the embodiments of this disclosure, the (N+1)th sampled data SD (N+1th Frame) and the Nth frame data DATA (Nth Frame) are simultaneously input to the data comparator 142, so that the data comparator 142 can perform comparison without additional delay. Therefore, the data processing speed can be improved. In addition, since no separate memory is required to operate the data comparator 142, the circuitry used to construct the data comparator can be simplified.

[0089] Figure 5 This is a circuit diagram illustrating the power supply of a display device according to an embodiment of the present disclosure.

[0090] like Figure 5 As shown, power supply 150 may include a multiplexer (MUX) that selects any one of a plurality of reference voltages VpreR1, VpreR2, and VpreR3, each with a different voltage level, in response to a brightness control signal LCS. Specifically, power supply 150 may include: a resistor series R1-R4 comprising a plurality of resistors; a constant power supply configured to provide a fixed voltage VR; a plurality of switches SW1, SW2, and SW3 configured to be controlled in response to the brightness control signal LCS; and a buffer memory configured to output the selected reference voltage VpreR.

[0091] Multiple resistor strings R1-R4 may include first resistors R1 through fourth resistors R2, R3, and R4 connected in series. Furthermore, the multiple resistor strings R1-R4 divide the fixed voltage VR into a first reference voltage VpreR1 due to the voltage drop across resistor R1, a second reference voltage VpreR2 due to the voltage drop across resistors R1 and R2, and a third reference voltage VpreR3 due to the voltage drop across resistors R1, R2, and R3, so that each reference voltage has a different voltage level. For example, the first reference voltage VpreR1 can be set as VR*(R2+R3+R4) / (R1+R2+R3+R4). The second reference voltage VpreR2 can be set as VR*(R3+R4) / (R1+R2+R3+R4). The third reference voltage VpreR3 can be set as VR*(R4) / (R1+R2+R3+R4).

[0092] In other words, the level of the second reference voltage VpreR2 can be lower than the level of the first reference voltage VpreR1. The level of the third reference voltage VpreR3 can be lower than the levels of both the second reference voltage VpreR2 and the first reference voltage VpreR1.

[0093] In addition, multiple switches respond to the brightness control signal LCS by outputting one of the first reference voltage VpreR1, the second reference voltage VpreR2, and the third reference voltage VpreR3 to the buffer memory.

[0094] In addition, the multiple switches SW1, SW2, SW3 may include a first switch SW1 configured to select a first reference voltage VpreR1 in response to the brightness control signal LCS, a second switch SW2 configured to select a second reference voltage VpreR2, and a third switch SW3 configured to select a third reference voltage VpreR3.

[0095] Therefore, when the brightness control signal LCS is at a high level (e.g., the third level), the third switch SW3 is turned on, and the first switch SW1 and the second switch SW2 are turned off, so that the buffer memory can output the third reference voltage VpreR3. Furthermore, when the brightness control signal LCS is at a medium level (e.g., the middle level or the second level), which is lower than the high level, the second switch SW2 is turned on, and the first switch SW1 and the third switch SW3 are turned off, so that the buffer memory can output the second reference voltage VpreR2. Additionally, when the brightness control signal LCS is at a low level (e.g., the first level), which is lower than both the high and medium levels, the first switch SW1 is turned on, and the second switch SW2 and the third switch SW3 are turned off, so that the buffer memory can output the first reference voltage VpreR1.

[0096] Therefore, as the level of the brightness control signal LCS increases, the power supply 150 can output a reference voltage VpreR that is at a lower level among multiple reference voltages VpreR. Thus, the brightness control signal LCS and the reference voltage VpreR are inversely proportional to each other.

[0097] In the following text, reference will be made to Figure 6 To describe the operation of the display device according to embodiments of the present disclosure.

[0098] Figure 6 It is a signal timing diagram for the operation of a display device according to an embodiment of the present disclosure.

[0099] Reference Figure 2 and Figure 6The driving steps of the display device according to embodiments of this disclosure may include an initialization step, a writing step, and an emission step. Typically, the second node N2, which is the source electrode of the driving transistor DT, performs sensing by independently turning on or off the switching transistor SWT and the sensing transistor SET. Therefore, with... Figure 2 The configuration shown differs in that the sensing operation can be performed by applying the scan signal SCAN and the sensing signal SENSE to the switching transistor SWT and the sensing transistor SET respectively via two separate gate lines GL.

[0100] In the initialization step, the sensing transistor SET is turned on by the sensing signal SENSE, which is at the on level, and the drive reference switch RPRE is also turned on. In this state, the second node N2 of the drive transistor DT is initialized to the drive reference voltage VpreR. That is, according to the level of the brightness control signal LCS, the second node N2 of the drive transistor DT is initialized to one of the first reference voltage VpreR1, the second reference voltage VpreR2, and the third reference voltage VpreR3.

[0101] In the writing step, the switching transistor SWT is turned on by the scan signal SCAN, which is at the on level, and the data voltage Vdata for normal operation is written to the first node N1 of the driving transistor DT.

[0102] Furthermore, during the writing step, the sensing transistor SET is turned on by the sensing signal SENSE, which is at the on level, and the driving reference switch RPRE is also turned on. Therefore, depending on the level of the brightness control signal LCS, the second node N2 of the driving transistor DT remains at any one of the first reference voltage VpreR1, the second reference voltage VpreR2, and the third reference voltage VpreR3.

[0103] In the emission step, the driving current flowing through the LED is determined based on the gate-source voltage of the driving transistor to make the LED emit light. That is, the brightness output by the LED is determined based on the voltage corresponding to the difference between the data voltage Vdata written to the first node N1 and any one of the first reference voltage VpreR1, the second reference voltage VpreR2, and the third reference voltage VpreR3 written to the second node N2.

[0104] In other words, as indicated by the solid line, when the first reference voltage VpreR1 is written to the second node N2, the gate-source voltage Vgs1 at the first level is determined to generate a drive current corresponding to the gate-source voltage Vgs1 at the first level.

[0105] Furthermore, as shown by the dashed line, when the second reference voltage VpreR2 is written to the second node N2, the gate-source voltage Vgs2 at the second level is determined to generate a drive current corresponding to the gate-source voltage Vgs2 at the second level.

[0106] Furthermore, as shown by the double-dotted line, when the third reference voltage VpreR3 is written to the second node N2, the gate-source voltage Vgs3 at the third level is determined to generate the drive current corresponding to the gate-source voltage Vgs3 at the third level.

[0107] Furthermore, the level of the data voltage Vdata is predetermined. In contrast, the level of the second reference voltage VpreR2 can be lower than the level of the first reference voltage VpreR1, and the level of the third reference voltage VpreR3 can be lower than the level of the second reference voltage VpreR2.

[0108] Therefore, the gate-source voltage Vgs1 at the first level is less than the gate-source voltage Vgs2 at the second level, and the gate-source voltage Vgs2 at the second level is less than the gate-source voltage Vgs3 at the third level.

[0109] Therefore, when the first reference voltage VpreR1 is written to the second node N2, low brightness can be output. Furthermore, when the second reference voltage VpreR2 is written to the second node N2, medium brightness can be output. Additionally, when the third reference voltage VpreR3 is written to the second node N2, high brightness can be output.

[0110] In other words, the display device according to the embodiments of this disclosure can output reference voltages Vpre at different levels in response to the brightness control signal LCS, thereby controlling the output brightness to maximize the HDR effect. Therefore, the output brightness of the display device is based on the brightness control signal LCS and the reference voltage.

[0111] Specifically, when the level of the luminance control signal LCS, corresponding to the difference between the (N+1)th sampled data SD (N+1th Frame) and the Nth frame data DATA (Nth Frame), rises, a low-level reference voltage can be output, thereby increasing the output brightness of the light-emitting element. The mechanism mentioned above can maximize the HDR effect when the data voltage changes significantly in each frame.

[0112] Exemplary embodiments of this disclosure may also be described as follows:

[0113] The timing controller may include: a data sampler configured to extract N+1 sampled data by sampling N+1 frame data; and a data comparator configured to compare the N+1 sampled data with the Nth frame data and output a brightness control signal.

[0114] The data comparator can calculate a first average image level from the Nth frame of data, calculate a second average image level from the (N+1)th sampled data, and output the difference between the first average image level and the second average image level as a brightness control signal.

[0115] The data comparator can calculate the first average current brightness from the Nth frame of data, calculate the second average current brightness from the (N+1)th sampled data, and output the difference between the first average current brightness and the second average current brightness as a brightness control signal.

[0116] The Nth frame data and the N+1th sampled data can be input to the data comparator simultaneously.

[0117] The power supply may include a multiplexer configured to select any one of a plurality of reference voltages at different levels in response to a brightness control signal.

[0118] When the brightness control signal level rises, the power supply can output a reference voltage that is at a low level.

[0119] The power supply may include a first switch configured to select a first reference voltage in response to a brightness control signal; a second switch configured to select a second reference voltage; and a third switch configured to select a third reference voltage.

[0120] Furthermore, the level of the second reference voltage can be lower than the level of the first reference voltage, and the level of the third reference voltage can be lower than the level of the second reference voltage.

[0121] When the brightness control signal is at a high level, only the third power switch can be turned on; when the brightness control signal is at a medium level, only the second power switch can be turned on; and when the brightness control signal is at a low level, only the first power switch can be turned on.

[0122] Each of the plurality of pixels includes a driving transistor configured to apply a driving current to a light-emitting element, a data voltage may be applied to the gate electrode of the driving transistor, and a reference voltage may be applied to the source electrode of the driving transistor.

[0123] Although exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto and may be implemented in many different forms without departing from the technical concept of the present disclosure. Therefore, the exemplary embodiments of the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are exemplary in all respects and do not limit the present disclosure. The scope of protection of the present disclosure should be interpreted based on the appended claims, and all technical concepts within the equivalent scope thereof should be understood to fall within the scope of the present disclosure.

[0124] Cross-references to related applications

[0125] This application claims priority to Korean Patent Application No. 10-2021-0194062, filed on December 31, 2021, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety.

Claims

1. A display device, the display device comprising: The display panel includes a plurality of pixels; A timing controller configured to receive Nth frame data and N+1th frame data, and to output a brightness control signal based on the Nth frame data and the N+1th frame data; as well as A power supply configured to generate a plurality of reference voltages, each having a different level, and to output a reference voltage from the plurality of reference voltages in response to the brightness control signal. The output brightness of the plurality of pixels is determined based on the level of the output reference voltage. Each of the plurality of pixels includes a driving transistor configured to apply a driving current to a light-emitting element, and The data voltage is applied to the gate electrode of the driving transistor, and the output reference voltage is applied to the source electrode of the driving transistor. The brightness control signal is output such that the level of the output reference voltage decreases as the difference between the Nth frame data and the (N+1)th frame data increases, and... Where N is a natural number of 1 or greater.

2. The display device according to claim 1, wherein, The timing controller includes: A data sampler configured to extract N+1 sampled data by sampling the N+1th frame of data; and A data comparator is configured to compare the (N+1)th sampled data with the Nth frame data and output the brightness control signal based on the comparison result.

3. The display device according to claim 2, wherein, The data comparator is configured to calculate a first average image level from the Nth frame of data, calculate a second average image level from the (N+1)th sampled data, and output the difference between the first average image level and the second average image level as the brightness control signal.

4. The display device according to claim 2, wherein, The data comparator is configured to calculate a first average current brightness from the Nth frame of data, calculate a second average current brightness from the (N+1)th sampled data, and output the difference between the first average current brightness and the second average current brightness as the brightness control signal.

5. The display device according to claim 2, wherein, The Nth frame data and the (N+1)th sampled data are simultaneously input to the data comparator.

6. The display device according to claim 1, wherein, The power supply includes a multiplexer configured to select one of the plurality of reference voltages in response to the brightness control signal.

7. The display device according to claim 6, wherein, When the level of the brightness control signal rises, the power supply outputs a reference voltage with a lower level among the plurality of reference voltages.

8. The display device according to claim 6, wherein, The power source includes: A first switch, configured to select a first reference voltage from the plurality of reference voltages; A second switch, configured to select a second reference voltage from the plurality of reference voltages; and A third switch is configured to select a third reference voltage from the plurality of reference voltages. Wherein, the level of the second reference voltage is lower than the level of the first reference voltage, and the level of the third reference voltage is lower than the level of the second reference voltage.

9. The display device according to claim 8, wherein, The third switch of the power supply is turned on and the first switch and the second switch are turned off in response to the brightness control signal being at a third level; the second switch of the power supply is turned on and the first switch and the third switch are turned off in response to the brightness control signal being at a second level lower than the third level; and the first switch of the power supply is turned on and the second switch and the third switch are turned off in response to the brightness control signal being at a first level lower than both the third and second levels.

10. A display device, the display device comprising: A display panel, the display panel including a plurality of pixels configured to display an image; A data driver configured to generate data voltages for the image; as well as A gating driver configured to generate a scan signal. Wherein, at least one of the plurality of pixels includes: A driving transistor, the driving transistor comprising a first electrode connected to a first node to which a power supply voltage is applied, a gate electrode connected to a second node to which a data voltage is applied, and a second electrode connected to a third node; A light-emitting element, the light-emitting element including an anode electrode connected to the third node; A first switching element, configured to provide the data voltage to the second node in response to the scan signal being applied to the first switching element; A second switching element, connected to the third node, is configured to apply one of a plurality of reference voltages, each having a different level, to the third node; and A timing controller, configured to receive a first frame of data and a second frame of data, and to output a brightness control signal based on the first frame of data and the second frame of data. Specifically, a reference voltage is selected from the plurality of reference voltages based on the brightness control signal to be applied to the third node. The output brightness of the pixel is based on the level of the reference voltage output to the third node. The brightness control signal is output such that the level of the selected reference voltage decreases as the difference between the first frame data and the second frame data increases.

11. The display device according to claim 10, wherein, The plurality of reference voltages includes a first reference voltage having a first reference level that is the highest among the plurality of reference voltages, a second reference voltage having a second reference level that is lower than the first reference voltage, and a third reference voltage having a third reference level that is lower than both the first reference level and the second reference level. Specifically, the first reference voltage is output in response to the brightness control signal being at a first level, the second reference voltage is output in response to the brightness control signal being at a second level greater than the first level, and the third reference voltage is output in response to the brightness control signal being at a third level greater than both the second and first levels.

12. The display device according to claim 10, wherein, The timing controller includes: A data sampler configured to sample the first frame of data to extract sampled data from the first frame of data; and A data comparator is configured to compare the sampled data and the second frame data, and output the brightness control signal based on the comparison result.

13. The display device according to claim 12, wherein, The data comparator is configured to calculate a first average image level from the second frame data, calculate a second average image level from the sampled data, and output the difference between the first average image level and the second average image level as the brightness control signal.

14. The display device according to claim 12, wherein, The data comparator is configured to calculate a first average current brightness from the second frame data, calculate a second average current brightness from the sampled data, and output the difference between the first average current brightness and the second average current brightness as the brightness control signal.

15. A display device, the display device comprising: The display panel includes a plurality of pixels; A timing controller, the timing controller including a data comparator, the data comparator being configured to simultaneously receive a first frame of data and a second frame of data, and to output a brightness control signal based on a comparison of the simultaneously received first frame of data and second frame of data; as well as A power supply configured to generate a plurality of reference voltages, each having a different level, and to output a reference voltage from the plurality of reference voltages in response to the brightness control signal. The output brightness of the plurality of pixels is based on the brightness control signal. The brightness control signal is output such that the level of the output reference voltage decreases as the difference between the first frame data and the second frame data increases. The output reference voltage is applied to a node connected to the driving transistor and light-emitting element of at least one of the plurality of pixels, and The data voltage is applied to the gate electrode of the driving transistor, and the output reference voltage is applied to the source electrode of the driving transistor.

16. The display device according to claim 15, wherein, When the level of the brightness control signal rises, the lower level of the plurality of reference voltages is output.

17. The display device according to claim 15, wherein, The second frame data is the sampled frame data, and the data comparator is configured to compare the first frame data with the sampled second frame data by calculating a first average image level from the first frame data and a second average image level from the sampled second frame data, and output the difference between the first average image level and the second average image level as the brightness control signal, or The timing controller is configured to calculate a first average current brightness from the first frame of data, calculate a second average current brightness from the sampled second frame of data, and output the difference between the first average current brightness and the second average current brightness as the brightness control signal.

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