Process for improving the front and back surface flatness of a silicon wafer by lapping and etching

Abstract

The present application relates to a kind of grinding plate and corrosion combination improves the process of silicon wafer front and back surface flatness, the technical field of the silicon wafer processing, including the following operating steps: step one: using grinding plate equipment to grind silicon wafer;Grinding plate removal amount is 65±5 μm, and the thickness of silicon wafer after grinding is 770±5 μm.Line cut after silicon wafer is placed into the silicon wafer groove of grinding carrier, and 5 silicon wafers are placed in each grinding carrier, and there are 5 grinding carriers on grinding plate rack, and the thickness of grinding carrier is 620-737 μm, after silicon wafer is placed, grinding plate processing is started.Step two: carry out corrosion process to remove damage layer after grinding plate, and corrosion removal amount is 30±3 μm.Silicon wafer is cleaned before acid corrosion, and silicon wafer is acid etched on etching equipment.Through the combination of two processes of grinding and corrosion, the front and back surface flatness of silicon wafer is improved, so that better front and back surface flatness is obtained before polishing, and better flatness result can be obtained after polishing.

Description

A process that combines grinding and etching to improve the flatness of the front and back sides of silicon wafers. Technical Field

[0001] This invention relates to the field of silicon wafer processing technology, specifically to a process that combines grinding and etching to improve the flatness of the front and back sides of a silicon wafer. Background Technology

[0002] As device feature sizes shrink, the requirements for silicon wafer surface quality become increasingly stringent. For 8-inch polished wafers, flatness (overall flatness and local flatness) is a crucial feature dimension. Flatness refers to the deviation of the front side of the silicon wafer relative to a specified reference plane when the back side is an ideal plane. Currently, flatness is generally measured using the non-contact capacitance method. However, this method measures the undulations on the back side, which are then superimposed on the front side, resulting in test results that are greater than the actual values.

[0003] The unevenness on the back of the silicon wafer will affect the measured value of the silicon wafer flatness. If the back of the silicon wafer has large undulations, even if the front is flat enough, the flatness parameter of the silicon wafer will still be poor, because it is necessary to improve the flatness of both the front and back of the silicon wafer at the same time.

[0004] Silicon wafer polishing typically involves back-side wax application, where wax is applied to the back side of the wafer before polishing the front side. Single-sided polishing means the flatness is significantly affected by the back side. 1. Unevenness on the back side affects the uniformity of the wax application, impacting the waxing effect and thus reducing the flatness. 2. Back-side unevenness also amplifies flatness measurements because it is reflected on the front side during measurement. Summary of the Invention

[0005] This invention addresses the shortcomings of existing technologies by providing a process that combines grinding and etching to improve the flatness of the front and back sides of a silicon wafer. By combining the two processes of grinding and etching, the flatness of the front and back sides of the silicon wafer is improved, resulting in better flatness before polishing and better flatness after polishing.

[0006] The above-mentioned technical problems of the present invention are mainly solved by the following technical solutions:

[0007] A process combining grinding and etching to improve the flatness of the front and back sides of a silicon wafer includes the following steps:

[0008] Step 1: Grind the silicon wafer using a grinding machine; the grinding removal amount is 65±5μm, and the thickness of the silicon wafer after grinding is 770±5μm.

[0009] Step 1: Start the grinding equipment and prepare the grinding compound needed for grinding the discs.

[0010] Step 2: Place the wire-cut silicon wafers into the wafer slots of the polishing carrier. Each polishing carrier holds 5 silicon wafers. There are 5 polishing carriers on the polishing machine frame. The thickness of the polishing carriers is 620-737μm.

[0011] Step 3: After the silicon wafer is placed, the grinding process begins. The grinding carrier and the silicon wafer are placed between the upper and lower fixed plates of the grinding machine frame. The upper fixed plate is fixed, and the lower fixed plate rotates. The speed of the lower fixed plate is 30 r / min, and the grinding pressure is 900 KG.

[0012] Step 4: After grinding is completed in the grinding equipment, the thickness is measured and the material is unloaded. After visual inspection and approval, it enters the spraying, bubbling and washing process.

[0013] Step 2: Perform an etching process to remove the damaged layer after grinding, with an etching removal amount of 30±3μm.

[0014] Step 1: Clean the silicon wafer before acid etching. The purpose is to remove particles and contaminants from the surface of the silicon wafer to prevent metal diffusion and stains during the etching process.

[0015] Step 2: Acid etching of silicon wafers is performed on the etching equipment. The acid etching solution consists of HF, HNO3 and CH3COOH. The etching process is as follows: open the silicon wafer box and place it in the water cart → wafer flipping machine → etching cage → etching machine → wafer flipping machine → water cart.

[0016] During the etching process, the etching rate and etching uniformity play a crucial role in the morphology and flatness of the etched silicon wafer. The etching rate and etching uniformity can be controlled by adjusting the etching temperature, etching cage rotation speed, N2 bubbling flow rate, and N2 bubbling time.

[0017] Step 3: After the silicon wafers that have completed the etching process pass visual inspection, they are then subjected to spraying, bubbling, and washing.

[0018] As a preferred embodiment, when the lower fixed plate rotates, the friction will cause the grinding carrier to revolve. Thus, the silicon wafer in the grinding carrier has a revolving speed relative to the upper and lower fixed plates. At the same time, the external gear has a rotation speed and the internal gear has a rotation speed. The rotation of the internal and external gears will cause the grinding carrier to rotate. By adjusting the internal gear, the rotation of the grinding carrier can be controlled to be clockwise or counterclockwise.

[0019] As a preferred option, the formula for calculating the revolution speed of the grinding carrier is: D=(A×Z) A +B×Z B ) / (Z A +Z B The rotational speed of the grinding carrier is: C = (A × Z) A -B×Z B ) / (Z A -Z BZA represents the number of teeth on the external gear, ZB represents the number of teeth on the internal gear, A represents the rotational speed of the external gear, and B represents the rotational speed of the internal gear.

[0020] Preferably, when the linear velocity of the external gear is greater than that of the internal gear, the grinding carrier rotates clockwise; when the linear velocity of the external gear is less than that of the internal gear, the grinding carrier rotates counterclockwise.

[0021] As a preferred option, the grinding carrier has a revolution speed of 15 r / min and a rotation speed of 19 r / min, and no edge collapse occurs on the outer periphery of the silicon wafer, thus achieving good silicon wafer flatness.

[0022] As a preferred method, after the silicon wafer is ground, it must first undergo DK heat treatment before flatness measurement can be performed. The DK heat treatment temperature is 650℃ and the time is 30 minutes. The purpose of DK is to eliminate oxygen donors and stabilize resistivity. Since the flatness testing equipment uses the capacitance method, if the silicon wafer is not DK treated, the resistivity will be distorted due to the effect of oxygen donors, making the flatness measurement inaccurate.

[0023] Preferably, the cleaning solution before acid etching consists of NH4OH and H2O2, and the treatment temperature is 65°C. The cleaned silicon wafers must be put into the acid etching machine within 8 hours; if more than 8 hours have passed, they need to be cleaned again.

[0024] As a preferred option, the acid etching solutions are HF, HNO3, and CH3COOH, with the following reaction formulas: Si + 2HNO3 → SiO2 + 2HNO2, 2HNO2 → NO + NO2 + H2O, SiO2 + 6HF → H2SiF6 + 2H2O. The role of HNO3 is to oxidize silicon to SiO2, and then dissolve SiO2 with HF to form H2SiF6.

[0025] As a preferred option, the concentration of the corrosion solution should be at a certain ratio, with HF:HNO3 being 0.2 to 0.3. After each cage is corroded, the concentration of the solution needs to be checked. If the concentration does not meet this ratio, the solution needs to be replaced and replenished.

[0026] As a preferred method, the etching temperature was controlled at 30±1°. The optimal flatness control method was found by adjusting three parameters: etching cage rotation speed, N2 bubbling flow rate, and N2 bubbling time. First, two sets of verifications were conducted on the etching cage rotation speed: 20 r / min and 30 r / min. At 20 r / min, the average TTV after etching was 1.76 μm, and at 30 r / min, the TTV after etching was 1.36 μm. Increasing the rotation speed improved the flatness of the silicon wafer. The maximum rotation speed was 30 r / min, so the rotation speed was fixed at 30 r / min. The N2 bubbling time was 40 s, and the N2 bubbling flow rate was 150 L / min.

[0027] The present invention can achieve the following effects:

[0028] This invention provides a process for improving the flatness of the front and back sides of a silicon wafer by combining grinding and etching. Compared with the prior art, by combining the two processes of grinding and etching, the flatness of the front and back sides of the silicon wafer is improved, so that better flatness is obtained before polishing and better flatness result is obtained after polishing. Attached Figure Description

[0029] Figure 1 is a schematic diagram of the grinding device of the present invention.

[0030] In the diagram: 1. Grinding frame; 2. External gear; 3. Grinding carrier; 4. Silicon wafer groove; 5. Internal gear. Detailed Implementation

[0031] The technical solution of the invention will be further described in detail below through embodiments and in conjunction with the accompanying drawings.

[0032] Example: As shown in Figure 1, a process for improving the flatness of the front and back sides of a silicon wafer by combining grinding and etching includes the following steps:

[0033] Step 1: Grind the silicon wafer using a grinding machine; the grinding removal amount is 65±5μm, and the thickness of the silicon wafer after grinding is 770±5μm.

[0034] Step 1: Start the grinding equipment and prepare the grinding compound needed for grinding the discs.

[0035] Step 2: Place the wire-cut silicon wafers into the wafer slots 4 of the polishing carrier 3. Each polishing carrier 3 holds 5 silicon wafers. There are 5 polishing carriers 3 on the polishing frame 1. The thickness of the polishing carrier 3 is 620-737μm.

[0036] Step 3: After the silicon wafer is placed, the grinding process begins. The grinding carrier 3 and the silicon wafer are placed between the upper and lower fixed plates of the grinding machine frame 1. The upper fixed plate is fixed, while the lower fixed plate rotates at a speed of 30 r / min, with a grinding pressure of 900 kg. As the lower fixed plate rotates, friction causes the grinding carrier 3 to revolve. Thus, the silicon wafer inside the grinding carrier 3 has a revolving speed relative to the upper and lower fixed plates. Simultaneously, the external gear 2 has a rotational speed, and the internal gear 5 has a rotational speed. The rotation of the internal and external gears causes the grinding carrier 3 to rotate on its own axis. By adjusting the internal gear 5, the rotation of the grinding carrier 3 can be controlled to be clockwise or counterclockwise. With a revolving speed of 15 r / min and a rotational speed of 19 r / min, no edge collapse occurs on the outer periphery of the silicon wafer, resulting in good wafer flatness.

[0037] The formula for calculating the revolution speed of the grinding carrier 3 is: D=(A×Z) A +B×Z B ) / (A A +Z B The rotational speed of the grinding carrier 3 is: C = (A × Z) A-B×Z B ) / (Z A -Z B ZA represents the number of teeth on external gear 2, ZB represents the number of teeth on internal gear 5, A represents the rotational speed of external gear 2, and B represents the rotational speed of internal gear 5. When the linear velocity of external gear 2 is greater than that of internal gear 5, the grinding carrier 3 rotates clockwise; when the linear velocity of external gear 2 is less than that of internal gear 5, the grinding carrier 3 rotates counterclockwise.

[0038] Step 4: After grinding in the wafer grinding equipment, thickness measurement and unloading are performed. Following visual inspection, the wafers undergo spraying, bubbling, and washing. After silicon wafer grinding, a DK heat treatment is required before flatness measurement. The DK heat treatment temperature is 650℃ for 30 minutes. The purpose of DK is to eliminate oxygen donors and stabilize resistivity. Since the flatness testing equipment uses the capacitance method, silicon wafers without DK would have distorted resistivity due to the presence of oxygen donors, leading to inaccurate flatness measurements.

[0039] Step 2: Perform an etching process to remove the damaged layer after grinding, with an etching removal amount of 30±3μm.

[0040] Step 1: Cleaning the silicon wafers before acid etching removes particles and contaminants from the surface, preventing metal diffusion and staining during etching. The cleaning solution consists of NH4OH and H2O2, and the treatment temperature is 65℃. The cleaned silicon wafers must be placed in the acid etching machine within 8 hours; otherwise, they need to be cleaned again.

[0041] Step 2: Acid etching of silicon wafers is performed on the etching equipment. The acid etching solution consists of HF, HNO3 and CH3COOH. The etching process is as follows: open the silicon wafer box and place it in the water cart → wafer flipping machine → etching cage → etching machine → wafer flipping machine → water cart.

[0042] The acid etching solutions are HF, HNO3, and CH3COOH. The reaction formulas are: Si + 2HNO3 → SiO2 + 2HNO2, 2HNO2 → NO + NO2 + H2O, SiO2 + 6HF → H2SiF6 + 2H2O. The role of HNO3 is to oxidize silicon to SiO2, and then dissolve SiO2 with HF to form H2SiF6.

[0043] The concentration of the corrosive solution is at a certain ratio, with HF:HNO3 being 0.2 to 0.3. After each cage is corroded, the concentration of the solution needs to be checked. If the concentration does not meet this ratio, the solution needs to be replaced and replenished.

[0044] The etching rate and uniformity play a crucial role in the morphology and flatness of the etched silicon wafer. These factors are controlled by adjusting the etching temperature, etching cage rotation speed, N2 bubbling flow rate, and N2 bubbling time. The etching temperature was controlled at 30±1°C. The optimal flatness control method was found by adjusting the etching cage rotation speed, N2 bubbling flow rate, and N2 bubbling time. Two sets of verification tests were conducted on the etching cage rotation speed: 20 r / min and 30 r / min. At 20 r / min, the average TTV after etching was 1.76 μm; at 30 r / min, the TTV was 1.36 μm. Increasing the rotation speed improved the flatness of the silicon wafer. Since 30 r / min was the maximum rotation speed, it was fixed at 30 r / min. The N2 bubbling time was 40 s, and the N2 bubbling flow rate was 150 L / min.

[0045] Step 3: After the silicon wafers that have completed the etching process pass visual inspection, they are then subjected to spraying, bubbling, and washing.

[0046] Post-etching flatness (overall and local flatness) is a crucial parameter for silicon wafers. Since etching is a chemical process, it can negatively impact the flatness after grinding. Furthermore, the back side of lightly doped silicon wafers undergoes acid etching; if the back side is uneven, this unevenness will be superimposed on the front side during flatness testing, leading to a higher flatness value. This process, combining grinding and etching, improves the flatness of the etched silicon wafer, reducing the average TTV (Total Television Value) from 2 μm to 1.2 μm. With this modified process, the average TTV after polishing is reduced from 1.25 μm to 0.85 μm.

[0047] In summary, this process of combining grinding and etching to improve the flatness of the front and back sides of silicon wafers improves the flatness of the front and back sides by combining the two processes of grinding and etching, resulting in better flatness before polishing and better flatness after polishing.

[0048] The above description is only a specific embodiment of the present invention, but the structural features of the present invention are not limited thereto. Any changes or modifications made by those skilled in the art within the scope of the present invention are covered by the patent scope of the present invention.

Claims

1. A process for improving the flatness of the front and back sides of a silicon wafer by combining grinding and etching, characterized in that... The operation includes the following steps: Step 1: Grind the silicon wafer using a grinding equipment; the grinding removal amount is 65±5μm, and the thickness of the silicon wafer after grinding is 770±5μm; Step 1: Start the grinding equipment first and prepare the grinding flux required for grinding. Step 2: Place the wire-cut silicon wafers into the wafer slots (4) of the polishing carrier (3). Each polishing carrier (3) holds 5 silicon wafers. There are 5 polishing carriers (3) on the polishing frame (1). The thickness of the polishing carrier (3) is 620-737μm. Step 3: After the silicon wafer is placed, the grinding process begins. The grinding carrier (3) and the silicon wafer are placed between the upper and lower fixed plates of the grinding machine frame (1). The upper fixed plate is fixed, and the lower fixed plate rotates. The speed of the lower fixed plate is 30r / min, and the grinding pressure is 900KG. When the lower fixed plate rotates, due to the friction, it will drive the grinding carrier (3) to revolve. Thus, the silicon wafer inside the grinding carrier (3) has a revolve speed relative to the upper and lower fixed plates. At the same time, the external gear (2) has a speed, and the internal gear (5) has a speed. The rotation of the internal and external gears will drive the grinding carrier (3) to rotate. By adjusting the internal gear (5), the rotation of the grinding carrier (3) can be controlled to be clockwise and counterclockwise. Step 4: After grinding in the grinding equipment, the thickness is measured and the wafer is unloaded. After visual inspection, it enters the spraying, bubbling and washing process. Step 2: The etching process is carried out to remove the damaged layer after grinding. The etching removal amount is 30±3μm. Step 1: The silicon wafer is cleaned before acid etching to remove particles and contaminants on the surface of the silicon wafer and avoid metal diffusion and stains during the etching process. Step 2: Acid etching of silicon wafers is performed on the etching equipment. The acid etching solution consists of HF, HNO3, and CH3COOH. The etching process is as follows: open the silicon wafer box and place it in the water cart → wafer flipper → etching cage → etching machine → wafer flipper → water cart. During the etching process, the etching rate and etching uniformity play a very important role in the morphology and flatness of the etched silicon wafer. The etching rate and etching uniformity are controlled by controlling the etching temperature, etching cage rotation speed, N2 bubbling flow rate, and N2 bubbling time. Step 3: After the silicon wafers that have completed the etching process pass visual inspection, they are then subjected to spraying, bubbling, and washing.

2. The process for improving the flatness of the front and back sides of a silicon wafer by combining grinding and etching according to claim 1, characterized in that: The formula for calculating the revolution speed of the grinding carrier (3) is: D = (A × Z) A +B×Z B ) / (Z A +Z B The rotational speed of the grinding carrier (3) is: C = (A × Z) A -B×Z B ) / (Z A -Z B ZA is the number of teeth of the external gear (2), ZB is the number of teeth of the internal gear (5), A is the rotational speed of the external gear (2), and B is the rotational speed of the internal gear (5).

3. The process for improving the flatness of the front and back sides of a silicon wafer by combining grinding and etching according to claim 2, characterized in that: When the linear velocity of the external gear (2) is greater than that of the internal gear (5), the grinding carrier (3) rotates clockwise; when the linear velocity of the external gear (2) is less than that of the internal gear (5), the grinding carrier (3) rotates counterclockwise.

4. The process for improving the flatness of the front and back sides of a silicon wafer by combining grinding and etching according to claim 2, characterized in that: The grinding carrier (3) has a revolution speed of 15 r / min and a rotation speed of 19 r / min. No edge collapse occurs on the outer periphery of the silicon wafer, which can achieve good silicon wafer flatness.

5. The process for improving the flatness of the front and back sides of a silicon wafer by combining grinding and etching according to claim 1, characterized in that: After silicon wafers are ground, they must first undergo DK heat treatment before flatness measurement can be performed. The DK heat treatment temperature is 650℃ and the time is 30 minutes. The purpose of DK is to eliminate oxygen donors and stabilize resistivity. Since the flatness testing equipment uses the capacitance method, if the silicon wafer is not DK treated, the resistivity will be distorted due to the effect of oxygen donors, making the flatness measurement inaccurate.

6. The process for improving the flatness of the front and back sides of a silicon wafer by combining grinding and etching according to claim 1, characterized in that: The cleaning solution before acid etching consists of NH4OH and H2O2, and the treatment temperature is 65℃. The cleaned silicon wafers must be put into the acid etching machine within 8 hours. If more than 8 hours have passed, they need to be cleaned again.

7. The process for improving the flatness of the front and back sides of a silicon wafer by combining grinding and etching according to claim 1, characterized in that: The acid etching solutions are HF, HNO3, and CH3COOH. The reaction formulas are: Si + 2HNO3 → SiO2 + 2HNO2, 2HNO2 → NO + NO2 + H2O, SiO2 + 6HF → H2SiF6 + 2H2O. The role of HNO3 is to oxidize silicon to SiO2, and then dissolve SiO2 with HF to form H2SiF6.

8. The process for improving the flatness of the front and back sides of a silicon wafer by combining grinding and etching according to claim 1, characterized in that: The etching temperature was controlled at 30±1°C. By adjusting three parameters—etching cage rotation speed, N2 bubbling flow rate, and N2 bubbling time—the optimal flatness control method was found. First, two sets of verifications were conducted on the etching cage rotation speed: 20 r / min and 30 r / min. At 20 r / min, the average TTV after etching was 1.76 μm, and at 30 r / min, the TTV after etching was 1.36 μm. Increasing the rotation speed improved the flatness of the silicon wafer. The maximum rotation speed was 30 r / min, so the rotation speed was fixed at 30 r / min. The N2 bubbling time was 40 s, and the N2 bubbling flow rate was 150 L / min.

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