Method, device and storage medium for automatic code generation

Abstract

The present invention discloses an automated code generation method for codes used to edit OAM messages. The method includes: obtaining the data bus bit width BW, the bit width FW of the field to be edited, and the starting offset address OA of the editing position; automatically calculating, based on the BW, FW, and OA, the number M of the first message segment to be edited, the byte offset P1 of the first message segment to be edited, and the number N of message segments to be edited; and automatically replacing the fields to be edited in each message segment to be edited with the corresponding fields of the pre-designed editing fields according to the BW, FW, M, P1, and N to generate the editing code for each message segment to be edited. Compared with the prior art, the automated code generation method of the present invention automatically generates codes for editing OAM messages, standardizes and quantifies the design process of message editing with variable bit widths, which has strong uncertainty, poor reusability, and high design difficulty, and greatly improves the reusability of its codes.

Description

Technical Field

[0001] The present invention relates to the field of network communication, and particularly to a method, device, and storage medium for automatically generating code. Background Art

[0002] OAM is an abbreviation for the three major Ethernet management tasks of Operation, Administration, and Maintenance. Operation mainly completes the analysis, prediction, planning, and configuration work for daily networks and services; Maintenance mainly refers to the daily operation activities such as testing and fault management of the network and its services.

[0003] Generally, an Ethernet switch chip with OAM function needs to embed and implement relevant OAM functions to complete the parsing, editing, and forwarding operations of various OAM data packets. Among them, completing the specified editing behavior for OAM data packets in different formats is a difficult point in chip design. Different from software processing, software usually starts the editing operation after receiving a complete OAM. According to different editing behaviors, relevant arbitrary byte data is replaced, inserted, or deleted starting from the specified byte addressing, and then the new packet is forwarded to the next-level device for processing. For circuit design, considering the limitations of circuit resources and the timeliness of processing logic, if the software method is used and editing is performed after storing a complete packet, problems such as a large amount of circuit resource waste and increased packet forwarding delay will occur. For some OAM functions that are particularly sensitive to delay, these problems are unacceptable. Therefore, the digital circuit pipeline method is usually used to implement the logic of OAM packet editing.

[0004] However, since this design method completes the relevant specified logic design according to specific data bit widths and packet editing requirements, the design difficulty is large, there are many uncertain factors, and it is very likely that due to changes in data bit widths or editing logic, there is a risk of having to start all over again and the progress of the design task cannot be guaranteed. Moreover, in the face of different chip requirements, the editing code of this method lacks inheritance and reusability, increasing the risk of defects, and each time it needs to be verified from scratch, with a lot of repetitive work. Summary of the Invention

[0005] The purpose of the present invention is to provide a method, device, and storage medium for automatically generating code.

[0006] To achieve one of the above-mentioned invention purposes, an embodiment of the present invention provides a method for automatically generating code, where the code is used to edit OAM packets, and the method includes:

[0007] Obtain the data bus bit width BW, the bit width FW of the field to be edited, and the starting offset address OA of the editing position;

[0008] Based on the BW, FW, and OA, automatically calculate the number M of the first message segment to be edited, the byte offset P1 of the first message segment to be edited, and the number N of message segments to be edited;

[0009] According to the BW, FW, M, P1, and N, automatically replace the fields to be edited in each message segment to be edited with the corresponding fields of the pre-designed editing fields, and generate the editing code for each message segment to be edited.

[0010] As a further improvement of an embodiment of the present invention, the "according to the BW, FW, M, P1, and N, automatically replace the fields to be edited in each message segment to be edited with the corresponding fields of the pre-designed editing fields" includes:

[0011] Input the BW, FW, M, P1, and N into a pre-set code generation model, and automatically generate the editing code for each message segment to be edited.

[0012] As a further improvement of an embodiment of the present invention, the pre-set code generation model includes:

[0013] When the FW > BW, the editing codes for the first and last message segments to be edited are:

[0014] Message segment M[(BW * 8 - P1 * 8 - 1):0] = Editing field[(FW * 8 - 1):((FW - BW + P1) * 8)];

[0015] Message segment (M + N - 1)[(BW * 8 - 1):(BW * 8 - PN * 8)] = Editing field[(PN * 8 - 1):0];

[0016] Wherein, the PN = FW + P1 - BW * (N - 1), and the editing field[(FW * 8 - 1):0] is a pre-designed editing field.

[0017] As a further improvement of an embodiment of the present invention, the pre-set code generation model further includes:

[0018] If the N >= 3, the editing codes for the intermediate message segments to be edited are:

[0019] Message segment (M + n)[(BW * 8 - 1):0] = Editing field[((FW - n * BW + P1) * 8 - 1):((FW - (n + 1) * BW + P1) * 8)], where n is a positive integer and n < N - 1.

[0020] As a further improvement of an embodiment of the present invention, "inputting the BW, FW, M, P1, and N into a preset code model to automatically generate editing codes for each message segment to be edited" includes:

[0021] Inputting the BW and FW into a preset code model, and using a case statement to generate full editing codes for each message segment to be edited when P1 ∈ [0, BW - 1];

[0022] Substituting the M, P1, and N into the full editing codes to obtain editing codes for each message segment to be edited.

[0023] As a further improvement of an embodiment of the present invention, "automatically calculating the number M of the first message segment to be edited and the byte offset P1 of the first message segment to be edited" includes:

[0024] The number M of the first message segment to be edited is the quotient of OA divided by BW;

[0025] The byte offset P1 is the remainder of OA divided by BW.

[0026] As a further improvement of an embodiment of the present invention, "automatically calculating the number N of message segments to be edited" includes:

[0027] If (BW - P1) > (the remainder of FW divided by BW), then N = ceil division (FW / BW);

[0028] If (BW - P1) <= (the remainder of FW divided by BW), then N = ceil division (FW / BW + 1).

[0029] As a further improvement of an embodiment of the present invention, the method further includes:

[0030] Using a backend tool to synthesize all the editing codes to obtain synthesized combinational logic stage information and combinational logic delay information, and combining the front - to - back execution order and dependency relationship between each editing code to determine whether it is necessary to insert a register between two adjacent editing codes to complete the pipeline design.

[0031] To achieve one of the above - mentioned invention purposes, an embodiment of the present invention provides an electronic device, including a memory and a processor, where the memory stores a computer program that can run on the processor, and when the processor executes the program, it implements the steps in the automatic generation method of the code described in any one of the above.

[0032] To achieve one of the above-mentioned invention purposes, an embodiment of the present invention provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps in the method for automatically generating the above-mentioned code are implemented.

[0033] Compared with the prior art, the method for automatically generating code in the present invention automatically generates code for editing OAM messages, standardizes and quantifies the RTL design process for editing messages with variable bit widths, which have strong uncertainty, poor reusability, and high design difficulty, greatly improving the reusability of the code. At the same time, it avoids possible design defects in the design timing that cannot be met caused by manual writing, greatly reducing the RTL design difficulty for editing messages with variable bit widths and shortening the design and development cycle. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 is a schematic flow chart of the method for automatically generating code in the present invention.

[0035] Figure 2 is a schematic diagram of an OAM message.

[0036] Figure 3 is a schematic diagram of another OAM message. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0037] The present invention will be described in detail below in conjunction with the specific embodiments shown in the drawings. However, these embodiments do not limit the present invention, and any structural, methodical, or functional transformation made by those of ordinary skill in the art based on these embodiments is included in the protection scope of the present invention.

[0038] The present invention provides a method for automatically generating code, where the code is used to edit OAM messages. The method is used to automatically generate code for editing OAM messages, greatly improving the reusability of the code, and at the same time avoiding possible design defects in the design timing that cannot be met caused by manual writing of the code.

[0039] As Figure 1 shown, the method includes:

[0040] Step S100: Obtain the data bus bit width BW, the bit width FW of the field to be edited, and the starting offset address OA of the editing position.

[0041] According to the bit width of the data bus, during the transmission of an OAM message, it is divided into multiple message segments for transmission. For example, an OAM message may be divided into 10 message segments, and the message segment numbers are sequentially from 0 to 9 in the transmission order.

[0042] For different editing operations on OAM messages, the bit widths and positions of the fields to be edited are different. Therefore, the editing position of the field to be edited needs to be determined according to the message type and the specific editing operation. For example, if it is necessary to modify the MacSa content of a Layer 2 Ethernet message, since the MacSa field is located in the 7th to 12th bytes of the message and the total length of the field is 6 bytes, the starting offset address of the editing position is 7, and the bit width of the editing field is 6 bytes.

[0043] Therefore, in this step, it is necessary to determine the data bus bit width BW, the bit width FW of the field to be edited, and the starting offset address OA of the editing position according to the specific OAM message type, the specific editing operation, and some limiting conditions of the circuit design.

[0044] Step S200: Automatically calculate the number M of the first message segment to be edited, the byte offset P1 of the first message segment to be edited, and the number N of message segments to be edited through the BW, FW, and OA.

[0045] The number M of the first message segment to be edited and the byte offset P1 of the first message segment to be edited are calculated according to the following formula:

[0046] OA / BW = M...P1;

[0047] The number M of the first message segment to be edited is the quotient of OA divided by BW; the byte offset P1 is the remainder of OA divided by BW.

[0048] Furthermore, the "automatically calculate the number N of message segments to be edited" includes:

[0049] If (BW - P1) > (the remainder of FW divided by BW), then N = ceil division(FW / BW);

[0050] If (BW - P1) <= (the remainder of FW divided by BW), then N = ceil division(FW / BW + 1).

[0051] In the above formula, the function ceil division() is to round up.

[0052] Step S300: Automatically replace the fields to be edited in each message segment to be edited with the corresponding fields of the pre-designed editing field according to the BW, FW, M, P1, and N, and generate the editing code for each message segment to be edited.

[0053] Based on these parameters BW, FW, M, P1, and N, it is possible to locate the position of the field to be edited in which message fragments. According to the one-to-one correspondence between the field to be edited and the pre-designed editing field, the replacement field for each message fragment to be edited can be calculated. In this step, through some formulas or models, the fields to be edited in each message fragment to be edited are automatically replaced with the corresponding fields of the pre-designed editing field, generating the editing code for each message fragment to be edited.

[0054] In a specific embodiment, the "automatically replacing the fields to be edited in each message fragment to be edited with the corresponding fields of the pre-designed editing field according to the BW, FW, M, P1, and N" includes:

[0055] Inputting the BW, FW, M, P1, and N into a preset code generation model to automatically generate the editing code for each message fragment to be edited.

[0056] Due to different design languages and different design ideas, the obtained preset code generation models are different. Based on the Verilog language, in a preferred embodiment, the preset code generation model includes:

[0057] When FW > BW, the editing codes for the first and last message fragments to be edited are:

[0058] Message fragment M[(BW * 8 - P1 * 8 - 1):0] = Editing field[(FW * 8 - 1):((FW - BW + P1) * 8)];

[0059] Message fragment (M + N - 1)[(BW * 8 - 1):(BW * 8 - PN * 8)] = Editing field[(PN * 8 - 1):0];

[0060] Among them, PN is the bit width of the field to be edited in the last message fragment to be edited, which can be calculated by the formula PN = FW + P1 - BW * (N - 1), and the editing field[(FW * 8 - 1):0] is the pre-designed editing field.

[0061] Furthermore, the preset code generation model also includes:

[0062] If N >= 3, the editing code for the middle message fragments to be edited is:

[0063] Message fragment (M + n)[(BW * 8 - 1):0] = Editing field[((FW - n * BW + P1) * 8 - 1):((FW - (n + 1) * BW + P1) * 8)], where n is a positive integer and n < N - 1.

[0064] It should be noted that the preset code generation model may also include the case where FW < BW. In this case, the possible values of N are 1 and 2. Similar formulas can be used to replace the fields to be edited in each message segment to be edited with the corresponding fields of the pre-designed editing fields, which will not be elaborated here.

[0065] As Figure 2 shown, assume that the bit width of the message segment, i.e., the data bus bit width BW = 48 Bytes, the editing field range, i.e., the bit width of the field to be edited FW = 64 Bytes, OA = 100 Bytes, OA / BW = 2...4, that is, M = 2, P1 = 4; since (BW - P1) > (the remainder of FW divided by BW), so N = ceil division(FW / BW) = 2.

[0066] Therefore, the numbers of the message segments to be edited are segment 2 and segment 3. According to the above preset code generation model, the editing codes of the message segments to be edited 2 and 3 automatically generated are:

[0067] Message segment 2[351:0] = Editing field[511:160];

[0068] Message segment 3[383:224] = Editing field[159:0].

[0069] As Figure 3 shown, assume that BW = 48 Bytes, FW = 64 Bytes, OA = 94 Bytes, OA / BW = 1...46, that is, M = 1, P1 = 46; since (BW - P1) < (the remainder of FW divided by BW), so N = ceil division(FW / BW + 1) = 3.

[0070] Therefore, the numbers of the message segments to be edited are segment 1, segment 2 and segment 3. According to the above preset code generation model, the editing codes of the message segments to be edited 1, 2 and 3 automatically generated are:

[0071] Message segment 1[15:0] = Editing field[511:496];

[0072] Message segment 2[383:0] = Editing field[495:120];

[0073] Message segment 3[383:272] = Editing field[119:0].

[0074] Usually, OA is a variable. Therefore, in another preferred embodiment, in order to improve the speed of automatically generating code, "inputting the BW, FW, M, P1 and N into the preset code model to automatically generate the editing code of each message segment to be edited" includes:

[0075] Input the BW and FW into a preset code model, and use a case statement to generate the full editing code for each message segment to be edited when P1 ∈ [0, BW - 1].

[0076] Substitute the M, P1, and N into the full editing code to obtain the editing code for each message segment to be edited.

[0077] Specifically, the maximum number of message segments to be edited Nmax can be calculated by the formula ceil division(FW / BW + 1), and then use a case statement to iterate through P1 (P1 ∈ [0, BW - 1]) to obtain the full editing code for each message segment to be edited.

[0078] In a specific embodiment, assume BW = 48 Bytes, FW = 64 Bytes, and Nmax = 3. Then the full editing code for the first message segment to be edited is as follows:

[0079] case(P1)

[0080] 0: The first message segment to be edited [383:0] = editing field [511:128];

[0081] 1: The first message segment to be edited [375:0] = editing field [511:136];

[0082] ……

[0083] 47: The first message segment to be edited [7:0] = editing field [511:504];

[0084] endcase

[0085] The full editing code for the second message segment to be edited is as follows:

[0086] case(P1)

[0087] 0: The second message segment to be edited [383:256] = editing field [127:0];

[0088] 1: The second message segment to be edited [383:248] = editing field [135:0];

[0089] ……

[0090] 47: The second message segment to be edited [383:0] = editing field [503:120];

[0091] endcase

[0092] The full editing code for the third message segment to be edited is as follows:

[0093] case(P1)

[0094] 32: The third message segment to be edited [383:376] = editing field [7:0];

[0095] 33: The third message segment to be edited [383:368] = editing field [15:0];

[0096] ……

[0097] 47: The third message segment to be edited [383:264] = editing field [119:0];

[0098] endcase

[0099] If OA = 143 Bytes is obtained, then through calculation, P1 = 47, N = 3, and M = 2 can be obtained. Substituting these parameters into the full - scale editing code, the editing codes for each message segment to be edited are as follows:

[0100] Message segment 2 [7:0] = editing field [511:504];

[0101] Message segment 3 [383:0] = editing field [503:120];

[0102] Message segment 4 [383:264] = editing field [119:0].

[0103] In a preferred embodiment, the method further includes:

[0104] Using a backend tool, synthesize all the editing codes to obtain the combined logic stage number information and combined logic delay information after synthesis, and combine the front - to - back execution order and dependency relationship between each editing code to determine whether it is necessary to insert a register between two adjacent editing codes to complete the pipeline design.

[0105] Specifically, using a backend tool, such as DC of Synopsys, synthesize all the editing codes generated previously to obtain the corresponding combined logic stage number information and combined logic delay information. The combined logic refers to a circuit structure built by basic logic gates, such as AND gates, OR gates, NOT gates, selectors, etc.; the combined logic stage number refers to the length of the logic hierarchy built by each combined gate. The longer the length, the greater the logic delay. If it exceeds the number of stages limited by the circuit and cannot meet the circuit requirements, it is necessary to optimize or redesign the circuit structure.

[0106] After obtaining the information on the number of levels of combinational logic and the combinational logic delay, in combination with the execution sequence and dependency relationship between each editing code, determine whether it is necessary to insert a register between two adjacent editing codes to complete the pipeline design, so as to avoid the risk of potential timing violations in the backend.

[0107] The method for automatically generating the code of the present invention automatically generates the code for editing the OAM message, standardizes and quantifies the RTL design process of the variable-bit-width message editing with strong uncertainty, poor reusability, and high design difficulty, greatly improving the reusability of its code; at the same time, it avoids the possible design defects that the design timing cannot be met caused by manual writing, greatly reducing the RTL design difficulty of the variable-bit-width message editing and shortening the design and development cycle.

[0108] The present invention also provides an electronic device, including a memory and a processor. The memory stores a computer program that can run on the processor, and when the processor executes the program, it implements any one of the steps in the above-mentioned method for automatically generating the code, that is, implements the steps in any one of the technical solutions in the above-mentioned method for automatically generating the code.

[0109] The present invention also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it implements any one of the steps in the above-mentioned method for automatically generating the code, that is, implements the steps in any one of the technical solutions in the above-mentioned method for automatically generating the code.

[0110] It should be understood that although this specification is described according to the embodiments, not every embodiment only contains an independent technical solution. This narrative way of the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

[0111] The series of detailed descriptions listed above are only specific descriptions of the feasible embodiments of the present invention, and they are not used to limit the protection scope of the present invention. Any equivalent embodiments or changes made without departing from the technical spirit of the present invention should be included in the protection scope of the present invention.

Claims

1. An automated code generation method, where the code is used to edit OAM messages, characterized in that, The method includes: Obtaining the data bus bit width BW, the bit width FW of the field to be edited, and the starting offset address OA of the editing position; Automatically calculating the number M of the first message segment to be edited, the byte offset P1 of the first message segment to be edited, and the number N of message segments to be edited through the BW, FW, and OA; According to the BW, FW, M, P1, and N, automatically replacing the fields to be edited in each message segment to be edited with the corresponding fields of the pre-designed editing fields, and generating the editing code for each message segment to be edited.

2. The automated generation method of the code according to claim 1, wherein The "automatically replacing the fields to be edited in each message segment to be edited with the corresponding fields of the pre-designed editing fields according to the BW, FW, M, P1, and N" includes: Inputting the BW, FW, M, P1, and N into a pre-set code generation model to automatically generate the editing code for each message segment to be edited.

3. The automated generation method of the code according to claim 2, characterized in that The pre-set code generation model includes: When the FW > BW, the editing codes for the first and last message segments to be edited are: Message segment M[(BW * 8 - P1 * 8 - 1):0] = Editing field[(FW * 8 - 1):((FW - BW + P1) * 8)]; Message segment (M + N - 1)[(BW * 8 - 1):(BW * 8 - PN * 8)] = Editing field[(PN * 8 - 1):0]; Wherein, the PN = FW + P1 - BW * (N - 1), and the editing field[(FW * 8 - 1):0] is a pre-designed editing field.

4. The automated generation method of the code according to claim 3, wherein The pre-set code generation model further includes: If the N >= 3, the editing codes for the intermediate message segments to be edited are: Message segment (M + n)[(BW * 8 - 1):0] = Editing field[((FW - n * BW + P1) * 8 - 1):((FW - (n + 1) * BW + P1) * 8)], where n is a positive integer and n < N - 1.

5. The automated generation method of the code according to claim 2, characterized in that The "inputting the BW, FW, M, P1, and N into a pre-set code model to automatically generate the editing code for each message segment to be edited" includes: Inputting the BW and FW into a pre-set code model, and using a case statement to generate the full editing code for each message segment to be edited when P1 ∈ [0, BW - 1]; Substituting the M, P1, and N into the full editing code to obtain the editing code for each message segment to be edited.

6. The automated generation method of the code according to claim 1, wherein The "automatically calculating the number M of the first message segment to be edited and the byte offset P1 of the first message segment to be edited" includes: The number M of the first message segment to be edited is the quotient of the OA divided by the BW; The byte offset P1 is the remainder of the OA divided by the BW.

7. The automated generation method of the code according to claim 6, characterized in that The "automatically calculating the number N of message segments to be edited" includes: If (BW - P1) > (the remainder of FW divided by BW), then N = ceil division (FW / BW); If (BW - P1) <= (the remainder of FW divided by BW), then N = ceil division (FW / BW + 1).

8. The automated generation method of the code according to claim 1, wherein The method further includes: Using a backend tool, all the editing codes are integrated to obtain the integrated combinational logic stage information and combinational logic delay information, and in combination with the execution order and dependency relationship before and after each editing code, it is determined whether it is necessary to insert a register between two adjacent editing codes to complete the pipeline design.

9. An electronic device, comprising a memory and a processor, the memory storing a computer program that can run on the processor, characterized in that, When the processor executes the program, it implements the steps in the method for automatically generating the code according to any one of claims 1-8.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps in the method for automatically generating the code according to any one of claims 1-8.

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