A regrown channel GaN-based MOSFET device structure and method of fabrication thereof

Abstract

The application relates to a preparation method of a regrown channel GaN-based MOSFET device structure, which comprises the following steps: preparing an N + type GaN layer on a first N ‑ type GaN layer; preparing a P ‑ type GaN layer on the N + type GaN layer; preparing a second N + type GaN layer on the P + type GaN layer; etching the second N + type GaN layer, the P + type GaN layer and a partial-thickness N ‑ type GaN layer in the middle region to form a gate slot; preparing an undoped GaN material layer in the gate slot as a regrown channel layer of the device; growing a single-crystal AlN layer in the recess of the regrown channel layer through an in-situ growth technique; growing a gate dielectric layer in the recess of the single-crystal AlN layer through the in-situ growth technique; depositing a gate electrode with a recess in the recess of the gate dielectric layer; depositing a source electrode on the second N + type GaN layer on both sides of the gate electrode; and depositing a drain electrode on the lower surface of the first N + type GaN layer. The application makes it difficult for Ga-O bonds to form at the MOSFET regrown channel interface, thereby effectively inhibiting the generation of oxide GaO x .

Description

Technical Field

[0001] This invention relates to the field of semiconductor high-frequency device technology, specifically to a regenerated channel GaN-based MOSFET device structure and its fabrication method. Background Technology

[0002] Electrical energy is one of the most widely used energy sources, offering advantages such as economical and safe transportation, convenient use, ease of control and conversion, and environmental friendliness. However, during the conversion and application of electrical energy, some wasted work is generated, inevitably leading to energy loss and low conversion efficiency, resulting in energy waste. Power electronic devices are the core component of power control and energy conversion. GaN-based MOSFET devices possess characteristics such as high input impedance, simple driving, no secondary breakdown, high thermal stability, and fast switching speed, making them a relatively ideal power electronic device. However, when GaN-based MOSFETs are turned on, the channel carriers are damaged by gate etching and scattered by ionized impurities in the base region, resulting in high on-resistance and losses during operation, thus causing energy loss and waste.

[0003] To address this issue, the most effective existing solution is the regrown channel GaN-based MOSFET structure, which effectively improves the channel carrier mobility and reduces the device's on-resistance. However, the regrown channel is prone to oxidation during the manufacturing process, resulting in the formation of low-quality natural oxide GaO at the interface between the gate dielectric and the regrown channel. x This will form a high density of interface traps under the gate dielectric, which will cause instability of the threshold voltage; and due to the presence of interface charge between the gate dielectric and the regenerated channel, the scattering effect of the channel carriers will be enhanced, thereby reducing the mobility of the channel carriers. Summary of the Invention

[0004] To address the aforementioned problems in the prior art, this invention provides a regrown channel GaN-based MOSFET device structure and its fabrication method. The technical problem to be solved by this invention is achieved through the following technical solution:

[0005] A method for fabricating a regenerated channel GaN-based MOSFET device structure, the method comprising:

[0006] Select the first N + GaN layer;

[0007] In the first N + N-type GaN layer fabrication - Type GaN layer, the first N + The doping concentration of the GaN layer is greater than that of the N-type layer. - Doping concentration of the GaN layer;

[0008] In the N - P-type GaN layer fabrication + GaN layer;

[0009] In the P + Fabrication of a second N-type GaN layer + GaN layer;

[0010] The second N in the etched intermediate region + GaN layer, the P + Type GaN layer and part of the thickness of N - A GaN layer is used to form a gate trench;

[0011] An undoped GaN material is prepared in the gate trench as a regrown channel layer of the device, and the regrown channel layer has a groove structure.

[0012] A single-crystal AlN layer was grown in the groove of the regenerated trench layer using in-situ growth technology.

[0013] A gate dielectric layer is grown within the groove of the single-crystal AlN layer using in-situ growth technology.

[0014] A grooved gate electrode is deposited within the groove of the gate dielectric layer;

[0015] The second N on both sides of the gate electrode + Source electrodes are deposited on the GaN layer;

[0016] In the first N + A drain electrode is deposited on the lower surface of the GaN layer to complete the fabrication of the MOSFET device.

[0017] In one embodiment of the present invention, the first N + The doping concentration of the GaN layer is 1×10⁻⁶. 18 ~1×10 20 cm -3 The N - The doping concentration of the GaN layer is 1×10⁻⁶. 15 ~5×10 16 cm -3 .

[0018] In one embodiment of the present invention, the first N + The thickness of the GaN layer is less than that of the N-type GaN layer. - The thickness of the GaN layer.

[0019] In one embodiment of the present invention, the P + The doping concentration of the GaN layer is 1×10⁻⁶. 17 ~1×10 18cm -3 The P + The thickness of the GaN layer is 300–400 nm.

[0020] In one embodiment of the present invention, the second N + The doping concentration of the GaN layer is 1×10⁻⁶. 18 ~1×10 19 cm -3 The second N + The thickness of the GaN layer is 200–300 nm.

[0021] In one embodiment of the present invention, in the N - P-type GaN layer fabrication + Type GaN layer, including:

[0022] In the N - P grown on GaN layer + A GaN layer is used as the base region;

[0023] For the P + The GaN layer is subjected to high-temperature annealing to ionize it and generate holes.

[0024] In one embodiment of the present invention, an undoped GaN material layer is prepared within the gate trench as a regrown channel layer for the device, comprising:

[0025] The grid grooves are subjected to wet treatment;

[0026] An undoped GaN material is grown in the gate trench after wet processing to serve as the regrown channel layer of the device.

[0027] In one embodiment of the present invention, the thickness of the single-crystal AlN layer is 1 to 3 nm.

[0028] In one embodiment of the present invention, the material of the gate dielectric layer includes Al2O3 or SiO2.

[0029] An embodiment of the present invention also provides a regrown channel GaN-based MOSFET device structure, wherein the GaN-based MOSFET device structure is fabricated using the fabrication method described in any of the above embodiments, and the GaN-based MOSFET device structure includes:

[0030] First N + GaN layer;

[0031] N - Type GaN layer, located in the first N + On the GaN layer, the first N + The doping concentration of the GaN layer is greater than that of the N-type layer.- The doping concentration of the GaN layer, wherein the N - The middle region of the GaN layer has a gate trench structure, and the bottom of the gate trench structure is N. - GaN layer;

[0032] P + Type GaN layer, located in the N - On a GaN layer;

[0033] Second N + Type GaN layer, located in the P + On a GaN layer;

[0034] The regrown channel layer of undoped GaN material is located within the gate trench;

[0035] A single-crystal AlN layer is located within the groove of the regenerated trench layer;

[0036] A gate dielectric layer with grooves is located within the grooves of the single-crystal AlN layer;

[0037] The source electrode is located on both sides of the gate electrode, specifically the second N electrode. + On a GaN layer;

[0038] Drain electrode, located at the N + The lower surface of GaN.

[0039] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0040] 1. This invention grows an AlN single-crystal material in situ above the channel layer. This material effectively blocks oxygen (O) from entering the GaN layer, making it difficult for Ga-O bonds to form at the MOSFET regeneration channel interface, thereby effectively suppressing the formation of GaO oxide. x The generation of .

[0041] 2. This invention effectively eliminates the oxygen-related interface trap at the interface of the regrowth channel under the gate dielectric of the device, thereby significantly improving the stability of the device threshold voltage and suppressing the hysteresis phenomenon of the device threshold voltage.

[0042] 3. By growing an AlN layer in situ, this invention effectively reduces the density of interface charge at the regrown channel of the device, thereby significantly reducing the influence of interface charge on channel carriers and further improving the mobility of channel carriers. This results in a reduction in the on-resistance and power loss of the GaN MOSFET device under operating conditions.

[0043] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0044] Figure 1 This is a schematic flowchart of a method for fabricating a regrown channel GaN-based MOSFET device structure according to an embodiment of the present invention;

[0045] Figures 2a-2j This is a schematic diagram illustrating the process of fabricating a regenerated channel GaN-based MOSFET device structure according to an embodiment of the present invention.

[0046] Figure 3 This is a schematic diagram of a regrown channel GaN-based MOSFET device structure provided in an embodiment of the present invention. Detailed Implementation

[0047] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0048] Example 1

[0049] Energy is a crucial pillar of national economic development. In recent years, with the rapid development of productivity and the continuous growth of global energy demand, energy-related problems have become increasingly prominent. Electricity is one of the most widely used energy sources, but its low efficiency in conversion and utilization leads to energy waste. The quality of power electronic devices determines the efficiency of energy conversion. GaN semiconductor materials possess outstanding advantages such as wide bandgap, direct bandgap, high thermal conductivity, high electron drift velocity, high temperature resistance, high voltage resistance, corrosion resistance, and radiation resistance, giving them a significant advantage in manufacturing high-frequency, high-power power electronic devices. GaN-based MOSFET devices, with their high input impedance, simple driving, no secondary breakdown, high thermal stability, and fast switching speed, have become a relatively ideal power electronic device. For GaN-based MOSFET devices, the low carrier mobility in the inversion channel leads to high on-resistance and losses during operation, resulting in energy loss and waste. The main reasons for this low channel carrier mobility are: the gate trench is formed through inductively coupled plasma etching, which generates a large amount of uncontrollable etching damage, significantly reducing the carrier mobility in the channel; P + The Mg ions ionized inside the GaN base region have a significant ion scattering effect on the channel carriers.

[0050] In conventional regrown-channel GaN-based MOSFET structures, the regrown channel is easily oxidized during the manufacturing process, generating harmful Ga-O bonds. This results in the formation of low-quality natural oxide GaO at the interface between the gate dielectric and the regrown channel. xHigh-density interface traps can form beneath the gate dielectric, causing instability in the threshold voltage and leading to threshold hysteresis. Furthermore, the presence of interface charge at the interface between the gate dielectric and the regrown channel enhances the scattering effect of channel carriers, reducing their mobility and resulting in higher conduction losses during operation. These problems further hinder the application and development of GaN-based MOSFET devices.

[0051] Please see Figure 1 , Figures 2a-2j , Figure 1 This is a schematic flowchart of a method for fabricating a regrown channel GaN-based MOSFET device structure according to an embodiment of the present invention; Figures 2a-2j This is a schematic diagram illustrating the process of fabricating a regrown channel GaN-based MOSFET device structure according to an embodiment of the present invention. The embodiment of the present invention provides a method for fabricating a regrown channel GaN-based MOSFET device structure, the method comprising:

[0052] Step 1, please refer to Figure 2a Select the first N + GaN layer.

[0053] Specifically, N-type nanofibers with high doping concentration and moderate thickness are selected. + As the drain region of a device, a higher doping concentration of GaN can reduce the on-resistance of the device in the drain region.

[0054] Optional, the first N + The doping concentration of the GaN layer is 1×10⁻⁶. 18 ~1×10 20 cm -3 The doping element is Si, and the first N + The thickness of the GaN layer is 1–2 μm.

[0055] Step 2, please refer to Figure 2b In the first N + N-type GaN layer fabrication - Type GaN layer, first N + The doping concentration of the GaN layer is greater than that of N. - The doping concentration of the GaN layer.

[0056] Specifically, in the first N, which serves as the drain region + A relatively thick layer of N-type GaN with a low doping concentration is epitaxially layered on top of the GaN layer. - The GaN layer serves as the drift region of the device, and its doping concentration is lower than that of the drain region.

[0057] Optional, N -The doping concentration of the GaN layer is 1×10⁻⁶. 15 ~5×10 16 cm -3 The doping elements are Si and N. - The thickness of the GaN layer is 2.5–10 μm.

[0058] MOSFET devices rely on N - The drift region of the GaN layer is subjected to voltage withstand capability, while the voltage withstand capability is similar to that of N. - The doping concentration of the first N-type GaN layer is inversely proportional to its doping concentration, therefore this layer tends to have a lower doping concentration; while the first N-type GaN layer... + High doping concentrations are required for the GaN layer to achieve good ohmic contact between the drain metal and the semiconductor, and the first N... + The higher the doping concentration of the GaN layer, the lower the on-resistance of the drain region; therefore, N... - The doping concentration of the GaN layer is lower than that of the first N-type layer. + Type GaN. Furthermore, because MOSFET devices rely on N... - The drift region of the GaN layer is subjected to voltage withstand capability, while the voltage withstand capability is similar to that of N. - The thickness of the GaN layer is proportional to the voltage withstand capability, so the layer thickness is often relatively large in order to ensure the voltage withstand capability of the device.

[0059] Step 3, please refer to Figure 2c In N - P-type GaN layer fabrication + GaN layer.

[0060] Step 3.1, in N - P grown on GaN layer + Using a GaN layer as the base region, that is, continuing on the N-type GaN layer... - Epitaxial growth of P on GaN layer + The GaN layer is used as the base region of the device.

[0061] Optional, P + The doping concentration of the GaN layer is 1×10⁻⁶. 17 ~1×10 18 cm -3 The doping elements are Mg and P. + The thickness of the GaN layer is 300–400 nm.

[0062] Step 3.2, for P + High-temperature annealing is performed on the GaN layer to activate the acceptors, causing them to ionize and generate holes.

[0063] Optionally, the high-temperature annealing temperature is 700-800℃, and activation can be achieved through methods such as rapid annealing, high-temperature activation, laser annealing, and multi-cycle rapid thermal annealing.

[0064] Step 4, please refer to Figure 2d In P + Fabrication of a second N-type GaN layer + GaN layer.

[0065] Specifically, after surface treatment, P + Continue the second N on the GaN layer + Epitaxial regeneration of the GaN layer serves as the source region of the device.

[0066] Optional, the second N + The doping concentration of the GaN layer is 1×10⁻⁶. 18 ~1×10 19 cm -3 The doping element is Si, and the second N + The thickness of the GaN layer is 200–300 nm.

[0067] Step 5, please refer to Figure 2e The second N in the etched middle region + GaN layer, P + Type GaN layer and part of the thickness of N - A GaN layer is formed to create gate trenches, which are etched by opening windows using photolithography.

[0068] Step 6, please refer to Figure 2f An undoped GaN material layer is prepared inside the gate trench to serve as the regrown channel layer of the device. The regrown channel layer has a grooved structure.

[0069] Step 6.1: Perform wet treatment on the grid channels.

[0070] Step 6.2: Grow an undoped GaN material in the gate trench after wet processing as the regrown channel layer of the device.

[0071] The regrown-channel GaN-based MOSFET structure involves regrowing a channel layer on top of the gate trench after etching. This allows carriers to be transported through the regrown channel layer when the device is turned on. Since this regrown channel layer has not undergone etching, it effectively eliminates etching damage at the channel, resulting in a smoother channel and significantly reducing interface unevenness scattering effects. Furthermore, the presence of the regrown channel layer keeps the device channel away from the P-type gate. + The GaN layer is regrown without doping, which effectively reduces the impact of ionized impurities on channel carriers. Therefore, the regrown channel GaN-based MOSFET structure effectively reduces the on-resistance of the device.

[0072] Step 7, please refer to Figure 2gA single-crystal AlN layer is grown in the groove of the regenerated channel layer using in-situ growth technology.

[0073] Optionally, the thickness of the single-crystal AlN layer is 1–3 nm.

[0074] In this invention, an AlN single-crystal layer is grown in situ within the groove of the regrown channel layer after the undoped GaN material has been grown in the gate trench. Because the AlN single-crystal layer can act as a sacrificial layer, by partially oxidizing the AlN surface, it can prevent oxygen from further entering the regrown channel layer. Therefore, the AlN single-crystal layer can effectively block oxygen (O) from entering the regrown channel layer, making it difficult for Ga-O bonds to form at the MOSFET regrown channel interface, thereby effectively suppressing the formation of GaO oxide. x The formation of AlN single crystal layers is achieved by using them as sacrificial layers to prevent contact between the regrown channel layer and oxygen. This suppresses surface defects caused by oxidation of the regrown channel layer, effectively eliminating oxygen-related interface traps at the regrown channel interface below the device gate dielectric. This significantly improves the stability of the device threshold voltage and suppresses hysteresis. In-situ growth of AlN single crystal layers avoids contact between the regrown channel layer and oxygen, thus suppressing surface defects caused by oxidation of the regrown channel surface. This effectively reduces the interface charge density at the regrown channel, significantly decreasing the influence of interface charge on channel carriers, further improving channel carrier mobility, and achieving a reduction in on-resistance and power loss of GaN MOSFET devices during operation.

[0075] Step 8, please continue reading Figure 2g A gate dielectric layer is grown in the groove of a single-crystal AlN layer using in-situ growth technology.

[0076] Optionally, the material of the gate dielectric layer includes Al2O3 or SiO2.

[0077] In the fabrication process of the MOSFET device of this invention, after the regrown channel layer is grown, the AlN single crystal layer and gate dielectric layer can continue to be grown in situ. This avoids contamination from contact with air before the AlN single crystal layer is grown, which could cause oxidation of the regrown channel layer. Therefore, after the regrown channel layer is grown, the in-situ growth of single crystal AlN and the gate dielectric can continue in a vacuum environment in the material growth equipment. This minimizes contact between the device and air before the growth of the single crystal AlN and the gate dielectric, thus preventing oxidation of the regrown channel layer surface and the generation of surface defects. If single crystal AlN and the gate dielectric are grown on such a defective material surface, the quality of these two material layers will also be affected. However, the in-situ grown single crystal AlN and the gate dielectric have a higher surface quality before growth, thus improving the overall material quality.

[0078] Step 9, please refer to Figure 2h A grooved gate electrode is deposited within the groove of the gate dielectric layer, i.e., the gate electrode metal is deposited by photolithography to form a grooved gate electrode.

[0079] Step 10, please refer to Figure 2i The second N on both sides of the gate electrode + Depositing the source electrode on the GaN layer, i.e., opening a window in the source region by photolithography to create a second N-type GaN electrode. + Source electrode metal is deposited on top of the GaN layer.

[0080] Step 11, please refer to Figure 2j In the first N + A drain electrode is deposited on the lower surface of the GaN layer to complete the fabrication of the MOSFET device.

[0081] The novel regrown-channel GaN-based MOSFET device proposed in this invention, after depositing the regrown channel layer at the gate trench, then grows an AlN single-crystal material in situ on top of it. This material effectively blocks oxygen (O) from entering the GaN layer, making it difficult for Ga-O bonds to form at the MOSFET regrown channel interface, thereby effectively suppressing the formation of GaO oxide. x The generation of this material significantly reduces the density of interface traps beneath the gate dielectric, improves the stability of the device threshold voltage, and reduces threshold hysteresis. Furthermore, it effectively reduces the density of interface charge at the device's regenerated channel, thereby significantly reducing the influence of interface charge on channel carriers. This further improves the mobility of channel carriers and reduces the on-resistance and power loss of the device under operating conditions.

[0082] In terms of process, after the MOSFET device of this invention completes the regrown channel layer growth, it is not necessary to remove the device from the vacuum environment of the material growth equipment. In-situ growth of the AlN single crystal layer can be performed directly. Therefore, the device is not in contact with air before the AlN single crystal layer is grown, thus avoiding surface material defects caused by oxidation of the regrown channel layer surface. If the AlN single crystal layer and gate dielectric are grown on such a defective material surface, the quality of these two material layers will be affected. However, the in-situ grown single crystal AlN and gate dielectric have a higher material surface quality before growth, thus not only improving their own material quality but also enhancing the interface quality between the AlN layer and the GaN regrown channel layer. Therefore, the AlN single crystal can be grown in-situ after the previous GaN channel layer regrowing step, ensuring not only the material quality of the AlN single crystal layer but also improving the interface quality between the AlN layer and the GaN channel layer.

[0083] Example 2

[0084] Please see Figure 3 , Figure 3 This is a schematic diagram of a regrown-channel GaN-based MOSFET device structure provided in an embodiment of the present invention. The present invention provides a regrown-channel GaN-based MOSFET device structure, which is fabricated using the fabrication method described in any of the above embodiments. The GaN-based MOSFET device includes:

[0085] First N + GaN layer;

[0086] N - Type GaN layer, located in the first N + On the GaN layer, the first N + The doping concentration of the GaN layer is greater than that of the N-type layer. - The doping concentration of the GaN layer, wherein the N - The middle region of the GaN layer has a gate trench structure, and the bottom of the gate trench structure is N. - GaN layer;

[0087] P + Type GaN layer, located in the N - On a GaN layer;

[0088] Second N + Type GaN layer, located in the P + On a GaN layer;

[0089] The regrown channel layer of undoped GaN material is located within the gate trench;

[0090] A single-crystal AlN layer is located within the groove of the regenerated trench layer;

[0091] A gate dielectric layer with grooves is located within the grooves of the single-crystal AlN layer;

[0092] The source electrode is located on both sides of the gate electrode, specifically the second N electrode. + On a GaN layer;

[0093] Drain electrode, located at the N + The lower surface of GaN.

[0094] In the description of this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0095] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0096] Although the invention has been described herein in conjunction with various embodiments, those skilled in the art will understand and implement other variations of the disclosed embodiments by reviewing the accompanying drawings, disclosure, and appended claims in carrying out the claimed invention. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude a plurality. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.

[0097] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, any modifications made without departing from the inventive concept should be considered within the scope of protection of the present invention.

Claims

1. A method for fabricating a regrown channel GaN-based MOSFET device structure, characterized in that, The preparation method includes: Select the first N + GaN layer; In the first N + N-type GaN layer fabrication - Type GaN layer, the first N + The doping concentration of the GaN layer is greater than that of the N-type layer. - Doping concentration of the GaN layer; In the N - P-type GaN layer fabrication + GaN layer; In the P + Fabrication of a second N-type GaN layer + GaN layer; The second N in the etched intermediate region + Type GaN layer, the P + GaN layer and part of the thickness of N - A GaN layer is used to form a gate trench; An undoped GaN material is prepared in the gate trench as a regrown channel layer of the device, and the regrown channel layer has a groove structure. A single-crystal AlN layer was grown in the groove of the regenerated trench layer using in-situ growth technology. A gate dielectric layer is grown within the groove of the single-crystal AlN layer using in-situ growth technology. A grooved gate electrode is deposited within the groove of the gate dielectric layer; The second N on both sides of the gate electrode + Source electrodes are deposited on the GaN layer; In the first N + A drain electrode is deposited on the lower surface of the GaN layer to complete the fabrication of the MOSFET device.

2. The method for fabricating a regenerated channel GaN-based MOSFET device structure according to claim 1, characterized in that, The first N + The doping concentration of the GaN layer is 1×10⁻⁶. 18 ~1×10 20 cm -3 The N - The doping concentration of the GaN layer is 1×10⁻⁶. 15 ~5×10 16 cm -3 .

3. The method for fabricating a regenerated channel GaN-based MOSFET device structure according to claim 1, characterized in that, The first N + The thickness of the GaN layer is less than that of the N-type GaN layer. - The thickness of the GaN layer.

4. The method for fabricating a regenerated channel GaN-based MOSFET device structure according to claim 1, characterized in that, The P + The doping concentration of the GaN layer is 1×10⁻⁶. 17 ~1×10 18 cm -3 The P + The thickness of the GaN layer is 300~400 nm.

5. The method for fabricating a regenerated channel GaN-based MOSFET device structure according to claim 1, characterized in that, The second N + The doping concentration of the GaN layer is 1×10⁻⁶. 18 ~1×10 19 cm -3 The second N + The thickness of the GaN layer is 200~300 nm.

6. The method for fabricating a regenerated channel GaN-based MOSFET device structure according to claim 1, characterized in that, In the N - P-type GaN layer fabrication + Type GaN layer, including: In the N - P grown on GaN layer + A GaN layer is used as the base region; For the P + The GaN layer is subjected to high-temperature annealing to ionize it and generate holes. The annealing temperature is 700~800℃.

7. The method for fabricating a regenerated channel GaN-based MOSFET device structure according to claim 1, characterized in that, A layer of undoped GaN material is fabricated within the gate trench as the regrown channel layer of the device, comprising: The grid grooves are subjected to wet treatment; An undoped GaN material is grown in the gate trench after wet processing to serve as the regrown channel layer of the device.

8. The method for fabricating a regenerated channel GaN-based MOSFET device structure according to claim 1, characterized in that, The thickness of the single-crystal AlN layer is 1~3 nm.

9. The method for fabricating a regenerated channel GaN-based MOSFET device structure according to claim 1, characterized in that, The material of the gate dielectric layer includes Al2O3 or SiO2.

10. A regrown channel GaN-based MOSFET device structure, characterized in that, The GaN-based MOSFET device structure is fabricated using the fabrication method according to any one of claims 1 to 9, and the GaN-based MOSFET device structure comprises: First N + GaN layer; N - Type GaN layer, located in the first N + On the GaN layer, the first N + The doping concentration of the GaN layer is greater than that of the N-type layer. - The doping concentration of the GaN layer, wherein the N - The middle region of the GaN layer has a gate trench structure, and the bottom of the gate trench structure is N. - GaN layer; P + Type GaN layer, located in the N - On a GaN layer; Second N + Type GaN layer, located in the P + On a GaN layer; The regrown channel layer of undoped GaN material is located within the gate trench; A single-crystal AlN layer is located within the groove of the regenerated trench layer; A gate dielectric layer with grooves is located within the grooves of the single-crystal AlN layer; The source electrode is located on both sides of the gate electrode, specifically the second N electrode. + On a GaN layer; Drain electrode, located at the first N + The lower surface of GaN.

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