Array substrate and preparation method thereof, display panel, and display device

Abstract

The present application provides an array substrate and a preparation method thereof, a display panel, and a display device. The array substrate includes a substrate, a first conductive layer, and a second conductive layer. The first conductive layer is arranged on one side of the substrate, and the first conductive layer includes a first signal line. The second conductive layer is arranged on the side of the first conductive layer away from the substrate, and the second conductive layer is arranged on the side of the first conductive layer away from the substrate. The second conductive layer includes a plurality of first conductive parts and a plurality of second conductive parts that are insulated, at least some of the first conductive parts are electrically connected to the first signal line, and the plurality of first conductive parts are connected to each other. In the embodiment of the present application, since the first conductive part and the second conductive part have the same structure, the difference in reflectivity between the two is small, and the effects of the two on the luminous effects in their respective pixel regions tend to be consistent, which helps to reduce the probability of the occurrence of display unevenness and improve the display uniformity of the display panel.

Description

Technical Field

[0001] The present application relates to the technical field of display devices, and in particular to an array substrate and a preparation method thereof, a display panel, and a display device. Background Art

[0002] With the development of display technology, users have higher and higher requirements for the screen-to-body ratio of display devices, and full-screen and narrow-border design has become a major development trend of display devices.

[0003] However, as the screen-to-body ratio of display devices gradually increases, the problems caused by this are gradually exposed, such as uneven display, which affects the normal use of users. Summary of the invention

[0004] The embodiments of the present application provide an array substrate and a method for manufacturing the same, a display panel, and a display device, which can improve display uniformity.

[0005] In a first aspect, an embodiment of the present application provides an array substrate, comprising a substrate, a first conductive layer, and a second conductive layer, wherein the first conductive layer is disposed on one side of the substrate, and the first conductive layer comprises a first signal line. The second conductive layer is disposed on a side of the first conductive layer away from the substrate, and the second conductive layer is disposed on a side of the first conductive layer away from the substrate, and the second conductive layer comprises a plurality of first conductive portions and a plurality of second conductive portions which are insulated, at least some of the first conductive portions are electrically connected to the first signal line, and the plurality of first conductive portions are connected to each other. The first conductive portion and the second conductive portion are disposed in a plurality of pixel regions, and the first conductive portion and the second conductive portion have the same structure.

[0006] In some embodiments, the first conductive portion includes a first sub-portion and a second sub-portion whose extension directions intersect each other, and the second conductive layer further includes a first connecting portion, and the first connecting portion is used to electrically connect adjacent first conductive portions.

[0007] In some embodiments, the first connecting portion is used to connect first sub-portions in adjacent first conductive portions, and / or the first connecting portion is used to connect second sub-portions in adjacent first conductive portions.

[0008] In some embodiments, the first subsection is perpendicular to the second subsection.

[0009] In some embodiments, the first sub-portion is parallel to the first signal line.

[0010] In some embodiments, within the same first conductive portion, the first sub-portion is insulated from the second sub-portion, the first sub-portion includes a first segment and a second segment spaced apart in its own direction, and the first segment and the second segment are disposed on both sides of the second sub-portion.

[0011] In some embodiments, the second sub-portion includes a third segment and a fourth segment which are spaced apart in the extension direction of the second sub-portion.

[0012] In some embodiments, the second conductive layer further includes a second connecting portion, and the second connecting portion is used to connect two of the first segment, the second segment, the third segment, and the fourth segment located in the same first conductive portion.

[0013] In some embodiments, the array substrate also includes an insulating layer disposed between the first conductive layer and the second conductive layer, the insulating layer includes a first via hole and a third connecting portion disposed in the first via hole, the first conductive portions are all connected to the third connecting portions, and part of the third connecting portions are connected to the first signal line.

[0014] In some embodiments, the first conductive layer includes a first connection end spaced apart from the first signal line, and a portion of the third connection portion is connected to the first connection end.

[0015] In some embodiments, the first conductive layer further includes a second connection end connected to the second signal line, a portion of the third connection portion is connected to the second connection end, and the first connection end has the same structure as the second connection end.

[0016] In some embodiments, different first conductive portions are connected to the same number of third connecting portions.

[0017] In some embodiments, the third connecting portions are all connected to the first sub-portion, or the third connecting portions are all connected to the second sub-portion.

[0018] In some embodiments, the relative positions of the third connecting portions connected to different first conductive portions remain consistent.

[0019] In some embodiments, the array substrate further includes a second signal line disposed on a side of the second conductive layer facing the substrate, and the second conductive portion is electrically connected to the second signal line.

[0020] In some embodiments, the plurality of second conductive portions are connected to each other.

[0021] In some embodiments, the insulating layer includes a second via and a fourth connection portion disposed in the second via, the second conductive portions are all connected to the fourth connection portion, and some of the fourth connection portions are electrically connected to the second signal line, and the number of third connection portions connected to a single first conductive portion is the same as the number of fourth connection portions connected to a single second conductive portion.

[0022] In a second aspect, an embodiment of the present application provides a display panel, comprising an array substrate in any of the aforementioned embodiments.

[0023] In some embodiments, the display panel also includes a light-emitting device layer located on one side of the array substrate, the light-emitting device layer includes a plurality of light-emitting units arranged in different pixel areas, and in each pixel area, the relative position between the orthographic projection of the light-emitting unit on the substrate and the orthographic projection of the first conductive portion on the substrate remains consistent.

[0024] In some embodiments, in each pixel region, the relative position between the orthographic projection of the light emitting unit on the substrate and the orthographic projection of the second conductive portion on the substrate remains consistent.

[0025] In some embodiments, the light-emitting unit has a first orthographic projection on the substrate, the first orthographic projection has a first virtual center, the first conductive portion has a second orthographic projection on the substrate, corresponding to the same pixel area, the second orthographic projection is symmetrically arranged relative to the first virtual center, and / or at least part of the structure in the second orthographic projection is located outside the first orthographic projection.

[0026] In some embodiments, at least a portion of the structure in the second orthographic projection is located outside the first orthographic projection.

[0027] In some embodiments, the portion of the second orthographic projection that is outside the first orthographic projection accounts for no less than 50% of the second orthographic projection.

[0028] In some embodiments, the second orthographic projection is completely outside the first orthographic projection.

[0029] In a third aspect, an embodiment of the present application provides a display device, comprising a display panel in any of the aforementioned embodiments.

[0030] In a third aspect, an embodiment of the present application provides a method for preparing an array substrate, the array substrate is used for a display panel, the display panel includes a plurality of pixel areas, and the preparation method includes:

[0031] Forming a first conductive layer on one side of the substrate, the first conductive layer comprising a first signal line;

[0032] A plurality of conductive structures with the same shape are formed on a side of the first conductive layer away from the substrate and corresponding to the plurality of pixel regions, wherein the conductive structures are insulated from each other and some of the conductive structures are electrically connected to the first signal line;

[0033] The part of the conductive structure electrically connected to the first signal line is electrically connected to other conductive structures to form a conductive channel.

[0034] The embodiment of the present application provides an array substrate and a preparation method thereof, a display panel, and a display device, which utilizes a multi-layer routing design of a first conductive layer and a second conductive layer, thereby being able to reduce the space occupied by the first signal line on the display panel, thereby helping to achieve a narrow frame effect and increase the screen-to-body ratio of the display panel. Furthermore, the embodiment of the present application also adds a second conductive portion in the second conductive layer, and the first conductive portion and the second conductive portion are arranged in different pixel regions. On this basis, since the structures of the two are the same, the difference in reflectivity between the two is small, and the effects of the two on the luminous effects in their respective pixel regions tend to be consistent, thus helping to reduce the probability of uneven display problems and improve the display uniformity of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solution of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0036] Figure 1 is a structural schematic diagram of an array substrate provided in an embodiment of the present application;

[0037] Figure 2 yes Figure 1 A schematic diagram of the relative position relationship between the first conductive portion, the second conductive portion and the first signal line in the middle region Q;

[0038] Figure 3 yes Figure 2 Schematic diagram of the cross-sectional structure at AA in the middle;

[0039] Figure 4 This is a schematic diagram of the relative position relationship between the first conductive portion, the second conductive portion and the first signal line in another array substrate provided in an embodiment of the present application;

[0040] Figure 5 is a schematic diagram of the relative position relationship between the first conductive portion, the second conductive portion and the first signal line in another array substrate provided by an embodiment of the present application;

[0041] Figure 6 is a schematic diagram of a cross-sectional structure of another array substrate provided in an embodiment of the present application;

[0042] Figure 7 is a schematic diagram of a cross-sectional structure of another array substrate provided in an embodiment of the present application;

[0043] Figure 8 is a schematic diagram of a cross-sectional structure of another array substrate provided in an embodiment of the present application;

[0044] Fig. 9is a schematic diagram of the relative position relationship between the first conductive portion, the second conductive portion and the first signal line in another array substrate provided by an embodiment of the present application;

[0045] Fig.10 is a schematic diagram of the relative position relationship between the first conductive portion, the second conductive portion and the first signal line in another array substrate provided by an embodiment of the present application;

[0046] Fig.11 This is a schematic diagram of the relative position relationship between a first conductive portion, a second conductive portion, a first signal line, and a second signal line in another array substrate provided by an embodiment of the present application;

[0047] Fig.12 yes Fig.11 Schematic diagram of the cross-sectional structure at BB in the middle;

[0048] Fig.13 This is a schematic diagram of the relative position relationship between a first conductive portion, a second conductive portion, a first signal line, and a second signal line in another array substrate provided by an embodiment of the present application;

[0049] Fig.14 is a structural schematic diagram of a display panel provided in an embodiment of the present application;

[0050] Fig.15 is a schematic diagram of the relative position relationship between the first conductive portion, the second conductive portion and the light-emitting unit in another display panel provided by an embodiment of the present application;

[0051] Fig.16 is a schematic diagram of the relative position relationship between the first conductive portion and the light-emitting unit in another display panel provided by an embodiment of the present application;

[0052] Fig.17 is a structural schematic diagram of a display device provided in an embodiment of the present application;

[0053] Fig.18 is a flow chart of a method for preparing an array substrate provided in an embodiment of the present application;

[0054] Figures 19a to 19c It is a process structure schematic diagram of a method for preparing an array substrate provided in an embodiment of the present application.

[0055] Marking Description:

[0056] 10. Substrate;

[0057] 20. first conductive layer; 21. first signal line; 22. second signal line;

[0058] 30, second conductive layer; 31, first conductive part; 311, first sub-part; 311a, first segment; 311b, second segment; 312, second sub-part; 312a, third segment; 312b, fourth segment; 32, second conductive part; 33, first connecting part; 34, second connecting part; 35, fifth connecting part;

[0059] 40. light emitting device layer; 41. light emitting unit;

[0060] 50. Insulating layer; 51. First via hole; 52. Third connecting portion; 53. Second via hole; 54. Fourth connecting portion;

[0061] D1, first connection end; D2, second connection end;

[0062] T1, first orthographic projection; T2, second orthographic projection;

[0063] O, first virtual center;

[0064] X, first direction; Y, second direction. DETAILED DESCRIPTION

[0065] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by illustrating the examples of the present application.

[0066] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0067] With the advancement of technology, people have higher and higher requirements for display devices. How to further improve the screen-to-body ratio of display devices has also become a hot technology that major manufacturers are competing to develop. However, as the screen-to-body ratio increases, the space used for wiring in display devices is more restricted. On this basis, FIAA (fanoutline in AA) technology is gradually introduced into display devices. Specifically, FIAA technology introduces a multi-layer connection wiring design to reduce the space occupied by wiring, thereby increasing the screen-to-body ratio of the display device.

[0068] For example, a display device may include a photosensitive area for realizing functions such as under-screen camera. In order to improve the transmittance at the photosensitive area, some of the wiring that should be set in the photosensitive area needs to be arranged outside the photosensitive area. In this case, the wiring density around the photosensitive area is relatively large, which has a greater impact on the display effect. Therefore, FIAA technology can be used to reduce the wiring density around the photosensitive area through a multi-layer wiring design, increase the screen-to-body ratio of the display device, and thus improve the display effect.

[0069] Or in other embodiments, for some narrow-frame display devices, the frame size is usually small, and the design space for setting the driving circuit and some wiring is also small. On this basis, FIAA technology can be used to extend the wiring through a multi-layer wiring design to meet the wiring needs of the display device.

[0070] However, due to the existence of the multi-layer wiring structure, the wiring at some positions will be disconnected, resulting in different wiring forms at different positions in the display device, which will lead to different reflectivity at different positions of the display device. During the use of the display device, it is easy to cause uneven display problems, affecting the user experience.

[0071] To solve the above problems, on the one hand, please refer to Figures 1 to 3 , an embodiment of the present application provides an array substrate, the array substrate is used for a display panel, the display panel includes a plurality of pixel areas A, the array substrate includes a substrate 10, a first conductive layer 20, and a second conductive layer 30, the first conductive layer 20 is arranged on one side of the substrate 10, and the first conductive layer 20 includes a first signal line 21. The second conductive layer 30 is arranged on the side of the first conductive layer 20 away from the substrate 10, and the second conductive layer 30 is arranged on the side of the first conductive layer 20 away from the substrate 10, and the second conductive layer 30 includes a plurality of first conductive parts 31 and a plurality of second conductive parts 32 that are insulated, at least part of the first conductive parts 31 are electrically connected to the first signal line 21, and the plurality of first conductive parts 31 are connected to each other. Among them, the first conductive part 31 and the second conductive part 32 are respectively arranged in a plurality of pixel areas A, and the first conductive part 31 and the second conductive part 32 have the same structure. Figure 2 In the figure, a plurality of pixel regions A are indicated by being framed by dotted lines.

[0072] The display panel can define a plurality of pixel regions A. The plurality of pixel regions A may correspond to a plurality of light emitting colors. For example, the plurality of pixel regions A may include a pixel region A for emitting red light, a pixel region A for emitting green light, and a pixel region A for emitting blue light.

[0073] The substrate 10 mainly plays a supporting role, and other film layers are stacked in sequence on the substrate 10 . The stacking arrangement mentioned here means that the other film layers are arranged in sequence along the thickness direction of the substrate 10 .

[0074] The first conductive layer 20 is located on one side of the substrate 10, and a first signal line 21 is disposed in the first conductive layer 20. There may be a plurality of first signal lines 21, and the plurality of first signal lines 21 are disposed side by side. The first signal line 21 is used to transmit a specific signal line, and illustratively, the first signal line 21 may be a data line for transmitting a data signal.

[0075] The second conductive layer 30 is located on the side of the first conductive layer 20 away from the substrate 10, wherein a variety of film layer structures may be arranged between the first conductive layer 20 and the second conductive layer 30, and the embodiment of the present application is not limited to this. An insulating material is arranged between the first conductive layer 20 and the second conductive layer 30 to reduce the risk of short circuit between the internal conductive structures of the two.

[0076] The second conductive layer 30 includes a plurality of first conductive parts 31 and a plurality of second conductive parts 32. The plurality of first conductive parts 31 and the plurality of second conductive parts 32 are arranged in different pixel areas A. That is, corresponding to a single pixel area A, there may be one first conductive part 31 or one second conductive part 32.

[0077] The first conductive part 31 and the second conductive part 32 have the same structure. The "same structure" mentioned in the embodiment of the present application means that the first conductive part 31 and the second conductive part 32 have the same shape, profile and size. Furthermore, the first conductive part 31 is electrically connected to the first signal line 21, and the first conductive part 31 and the second conductive part 32 are insulated, that is, the first conductive part 31 transmits the same electrical signal as the first signal line 21, while the second conductive part 32 cannot transmit the same electrical signal as the first signal line 21.

[0078] It should be noted that, for the plurality of first conductive parts 31, some of the first conductive parts 31 can be directly connected to the first signal line 21 through vias or the like, while other first conductive parts 31 do not need to be directly connected to the first signal line 21, and only need to be electrically connected to the first conductive part 31 connected to the first signal line 21, so that each first conductive part 31 can transmit the same electrical signal as the first signal line 21. Furthermore, by designing the electrical connection between different first conductive parts 31, a specific conductive channel can be formed to achieve the extension transfer of a specific signal in the first signal line 21 in the array substrate.

[0079] As for the plurality of second conductive parts 32, the plurality of second conductive parts 32 may be connected to each other or insulated from each other. The second conductive parts 32 may be electrically connected to other signal lines except the first signal line 21, or may not be electrically connected to any signal line, which is not limited in the embodiment of the present application.

[0080] The first signal line 21 can be extended within the array substrate through the first conductive portion 31. The embodiment of the present application utilizes a multi-layer routing design of the first conductive layer 20 and the second conductive layer 30, thereby reducing the space occupied by the first signal line 21 on the subsequently formed display panel, thereby helping to achieve a narrow bezel effect and increase the screen-to-body ratio of the display panel.

[0081] Furthermore, in the embodiment of the present application, a second conductive portion 32 is further provided in the second conductive layer 30, and the first conductive portion 31 and the second conductive portion 32 are respectively provided in different pixel regions A. On this basis, since the structures of the two are the same, the difference in reflectivity between the two is small, and the effects on the light-emitting effects in the respective pixel regions A tend to be consistent, thus helping to reduce the probability of uneven display and improve the display uniformity of the display panel formed subsequently.

[0082] It should be noted that, in addition to the above-mentioned film layer structure, the array substrate may also include other film layers, and the embodiment of the present application does not limit the specific film layer structure inside the array substrate.

[0083] In some embodiments, the first conductive portion 31 includes a first sub-portion 311 and a second sub-portion 312 whose extension directions intersect each other, and the second conductive layer 30 further includes a first connecting portion 33 , which is used to electrically connect adjacent first conductive portions 31 .

[0084] The first conductive portion 31 includes at least a first sub-portion 311 and a second sub-portion 312, and the extension directions of the first sub-portion 311 and the second sub-portion 312 intersect. It should be noted that the intersection of the extension directions of the two is not limited to the existence of an overlapping portion between the two, that is, the orthographic projection of the first sub-portion 311 on the substrate 10 may overlap with the orthographic projection of the second sub-portion 312 on the substrate 10, or may not overlap. Further, the first sub-portion 311 may be electrically connected to the second sub-portion 312, or the first sub-portion 311 and the second sub-portion 312 may also be insulated.

[0085] For the first conductive portion 31 connected to the first signal line 21 through a via, the first sub-portion 311 may be electrically connected to the first signal line 21 through a via, or the second sub-portion 312 may be electrically connected to the first signal through a via, and the embodiment of the present application does not limit this.

[0086] The embodiment of the present application does not limit the extension direction of the first sub-section 311 and the second sub-section 312. For example, the first sub-section 311 can be arranged perpendicular to the second sub-section 312, that is, the angle between the extension directions of the two can be 90°.

[0087] The second conductive layer 30 further includes a first connecting portion 33 , which is used to realize electrical connection between adjacent first conductive portions 31 , so that specific signal lines in the first signal lines 21 can be transmitted in different first conductive portions 31 , thereby realizing signal transfer.

[0088] There are various forms of connection between the first connecting part 33 and the two connected first conductive parts 31. Specifically, the first connecting part 33 can simultaneously connect the first sub-parts 311 in the two first conductive parts 31, or the first connecting part 33 can simultaneously connect the second sub-parts 312 in the two first conductive parts 31, or the first connecting part 33 can connect the first sub-part 311 in one of the first conductive parts 31 and connect the second sub-part 312 in the other first conductive part 31.

[0089] The material composition of the first sub-portion 311, the second sub-portion 312 and the first connecting portion 33 is not limited in the embodiment of the present application. The first sub-portion 311, the second sub-portion 312 and the first connecting portion 33 may include different materials, respectively, or any two or three of the first sub-portion 311, the second sub-portion 312 and the first connecting portion 33 may include the same material. Exemplarily, the first sub-portion 311, the second sub-portion 312 and the first connecting portion 33 may be made of the same material, and in the process technology, the first sub-portion 311, the second sub-portion 312 and the first connecting portion 33 may be made simultaneously through a mask plate, thereby reducing the process steps and helping to improve the process efficiency.

[0090] In the embodiment of the present application, the electrical connection between adjacent first conductive parts 31 is realized through the first connecting parts 33, so that the specific signal in the first signal line 21 can be transmitted between different first conductive parts 31. In the design stage, by adjusting the positions of the plurality of first conductive parts 31 and the plurality of first connecting parts 33, different conductive channels can be formed to meet the needs of signal transmission inside the array substrate.

[0091] In some embodiments, the first connecting portion 33 is used to connect the first sub-portions 311 in adjacent first conductive portions 31 , and / or the first connecting portion 33 is used to connect the second sub-portions 312 in adjacent first conductive portions 31 .

[0092] For different first conductive parts 31, their structures are consistent, so the extension directions of each first sub-part 311 are parallel or overlapped with each other, and the extension directions of each second sub-part 312 are parallel or overlapped with each other. On this basis, the embodiment of the present application connects the first connecting part 33 to two first sub-parts 311 or to two second sub-parts 312, so as to standardize the connection mode between multiple first conductive parts 31, reduce the complexity of the wiring in the second conductive layer 30, and improve the reliability of the display panel.

[0093] It should be noted that the first connection portion 33 is usually small in size. For example, the orthographic projection size of the first connection portion 33 on the substrate 10 may be 2*3 μm. 2 The influence of the physical properties such as reflectivity and electrical properties of the first conductive portion 31 can be ignored, so the first connecting portion 33 has little influence on the difference in reflectivity between the first conductive portion 31 and the second conductive portion 32 .

[0094] In addition, there is no first connecting portion 33 between adjacent first conductive portions 31 and second conductive portions 32, or between two adjacent second conductive portions 32. In this case, other conductive structures can be arranged at corresponding positions and at different layer positions to reduce the reflectivity difference caused by the absence of the first connecting portion 33 and improve display uniformity.

[0095] In some embodiments, the second sub-portion 312 is parallel to the first signal line 21 .

[0096] In the embodiment of the present application, since the second sub-portion 312 and the first signal line 21 have the same extension direction, the first signal line 21 can achieve cross-line in its own extension direction with the help of multiple second sub-portions 312, which is beneficial to reduce the layout difficulty of the internal structure of the array substrate and meet the preparation requirements of the array substrate. Further, optionally, the first sub-portion 311 is perpendicular to the first signal line 21.

[0097] In some embodiments, see Figure 4In the same first conductive portion 31 , the first sub-portion 311 is insulated from the second sub-portion 312 . The first sub-portion 311 includes a first segment 311a and a second segment 311b spaced apart in its own direction. The first segment 311a and the second segment 311b are disposed on both sides of the second sub-portion 312 .

[0098] The first sub-section 311 is insulated from the second sub-section 312, that is, there is no overlapping area between the orthographic projection of the first sub-section 311 on the substrate 10 and the orthographic projection of the second sub-section 312 on the substrate 10. The first sub-section 311 includes a first segment 311a and a second segment 311b spaced apart, that is, the first segment 311a and the second segment 311b are also insulated.

[0099] In summary, in a single first conductive portion 31, the first segment 311a, the second segment 311b, and the second sub-portion 312 are insulated from each other. This design can selectively connect the first segment 311a to the second segment 311b, or the first segment 311a to the second sub-portion 312, or the second segment 311b to the second sub-portion 312 according to the wiring layout requirements, so that the signal can be transmitted in different directions, thereby improving the flexibility of the wiring layout and having high practicality.

[0100] In some embodiments, see Figure 5 The second sub-section 312 includes a third segment 312a and a fourth segment 312b which are spaced apart in the extension direction thereof, that is, the third segment 312a and the fourth segment 312b are insulated from each other.

[0101] As can be seen from the foregoing, the first segment 311a, the second segment 311b, and the second sub-section 312 are all insulated from each other. On this basis, in the embodiment of the present application, the third segment 312a and the fourth segment 312b in the second sub-section 312 are insulated from each other, so that the first segment 311a, the second segment 311b, the third segment 312a, and the fourth segment 312b are all insulated from each other.

[0102] On this basis, the implementation example of the present application can selectively electrically connect two of the first segment 311a, the second segment 311b, the third segment 312a and the fourth segment 312b according to the needs of the routing layout, so that the signal can be transmitted in different directions, further improving the flexibility of the routing layout.

[0103] In some embodiments, Figure 5 As shown, the second conductive layer 30 further includes a second connecting portion 34 , which is used to connect two of the first segment 311 a , the second segment 311 b , the third segment 312 a and the fourth segment 312 b located in the same first conductive portion 31 .

[0104] The second connection part 34 is used for two of the first segment 311a, the second segment 311b, the third segment 312a and the fourth segment 312b to meet the needs of signal transmission. For different first conductive parts 31, the second connection part 34 can be used for connecting different structures. For example, in part of the first conductive part 31, the second connection part 34 is used to connect the first segment 311a and the second segment 311b; in part of the first conductive part 31, the second connection part 34 is used to connect the first segment 311a and the third segment 312a; in part of the first conductive part 31, the second connection part 34 is used to connect the second segment 311b and the third segment 312a.

[0105] The material composition of the first segment 311a, the second segment 311b, the third segment 312a and the fourth segment 312b is not limited in the embodiment of the present application. The four can be made of the same material or different materials. Further, the material of the second connecting portion 34 is also not limited in the embodiment of the present application. Exemplarily, the first segment 311a, the second segment 311b, the third segment 312a, the fourth segment 312b and the second connecting portion 34 are all made of the same material, and in the process technology, the first segment 311a, the second segment 311b, the third segment 312a, the fourth segment 312b and the second connecting portion 34 can be made simultaneously through a mask plate, thereby reducing the process steps and helping to improve the process efficiency.

[0106] In some embodiments, see Figure 6 The array substrate also includes an insulating layer 50 arranged between the first conductive layer 20 and the second conductive layer 30, the insulating layer 50 includes a first via hole 51 and a third connecting portion 52 arranged in the first via hole 51, the first conductive portions 31 are all connected to the third connecting portions 52, and part of the third connecting portions 52 are connected to the first signal line 21.

[0107] The insulating layer 50 is sandwiched between the first conductive layer 20 and the second conductive layer 30 to reduce the risk of short circuits and other problems in the conductive structures of the two. A first via hole 51 is provided in the insulating layer 50, and a third connecting portion 52 is provided in the first via hole 51. The first conductive portions 31 are all connected to the third connecting portion 52, that is, the third connecting portion 52 is provided at the position corresponding to each first conductive portion 31, and the two are connected to each other.

[0108] One first conductive portion 31 may be connected to one third connecting portion 52, or one first conductive portion 31 may be connected to multiple first connecting portions 33 at the same time, which is not limited in the present embodiment. In addition, for different first conductive portions 31, the number of third connecting portions 52 connected thereto may be the same or different, which is not limited in the present embodiment.

[0109] In addition to being connected to the first conductive portion 31, the third connection portion 52 can also be connected to the first signal line 21. Specifically, part of the third connection portion 52 is connected to both the first conductive portion 31 and the first signal line 21, so that a specific signal can be transferred between the first signal line 21 and the first conductive portion 31.

[0110] It should be noted that, since part of the first conductive portion 31 is not directly connected to the first signal line 21, but is connected to other first conductive portions 31, it can transmit the same signal as the first signal line 21. Therefore, for this part of the first conductive portion 31, the third connecting portion 52 connected thereto is not connected to the first signal line 21. In other words, the orthographic projection of part of the third connecting portion 52 on the substrate 10 overlaps with the orthographic projection of the first signal line 21 on the substrate 10 to achieve contact connection between the two; while the orthographic projection of another part of the third connecting portion 52 on the substrate 10 does not overlap with the orthographic projection of the first signal line 21 on the substrate 10, and the two will not contact each other.

[0111] The present embodiment does not limit the material of the third connection portion 52. For example, the third connection portion 52 and the first conductive portion 31 may include the same material, so that they can be manufactured simultaneously in the same process to improve the manufacturing efficiency of the display panel.

[0112] In general, in order to achieve electrical connection between different layers of conductive structures, vias are usually set at specific locations to achieve electrical connection. However, due to the presence of vias, the conductive structure above is easily uneven, causing its reflectivity to differ from that of other conductive structures, resulting in uneven display.

[0113] To address this problem, in the embodiment of the present application, each first conductive portion 31 is connected to the third connecting portion 52, that is, a first via 51 is provided on the side of each first conductive portion 31 facing the substrate 10. This design can reduce the flatness difference between different first conductive portions 31, reduce the reflectivity difference between different first conductive portions 31, and improve display uniformity.

[0114] In some embodiments, see Figure 7 The first conductive layer 20 includes a first connection end D1 spaced apart from the first signal line 21 , and a portion of the third connection portion 52 is connected to the first connection end D1 .

[0115] It can be seen from the above content that the orthographic projection of part of the third connection part 52 on the substrate 10 does not overlap with the orthographic projection of the first signal line 21 on the substrate 10, that is, the first signal line 21 does not exist on the side of the part of the third connection part 52 facing the substrate 10, which will cause the part of the third connection part 52 connected to the first signal line 21 and the other third connection parts 52 to have different film layer structures, and will also cause structural differences between the first conductive parts 31 corresponding to different third connection parts 52, which may easily cause display unevenness problems.

[0116] On this basis, the embodiment of the present application adds a first connection terminal D1 in the first conductive layer 20, and the portion of the third connection portion 52 that is not directly connected to the first signal line 21 can be connected to the first connection terminal D1, wherein the thickness of the first connection terminal D1 can be the same as the thickness of the first signal line 21. This can reduce the difference in the film layer environment where different third connection portions 52 are located, thereby further reducing the structural differences between the first conductive portions 31 corresponding to different third connection portions 52, thereby improving display uniformity.

[0117] In some embodiments, see Figure 8 The first conductive layer 20 further includes a second connection end D2 connected to the second signal line 22, a portion of the third connection portion 52 is connected to the second connection end D2, and the first connection end D1 has the same structure as the second connection end D2.

[0118] The second connection end D2 is connected to the second signal line 22 and is disposed in the same layer as the second signal line 22. Furthermore, the second connection end D2 is disposed in the same layer as the first connection end D1, and the two have the same structure. The "same structure" mentioned here means that the first connection end D1 and the second connection end D2 have the same shape, profile and size.

[0119] Part of the third connection part 52 is connected to the first connection end D1, and part of the third connection part 52 is connected to the second connection end D2. The first connection end D1 and the second connection end D2 have the same structure. Therefore, the film layer environment of the third connection part 52 used to connect the first connection end D1 is basically consistent with the film layer environment of the third connection part 52 used to connect the second connection end D2. Furthermore, the difference in reflectivity between the first conductive parts 31 corresponding to different third connection parts 52 can be reduced, thereby improving display uniformity.

[0120] In some embodiments, see Fig. 9 , the number of third connection parts 52 connected to different first conductive parts 31 is the same. Fig. 9 In the figure, the relative position of the third connection portion 52 is indicated by a black dot.

[0121] However, due to the presence of the first via hole 51 and the third connecting portion 52, the first connecting portion 33 is prone to be uneven, which easily leads to a difference in reflectivity and a risk of uneven display. Furthermore, the difference in the number of first via holes 51 and third connecting portions 52 corresponding to each first conductive portion 31 will also lead to a difference in reflectivity between different first conductive portions 31.

[0122] On this basis, the embodiment of the present application sets the number of third connection parts 52 connected to different first conductive parts 31 to be the same, so as to reduce the difference in reflectivity between different first conductive parts 31 caused by the number of third connection parts 52, and improve display uniformity. For example, each first conductive part 31 can be connected to one third connection part 52, or each first conductive part 31 can be connected to two, three or even more third connection parts 52 at the same time.

[0123] In some embodiments, see Fig.10 , the third connecting parts 52 are all connected to the first sub-part 311.

[0124] In addition to the fact that the number of third connecting parts 52 will cause differences in reflectivity between different first conductive parts 31, the different positions of the third connecting parts 52 relative to the first conductive parts 31 will cause differences in the relative positions of the unevenness in the first conductive parts 31, thereby making it easy for differences in reflectivity to occur between different first conductive parts 31.

[0125] Therefore, in the embodiment of the present application, the third connection parts 52 are all connected to the first sub-part 311, so that the relative positions of the third connection parts 52 corresponding to different first conductive parts 31 are as similar as possible, thereby further reducing the difference in reflectivity between different first conductive parts 31 and improving display uniformity. Optionally, the relative positions of the third connection parts 52 connected to different first conductive parts 31 remain consistent.

[0126] In some other embodiments, the third connecting portions 52 are all connected to the second sub-portion 312 .

[0127] In some embodiments, see Fig.11 and Fig.12 The array substrate further includes a second signal line 22 disposed on a side of the second conductive layer 30 facing the substrate 10 , and the second conductive portion 32 is electrically connected to the second signal line 22 .

[0128] The second signal line 22 is used to transmit a signal of a different type from the first signal line 21. The embodiment of the present application does not limit the type of signal transmitted by the second signal line 22. Exemplarily, the second signal line 22 is used to transmit a power signal for realizing a light-emitting function. The second signal line 22 and the first signal line 21 are both located on the side of the second conductive layer 30 facing the substrate 10, wherein the second signal line 22 can be located on the side of the first signal line 21 facing the substrate 10, or on the side of the first signal line 21 away from the substrate 10, or can be arranged on the same layer as the first signal line 21.

[0129] The first conductive part 31 is electrically connected to the first signal line 21, and the second conductive part 32 is insulated from the first signal line 21. On this basis, in the embodiment of the present application, the second conductive part 32 is electrically connected to the second signal line 22, and the second conductive part 32 can be electrically connected to the second signal line 22 by means of vias, etc., so as to realize parallel connection with the second signal line 22, thereby reducing the voltage drop of the second signal line 22 and improving the reliability of signal transmission in the second signal line 22.

[0130] In some embodiments, see Fig.13 , the plurality of second conductive parts 32 are connected to each other. Exemplarily, the second conductive layer 30 further includes a fifth connecting part 35 , and the fifth connecting part 35 is used to realize electrical connection between the plurality of second conductive parts 32 .

[0131] In the embodiment of the present application, multiple second conductive parts 32 are interconnected, so that multiple second conductive parts 32 can be simultaneously connected to the second signal line 22 , thereby helping to reduce the corresponding voltage drop of the second signal line 22 and improve the reliability of signal transmission in the second signal line 22 .

[0132] In some embodiments, the second signal line 22 is located in the second conductive layer 30, that is, the second signal line 22 is disposed in the same layer as the first signal line 21. Further, the first signal line 21 and the second signal line 22 can be configured to be made of the same material, so that the first signal line 21 and the second signal line 22 can be simultaneously manufactured in the same process, thereby improving the manufacturing efficiency of the display panel.

[0133] In some embodiments, Fig.13 As shown, the insulating layer 50 includes a second via hole 53 and a fourth connection portion 54 disposed in the second via hole 53, the second conductive portions 32 are all connected to the fourth connection portion 54, and part of the fourth connection portion 54 is electrically connected to the second signal line 22, and the number of third connection portions 52 connected to a single first conductive portion 31 is the same as the number of fourth connection portions 54 connected to a single second conductive portion 32. Fig.13 In the figure, the relative positions of the fourth connecting portion 54 and the second via hole 53 are indicated by black boxes.

[0134] Similar to the first conductive part 31, the second conductive part 32 is electrically connected to the second signal line 22 by means of the second via 53 and the fourth connecting part 54 located in the second via 53. The existence of the fourth connecting part 54 will also cause the second conductive part 32 to be prone to unevenness, resulting in a reflectivity difference. Exemplarily, the number of fourth connecting parts 54 connected to each second conductive part 32 can be set to be the same. Furthermore, the relative positions of the fourth connecting parts 54 connected to each second conductive part 32 can be set to be the same, so as to reduce the reflectivity difference between different second conductive parts 32 and improve display uniformity.

[0135] In the embodiment of the present application, the number of the third connection parts 52 connected to the single first conductive part 31 is set to be the same as the number of the fourth connection parts 54 connected to the single second conductive part 32. This helps to reduce the flatness difference between the first conductive part 31 and the second conductive part 32, and reduce the reflectivity difference between the two, so as to improve the display uniformity.

[0136] Second, see Fig.14 , an embodiment of the present application provides a display panel, comprising the array substrate in any of the aforementioned embodiments.

[0137] In some embodiments, see Fig.14 as well as Fig.15 The display panel further includes a light emitting device layer 40 disposed on one side of the array substrate. The light emitting device layer 40 includes a plurality of light emitting units 41 disposed in different pixel regions A. In each pixel region A, the relative position between the orthographic projection of the light emitting unit 41 on the substrate 10 and the orthographic projection of the first conductive portion 31 on the substrate 10 is consistent. Fig.15 The middle light emitting unit 41 is indicated by a dotted line.

[0138] The light-emitting unit 41 is a main element for realizing the display effect in the display panel. The light-emitting unit 41 is arranged in different pixel regions A, and the color of the light-emitting unit 41 is consistent with the color represented by the pixel region A. For example, the plurality of light-emitting units 41 may include a green light-emitting unit 41 located in the green pixel region A, a red light-emitting unit 41 located in the red pixel region A, and a blue light-emitting unit 41 located in the blue pixel region A.

[0139] Since the first conductive portion 31 and the light-emitting unit 41 are both located in the pixel region A, the presence of the first conductive portion 31 easily affects the light-emitting effect of the light-emitting unit 41. On this basis, in each pixel region A, the light-emitting unit 41 and the first conductive portion 31 are set at the same relative position between the orthographic projections of the substrate 10, so that the influence of the first conductive portion 31 on each of the plurality of light-emitting units 41 is as close as possible, thereby helping to improve display uniformity.

[0140] It should be noted that the embodiment of the present application does not limit the relative positional relationship between the first conductive portion 31 and the light-emitting unit 41. For example, in the pixel area A, the orthographic projection of the first conductive portion 31 on the substrate 10 may be completely located within the orthographic projection of the light-emitting unit 41 on the substrate 10, or the orthographic projection of the first conductive portion 31 on the substrate 10 may be only partially located within the orthographic projection of the light-emitting unit 41 on the substrate 10, or the orthographic projection of the first conductive portion 31 on the substrate 10 may be completely located outside the orthographic projection of the light-emitting unit 41 on the substrate 10.

[0141] In some embodiments, in each pixel region A, the relative position between the orthographic projection of the light emitting unit 41 on the substrate 10 and the orthographic projection of the second conductive portion 32 on the substrate 10 is kept consistent. This design makes the influence of the second conductive portion 32 on each of the plurality of light emitting units 41 as similar as possible, thereby helping to improve display uniformity.

[0142] In some embodiments, Fig.15 As shown, the light-emitting unit 41 has a first orthographic projection T1 on the substrate 10, and the first orthographic projection T1 has a first virtual center O. The first conductive portion 31 has a second orthographic projection T2 on the substrate 10, corresponding to the same pixel area A, and the second orthographic projection T2 is symmetrically arranged relative to the first virtual center O.

[0143] The first orthographic projection T1 corresponds to the projection shape of the light emitting unit 41. The embodiment of the present application does not limit the size and shape of the first orthographic projection T1. For example, the first orthographic projection T1 can be a circle, a square or other polygonal structure. The "first virtual center O" mentioned in the embodiment of the present application refers to: the geometric center of the first orthographic projection T1, that is, the first virtual center O is located in the center of the first orthographic projection T1.

[0144] The second orthographic projection T2 corresponds to the projection shape of the first conductive portion 31. The size and shape of the second orthographic projection T2 are not limited in the embodiment of the present application. For example, the second orthographic projection T2 may be in a "cross" shape or a "T" shape.

[0145] In the same pixel area A, there is a corresponding first orthographic projection T1 and a second orthographic projection T2. ​​As can be seen from the above, the presence of the first conductive portion 31 will affect the display of the corresponding light-emitting unit 41. On this basis, the embodiment of the present application sets the second orthographic projection T2 symmetrically with respect to the first virtual center O in the first orthographic projection T1, thereby reducing the risk of excessive brightness difference between the two sides of the center position of the light-emitting unit 41 due to the presence of the first conductive portion 31, so that the light-emitting center of the light-emitting unit 41 is as close as possible to the geometric center of the light-emitting unit 41, thereby improving the display effect.

[0146] In some other embodiments, see Fig.16 , at least part of the structure in the second orthographic projection T2 is located outside the first orthographic projection T1.

[0147] Generally, the portion of the first conductive portion 31 that overlaps with the projection of the light-emitting unit 41 will affect the display effect of the light-emitting unit 41, while the portion of the first conductive portion 31 that is projected outside the light-emitting unit 41 has little effect on the display effect of the light-emitting unit 41. Therefore, in the embodiment of the present application, by positioning the second orthographic projection T2 at least partially outside the first orthographic projection T1, the effect of the first conductive portion 31 on the light-emitting unit 41 can be reduced, thereby improving the display effect.

[0148] In some embodiments, the portion of the second orthographic projection T2 located outside the first orthographic projection T1 accounts for no less than 50% of the second orthographic projection T2, that is, at least half of the structure in the second orthographic projection T2 is located outside the first orthographic projection T1. The embodiment of the present application can further reduce the light-emitting effect of the first conductive portion 31 on the light-emitting unit 41 by increasing the proportion of the structure of the second orthographic projection T2 located outside the first orthographic projection T1, thereby improving the display effect. Optionally, the second orthographic projection T2 is completely outside the first orthographic projection T1.

[0149] Third, see Fig.17 , an embodiment of the present application provides a display device, comprising a display panel in any of the aforementioned embodiments.

[0150] It should be noted that the display device provided in the embodiment of the present application has the beneficial effects of the display panel in any of the aforementioned embodiments. For details, please refer to the aforementioned description of the beneficial effects of the display panel, and the embodiment of the present application will not be repeated.

[0151] Fourth, please refer to Fig.18 19 , an embodiment of the present application provides a method for preparing an array substrate, the array substrate is used for a display panel, the display panel includes a plurality of pixel areas A, and the preparation method includes:

[0152] S100: forming a first conductive layer on one side of a substrate, wherein the first conductive layer includes a first signal line.

[0153] See also Fig.19a In step S100, a first conductive layer 20 is formed on one side of the substrate 10, and the first conductive layer 20 includes a plurality of first signal lines 21, wherein the plurality of first signal lines 21 can be arranged side by side in the same direction.

[0154] S110: forming a plurality of conductive structures with the same shape on a side of the first conductive layer away from the substrate and corresponding to a plurality of pixel regions, wherein the conductive structures are insulated from each other and some of the conductive structures are electrically connected to the first signal line.

[0155] See also Fig.19b In step S110, a plurality of conductive structures T are simultaneously prepared and disposed in a plurality of pixel regions A. The shapes of the conductive structures T are the same. The "same shape" mentioned here means that the shapes, contours and sizes of the conductive structures T are the same. The conductive structures T are insulated from each other, and some of the conductive structures T are subsequently used as the first conductive portion, and some of the conductive structures T are subsequently used as the second conductive portion.

[0156] It should be noted that other steps may be included between step S100 and step S110, which is not limited in the present application. For example, after step S100, an insulating layer 50 may be formed on the side of the first conductive layer 20 facing away from the substrate 10, and then step S110 may be performed, i.e., a conductive structure may be formed on the side of the insulating layer 50 facing away from the substrate 10.

[0157] S120: electrically connecting a portion of the conductive structure electrically connected to the first signal line to other conductive structures to form a conductive channel.

[0158] See also Fig.19c In step S120, part of the conductive structure T electrically connected to the first signal line 21 and part of other conductive structures T electrically connected to the conductive structure T are both first conductive parts, which together form a conductive channel that can be used to transmit a specific signal in the first signal line 21 through electrical connection. The existence of the conductive channel can help the first signal line 21 to transfer signals, and utilize multiple routing designs to meet the needs of signal transmission within the display panel.

[0159] It should be noted that the present embodiment does not limit the preparation order between step S110 and step S120. That is, step S110 can be before step S120 or after step S120. In addition, according to actual needs, step S110 and step S120 can also be the same process, that is, while forming the conductive structure T, electrical connection between parts of the conductive structures T can be achieved.

[0160] Although the embodiments disclosed in this application are as above, the contents described are only embodiments adopted for facilitating the understanding of this application and are not intended to limit the present invention. Any technician in the technical field to which this application belongs can make any modifications and changes in the form and details of implementation without departing from the spirit and scope disclosed in this application, but the scope of protection of this application shall still be subject to the scope defined in the attached claims.

[0161] The above is only a specific implementation of the present application. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the replacement of other connection methods described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here. It should be understood that the protection scope of the present application is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in this application, and these modifications or replacements should be included in the protection scope of the present application.

Claims

1. An array substrate for a display panel, wherein the display panel comprises a plurality of pixel regions, characterized in that: The array substrate comprises: substrate; A first conductive layer, disposed on one side of the substrate, wherein the first conductive layer includes a first signal line; a second conductive layer, disposed on a side of the first conductive layer away from the substrate, the second conductive layer comprising a plurality of first conductive portions and a plurality of second conductive portions that are insulated, at least some of the first conductive portions being electrically connected to the first signal line, and the plurality of first conductive portions being connected to each other; The first conductive portion and the second conductive portion are disposed in a plurality of pixel regions, and the first conductive portion and the second conductive portion have the same structure.

2. The array substrate according to claim 1, characterized in that: The first conductive portion includes a first sub-portion and a second sub-portion whose extension directions intersect each other. The second conductive layer also includes a first connecting portion, and the first connecting portion is used to electrically connect adjacent first conductive portions.

3. The array substrate according to claim 2, characterized in that: The first connecting portion is used to connect first sub-portions in adjacent first conductive portions; and / or the first connecting portion is used to connect second sub-portions in adjacent first conductive portions.

4. The array substrate according to claim 2, characterized in that: The first sub-portion is perpendicular to the second sub-portion.

5. The array substrate according to claim 2, characterized in that The first sub-portion is parallel to the first signal line.

6. The array substrate according to claim 2, characterized in that: In the same first conductive portion, the first sub-portion is insulated from the second sub-portion, the first sub-portion includes a first segment and a second segment spaced apart in its extension direction, and the first segment and the second segment are disposed on both sides of the second sub-portion.

7. The array substrate according to claim 6, characterized in that The second sub-section includes a third segment and a fourth segment which are spaced apart in the extension direction of the second sub-section.

8. The array substrate according to claim 7, characterized in that: The second conductive layer further includes a second connecting portion, and the second connecting portion is used to connect two of the first segment, the second segment, the third segment, and the fourth segment located in the same first conductive portion.

9. The array substrate according to claim 1, characterized in that: It also includes an insulating layer arranged between the first conductive layer and the second conductive layer, the insulating layer includes a first via hole and a third connecting portion arranged in the first via hole, the first conductive portion is connected to the third connecting portion, and part of the third connecting portion is electrically connected to the first signal line.

10. The array substrate according to claim 9, characterized in that The first conductive layer includes a first connection end spaced apart from the first signal line, and a portion of the third connection portion is connected to the first connection end.

11. The array substrate according to claim 10, characterized in that: The first conductive layer further includes a second connection end connected to the first signal line, a portion of the third connection portion is connected to the second connection end, and the first connection end has the same structure as the second connection end.

12. The array substrate according to claim 10, characterized in that: The number of the third connection parts connected to different first conductive parts is the same.

13. The array substrate according to claim 10, characterized in that: The first conductive portion includes a first sub-portion and a second sub-portion whose extension directions intersect each other, and the third connecting portions are all connected to the first sub-portion; or, the third connecting portions are all connected to the second sub-portion.

14. The array substrate according to claim 10, characterized in that: The relative positions of the third connecting parts connected to different first conductive parts remain consistent.

15. The array substrate according to claim 9, characterized in that: It also includes a second signal line arranged on the side of the second conductive layer facing the substrate, and the second conductive portion is electrically connected to the second signal line.

16. The array substrate according to claim 15, characterized in that: A plurality of the second conductive parts are connected to each other.

17. The array substrate according to claim 15, characterized in that: The second signal line is located in the first conductive layer.

18. The array substrate according to claim 15, characterized in that: The insulating layer includes a second via hole and a fourth connecting portion disposed in the second via hole, the second conductive portion is connected to the fourth connecting portion, and a portion of the fourth connecting portion is electrically connected to the second signal line. The number of the third connection parts connected to a single first conductive part is the same as the number of the fourth connection parts connected to a single second conductive part.

19. A display panel, characterized in that: It comprises the array substrate as claimed in any one of claims 1 to 18.

20. The display panel according to claim 19, characterized in that: It also includes a light-emitting device layer arranged on one side of the array substrate, and the light-emitting device layer includes a plurality of light-emitting units arranged in different pixel areas. In each pixel area, the relative position between the orthographic projection of the light-emitting unit on the substrate and the orthographic projection of the first conductive part on the substrate remains consistent.

21. The array substrate according to claim 20, characterized in that: In each of the pixel regions, a relative position between an orthographic projection of the light emitting unit on the substrate and an orthographic projection of the second conductive portion on the substrate remains consistent.

22. The display panel according to claim 20, characterized in that: The light-emitting unit has a first orthographic projection on the substrate, the first orthographic projection has a first virtual center, the first conductive portion has a second orthographic projection on the substrate, corresponding to the same pixel area, the second orthographic projection is symmetrically arranged relative to the first virtual center; and / or, At least part of the structure in the second orthographic projection is located outside the first orthographic projection.

23. The array substrate according to claim 22, characterized in that: The portion of the second orthographic projection that is outside the first orthographic projection accounts for no less than 50% of the second orthographic projection.

24. The array substrate according to claim 22, characterized in that: The second orthographic projection is completely outside the first orthographic projection.

25. A display device, characterized in that: Comprising the display panel as claimed in any one of claims 19 to 24.

26. A method for preparing an array substrate, characterized in that: The array substrate is used for a display panel, the display panel includes a plurality of pixel areas, and the preparation method includes: Forming a first conductive layer on one side of the substrate, wherein the first conductive layer includes a first signal line; A plurality of conductive structures with the same shape are formed on a side of the first conductive layer away from the substrate and corresponding to the plurality of pixel regions, wherein the conductive structures are insulated from each other and some of the conductive structures are electrically connected to the first signal line; The portion of the conductive structure electrically connected to the first signal line is electrically connected to the other conductive structures to form a conductive channel.

Images