A COC high-frequency test stage and a test method

Abstract

The application relates to the technical field of optical communication, and provides a COC high-frequency test carrier and a test method. In the application, a temperature control test probe contacts a specified area on a heat sink; during the test, the light emission of the chip under power supply generates heat, leading to a difference between the junction temperature of the chip and the ambient temperature; the heat generated by the light emission of the chip is transmitted to the heat sink welded with the chip through heat conduction; the temperature on the heat sink is measured through the temperature control test probe, the actual temperature of each chip in the test is obtained, and the working temperature of the chip is indirectly adjusted through the heat sink conduction by controlling the temperature control device. In the application, the COC sample carrier can accurately position the measured COC sample, adjust the horizontal and vertical positions of the calibration piece, increase the contact area of the COC sample and the COC test table, is favorable for chip heat dissipation, and ensures the accuracy and reliability of the test result.

Description

[Technical Field]

[0001] This invention relates to the field of optical communication technology, and in particular to a high-frequency test stage and test method for COC. [Background Technology]

[0002] Semiconductor laser chips undergo a series of manufacturing processes, from epitaxial wafers to individual chips. They then undergo chip performance testing, including Ith threshold current, Po output optical power, Vo operating voltage, wavelength, and SMSR side-mode rejection ratio, to screen out unqualified chips. Qualified chips are then packaged for use, increasing the packaging yield.

[0003] The high-frequency performance of semiconductor lasers largely determines the transmission rate of optical communication systems; therefore, screening for the high-frequency characteristics of semiconductor lasers is a crucial step. For effective testing, the semiconductor laser chip needs to be surface-mounted on a heat sink with high thermal conductivity; a common surface-mount packaging method is Chip On Carry (COC).

[0004] During high-frequency testing, the COC sample is placed on the stage. Due to the numerous test parameters and long testing time, in addition to using an external temperature control system to precisely control the stage temperature, the stage also needs to stably fix the COC sample and increase heat dissipation. During chip operation, the chip emits light, causing a difference between the actual chip temperature and the ambient temperature, requiring precise chip temperature control to reduce the influence of external factors on the COC test results. Commonly used COC test stages use vacuum to fix the COC. The presence of vacuum suction holes reduces the bottom area of ​​the COC substrate, resulting in poor heat dissipation. When the chip is powered on and emits light, the heat dissipation problem of the stage affects the accuracy of the test results. When the test probe contacts the chip, it also affects the uniformity of force on the chip. The actual temperature of the chip during operation needs to be measured by attaching thermistors to each substrate, which is costly.

[0005] Therefore, overcoming the shortcomings of the existing technology is an urgent problem to be solved in this technical field. [Summary of the Invention]

[0006] The technical problem this invention aims to solve is that in the prior art, when COC is fixed using vacuum, the presence of vacuum suction holes reduces the bottom area of ​​the COC substrate, resulting in poor heat dissipation. When the chip on the COC is powered on and emits light, heat dissipation of the stage becomes an issue, affecting the accuracy of the test results. Furthermore, when the test probe contacts the chip, it also affects the uniformity of the force applied to the chip. The actual operating temperature of the chip needs to be measured by attaching a thermistor to each substrate, which is costly.

[0007] The present invention adopts the following technical solution:

[0008] In a first aspect, the present invention also provides a COC high-frequency testing stage, comprising a COC sample stage 1, an L-shaped auxiliary positioning baffle 2, a calibration plate stage 3, a temperature control device 4, and a temperature control testing probe 5, specifically:

[0009] An L-shaped auxiliary positioning baffle 2 is provided on the COC sample stage 1 to move one corner and two sides of the COC sample 6 to the right angle of the L-shaped auxiliary positioning baffle 2, thereby fixing the COC sample 6; wherein, the COC sample 6 is composed of a heat sink 60 and a chip 61.

[0010] The calibration plate stage 3 is used to place calibration plates and to calibrate the accuracy of peripheral equipment detection before testing;

[0011] The temperature control device 4 is placed at the bottom of the COC sample stage 1, and the two are fixed together by thermally conductive adhesive.

[0012] The temperature control test probe 5 contacts a designated area on the heat sink 60. During the test, the chip 61 generates heat when it is powered on and emits light, resulting in a difference between the junction temperature of the chip 61 and the ambient temperature. The heat generated by the chip 61 emitting light is transferred to the heat sink 60 soldered to the chip 61 through thermal conduction. The temperature on the heat sink 60 is measured by the temperature control test probe 5 to obtain the actual temperature of each chip during the test. The operating temperature of the chip 61 is indirectly adjusted by controlling the temperature control device 4 through the heat sink 60.

[0013] Preferably, the calibration slide stage 3 specifically includes:

[0014] The upper surface of the calibration slide stage 3 is coated with a metal film for placing calibration slides;

[0015] An auxiliary positioning baffle 7 is provided at a right angle on the surface of the calibration plate stage 3. The calibration plate 8 is placed at the right angle of the auxiliary positioning baffle 7 to adjust the horizontal and vertical positions of the calibration plate.

[0016] The calibration plate stage 3 is provided with a vacuum adsorption hole 31 on the surface area where the calibration plate is placed. The vacuum adsorption hole 31 is connected to the internal gas passage of the vacuum adsorption device.

[0017] Preferably, the temperature control test probe 5 contacts the area on the heat sink 60 without electrodes. During the test, the chip 61 generates heat when it is powered on and emits light, resulting in a difference between the junction temperature of the chip 61 and the ambient temperature. The heat generated by the chip emitting light is transferred to the heat sink 60 soldered to the chip 61 through thermal conduction. The actual temperature of the chip 61 during the test can be measured by measuring the temperature on the heat sink through the temperature control test probe 5.

[0018] Preferably, a surface-mount negative temperature coefficient NTC thermistor 9 is soldered to the tip of the temperature control test probe 5. The temperature control test probe 5 contacts the heat sink 60, which is actually the thermistor 9 contacting the heat sink 60. When voltage is applied to the probe, the current can be measured, the resistance value can be calculated, and the corresponding temperature can be obtained from the table, which is the actual temperature of the chip 61.

[0019] Preferably, the COC sample stage 1 further includes:

[0020] The surface of the COC sample stage 1 is coated with a metal film to provide negative power to the COC sample 6. The chip 61 on the COC sample is not a coplanar structure, while the electrodes on the heat sink 60 are coplanar. The N electrode of the chip 61 needs to be soldered to the heat sink first, and the P electrode of the chip 61 is led to the upper surface of the heat sink with gold wire 62. The bottom of the heat sink is in contact with the stage, and the non-coplanar chip is measured from the coplanar electrode of the heat sink.

[0021] Preferably, the temperature control device 4 uses a semiconductor cooler (TEC) for temperature control.

[0022] Preferably, the L-shaped auxiliary positioning baffle 2 includes a first stop arm 21 and a second stop arm 22 forming an L-shape, wherein the first stop arm 21 and the second stop arm 22 intersect perpendicularly, specifically:

[0023] The first stop arm 21 and the second stop arm 22 have a cross-sectional shape of an inverted L-shape, and the empty area of ​​the inverted L-shape is used to accommodate the side of the COC sample 6.

[0024] The upper surface of the pattern located in the gap area is made into a slope, and the distance between the tip of the slope and the upper surface of the COC sample stage 1 coupled to the bottom of the inverted L-shape is greater than or equal to the height of the edge of the COC sample 6; wherein, through holes 23 for gas guiding are also provided on the side walls of the first stop arm 21 or the second stop arm 22 from the tip of the slope.

[0025] Preferably, there are multiple air guide holes 23, which are arranged on the first baffle 21 and the second baffle 22 at preset intervals; wherein, the closer to the connection between the first baffle 21 and the second baffle 22, the smaller the spacing of the corresponding air guide holes 23.

[0026] Preferably, it also includes a pneumatic pump, the outlet of which faces the surface of the COC sample 6 and is fixed to a corner area opposite to the L-shaped auxiliary positioning baffle 2, blowing out an airflow at a specified rate at a preset angle;

[0027] The air guide hole 23 is used to release the airflow blown by the air pump against the L-shaped auxiliary positioning baffle 2, and to form a relatively balanced air pressure force on the surface of the COC sample 6.

[0028] Secondly, the present invention also provides a testing method for a COC high-frequency testing stage, using the COC high-frequency testing stage as described in the first aspect, the testing method comprising:

[0029] The COC sample 6 is fixed on the L-shaped auxiliary positioning baffle 2;

[0030] The air outlet of the air pump faces the surface of the COC sample 6 and is fixed in a corner area opposite to the L-shaped auxiliary positioning baffle 2, blowing out an airflow at a specified rate at a preset angle.

[0031] The air guide hole 23 is used to release the airflow blown by the air pump against the L-shaped auxiliary positioning baffle 2, and to form a relatively balanced air pressure force on the surface of the COC sample 6.

[0032] After the calibration process of the test equipment on the calibration plate is completed, the test of COC sample 6 begins. During the test, the temperature of COC sample 6 is monitored by the temperature control test probe 5, while the temperature control device 4 is controlled to keep the corresponding temperature monitoring value within the preset range.

[0033] The COC sample stage in this invention can accurately position the COC sample to be tested, adjust the horizontal and vertical positions of the calibration plate, increase the contact area between the COC sample and the COC test stage, which is beneficial for chip heat dissipation and ensures the accuracy and reliability of the test results.

[0034] In the preferred embodiment of the present invention, the calibration plate stage is precisely positioned by a metal baffle, which facilitates the location of open circuits, short circuits, and overloads (OSL) on the calibration plate; the calibration plate stage has vacuum adsorption holes, all of which are connected to the internal gas passage of the vacuum adsorption device, so as to hold the calibration plate in place by vacuum and prevent the calibration plate from moving during the test. [Attached Image Description]

[0035] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments of the present invention will be briefly described below. Obviously, the drawings described below are merely some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.

[0036] Figure 1 This is an axial view of a COC high-frequency test stage structure provided in an embodiment of the present invention;

[0037] Figure 2 This is a schematic diagram of a temperature control test probe structure provided in an embodiment of the present invention;

[0038] Figure 3This is a schematic diagram of a COC sample structure provided in an embodiment of the present invention;

[0039] Figure 4 This is a top view schematic diagram of a COC high-frequency test stage provided in an embodiment of the present invention;

[0040] Figure 5 This is a schematic diagram of an L-shaped auxiliary positioning baffle structure provided in an embodiment of the present invention;

[0041] Figure 6 This is a schematic diagram of an L-shaped auxiliary positioning baffle structure provided in an embodiment of the present invention;

[0042] Figure 7 This is a schematic diagram of an L-shaped auxiliary positioning baffle structure provided in an embodiment of the present invention;

[0043] Figure 8 This is a schematic diagram of an L-shaped auxiliary positioning baffle structure provided in an embodiment of the present invention;

[0044] Figure 9 This is a schematic diagram of a testing method for a COC high-frequency testing stage provided by an embodiment of the present invention.

Detailed Implementation Methods

[0045] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0046] In the description of this invention, the terms "inner", "outer", "longitudinal", "lateral", "upper", "lower", "top", "bottom", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and do not require that this invention must be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention.

[0047] Furthermore, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0048] Example 1:

[0049] Embodiment 1 of the present invention provides 1. a stage for high-frequency testing of COC, such as Figures 1-3 As shown, it includes a COC sample stage 1, an L-shaped auxiliary positioning baffle 2, a calibration plate stage 3, a temperature control device 4, and a temperature control test probe 5. Specifically:

[0050] An L-shaped auxiliary positioning baffle 2 is provided on the COC sample stage 1 to move one corner and two sides of the COC sample 6 to the right angle of the L-shaped auxiliary positioning baffle 2, thereby fixing the COC sample 6; wherein, the COC sample 6 is composed of a heat sink 60 and a chip 61.

[0051] The calibration plate stage 3 is used to place calibration plates and to calibrate the accuracy of peripheral equipment detection before testing;

[0052] The temperature control device 4 is placed at the bottom of the COC sample stage 1, and the two are fixed together by thermally conductive adhesive.

[0053] The temperature control test probe 5 contacts a designated area (i.e., an area without electrodes) on the heat sink 60. During the test, the chip 61 generates heat when it is powered on and emits light, resulting in a difference between the junction temperature of the chip 61 and the ambient temperature. The heat generated by the chip 61 emitting light is transferred to the heat sink 60 soldered to the chip 61 through thermal conduction. The temperature on the heat sink 60 is measured by the temperature control test probe 5 to obtain the actual temperature of each chip during the test. The operating temperature of the chip 61 is indirectly adjusted by controlling the temperature control device 4 through conduction via the heat sink 60.

[0054] The COC sample stage in this invention can accurately position the COC sample to be tested, adjust the horizontal and vertical positions of the calibration plate, increase the contact area between the COC sample and the COC test stage, which is beneficial for chip heat dissipation and ensures the accuracy and reliability of the test results.

[0055] In conjunction with the embodiments of the present invention, there is also a preferred implementation scheme that further improves the ease of replacement and installation of the corresponding calibration piece, such as... Figure 1 and Figure 4 As shown, the calibration slide stage 3 specifically includes:

[0056] The upper surface of the calibration slide stage 3 is coated with a metal film for placing calibration slides;

[0057] An auxiliary positioning baffle 7 is provided at a right angle on the surface of the calibration plate stage 3. The calibration plate 8 is placed at the right angle of the auxiliary positioning baffle 7 to adjust the horizontal and vertical positions of the calibration plate.

[0058] The calibration plate stage 3 is provided with a vacuum adsorption hole 31 on the surface area where the calibration plate is placed. The vacuum adsorption hole 31 is connected to the internal gas passage of the vacuum adsorption device.

[0059] In the preferred embodiment of the present invention, the calibration plate stage is precisely positioned by a metal baffle, which facilitates the location of open circuits, short circuits, and overloads (OSL) on the calibration plate; the calibration plate stage has vacuum adsorption holes, which are all connected to the internal gas passage of the vacuum adsorption device, so as to hold the calibration plate in place by vacuum and prevent the calibration plate from moving during the test.

[0060] In the implementation process, the temperature control test probe 5 usually contacts the area on the heat sink 60 without electrodes. During the test, the chip 61 generates heat when it is powered on and emits light, which causes a difference between the junction temperature of the chip 61 and the ambient temperature. The heat generated by the chip emitting light is transferred to the heat sink 60 soldered to the chip 61 through thermal conduction. By measuring the temperature on the heat sink through the temperature control test probe 5, the actual temperature of the chip 61 during the test can be measured.

[0061] In the implementation process, a surface-mount negative temperature coefficient NTC thermistor 9 is typically soldered to the tip of the temperature control test probe 5. This surface-mount NTC thermistor 9 is temperature-sensitive and has a short response time. When the temperature control test probe 5 contacts the heat sink 60, the thermistor 9 is actually in contact with the heat sink 60. Applying voltage to the probe allows for current measurement, calculation of the resistance value, and lookup of the corresponding temperature (i.e., the actual temperature of chip 61) to be obtained. The chip's test setting temperature is then compensated for to reduce test errors caused by temperature.

[0062] In the implementation process, the COC sample stage 1 usually includes: a metal film coated on the surface of the COC sample stage 1 to provide negative power supply for the COC sample 6; the chip 61 on the COC sample 6 is not a coplanar structure, while the electrodes on the heat sink 60 are coplanar structures. The N electrode of the chip 61 needs to be soldered to the heat sink first, and the P electrode of the chip 61 is led to the upper surface of the heat sink with gold wire 62. The bottom of the heat sink is in contact with the stage, and the non-coplanar chip is measured from the coplanar electrode of the heat sink.

[0063] In implementation, the temperature control device 4 typically employs a thermoelectric cooler (TEC). This allows for compact, precise temperature control. The target temperature of the TEC is set, the difference between the current temperature and the target temperature is observed, and the PDI parameter is adjusted until the current temperature is as close as possible to the target temperature without oscillation.

[0064] A preferred implementation method is also provided in conjunction with the embodiments of the present invention, such as... Figure 5 As shown, the L-shaped auxiliary positioning baffle 2 includes a first stop arm 21 and a second stop arm 22 forming the L-shape. The first stop arm 21 and the second stop arm 22 intersect perpendicularly. Specifically:

[0065] The first stop arm 21 and the second stop arm 22 have a cross-sectional shape of an inverted L-shape, and the empty area of ​​the inverted L-shape is used to accommodate the side of the COC sample 6.

[0066] The upper surface of the pattern located in the gap area is made into a slope, and the distance between the tip of the slope and the upper surface of the COC sample stage 1 coupled to the bottom of the inverted L-shape is greater than or equal to the height of the edge of the COC sample 6; wherein, through holes 23 for gas guiding are also provided on the side walls of the first stop arm 21 or the second stop arm 22 from the tip of the slope. Figure 6 As shown, the height of the responding through-hole adjacent to the edge of COC sample 6 can be slightly lower, such as... Figure 7 As shown, the marked d becomes the surplus distance, thereby increasing the variety of applicable heat sink heights. For example, it can be used for thicknesses... Figure 7 The heat sink, which has a smaller thickness, is able to maintain the same wind pressure effect as the embodiments of the present invention.

[0067] Based on the above extended implementation, to improve the uniformity of the air pressure generated by the airflow relative to the upper surface of the COC sample 6, there is also a preferred implementation scheme. Multiple air-guiding holes 23 are arranged on the first baffle 21 and the second baffle 22 at preset intervals; the closer to the connection between the first baffle 21 and the second baffle 22, the smaller the spacing of the corresponding air-guiding holes 23. This is considering the inclusion of a pneumatic pump, whose outlet faces the surface of the COC sample 6 and is fixed to a corner area opposite the L-shaped auxiliary positioning baffle 2, blowing out airflow at a specified rate at a preset angle; wherein the air-guiding holes 23 are used to release the airflow blown by the pneumatic pump against the L-shaped auxiliary positioning baffle 2, forming a relatively balanced air pressure force on the surface of the COC sample 6. A schematic diagram of the corresponding air pressure and airflow direction is shown below. Figure 8 As shown.

[0068] Example 2:

[0069] This invention also provides a testing method for a COC high-frequency test stage, using the COC high-frequency test stage as described in Embodiment 1, such as... Figure 9 As shown, the test methods include:

[0070] In step 201, the COC sample 6 is fixed on the L-shaped auxiliary positioning baffle 2.

[0071] In step 202, the air outlet of the air pump faces the surface of the COC sample 6 and is fixed in a corner area opposite to the L-shaped auxiliary positioning baffle 2, blowing out an airflow at a specified rate at a preset angle.

[0072] The air guide hole 23 is used to release the airflow blown by the air pump against the L-shaped auxiliary positioning baffle 2, and to form a relatively balanced air pressure force on the surface of the COC sample 6.

[0073] In step 203, after the calibration process of the test equipment on the calibration plate is completed, the test of COC sample 6 begins. During the test, the temperature of COC sample 6 is monitored by the temperature control test probe 5, while the temperature control device 4 is controlled to keep the corresponding temperature monitoring value within the preset range.

[0074] The COC sample stage in this invention can accurately position the COC sample to be tested, adjust the horizontal and vertical positions of the calibration plate, increase the contact area between the COC sample and the COC test stage, which is beneficial for chip heat dissipation and ensures the accuracy and reliability of the test results.

[0075] Furthermore, based on the shared inventive concept with Embodiment 1, the related extended implementation schemes in Embodiment 1 are also applicable to the embodiments of the present invention. Therefore, the effects that can be achieved in the corresponding preferred solutions are also used in the embodiments of the present invention. That is, the calibration plate stage is precisely positioned by the metal baffle, which facilitates the search for open circuit, short circuit, and overload (OSL) positions on the calibration plate; the calibration plate stage has vacuum adsorption holes, all of which are connected to the internal gas path of the vacuum adsorption device, so as to prevent the calibration plate from moving during the test by vacuum adsorption.

[0076] Example 3:

[0077] The embodiments of this invention differ from Embodiment 1. These embodiments primarily present a relatively complete solution to the proposed approach in Embodiment 1 within a specific application scenario, tailored to the specific characteristics and requirements of real-world scenarios. In these embodiments, the object numbering from Embodiment 1 is retained, but the content is expanded based on the corresponding instance scenario. Therefore, there may be instances where the numbering order of certain parts is inconsistent. Please refer to... Figures 1-4 This invention provides a high-frequency testing stage and testing method that can stably fix COC samples and has good heat dissipation, including a COC sample stage 1, an auxiliary positioning baffle 2, a calibration plate stage 3, a vacuum adsorption device 31, a temperature control device 4, and a temperature testing probe 5. Specifically:

[0078] The COC sample stage 1 is used to place the COC sample and consists of two parts: one part has a metal film coated on its surface to provide the negative electrode for the COC sample. The chip 61 is not a coplanar structure, while the electrodes on the heat sink 60 are coplanar. The N-side electrode of the chip needs to be soldered to the heat sink first, and the P-side electrode of the chip is led to the positive electrode of the heat sink using gold wire 12. The bottom of the heat sink contacts the stage, and the non-coplanar chip is measured from the coplanar electrode of the heat sink; the other part is a metal auxiliary positioning baffle 2. When the COC is placed on the test stage, the COC is moved to the right angle at the intersection of the two metal baffles to fix the COC sample.

[0079] The calibration strip stage 3 is used to place calibration strips and is divided into three parts: the first part is the same as the COC sample stage, coated with a metal film, for placing calibration strips; the second part is two metal auxiliary positioning baffles 7 at the upper left corner, where the calibration strip 8 is placed at the right angle where the metal baffles intersect, and the horizontal and vertical positions of the calibration strip are adjusted; the third part is a vacuum adsorption device 31, with vacuum adsorption holes located on the upper and lower surfaces of the calibration strip carrier platform, and all vacuum adsorption holes are connected to the internal gas passage of the vacuum adsorption device.

[0080] The temperature control device 4 is placed at the bottom of the COC sample stage 1. The test stage surface is required to be flat and smooth, and the bottom of the heat sink 60 should fit well with the stage 1 to facilitate temperature conduction and achieve precise control of the COC sample ambient temperature.

[0081] The temperature control test probe 6 contacts an area on the heat sink 60 without electrodes. During the test, the chip generates heat when it is powered on, causing a difference between the chip's junction temperature and the ambient temperature. The heat generated by the chip's light emission is transferred to the heat sink soldered to the chip via thermal conduction. By measuring the temperature on the heat sink using the temperature control test probe, the actual temperature of each chip during the test can be determined.

[0082] In the above scheme, the COC sample stage can accurately position the COC sample under test, adjust the horizontal and vertical positions of the calibration plate, increase the contact area between the COC sample and the COC test stage, which is beneficial for chip heat dissipation and ensures the accuracy and reliability of the test results.

[0083] The calibration strip is precisely positioned using a metal baffle, making it easy to locate open circuits, short circuits, and overloads (OSL) on the calibration strip. The calibration strip stage has vacuum adsorption holes, which are all connected to the internal gas path of the vacuum adsorption device. The calibration strip is held in place by vacuum, preventing it from moving during testing.

[0084] A surface-mount NTC thermistor is soldered to the tip of the temperature control test probe to measure the actual temperature of the chip. The chip test setting temperature is then compensated to reduce test errors caused by temperature. A single temperature control probe can be used to test different COC samples, eliminating the need for additional thermistors on the COC samples, thus saving time and reducing costs.

[0085] Among them, chip 61 adopts COC packaging. First, the negative electrode of chip 61 is soldered to the negative electrode on the surface of heat sink 60, and then the positive electrode of chip 61 is led to the positive electrode of heat sink 60 by gold wire 12, that is, COC packaging, and non-coplanar chips are measured through the coplanar electrodes of heat sink.

[0086] The COC sample stage 1 has a smooth and flat surface without gaps, and good thermal conductivity. The COC sample to be tested is placed on the stage and moved between two metal baffles to position the sample. The horizontal and vertical positions of the chip 12 are adjusted to ensure the consistency of the test direction. At the same time, the COC sample can be fixed. The back of the heat sink 60 is in close contact with the stage 1, and the contact area between the heat sink and the stage is increased, which improves the heat dissipation of the chip.

[0087] The calibration plate stage 3 and calibration plate 8 are positioned between two metal auxiliary positioning baffles 7 to accurately locate the calibration plate under test. This facilitates the identification of open circuit, short circuit, and overload (OSL) positions on the calibration plate, eliminating the influence of the microwave probe on the high-frequency test, and thus calibrating the test. Due to the large size of the calibration plate and the limited space of the stage, the auxiliary positioning baffles 7 are much smaller than the calibration plate and cannot stabilize the calibration plate. Moreover, the open circuit, short circuit, and overload modes on the calibration plate are located at different positions. To locate different calibration modes, the lower surface of the calibration plate 8 needs to be attached to the vacuum adsorption device 31 to fix its position and prevent the calibration plate from moving back and forth.

[0088] Among them, the temperature control device 4 adopts TEC (thermal cooler) temperature control, which can achieve small size and precise temperature control. The target temperature of TEC is set, the difference between the current temperature and the target temperature is observed, and the PDI parameter is adjusted until the current temperature is as close as possible to the target temperature without oscillation.

[0089] The temperature control test probe 6 has a surface-mount NTC (negative temperature coefficient) thermistor 9 soldered to its tip. The surface-mount NTC thermistor 9 is temperature-sensitive and has a short response time. The temperature control test probe contacts the heat sink 60, which is essentially the thermistor 9 contacting the heat sink 60. Applying voltage to the probe allows for current measurement, resistance calculation, and the corresponding temperature (the actual temperature of the chip) obtained from a table. This temperature is then used to compensate for temperature-related test errors.

[0090] When using this device, first gently place the calibration sheet on a clean calibration sheet stage using tweezers, then gently place it against the auxiliary metal baffle. Adjust the horizontal and vertical positions of the calibration sheet, turn on the vacuum adsorption device, and fix the calibration sheet through the vacuum suction hole to avoid moving the stage and losing the initial position of the calibration sheet, which would increase the difficulty of subsequent operations. Move the stage under the CCD lens to find the open circuit, short circuit, and OSL (overload) positions, and subtract the influence of the microwave probe on high-frequency testing. Finally, release the vacuum, remove the calibration sheet, and place it in its original packaging box, keeping it clean for the next use. To test COC samples, first turn on the temperature control device TEC to maintain a constant temperature on the stage. Then, use the suction nozzle to hold the COC sample, place it on a flat sample stage, and simultaneously gently place the COC sample against the auxiliary metal baffle, adjusting its horizontal and vertical positions to ensure the chip's light emission direction is consistent, while keeping it close to the outside of the stage. Next, the temperature test probe is brought into contact with the positive electrode of the heat sink where the chip is not attached. During the test, the chip will generate some heat when it is powered on and emits light. This heat is transferred to the heat sink that is soldered to the chip by heat conduction. The actual temperature of the chip during the test can be measured by measuring the temperature on the heat sink through the temperature control test probe. The use of the temperature test probe also serves to further fix the COC sample.

[0091] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A stage for high-frequency testing of COC, characterized in that, Includes a COC sample stage (1), an L-shaped auxiliary positioning baffle (2), a calibration plate stage (3), a temperature control device (4), and a temperature control test probe (5), specifically: An L-shaped auxiliary positioning baffle (2) is provided on the COC sample stage (1) to move one corner and two sides of the COC sample (6) to the right angle of the L-shaped auxiliary positioning baffle (2) to complete the fixation of the COC sample (6); wherein, the COC sample (6) is composed of a heat sink (60) and a chip (61); The calibration plate stage (3) is used to place calibration plates and to calibrate the accuracy of peripheral equipment detection before testing; The temperature control device (4) is placed at the bottom of the COC sample stage (1), and the two are fixed together by thermally conductive adhesive; The temperature control test probe (5) contacts a designated area on the heat sink (60). During the test, the chip (61) generates heat when it is powered on and emits light, resulting in a difference between the junction temperature of the chip (61) and the ambient temperature. The heat generated by the chip (61) emitting light is transferred to the heat sink (60) soldered to the chip (61) through thermal conduction. The temperature on the heat sink (60) is measured by the temperature control test probe (5) to obtain the actual temperature of each chip during the test. The operating temperature of the chip (61) is indirectly adjusted by controlling the temperature control device (4) through conduction via the heat sink (60). The L-shaped auxiliary positioning baffle (2) includes a first baffle (21) and a second baffle (22) forming an L-shape. The first baffle (21) and the second baffle (22) intersect perpendicularly. The first baffle (21) and the second baffle (22) have a cross-section of an inverted L-shape. The empty area of ​​the inverted L-shape is used to accommodate the side of the COC sample (6). The upper surface of the shape in the empty area is made into a slope. The distance between the tip of the slope and the upper surface of the COC sample stage (1) coupled to the bottom of the inverted L-shape is greater than or equal to the height of the edge of the COC sample (6). The tip of the slope is provided with through holes (23) for gas guiding on the side walls of the first baffle (21) or the second baffle (22).

2. The COC high-frequency test stage according to claim 1, characterized in that, The calibration slide stage (3) specifically includes: The upper surface of the calibration slide stage (3) is coated with a metal film for placing calibration slides; An auxiliary positioning baffle (7) is provided at a right angle on the surface of the calibration plate stage (3). The calibration plate (8) is placed at the right angle of the auxiliary positioning baffle (7) to adjust the horizontal and vertical position of the calibration plate. The calibration plate stage (3) is provided with a vacuum adsorption hole (31) on the surface area where the calibration plate is placed. The vacuum adsorption hole (31) is connected to the internal gas passage of the vacuum adsorption device.

3. The COC high-frequency test stage according to claim 1, characterized in that, The temperature control test probe (5) contacts the area without electrodes on the heat sink (60). During the test, the chip (61) generates heat when it is powered on and emits light, resulting in a difference between the junction temperature of the chip (61) and the ambient temperature. The heat generated by the chip emitting light is transferred to the heat sink (60) soldered to the chip (61) through thermal conduction. The actual temperature of the chip (61) during the test can be measured by measuring the temperature on the heat sink through the temperature control test probe (5).

4. The COC high-frequency test stage according to claim 3, characterized in that, The temperature control test probe (5) has a surface-mount negative temperature coefficient NTC thermistor (9) soldered to its tip. The temperature control test probe (5) contacts the heat sink (60), which is actually the thermistor (9) contacting the heat sink (60). Voltage is applied to the probe, the current is measured, the resistance value is calculated, and the corresponding temperature is obtained from the table, which is the actual temperature of the chip (61).

5. The COC high-frequency test stage according to claim 1, characterized in that, The COC sample stage (1) also includes: The COC sample stage (1) is coated with a metal film to provide negative power to the COC sample (6). The chip (61) on the COC sample (6) is not a coplanar structure, while the electrodes on the heat sink (60) are coplanar. The N electrodes of the chip (61) need to be soldered to the heat sink first, and the P electrodes of the chip (61) are led to the upper surface of the heat sink with gold wire (62). The bottom of the heat sink is in contact with the stage, and the non-coplanar chip is measured from the coplanar electrodes of the heat sink.

6. The COC high-frequency test stage according to claim 1, characterized in that, The temperature control device (4) uses a semiconductor cooler (TEC) for temperature control.

7. The COC high-frequency test stage according to claim 1, characterized in that, There are multiple air guide holes (23), which are set on the first baffle (21) and the second baffle (22) at preset intervals; wherein, the closer to the connection between the first baffle (21) and the second baffle (22), the smaller the spacing of the corresponding air guide holes (23).

8. The COC high-frequency test stage according to claim 1, characterized in that, It also includes a pneumatic pump, the outlet of which faces the surface of the COC sample (6) and is fixed in a corner area opposite to the L-shaped auxiliary positioning baffle (2) to blow out airflow at a specified rate at a preset angle; The air guide hole (23) is used to release the airflow blown by the air pump against the L-shaped auxiliary positioning baffle (2) and form a relatively balanced air pressure force on the surface of the COC sample (6).

9. A testing method for a COC high-frequency test stage, characterized in that, Using the COC high-frequency test stage as described in claim 8, the test method includes: The COC sample (6) is fixed on the L-shaped auxiliary positioning baffle (2); The air outlet of the air pump faces the surface of the COC sample (6) and is fixed in a corner area opposite to the L-shaped auxiliary positioning baffle (2) to the COC sample (6), blowing out an airflow at a specified rate at a preset angle; The air guide hole (23) is used to release the airflow blown by the air pump against the L-shaped auxiliary positioning baffle (2) and form a relatively balanced air pressure force on the surface of the COC sample (6). After the calibration process of the test equipment on the calibration plate is completed, the test of COC sample (6) is started. During the test, the temperature of COC sample (6) is monitored by the temperature control test probe (5), and the temperature control device (4) is controlled to keep the corresponding temperature monitoring value within the preset range.

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