Geophone data processing circuit and seismic data processing method based on wavelet transform

Abstract

The application relates to a geophone data processing circuit and a seismic data processing method based on wavelet conversion, and solves the technical problems of low storage speed of seismic wave data detected by an existing geophone and complex data analysis process of an upper computer, and the method comprises the following steps: (1) seismic waves sensed by a geophone are converted into digital signals by an ADS1281 chip and transmitted into a ping-pong buffer area of an STM32F407 single-chip microcomputer through an SPI bus; (2) after the ping-pong buffer area is full, discrete wavelet conversion is performed on the time sequence of seismic data in the buffer area; (3) data output in the step 2 are written into an SDINBDG4 chip in a self-defined format of a MiniSEED standard seismic data exchange format; (4) data in the SDINBDG4 chip are read out through a GL823K card reader and transmitted to the upper computer; and (5) after wavelet conversion coefficients are analyzed by the upper computer, the original seismic data can be restored through inverse conversion of the wavelet conversion coefficients.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of seismic detectors, in particular to a detector data processing circuit and a seismic data processing method based on wavelet transform. BACKGROUND

[0002] No matter how the seismic exploration technology develops, as the most front-end component of the seismic exploration system, the detector is always the first to be needed and concerned. In the prior art, the detector mainly consists of a shell system, a magnetic system and an elastic mass system. The magnetic system enclosed in the shell system provides a relatively uniform and enclosed magnetic field for the coil in the elastic mass system. When the detector receives a vibration signal, the shell system part will vibrate with it. Due to the inertial action of the coil, the shell system and the coil have a relative displacement. According to the principle of electromagnetic induction, the two connection terminals on the core shell will output a voltage signal varying with the displacement, which will be recorded by the instrument as a seismic signal data. In the seismic exploration project, thousands of seismic signal data will be processed and analyzed to obtain useful seismic data, which provides a basis for later drilling or exploitation analysis.

[0003] Referring to the utility model patent with the patent number 2016211861371, in the prior art, the detector core has two signal output terminals, and the two signal output terminals are generally arranged on the top cover and designed to be left-right symmetrical.

[0004] The existing seismic data storage scheme is that the seismic wave data detected by the seismic detector is converted into a 24-bit or 32-bit integer digital signal by the ADS1281 chip, transmitted to the single-chip microcomputer through the SPI bus, packaged into the miniSEED format and written into the TF card. The specific interrupt logic is shown in FIG. 1. However, due to the limitation of the transmission rate of the storage medium (the storage speed of the data is low), the seismic data is generally directly stored in 24-bit or 32-bit integers without any processing. After the host computer analyzes the data, a complex process is still needed to analyze the data. SUMMARY

[0005] The present application is to solve the technical problems of low storage speed of the seismic wave data detected by the existing detector and complex data analysis process of the host computer, and provides a detector data processing circuit and a seismic data processing method based on wavelet transform.

[0006] The application provides a seismic data processing method based on wavelet transform, including a geophone data processing circuit, the geophone data processing circuit includes a preprocessing circuit, an ADS1281 chip, an STM32F407 single-chip microcomputer, a TS3A27518EPWR chip, an SDINBDG4 chip and a GL823K card reader, the input end of the preprocessing circuit is connected with the ADS1281 chip, and the output end of the ADS1281 chip is connected with the SPI interface of the STM32F407 single-chip microcomputer through an SPI bus;

[0007] The CLK pin of the STM32F407 single-chip microcomputer is connected with the 17th pin of the TS3A27518EPWR chip, the CMD pin of the STM32F407 single-chip microcomputer is connected with the 15th pin of the TS3A27518EPWR chip, the D0, D1, D2 and D3 pins of the STM32F407 single-chip microcomputer are connected with the 18th, 16th, 11th and 13th pins of the TS3A27518EPWR chip respectively, the COM5, COM6, COM1 and COM2 of the TS3A27518EPWR chip are connected with the DAT0, DAT1, DAT2 and DAT3 pins of the SDINBDG4 chip respectively, the COM4 pin of the TS3A27518EPWR chip is connected with the CLK pin of the SDINBDG4 chip, and the COM3 pin of the TS3A27518EPWR chip is connected with the CLD pin of the SDINBDG4 chip.

[0008] The D0, D1, D2 and D3 pins of the GL823K card reader are connected with the DAT0, DAT1, DAT2 and DAT3 pins of the SDINBDG4 chip respectively, the CLK pin of the GL823K card reader is connected with the CLK pin of the SDINBDG4 chip, the CMD pin of the GL823K card reader is connected with the CMD pin of the SDINBDG4 chip, and the DM and DP pins of the GL823K card reader are connected with the upper computer through a USB line.

[0009] The 5V pin of the GL823K card reader is grounded through a first resistor and a second resistor in series, the emitter of a triode is grounded, the node between the first resistor and the second resistor is connected with the base of the triode, the collector of the triode is pulled up by a seventh resistor and connected with a power supply, the IN1 and IN2 pins of the TS3A27518EPWR chip are both connected with the collector of the triode, the SD CON pin of the STM32F407 single-chip microcomputer is connected with the IN1 pin of the TS3A27518EPWR chip through a sixth resistor,

[0010] The wavelet transform-based seismic data processing method comprises the following steps:

[0011] Step 1, the seismic wave perceived by the seismic detector is converted into a digital signal by the ADS1281 chip and transmitted into the ping-pong buffer area of the STM32F407 single-chip microcomputer through the SPI bus;

[0012] Step 2, after the ping-pong buffer area is full, the discrete wavelet transform is performed on the time sequence of seismic data in the ping-pong buffer area;

[0013] Step 3, the data output in step 2 is written into the SDINBDG4 chip in the custom format of the MiniSEED standard seismic data exchange format;

[0014] Step 4, the data in the SDINBDG4 chip is read out by the GL823K card reader and transmitted to the upper computer;

[0015] Step 5, after the wavelet transform coefficients are parsed by the upper computer, the original seismic data can be restored by inversely transforming the wavelet transform coefficients.

[0016] Preferably, the sub-block for transmitting seismic data in the MiniSEED format specification is the SEED data sub-block, field 3 in the SEED data sub-block defines the encoding format, and field 5 defines the data record length; field 3 is set to the reserved value 41, so field 5 data record length is set to 2132. The application also provides a detector data processing circuit, comprising a preprocessing circuit, an ADS1281 chip, an STM32F407 single-chip microcomputer, a TS3A27518EPWR chip, an SDINBDG4 chip and a GL823K card reader, the input end of the preprocessing circuit is connected with the ADS1281 chip, and the output end of the ADS1281 chip is connected with the SPI interface of the STM32F407 single-chip microcomputer through the SPI bus;

[0017] The CLK pin of the STM32F407 microcontroller is connected to pin 17 of the TS3A27518EPWR chip. The CMD pin of the STM32F407 microcontroller is connected to pin 15 of the TS3A27518EPWR chip. The D0, D1, D2, and D3 pins of the STM32F407 microcontroller are connected to pins 18, 16, 11, and 13 of the TS3A27518EPWR chip, respectively. The COM5, COM6, COM1, and COM2 pins of the TS3A27518EPWR chip are connected to pins DAT0, DAT1, DAT2, and DAT3 of the SDINBDG4 chip, respectively. The COM4 pin of the TS3A27518EPWR chip is connected to the CLK pin of the SDINBDG4 chip. The COM3 pin of the TS3A27518EPWR chip is connected to the CLD pin of the SDINBDG4 chip. Pin connection;

[0018] The D0, D1, D2, and D3 pins of the GL823K card reader are connected to the DAT0, DAT1, DAT2, and DAT3 pins of the SDINBDG4 chip, respectively. The CLK pin of the GL823K card reader is connected to the CLK pin of the SDINBDG4 chip, and the CMD pin of the GL823K card reader is connected to the CMD pin of the SDINBDG4 chip. The DM and DP pins of the GL823K card reader are connected to the host computer via a USB cable.

[0019] The 5V pin of the GL823K card reader is grounded through a series first resistor and a second resistor. The emitter of the transistor is grounded, and the node between the first and second resistors is connected to the base of the transistor. The collector of the transistor is pulled up by a seventh resistor and connected to the power supply. The IN1 and IN2 pins of the TS3A27518EPWR chip are both connected to the collector of the transistor. The SD CON pin of the STM32F407 microcontroller is connected to the IN1 pin of the TS3A27518EPWR chip through a sixth resistor.

[0020] The beneficial effects of this invention are that, compared with the existing TF card storage technology, using eMMC to store data significantly improves the storage speed of seismic data and makes the seismic data stored on the lower-level computer easier to process and analyze subsequently. By using a high-speed embedded multimedia card (eMMC chip) as the storage medium, the seismic data is converted into 32-bit floating-point data. After each acquisition of a certain amount of seismic data, discrete wavelet transform is performed in time series form before storage, which facilitates rapid filtering, noise reduction, and compression of the seismic data by the upper-level computer. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 is a conventional data storage scheme in the prior art;

[0022] Figure 2 is a hardware schematic diagram of the data storage scheme of the present application;

[0023] Figure 3 is a circuit diagram of the pre-processing circuit part;

[0024] Figure 4 is an eMMC drive key circuit diagram in the data storage scheme of the present application;

[0025] Figure 5 is a total flow chart of wavelet forward and inverse transform of seismic data;

[0026] Figure 6 is a principle flow chart of multi-layer discrete wavelet transform;

[0027] Figure 7 is a structure diagram of 1000 sub-blocks;

[0028] Figure 8 is an interrupt logic diagram of data processing of the present application;

[0029] Figure 9 is the peak signal-to-noise ratio of reconstructed signals under different wavelet decomposition levels of each wavelet basis.

[0030] Symbol explanation in the figure: 1. geophone, 2. pre-processing circuit, 3. ADS1281 chip, 4. STM32F407 single-chip microcomputer, 5. multiplexer, 6. SDINBDG4 chip, 7. GL823K card reader, 8. host computer. DETAILED DESCRIPTION

[0031] The present application is further described in detail below with reference to the accompanying drawings. As shown in Figure 2, the hardware of the wavelet transform fast storage scheme of seismic data of the present application is that two signal output terminals of the geophone 1 are connected with the input terminals of the ADS1281 chip 3 through the pre-processing circuit 2, the output terminals of the ADS1281 chip 3 are connected with the SPI interface of the STM32F407 single-chip microcomputer 4 through the SPI bus, the IO port of the STM32F407 single-chip microcomputer 4 is connected with the data input port of the multiplexer 5, the data output port of the multiplexer 5 is connected with the data input port of the SDINBDG4 chip 6. The data input interface of the GL823K card reader 7 is connected with the data input interface of the SDINBDG4 chip 6.

[0032] The data output interface of the GL823K card reader 7 is connected with the host computer through the USB line.

[0033] As shown in FIG. 3, a specific implementation circuit of the pre-processing circuit 2, which is a conventional circuit in the art, is not described again.

[0034] As shown in FIG. 4, the multiplexer 5 selects the TS3A27518EPWR chip of Texas Instruments, the SDINBDG4 chip U3 is used as an eMMC (Embedded Multi Media Card), and the chip U2 is a GL823K card reader 7. The CLK pin of the STM32F407 single-chip microcomputer 4 is connected with the 17th pin of the TS3A27518EPWR chip U1, the CMD pin of the STM32F407 single-chip microcomputer 4 is connected with the 15th pin of the TS3A27518EPWR chip U1, the D0, D1, D2, D3 pins of the STM32F407 single-chip microcomputer 4 are respectively connected with the 18th, 16th, 11th, 13th pins of the TS3A27518EPWR chip U1, the COM5, COM6, COM1, COM2 of the TS3A27518EPWR chip U1 are respectively connected with the DAT0, DAT1, DAT2, DAT3 pins of the SDINBDG4 chip U3, the COM4 pin of the TS3A27518EPWR chip U1 is connected with the CLK pin of the SDINBDG4 chip U3, and the COM3 pin of the TS3A27518EPWR chip U1 is connected with the CLD pin of the SDINBDG4 chip U3.

[0035] The D0, D1, D2, D3 pins of the GL823K card reader 7 are respectively connected with the DAT0, DAT1, DAT2, DAT3 pins of the SDINBDG4 chip U3, the CLK pin of the GL823K card reader 7 is connected with the CLK pin of the SDINBDG4 chip U3, and the CMD pin of the GL823K card reader 7 is connected with the CMD pin of the SDINBDG4 chip U3. The DM, DP pins of the GL823K card reader 7 are connected with the host computer through the USB line.

[0036] The 5V pin of the GL823K card reader 7 is grounded through a first resistor R9 and a second resistor R8, the emitter of a transistor Q1 is grounded, the node between the first resistor R9 and the second resistor R8 is connected to the base of the transistor Q1, the collector of the transistor Q1 is pulled up to the power supply VDD3 through a seventh resistor R7, the IN1 and IN2 pins of the TS3A27518EPWR chip U1 are connected to the collector of the transistor Q1, and the SD CON pin of the STM32F407 microcontroller 4 is connected to the IN1 pin of the TS3A27518EPWR chip U1 through a sixth resistor R6. The chip selection of the TS3A27518EPWR chip U1 is controlled by the VUSB signal. When connected to the host computer, VUSB is high, Q1 is turned on, IN1 and IN2 of the TS3A27518EPWR chip U1 are both 0, NC1-6 is enabled, and the TS3A27518EPWR chip U1 is disconnected from the STM32F407 microcontroller 4. The SD CON pin of the STM32F407 microcontroller 4 inputs the enable state of the multiplexer to the STM32F407 microcontroller 4.

[0037] As shown in FIG. 5, the main process of the wavelet transform fast storage method of seismic data is:

[0038] Step 1: The seismic wave perceived by the geophone is converted into a digital signal by the ADS1281 chip and transmitted to the ping-pong buffer area of the STM32F407 microcontroller 4 through the SPI bus.

[0039] Step 2: After the ping-pong buffer area is full, the discrete wavelet transform is performed on the time series of seismic data in the ping-pong buffer area. The discrete wavelet transform algorithm is a mature algorithm in the prior art. The output parameters of the discrete wavelet transform algorithm include: Lv is the number of wavelet decomposition layers, Sig [len ] is a 32-bit floating-point seismic data sequence with a length of len, Hi [WL] and Lo [ WL] are wavelet basis high and low frequency coefficients with a length of WL respectively. The output data of the discrete wavelet transform algorithm is: Cw is the wavelet transform coefficient. Wherein Lv = 5, len = 512, WL = 6.

[0040] Step 3: The data output in step 2 is written into the SDINBDG4 chip U3 (i.e. written into the eMMC) in the custom format of the MiniSEED standard seismic data exchange format.

[0041] The sub-block for transmitting seismic data in the MiniSEED format specification is the SEED data sub-block, also referred to as a 1000 sub-block, which is composed as shown in Figure 7, wherein field 3 defines the encoding format, and field 5 defines the data record length.

[0042]

[0043] In order to make the wavelet transform coefficient format compatible with the encoding format in other MiniSEED standards, field 3 is set to the reserved value 41. The number of wavelet transform coefficients per 512 sampling points in the wavelet transform storage scheme is 533, so field 5, the data record length (bytes), is set to 2132.

[0044] Step 4: The data in the SDINBDG4 chip U3 is read by the GL823K card reader and transmitted to the upper computer.

[0045] Step 5: After the wavelet transform coefficients are parsed by the upper computer, wavelet analysis, wavelet denoising, etc. can be performed according to actual needs, and then the wavelet transform coefficients are inversely transformed to restore the original seismic data.

[0046] As described above, the seismic data transmitted to the single-chip microcomputer by SPI is converted into a 32-bit floating point, and after discrete wavelet transform, the wavelet coefficients are stored in the eMMC storage chip in the miniSEED format. This scheme improves the storage speed of seismic data, and makes the seismic data stored by the lower computer more easily processed and analyzed subsequently. The specific interrupt logic is shown in Figure 8.

[0047] Experiments were conducted on the foregoing method, and wavelet transform coefficients obtained by wavelet transform of collected seismic data with different decomposition levels using different wavelets (Harr wavelet, Coiflets series 'coif3', Symlets series'sym2', Daubechies series 'coif3', and Biorthogonal series 'bior4.4') were compressed and reconstructed using the same lossy compression algorithm. The peak signal-to-noise ratio comparison of the entire process is shown in Figure 9.

[0048] When the SPI interrupt receives a fixed number of seismic data transmitted back by the ADS1281, the seismic data sequence in the buffer area is subjected to 5-layer discrete wavelet decomposition using the 'db3' wavelet of the Daubechies series, which can maximize the fidelity during subsequent seismic data compression.

[0049] By comparing with the storage speed of prior art through experiment, the read-write speed of the seismograph using TF card storage and the seismograph using eMMC chip storage under exFAT file system is tested respectively under the same remaining hardware conditions. The total data amount M of writing into the storage card is 48MB, a plurality of blocks are written by single f_write(), the timer TIM3 of STM32F407 is counted once every 0.1ms, the total count value of each writing process is wrtime, and the calculation formula of the writing speed Speed is as formula (1). The experimental results are shown in Table 2.

[0050]

[0051] As can be seen from Table 2, the writing speed of the seismograph using eMMC as storage medium to store seismic data is higher than that of TF card.

[0052] The above description is only for the preferred embodiments of the application and is not used to limit the application, and the application can have various changes and variations for those skilled in the art.

Claims

1. A seismic data processing method based on wavelet transform, characterized in that, The system includes a detector data processing circuit, which comprises a preprocessing circuit, an ADS1281 chip, an STM32F407 microcontroller, a TS3A27518EPWR chip, an SDINBDG4 chip, and a GL823K card reader. The preprocessing circuit is connected to the input terminal of the ADS1281 chip, and the output terminal of the ADS1281 chip is connected to the SPI interface of the STM32F407 microcontroller via an SPI bus. The CLK pin of the STM32F407 microcontroller is connected to pin 17 of the TS3A27518EPWR chip, the CMD pin of the STM32F407 microcontroller is connected to pin 15 of the TS3A27518EPWR chip, and the D0, D1, D2, and D3 pins of the STM32F407 microcontroller are respectively connected to the TS3A27518EPWR chip. Pins 18, 16, 11, and 13 of the chip are connected. The COM5, COM6, COM1, and COM2 pins of the TS3A27518EPWR chip are connected to the DAT0, DAT1, DAT2, and DAT3 pins of the SDINBDG4 chip, respectively. The COM4 pin of the TS3A27518EPWR chip is connected to the CLK pin of the SDINBDG4 chip, and the COM3 pin of the TS3A27518EPWR chip is connected to the CLD pin of the SDINBDG4 chip. Pins D0, D1, D2, and D3 of the GL823K card reader are connected to the DAT0, DAT1, DAT2, and DAT3 pins of the SDINBDG4 chip, respectively. The CLK pin of the GL823K card reader is connected to the CLK pin of the SDINBDG4 chip, and the CMD pin of the GL823K card reader is connected to the CMD pin of the SDINBDG4 chip. Pin connections: The DM and DP pins of the GL823K card reader are connected to the host computer via a USB cable; the 5V pin of the GL823K card reader is grounded through a series first resistor and a second resistor; the emitter of the transistor is grounded; the node between the first and second resistors is connected to the base of the transistor; the collector of the transistor is pulled up by a seventh resistor connected to the power supply; the IN1 and IN2 pins of the TS3A27518EPWR chip are both connected to the collector of the transistor; the SD CON pin of the STM32F407 microcontroller is connected to the IN1 pin of the TS3A27518EPWR chip through a sixth resistor. The wavelet transform-based seismic data processing method includes the following steps: Step 1: The seismic waves sensed by the seismic detector are converted into digital signals by the ADS1281 chip and transmitted to the ping-pong buffer of the STM32F407 microcontroller via the SPI bus; Step 2: After the ping-pong buffer is full, perform discrete wavelet transform on the seismic data time series within the ping-pong buffer; Step 3: Write the data output in Step 2 into the SDINBDG4 chip in a custom format of the MiniSEED standard seismic data exchange format; Step 4: Read the data from the SDINBDG4 chip using the GL823K card reader and transmit it to the host computer; Step 5: After the host computer parses the wavelet transform coefficients, the original seismic data can be recovered by performing an inverse transform on the wavelet transform coefficients.

2. The wavelet transform-based seismic data processing method according to claim 1, characterized in that the sub-block used for transmitting seismic data in the MiniSEED format specification is the SEED data sub-block, in which field 3 defines the encoding format and field 5 defines the data record length; field 3 is set to the reserved value 41, so the data record length of field 5 is set to 2132.

3. A detector data processing circuit, characterized in that, The system includes a preprocessing circuit, an ADS1281 chip, an STM32F407 microcontroller, a TS3A27518EPWR chip, an SDINBDG4 chip, and a GL823K card reader. The preprocessing circuit is connected to the input terminal of the ADS1281 chip, and the output terminal of the ADS1281 chip is connected to the SPI interface of the STM32F407 microcontroller via an SPI bus. The CLK pin of the STM32F407 microcontroller is connected to pin 17 of the TS3A27518EPWR chip, the CMD pin of the STM32F407 microcontroller is connected to pin 15 of the TS3A27518EPWR chip, and the D0, D1, D2, and D3 pins of the STM32F407 microcontroller are connected to pins 18, 16, 11, and 13 of the TS3A27518EPWR chip, respectively. The pin connections are as follows: COM5, COM6, COM1, and COM2 of the TS3A27518EPWR chip are connected to DAT0, DAT1, DAT2, and DAT3 pins of the SDINBDG4 chip, respectively; COM4 of the TS3A27518EPWR chip is connected to the CLK pin of the SDINBDG4 chip; and COM3 of the TS3A27518EPWR chip is connected to the CLD pin of the SDINBDG4 chip. Similarly, the D0, D1, D2, and D3 pins of the GL823K card reader are connected to the DAT0, DAT1, DAT2, and DAT3 pins of the SDINBDG4 chip, respectively; the CLK pin of the GL823K card reader is connected to the CLK pin of the SDINBDG4 chip; the CMD pin of the GL823K card reader is connected to the CMD pin of the SDINBDG4 chip; and the DM and DP pins of the GL823K card reader are connected to the SDINBDG4 chip. The pins are connected to the host computer via a USB cable; the 5V pin of the GL823K card reader is grounded through a first resistor and a second resistor connected in series, the emitter of the transistor is grounded, the node between the first resistor and the second resistor is connected to the base of the transistor, the collector of the transistor is pulled up by a seventh resistor connected to the power supply, the IN1 and IN2 pins of the TS3A27518EPWR chip are both connected to the collector of the transistor, and the SD CON pin of the STM32F407 microcontroller is connected to the IN1 pin of the TS3A27518EPWR chip through a sixth resistor.

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