Backplane online upgrade method, device, equipment and medium

Abstract

This application discloses a method, apparatus, device, and medium for online backplane upgrades, relating to the field of computer technology. The method includes: receiving an online upgrade command and filtering out the target backplane soft core address corresponding to the online upgrade command; determining the target soft core channel and target hard core channel corresponding to the target backplane soft core address from soft core channels and hard core channels connected to the motherboard; closing the target soft core channel and opening the target hard core channel to upgrade the target backplane corresponding to the online upgrade command through the target hard core channel, obtaining an upgraded backplane; and closing the target hard core channel and opening the target soft core channel. When multiple identical backplanes exist in the same group of I2C BUS, the above solution, utilizing the target backplane soft core address and switching between soft core channels and hard core channels, enables low-cost and low-complexity backplane upgrades.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a method, apparatus, equipment, and medium for online backplane upgrades. Background Technology

[0002] In current server systems, to achieve diverse hard drive storage configurations, multiple backplanes are typically used in combination based on a general-purpose server motherboard. This often results in scenarios where multiple identical backplanes exist within a single server device. Furthermore, to ensure the operability and convenience of maintaining the backplane CPLD (Complex Programmable Logic Device) code, online upgrades of the backplane are sometimes necessary. Backplane CPLDs often use I2C (Inter-Integrated Circuit) buses for online upgrades. However, because the CPLD's built-in I2C hard core cannot have its I2C address modified via external circuitry after compilation, connecting multiple identical backplanes under the same I2C bus can lead to I2C address conflicts, preventing online upgrades of the CPLD.

[0003] To resolve address conflicts, one approach is to connect each backplane to a different I2C bus. However, this increases the complexity of the design as more backplanes are required. Another approach is to connect multiple backplanes to the same I2C bus and add an I2C switch chip to the motherboard. However, motherboard space is very limited, which inevitably increases costs.

[0004] In summary, how to achieve low-cost and low-complexity backplane upgrades when multiple identical backplanes exist in the same I2C BUS group is a problem that needs to be solved in this field. Summary of the Invention

[0005] In view of this, the purpose of this invention is to provide a method, apparatus, device, and medium for online backplane upgrades, enabling low-cost and low-complexity backplane upgrades when multiple identical backplanes exist in the same group of I2C buses. The specific solution is as follows:

[0006] Firstly, this application discloses a backplane online upgrade method, including:

[0007] Receive online upgrade instructions and filter out the target backplane soft core address corresponding to the online upgrade instructions;

[0008] The target soft core channel and target hard core channel corresponding to the target backplane soft core address are determined from the soft core channels and hard core channels connected to the motherboard;

[0009] close the target soft core channel and open the target hard core channel, so as to upgrade the target backboard corresponding to the online upgrade instruction through the target hard core channel to obtain an upgraded backboard;

[0010] close the target hard core channel and open the target soft core channel.

[0011] Optionally, the receiving the online upgrade instruction and screening the target backboard soft core address corresponding to the online upgrade instruction comprises:

[0012] determining the potential state of each preset pin in the corresponding backboard by using the backboard serial number, so as to determine the soft core address of each backboard by using the potential state;

[0013] receiving the online upgrade instruction and screening the target backboard soft core address corresponding to the online upgrade instruction from the soft core address of each backboard.

[0014] Optionally, the determining the potential state of each preset pin in the corresponding backboard by using the backboard serial number comprises:

[0015] building each backboard based on a complex programmable logic device and determining the backboard serial number corresponding to each backboard;

[0016] determining the potential state of each preset pin in the corresponding backboard by using the backboard serial number.

[0017] Optionally, the determining the target soft core channel and the target hard core channel corresponding to the target backboard soft core address from the soft core channel and the hard core channel connected to the mainboard comprises:

[0018] determining the target soft core channel corresponding to the target backboard soft core address from the soft core channel connected to the mainboard;

[0019] determining the target hard core channel corresponding to the target soft core channel from the hard core channel connected to the mainboard.

[0020] Optionally, before the closing the target soft core channel and opening the target hard core channel, the method further comprises:

[0021] establishing a register for controlling the soft core channel switch;

[0022] correspondingly, the closing the target soft core channel and opening the target hard core channel comprises:

[0023] A preset shutdown command corresponding to the target soft core channel is sent to the register, so that when the target backplane corresponding to the target soft core channel detects that the preset shutdown command has been received in the register, the preset switching signal in the register is set to a high potential, and the field-effect transistor in the register is turned on, so that the target soft core channel is turned off and the target hard core channel is turned on.

[0024] Optionally, closing the target hard core channel and opening the target soft core channel includes:

[0025] A preset enable command corresponding to the target soft core channel is sent to the register so that when the target backplane detects that the preset enable command has been received in the register, the preset switching signal is set to a low potential and the field-effect transistor is turned off, thereby enabling the target soft core channel and turning off the target hard core channel.

[0026] Optionally, before receiving the online upgrade command and filtering out the target backplane soft core address corresponding to the online upgrade command, the method further includes:

[0027] Connect the motherboard connectors to the connectors on each backplane using the pre-set cables.

[0028] Secondly, this application discloses a backplane online upgrade device, comprising:

[0029] The soft core address filtering module is used to receive online upgrade instructions and filter out the target backplane soft core address corresponding to the online upgrade instructions;

[0030] The channel determination module is used to determine the target soft core channel and the target hard core channel corresponding to the target backplane soft core address from the soft core channels and hard core channels connected to the motherboard;

[0031] The backplane upgrade module is used to disable the target soft core channel and enable the target hard core channel so that the target backplane corresponding to the online upgrade command can be upgraded through the target hard core channel to obtain the upgraded backplane.

[0032] The channel switching module is used to shut down the target hard core channel and open the target soft core channel.

[0033] Thirdly, this application discloses an electronic device, comprising:

[0034] Memory, used to store computer programs;

[0035] A processor is used to execute the computer program to implement the steps of the aforementioned disclosed backplane online upgrade method.

[0036] Fourthly, this application discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, it implements the steps of the aforementioned disclosed backplane online upgrade method.

[0037] The beneficial effects of this application are as follows: It receives an online upgrade command and filters out the target backplane soft core address corresponding to the online upgrade command; it determines the target soft core channel and target hard core channel corresponding to the target backplane soft core address from the soft core channels and hard core channels connected to the motherboard; it closes the target soft core channel and opens the target hard core channel so that the target backplane corresponding to the online upgrade command can be upgraded through the target hard core channel to obtain the upgraded backplane; it closes the target hard core channel and opens the target soft core channel. Therefore, because the soft core address has the characteristic that it can still be modified after compilation, that is, the soft core address can have the characteristic of being unique, this application uses the target soft core address to lock the corresponding target soft core channel and target hard core channel. After switching the soft and hard core channels, the target backplane corresponding to the online upgrade command can be upgraded without adding additional I2C BUS and I2CSwitch chips to distinguish each backplane. Therefore, even when there are multiple identical backplanes in the same group of I2C BUS, this application can achieve low-cost and low-complexity backplane upgrades. Attached Figure Description

[0038] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0039] Figure 1 This is a flowchart of a backplane online upgrade method disclosed in this application;

[0040] Figure 2 This is a specific hardware circuit block diagram disclosed in this application;

[0041] Figure 3 This application discloses a specific online backplane upgrade method flowchart;

[0042] Figure 4 This is a schematic diagram of the backplane online upgrade device disclosed in this application;

[0043] Figure 5 This is a structural diagram of an electronic device disclosed in this application. Detailed Implementation

[0044] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0045] In current server systems, to achieve diverse hard drive storage configurations, multiple backplanes are typically used in combination based on a general-purpose server motherboard. This often results in scenarios where multiple backplanes of the same type are used in a single server device. Furthermore, to ensure the operability and convenience of backplane CPLD code maintenance, online upgrades of the backplanes are sometimes necessary. Backplane CPLDs often use I2C bus for online upgrades. However, because the CPLD's built-in I2C hard core cannot have its I2C address modified by external circuitry after compilation, connecting multiple identical backplanes under the same I2C bus can lead to I2C address conflicts, preventing online CPLD upgrades.

[0046] To resolve address conflicts, one approach is to connect each backplane to a different I2C bus. However, this increases the complexity of the design as more backplanes are required. Another approach is to connect multiple backplanes to the same I2C bus and add an I2C switch chip to the motherboard. However, motherboard space is very limited, which inevitably increases costs.

[0047] Therefore, this application provides a backplane online upgrade solution, which enables low-cost and low-complexity backplane upgrades when multiple identical backplanes exist in the same group of I2C BUS.

[0048] See Figure 1 As shown in the figure, this application discloses an online backplane upgrade device, including:

[0049] Step S11: Receive the online upgrade command and filter out the target backplane soft core address corresponding to the online upgrade command.

[0050] In this embodiment, before receiving the online upgrade command and filtering out the target backplane soft core address corresponding to the online upgrade command, the method further includes: connecting the motherboard's connector to the connectors of each backplane using a preset cable. For example... Figure 2The specific hardware circuit block diagram shown has four identical backplanes, namely backplane 1, backplane 2, backplane 3, and backplane 4. The motherboard connector (Intelligent Platform Management Bus, or IPMB) is connected to the connectors (IPMB) of each backplane using pre-defined cables. Each backplane contains hard-core I2C and soft-core I2C channels, and the motherboard connector signals and backplane connector signals can be determined as shown in the table below:

[0051] Table 1

[0052]

[0053]

[0054] In this embodiment, receiving the online upgrade command and filtering out the target backplane soft core address corresponding to the online upgrade command includes: determining the potential state of each preset pin in the corresponding backplane using the backplane serial number, so as to determine the soft core address of each backplane through the potential state; receiving the online upgrade command and filtering out the target backplane soft core address corresponding to the online upgrade command from the soft core addresses of each backplane. The potential state of each preset pin (Add0, Add1PIN) in the corresponding backplane is determined according to the backplane serial number. The potential state can be either grounded or floating. Figure 2 It contains four identical backplanes. The Add0 and Add1 pins of backplane 1 are grounded and grounded, respectively; the Add0 and Add1 pins of backplane 2 are grounded and floating, respectively; the Add0 and Add1 pins of backplane 3 are floating and grounded, respectively; and the Add0 and Add1 pins of backplane 4 are floating and floating, respectively. Different values ​​are assigned to different level states, for example, floating is 1 and ground is 0. The soft core address of each backplane is determined by the level state, as shown in the table below:

[0055] Table 2

[0056] Add0 Add1 Softcore address Backplane 1 Ground 0 Ground 0 0xC8 Backplane 2 Ground 0 Don't care 1 0xCA Backplane 3 Don't care 1 Ground 0 0xCC Backplane 4 Don't care 1 Don't care 1 0xCE

[0057] In this embodiment, determining the potential state of each preset pin in the corresponding backplane using the backplane serial number includes: building each backplane based on a complex programmable logic device and determining the backplane serial number corresponding to each backplane; and determining the potential state of each preset pin in the corresponding backplane using the backplane serial number. Understandably, the programming address must be a hard core address, i.e., a hard core I2C address, and it cannot be modified once compiled. Since the hard core addresses of the same backplane are the same, when there are multiple identical backplanes in the same group of I2C BUS, it is impossible to determine the target backplane to be upgraded based on the hard core address. Therefore, among the multiple identical backplanes in the same group of I2C BUS, a unique address is needed to determine the target backplane. Thus, among the multiple identical backplanes in the same group of I2C BUS, the backplane serial number should be unique, so that its corresponding soft core address is unique among the same backplane. That is, the soft core addresses of multiple identical backplanes in the same group of I2C BUS are all different. The soft core address can also be modified to be unique among the soft core addresses of all backplanes, i.e., the soft core addresses of all backplanes are different.

[0058] Step S12: Determine the target soft core channel and target hard core channel corresponding to the target backplane soft core address from the soft core channels and hard core channels connected to the motherboard.

[0059] Once the target backplane soft core address corresponding to the online upgrade command is determined, the corresponding target soft core channel can be identified, and subsequently, the target hard core channel corresponding to the target soft core channel can be determined. Therefore, the backplane upgraded subsequently through the target hard core channel is the target backplane corresponding to the online upgrade command. It is evident that this embodiment utilizes the unique characteristic that the soft core address can be modified, achieving the goal of backplane upgrade without increasing cost or complexity.

[0060] Step S13: Close the target soft core channel and open the target hard core channel so that the target backplane corresponding to the online upgrade command can be upgraded through the target hard core channel to obtain the upgraded backplane.

[0061] It is important to note that the motherboard I2C BUS is connected to the soft-core I2C channel of the backplane CPLD by default, while the hard-core I2C channel is disconnected. Therefore, after identifying the target soft-core channel and the target hard-core channel, it is necessary to close the target soft-core channel and open the target hard-core channel. In other words, it is necessary to switch between the soft and hard core channels so that the target backplane corresponding to the online upgrade command can be upgraded through the target hard-core channel.

[0062] Step S14: Close the target hard core channel and open the target soft core channel.

[0063] In this embodiment, after the target backplane is upgraded, the target hard core channel needs to be shut down and the target soft core channel needs to be enabled so that other backplanes can continue to be upgraded. This embodiment can reduce the motherboard space burden and material costs, and achieve online upgrades of multiple backplane CPLDs of the same type under the same I2C BUS in the simplest way without an I2C switch chip.

[0064] The beneficial effects of this application are as follows: It receives an online upgrade command and filters out the target backplane soft core address corresponding to the online upgrade command; it determines the target soft core channel and target hard core channel corresponding to the target backplane soft core address from the soft core channels and hard core channels connected to the motherboard; it closes the target soft core channel and opens the target hard core channel so that the target backplane corresponding to the online upgrade command can be upgraded through the target hard core channel to obtain the upgraded backplane; it closes the target hard core channel and opens the target soft core channel. Therefore, because the soft core address has the characteristic that it can still be modified after compilation, that is, the soft core address can have the characteristic of being unique, this application uses the target soft core address to lock the corresponding target soft core channel and target hard core channel. After switching the soft and hard core channels, the target backplane corresponding to the online upgrade command can be upgraded without adding additional I2C BUS and I2CSwitch chips to distinguish each backplane. Therefore, even when there are multiple identical backplanes in the same group of I2C BUS, this application can achieve low-cost and low-complexity backplane upgrades.

[0065] See Figure 3 As shown in the figure, this application discloses a specific method for online backplane upgrades, including:

[0066] Step S21: Receive the online upgrade command and filter out the target backplane soft core address corresponding to the online upgrade command.

[0067] For a more detailed description of the working process of step S21, please refer to the relevant content disclosed in the foregoing embodiments, which will not be repeated here.

[0068] Step S22: Determine the target soft core channel corresponding to the target backplane soft core address from the soft core channels connected to the motherboard.

[0069] In this embodiment, the backplane soft core address of each backplane can be modified to be different in advance, that is, the backplane soft core address is unique. Therefore, the corresponding target soft core channel can be determined based on the unique target backplane soft core address.

[0070] Step S23: Determine the target hard core channel corresponding to the target soft core channel from the hard core channels connected to the motherboard.

[0071] Because each backplane CPID contains one soft core channel and one hard core channel, once the soft core channel is determined, the corresponding hard core channel can be determined.

[0072] Step S24: Close the target soft core channel and open the target hard core channel so that the target backplane corresponding to the online upgrade command can be upgraded through the target hard core channel to obtain the upgraded backplane.

[0073] In this embodiment, before closing the target soft core channel and opening the target hard core channel, the method further includes: establishing a register for controlling the switching of the soft core channel; correspondingly, closing the target soft core channel and opening the target hard core channel includes: sending a preset shutdown command corresponding to the target soft core channel to the register, so that when the target backplane corresponding to the target soft core channel detects that the preset shutdown command has been received in the register, the preset switching signal in the register is set to a high potential, and the field-effect transistor in the register is turned on, so that the target soft core channel is closed and the target hard core channel is opened. To enable switching between soft and hard core channels, a register 0xAA can be defined in the soft core I2C to control the switching of the soft core channel. When it is necessary to close the target soft core channel, a preset close instruction corresponding to the target soft core channel is written to register 0xAA. The preset close instruction is, for example, 0x01. In this way, when the target backplane detects that 0x01 has been written to register 0xAA, it sets the preset switching signal I2C_EN in register 0xAA to a high level and turns on the field-effect transistor (MOSFET) in register 0xAA, so that the motherboard I2C BUS and the target hard core I2C channel are connected.

[0074] Step S25: Close the target hard core channel and open the target soft core channel.

[0075] In this embodiment, closing the target hard core channel and opening the target soft core channel includes: sending a preset enable command corresponding to the target soft core channel to the register, so that when the target backplane detects that the preset enable command has been received in the register, it sets the preset switching signal to a low potential and turns off the field-effect transistor, thereby enabling the target soft core channel and closing the target hard core channel. Understandably, before upgrading, the target soft core channel needs to be shut down and the target hard core channel needs to be enabled. This means setting the preset switching signal I2C_EN in register 0xAA to a high level and turning on the field-effect transistor in register 0xAA. Therefore, after upgrading, the target backplane needs to shut down the target hard core channel and enable the target soft core channel. The specific process is to write the preset enable instruction corresponding to the target soft core channel into register 0xAA. For example, the preset enable instruction is 0x00. When the target backplane detects that 0x00 has been written into register 0xAA, it sets the preset switching signal I2C_EN in register 0xAA to a low level and turns off the field-effect transistor in register 0xAA, thus enabling the target soft core channel and shutting down the target hard core channel.

[0076] Therefore, since the soft core address can still be modified after compilation, that is, the soft core address can be unique, this application uses the target soft core address to lock the corresponding target soft core channel and target hard core channel. After switching the soft and hard core channels, the target backplane corresponding to the online upgrade command can be upgraded. This can reduce the motherboard space burden and material cost, and achieve the simplest online upgrade of multiple backplane CPLDs of the same type under the same I2CBUS without an I2C switch chip.

[0077] See Figure 4 As shown in the figure, this application discloses an online backplane upgrade device, including:

[0078] The soft core address filtering module 11 is used to receive online upgrade instructions and filter out the target backplane soft core address corresponding to the online upgrade instructions;

[0079] The channel determination module 12 is used to determine the target soft core channel and the target hard core channel corresponding to the target backplane soft core address from the soft core channels and hard core channels connected to the motherboard;

[0080] Backplane upgrade module 13 is used to close the target soft core channel and open the target hard core channel so that the target backplane corresponding to the online upgrade command can be upgraded through the target hard core channel to obtain the upgraded backplane;

[0081] The channel switching module 14 is used to close the target hard core channel and open the target soft core channel.

[0082] The beneficial effects of this application are as follows: It receives an online upgrade command and filters out the target backplane soft core address corresponding to the online upgrade command; it determines the target soft core channel and target hard core channel corresponding to the target backplane soft core address from the soft core channels and hard core channels connected to the motherboard; it closes the target soft core channel and opens the target hard core channel so that the target backplane corresponding to the online upgrade command can be upgraded through the target hard core channel to obtain the upgraded backplane; it closes the target hard core channel and opens the target soft core channel. Therefore, because the soft core address has the characteristic that it can still be modified after compilation, that is, the soft core address can have the characteristic of being unique, this application uses the target soft core address to lock the corresponding target soft core channel and target hard core channel. After switching the soft and hard core channels, the target backplane corresponding to the online upgrade command can be upgraded without adding additional I2C BUS and I2CSwitch chips to distinguish each backplane. Therefore, even when there are multiple identical backplanes in the same group of I2C BUS, this application can achieve low-cost and low-complexity backplane upgrades.

[0083] In some specific embodiments, the soft core address filtering module 11 includes:

[0084] The soft core address determination submodule is used to determine the potential state of each preset pin in the corresponding backplane using the backplane serial number, so as to determine the soft core address of each backplane through the potential state.

[0085] The target soft core address determination unit is used to receive online upgrade instructions and filter out the target backplane soft core address corresponding to the online upgrade instructions from the soft core addresses of each backplane.

[0086] In some specific embodiments, the soft core address determination submodule includes:

[0087] The backplane serial number determination unit is used to build each backplane based on complex programmable logic devices and determine the backplane serial number corresponding to each backplane.

[0088] The potential state determination unit is used to determine the potential state of each preset pin in the backplane using the backplane serial number.

[0089] In some specific embodiments, the channel determination module 12 includes:

[0090] The soft core channel determination unit is used to determine the target soft core channel corresponding to the target backplane soft core address from the soft core channels connected to the motherboard;

[0091] The hard core channel determination unit is used to determine the target hard core channel corresponding to the target soft core channel from the hard core channels connected to the motherboard.

[0092] In some specific embodiments, the backplane online upgrade device further includes:

[0093] The register creation unit is used to create registers for controlling the soft-core channel switching;

[0094] In some specific embodiments, the backplane upgrade module 13 includes:

[0095] The first channel switching unit is used to send a preset shutdown command corresponding to the target soft core channel to the register, so that when the target backplane corresponding to the target soft core channel detects that the preset shutdown command has been received in the register, it sets the preset shutdown signal in the register to a high potential and turns on the field-effect transistor in the register, so that the target soft core channel is turned off and the target hard core channel is turned on.

[0096] In some specific embodiments, the channel switching module 14 includes:

[0097] The second channel switching unit is used to send a preset enable command corresponding to the target soft core channel to the register, so that when the target backplane detects that the preset enable command has been received in the register, it sets the preset disable signal to a low potential and turns off the field-effect transistor, thereby enabling the target soft core channel and disabling the target hard core channel.

[0098] In some specific embodiments, the backplane online upgrade device further includes:

[0099] The connection unit is used to connect the motherboard connector to the connectors of each backplane using pre-set cables.

[0100] Furthermore, embodiments of this application also provide an electronic device. Figure 5 This is a structural diagram of an electronic device 20 according to an exemplary embodiment. The content of the diagram should not be construed as limiting the scope of this application.

[0101] Figure 5 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Specifically, it may include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 stores a computer program, which is loaded and executed by the processor 21 to implement the following steps:

[0102] Receive online upgrade instructions and filter out the target backplane soft core address corresponding to the online upgrade instructions;

[0103] The target soft core channel and target hard core channel corresponding to the target backplane soft core address are determined from the soft core channels and hard core channels connected to the motherboard;

[0104] The target soft core channel is closed, and the target hard core channel is opened so that the target backplane corresponding to the online upgrade command can be upgraded through the target hard core channel to obtain the upgraded backplane;

[0105] The target hard core channel is closed, and the target soft core channel is opened.

[0106] In some specific embodiments, the processor executes a computer program stored in the memory, specifically implementing the following steps:

[0107] The potential state of each preset pin in the backplane is determined by the backplane serial number, so as to determine the soft core address of each backplane by the potential state.

[0108] Receive online upgrade instructions and filter out the target backplane soft core address corresponding to the online upgrade instructions from the soft core addresses of each backplane.

[0109] In some specific embodiments, the processor executes a computer program stored in the memory, specifically implementing the following steps:

[0110] Each backplane is constructed based on a complex programmable logic device, and the backplane number corresponding to each backplane is determined.

[0111] The potential state of each preset pin in the backplane is determined by the backplane number.

[0112] In some specific embodiments, the processor executes a computer program stored in the memory, specifically implementing the following steps:

[0113] The target soft core channel corresponding to the target backplane soft core address is determined from the soft core channels connected to the motherboard;

[0114] The target hard core channel corresponding to the target soft core channel is determined from the hard core channels connected to the motherboard.

[0115] In some specific embodiments, the processor executes a computer program stored in the memory, specifically implementing the following steps:

[0116] Establish a register for controlling the soft-core channel switching;

[0117] Accordingly, closing the target soft core channel and opening the target hard core channel includes:

[0118] A preset shutdown command corresponding to the target soft core channel is sent to the register, so that when the target backplane corresponding to the target soft core channel detects that the preset shutdown command has been received in the register, the preset switching signal in the register is set to a high potential, and the field-effect transistor in the register is turned on, so that the target soft core channel is turned off and the target hard core channel is turned on.

[0119] In some specific embodiments, the processor executes a computer program stored in the memory, specifically implementing the following steps:

[0120] A preset enable command corresponding to the target soft core channel is sent to the register so that when the target backplane detects that the preset enable command has been received in the register, the preset switching signal is set to a low potential and the field-effect transistor is turned off, thereby enabling the target soft core channel and turning off the target hard core channel.

[0121] In some specific embodiments, the processor, by executing a computer program stored in the memory, may further include the following steps:

[0122] Connect the motherboard connectors to the connectors on each backplane using the pre-set cables.

[0123] In this embodiment, the power supply 23 is used to provide operating voltage for various hardware devices on the electronic device; the communication interface 24 can create a data transmission channel between the electronic device and external devices, and the communication protocol it follows can be any communication protocol applicable to the technical solution of this application, and is not specifically limited here; the input / output interface 25 is used to acquire external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs, and is not specifically limited here.

[0124] The processor 21 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 21 may be implemented using at least one hardware form selected from DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). The processor 21 may also include a main processor and a coprocessor. The main processor, also known as a CPU (Central Processing Unit), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 21 may integrate a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content to be displayed on the screen. In some embodiments, the processor 21 may also include an AI (Artificial Intelligence) processor, which is used to handle computational operations related to machine learning.

[0125] In addition, the memory 22, as a carrier for resource storage, can be a read-only memory, random access memory, disk or optical disk, etc. The resources stored on it include operating system 221, computer program 222 and data 223, etc., and the storage method can be temporary storage or permanent storage.

[0126] The operating system 221 manages and controls the various hardware devices and computer programs 222 on the electronic device to enable the processor 21 to perform calculations and processing on the massive amounts of data 223 in the memory 22. The operating system can be Windows, Unix, Linux, etc. The computer program 222, in addition to including a computer program capable of performing the backplane online upgrade method executed by the electronic device as disclosed in any of the foregoing embodiments, may further include computer programs capable of performing other specific tasks. The data 223 may include data received by the electronic device from external devices, as well as data collected by its own input / output interface 25.

[0127] Furthermore, embodiments of this application also disclose a computer-readable storage medium storing a computer program. When the computer program is loaded and executed by a processor, it implements the method steps performed during the backplane online upgrade process disclosed in any of the foregoing embodiments.

[0128] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0129] The foregoing has provided a detailed description of the backplane online upgrade method, apparatus, device, and medium provided by the present invention. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A method for online backplane upgrades, characterized in that, include: Receive online upgrade instructions and filter out the target backplane soft core address corresponding to the online upgrade instructions; The target soft core channel and target hard core channel corresponding to the target backplane soft core address are determined from the soft core channels and hard core channels connected to the motherboard; The target soft core channel is closed, and the target hard core channel is opened so that the target backplane corresponding to the online upgrade command can be upgraded through the target hard core channel to obtain the upgraded backplane; Close the target hard core channel and open the target soft core channel; The step of receiving the online upgrade command and filtering out the target backplane soft core address corresponding to the online upgrade command further includes: The motherboard connector is connected to the connectors of each backplane using pre-set cables; each backplane contains hard core I2C and soft core I2C hard core channels and soft core channels; the hard core addresses of the same backplane are the same, but the soft core addresses are different. The step of receiving the online upgrade command and filtering out the target backplane soft core address corresponding to the online upgrade command includes: The potential state of each preset pin in the backplane is determined by the backplane serial number, so as to determine the soft core address of each backplane by the potential state; the potential state includes ground state and floating state; Receive online upgrade instructions and filter out the target backplane soft core address corresponding to the online upgrade instructions from the soft core addresses of each backplane; The step of determining the potential state of each preset pin in the backplane using the backplane serial number includes: Each backplane is constructed based on a complex programmable logic device, and the backplane number corresponding to each backplane is determined. The potential state of each preset pin in the backplane is determined by the backplane number. Before closing the target soft core channel and opening the target hard core channel, the method further includes: Establish a register for controlling the soft-core channel switching; Accordingly, closing the target soft core channel and opening the target hard core channel includes: A preset shutdown command corresponding to the target soft core channel is sent to the register. When the target backplane corresponding to the target soft core channel detects that the preset shutdown command has been received in the register, a preset switching signal in the register is set to a high potential, and the field-effect transistor in the register is turned on, thereby shutting down the target soft core channel and turning on the target hard core channel. The step of closing the target hard core channel and opening the target soft core channel includes: A preset enable command corresponding to the target soft core channel is sent to the register so that when the target backplane detects that the preset enable command has been received in the register, the preset switching signal is set to a low potential and the field-effect transistor is turned off, thereby enabling the target soft core channel and turning off the target hard core channel.

2. The backplane online upgrade method according to claim 1, characterized in that, The step of determining the target soft core channel and target hard core channel corresponding to the target backplane soft core address from the soft core channels and hard core channels connected to the motherboard includes: The target soft core channel corresponding to the target backplane soft core address is determined from the soft core channels connected to the motherboard; The target hard core channel corresponding to the target soft core channel is determined from the hard core channels connected to the motherboard.

3. A backplane online upgrade device, characterized in that, include: The soft core address filtering module is used to receive online upgrade instructions and filter out the target backplane soft core address corresponding to the online upgrade instructions; The channel determination module is used to determine the target soft core channel and the target hard core channel corresponding to the target backplane soft core address from the soft core channels and hard core channels connected to the motherboard; The backplane upgrade module is used to disable the target soft core channel and enable the target hard core channel so that the target backplane corresponding to the online upgrade command can be upgraded through the target hard core channel to obtain the upgraded backplane. The channel switching module is used to shut down the target hard core channel and turn on the target soft core channel; The backplane online upgrade device further includes: The connection unit is used to connect the motherboard connector to the connectors of each backplane using a pre-set cable; each backplane contains a hard core channel and a soft core channel composed of hard core I2C and soft core I2C; the hard core addresses of the same backplane are the same, but the soft core addresses are different. The soft core address filtering module includes: The soft core address determination submodule is used to determine the potential state of each preset pin in the corresponding backplane using the backplane serial number, so as to determine the soft core address of each backplane through the potential state. The target soft core address determination unit is used to receive online upgrade instructions and filter out the target backplane soft core address corresponding to the online upgrade instructions from the soft core addresses of each backplane; The soft core address determination submodule includes: The backplane serial number determination unit is used to build each backplane based on complex programmable logic devices and determine the backplane serial number corresponding to each backplane. A potential state determination unit is used to determine the potential state of each preset pin in the backplane using the backplane serial number. The backplane online upgrade device also includes: The register creation unit is used to create registers for controlling the soft-core channel switching; The backplane upgrade module includes: The first channel switching unit is used to send a preset shutdown command corresponding to the target soft core channel to the register, so that when the target backplane corresponding to the target soft core channel detects that the preset shutdown command has been received in the register, the preset shutdown signal in the register is set to a high potential, and the field-effect transistor in the register is turned on, so that the target soft core channel is turned off and the target hard core channel is turned on. The channel switching module includes: The second channel switching unit is used to send a preset enable command corresponding to the target soft core channel to the register, so that when the target backplane detects that the preset enable command has been received in the register, it sets the preset disable signal to a low potential and turns off the field-effect transistor, thereby enabling the target soft core channel and disabling the target hard core channel.

4. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the steps of the backplane online upgrade method as described in claim 1 or 2.

5. A computer-readable storage medium, characterized in that, Used to store a computer program; wherein, when the computer program is executed by a processor, it implements the steps of the backplane online upgrade method as described in claim 1 or 2.

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