A method capable of implementing a double-layer waveguide
By using oblique layer photolithography and etching techniques, combined with chemical mechanical polishing and PECVD deposition, the limitations of photolithography capabilities in existing technologies have been solved, enabling high-precision manufacturing of double-layer waveguides.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SUZHOU SILICON PHOTONICS TECH CO LTD
- Filing Date
- 2023-05-17
- Publication Date
- 2026-06-23
AI Technical Summary
In existing processes, the size of the tip is defined by a trapezoidal structure when performing the second layer of photolithography and the etching of the lower cladding layer, which results in the size being limited by the photolithography capability.
The hard mask layer and the lower cladding layer are gradually removed by using oblique layer photolithography combined with dry and wet etching. Then, a double waveguide is formed by chemical mechanical polishing and PECVD deposition technology.
Zero-width overlap of the two-layer waveguides was achieved, avoiding the limitations of photolithography capabilities and improving the flexibility and precision of the process.
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Figure CN116482805B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of silicon-based high-speed mid-infrared photonic devices, specifically a method for realizing double-layer waveguides. Background Technology
[0002] The Damascus process, also known as the "Damascus inlay process," involves etching a pattern for metal conductors onto a dielectric layer, followed by filling in the metal to create multi-layer metal interconnects. It is named for its resemblance to the inlay techniques of ancient Damascus artisans. Its key characteristic is that it eliminates the need for etching the metal layer itself. Because dry etching of copper is relatively difficult, this process is crucial for copper fabrication.
[0003] Currently, existing processes define the tip size using a trapezoidal structure during the second layer of photolithography and the etching of the lower cladding layer. Therefore, this size is limited by the photolithography capabilities. Figure 5 As shown.
[0004] In summary, this invention provides a method for realizing a double-layer waveguide to solve the above-mentioned problems. Summary of the Invention
[0005] The purpose of this invention is to provide a method for realizing a double-layer waveguide, so as to solve the problem mentioned in the background art that the existing process defines the size of the tip by a trapezoidal structure when performing the second layer photolithography and the lower cladding etching, and therefore, this size is limited by the photolithography capability.
[0006] To achieve the above objectives, the present invention provides the following technical solution: a method for realizing a double-layer waveguide, comprising the following steps:
[0007] S1: First photolithography; Photoresist is coated on the surface of the hard mask layer to expose the hard mask layer, and then the exposed hard mask layer and the underlying cladding layer are etched away to complete the etching of the hard mask layer and the underlying cladding layer.
[0008] S2: Second layer photolithography and lower cladding layer etching; After cleaning the remaining photoresist and applying new photoresist, the exposed lower cladding layer is etched again using oblique layer photolithography;
[0009] S3: Mask layer removal; The photoresist covering the surface is completely cleaned, and the entire hard mask layer on the surface is removed by etching;
[0010] S4: Film formation; re-grow the waveguide layer on the etched lower cladding surface;
[0011] S5: Polishing; Polish along the highest surface of the lower cladding to polish the newly grown waveguide layer;
[0012] S6: Upper cladding layer growth; a new lower cladding layer is regrown on the polished lower cladding layer surface.
[0013] Preferably, the etching methods used in S1 and S2 are both dry etching.
[0014] Preferably, the method used to remove all hard mask layers in S3 is wet etching.
[0015] Preferably, the growth of the hard mask layer in S4 is achieved using LPCVD SiN deposition technology, or PECVD SiN, LPCVD porous silicon, or PECVD porous silicon.
[0016] Preferably, the waveguide layer in S5 is polished using chemical mechanical polishing technology.
[0017] Preferably, the upper cladding growth in S6 is performed using PECVD deposition technology.
[0018] Compared with the prior art, the present invention has the following beneficial effects:
[0019] In the second-layer photolithography and lower cladding etching, the present invention achieves a zero-width dimension in the overlapping part of the two masks by using oblique-cut layer photolithography, thus avoiding the limitations of photolithography. Attached Figure Description
[0020] Figure 1 This is a schematic diagram of the structure of the present invention;
[0021] Figure 2 This is a schematic diagram of the top view and cross-sectional structure of the present invention before photolithography;
[0022] Figure 3 This is a schematic diagram of the trapezoidal oblique cut top view and the cross-sectional structure at the dashed line in the top view during the first photolithography of this invention;
[0023] Figure 4 This is a schematic diagram of the cross-sectional structure of the invention after the first photolithography and at the dashed line in the top view;
[0024] Figure 5 These are schematic diagrams of the existing second-layer photolithography and lower cladding etching process of this invention, including a top view and a cross-sectional structure diagram at the dashed line in the top view.
[0025] Figure 6 These are top views and cross-sectional structural diagrams of the second-layer photolithography and lower cladding etching process of this invention, as well as the cross-sectional diagram at the dashed line in the top view.
[0026] Figure 7 This is a schematic diagram of the cross-sectional structure after the mask layer of the present invention has been removed;
[0027] Figure 8 This is a schematic diagram of the cross-sectional structure of the film formed according to the present invention;
[0028] Figure 9 This is a schematic diagram of the cross-sectional structure of the present invention after polishing;
[0029] Figure 10 This is a schematic diagram of the cross-sectional structure after the cladding layer of this invention has grown. Detailed Implementation
[0030] The embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples. The following examples are for illustrative purposes only and should not be construed as limiting the scope of the invention.
[0031] like Figures 1-10 As shown, this invention provides a method for realizing a double-layer waveguide, comprising the following steps: S1: First photolithography; photoresist is coated on the surface of a hard mask layer, and trapezoidal slant-cut photolithography is used to expose the trapezoidal hard mask layer, and then the exposed hard mask layer and the lower cladding layer are etched away by dry etching to complete the etching of the hard mask layer and the lower cladding layer; S2: Second photolithography and lower cladding layer etching; after cleaning the remaining photoresist, new photoresist is coated again, and the exposed lower cladding layer is etched again by dry etching using slant-cut photolithography; S3: Mask layer removal; the covered photoresist is completely cleaned, and all the hard mask layer on the surface is removed by wet etching; S4: Film formation; a waveguide layer is regrown on the surface of the etched lower cladding layer using LPCVD SiN deposition technology. SiN deposition technology has good step coverage capability and good film quality; S5: Polishing; Chemical mechanical polishing technology is used to polish along the highest surface of the lower cladding to polish the newly grown waveguide layer; S6: Upper cladding growth; PECVD deposition technology is used to grow a new lower cladding layer on the polished lower cladding surface. PECVD deposition technology has the characteristics of energy saving, low cost and high production capacity. At the same time, it can also reduce the minority carrier lifetime decay in silicon wafers caused by high temperature.
[0032] The embodiments of the present invention are given for the purposes of illustration and description. Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.
Claims
1. A method for realizing a double-layer waveguide, characterized in that, Includes the following steps: S1: First photolithography; Photoresist is coated on the surface of the hard mask layer to expose the hard mask layer, and then the exposed hard mask layer and the lower cladding layer are etched away to complete the etching of the hard mask layer and the lower cladding layer. S2: Second layer photolithography and lower cladding layer etching; After cleaning the remaining photoresist and applying new photoresist, the exposed lower cladding layer is etched again using oblique layer photolithography; S3: Mask layer removal; The photoresist covering is completely cleaned, and the entire hard mask layer on the surface is removed by etching. S4: Film formation; re-grow the waveguide layer on the etched lower cladding surface; S5: Polishing; Polish along the highest surface of the lower cladding to polish the newly grown waveguide layer; S6: Upper cladding layer growth; a new lower cladding layer is regrown on the polished lower cladding layer surface.
2. The method for realizing a double-layer waveguide as described in claim 1, characterized in that: The etching methods used in S1 and S2 are both dry etching.
3. The method for realizing a double-layer waveguide as described in claim 1, characterized in that: The method used to remove all hard mask layers in S3 is wet etching.
4. The method for realizing a double-layer waveguide as described in claim 1, characterized in that: The waveguide layer in S4 is grown using LPCVD SiN deposition technology, or PECVD SiN, LPCVD porous silicon, or PECVD porous silicon.
5. A method for realizing a double-layer waveguide as described in claim 1, characterized in that: The waveguide layer in S5 is polished using chemical mechanical polishing technology.
6. The method for realizing a double-layer waveguide as described in claim 1, characterized in that: The upper cladding layer in S6 is grown using PECVD deposition technology.